drivers/watchdog/omap_wdt.c

   1 /*
   2  * omap_wdt.c
   3  *
   4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
   5  *
   6  * Author: MontaVista Software, Inc.
   7  *       <gdavis@mvista.com> or <source@mvista.com>
   8  *
   9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
  10  * terms of the GNU General Public License version 2. This program is
  11  * licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  *
  14  * History:
  15  *
  16  * 20030527: George G. Davis <gdavis@mvista.com>
  17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
  18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
  19  *      Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
  20  *
  21  * Copyright (c) 2004 Texas Instruments.
  22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
  23  *      2. Ported to 2.6 kernel
  24  *
  25  * Copyright (c) 2005 David Brownell
  26  *      Use the driver model and standard identifiers; handle bigger timeouts.
  27  */
  28
  29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31 #include <linux/module.h>
  32 #include <linux/types.h>
  33 #include <linux/kernel.h>
  34 #include <linux/mm.h>
  35 #include <linux/watchdog.h>
  36 #include <linux/reboot.h>
  37 #include <linux/err.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/io.h>
  41 #include <linux/slab.h>
  42 #include <linux/pm_runtime.h>
  43 #include <linux/platform_data/omap-wd-timer.h>
  44
  45 #include "omap_wdt.h"
  46
  47 static bool nowayout = WATCHDOG_NOWAYOUT;
  48 module_param(nowayout, bool, 0);
  49 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  50         "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  51
  52 static unsigned timer_margin;
  53 module_param(timer_margin, uint, 0);
  54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  55
  56 #define to_omap_wdt_dev(_wdog)  container_of(_wdog, struct omap_wdt_dev, wdog)
  57
  58 struct omap_wdt_dev {
  59         struct watchdog_device wdog;
  60         void __iomem    *base;          /* physical */
  61         struct device   *dev;
  62         bool            omap_wdt_users;
  63         int             wdt_trgr_pattern;
  64         struct mutex    lock;           /* to avoid races with PM */
  65 };
  66
  67 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
  68 {
  69         void __iomem    *base = wdev->base;
  70
  71         /* wait for posted write to complete */
  72         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
  73                 cpu_relax();
  74
  75         wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
  76         writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
  77
  78         /* wait for posted write to complete */
  79         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
  80                 cpu_relax();
  81         /* reloaded WCRR from WLDR */
  82 }
  83
  84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  85 {
  86         void __iomem *base = wdev->base;
  87
  88         /* Sequence to enable the watchdog */
  89         writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
  90         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
  91                 cpu_relax();
  92
  93         writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
  94         while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
  95                 cpu_relax();
  96 }
  97
  98 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  99 {
 100         void __iomem *base = wdev->base;
 101
 102         /* sequence required to disable watchdog */
 103         writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR);       /* TIMER_MODE */
 104         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
 105                 cpu_relax();
 106
 107         writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR);       /* TIMER_MODE */
 108         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
 109                 cpu_relax();
 110 }
 111
 112 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
 113                                    unsigned int timeout)
 114 {
 115         u32 pre_margin = GET_WLDR_VAL(timeout);
 116         void __iomem *base = wdev->base;
 117
 118         /* just count up at 32 KHz */
 119         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
 120                 cpu_relax();
 121
 122         writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
 123         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
 124                 cpu_relax();
 125 }
 126
 127 static int omap_wdt_start(struct watchdog_device *wdog)
 128 {
 129         struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
 130         void __iomem *base = wdev->base;
 131
 132         mutex_lock(&wdev->lock);
 133
 134         wdev->omap_wdt_users = true;
 135
 136         pm_runtime_get_sync(wdev->dev);
 137
 138         /*
 139          * Make sure the watchdog is disabled. This is unfortunately required
 140          * because writing to various registers with the watchdog running has no
 141          * effect.
 142          */
 143         omap_wdt_disable(wdev);
 144
 145         /* initialize prescaler */
 146         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
 147                 cpu_relax();
 148
 149         writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 150         while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
 151                 cpu_relax();
 152
 153         omap_wdt_set_timer(wdev, wdog->timeout);
 154         omap_wdt_reload(wdev); /* trigger loading of new timeout value */
 155         omap_wdt_enable(wdev);
 156
 157         mutex_unlock(&wdev->lock);
 158
 159         return 0;
 160 }
 161
 162 static int omap_wdt_stop(struct watchdog_device *wdog)
 163 {
 164         struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
 165
 166         mutex_lock(&wdev->lock);
 167         omap_wdt_disable(wdev);
 168         pm_runtime_put_sync(wdev->dev);
 169         wdev->omap_wdt_users = false;
 170         mutex_unlock(&wdev->lock);
 171         return 0;
 172 }
 173
 174 static int omap_wdt_ping(struct watchdog_device *wdog)
 175 {
 176         struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
 177
 178         mutex_lock(&wdev->lock);
 179         omap_wdt_reload(wdev);
 180         mutex_unlock(&wdev->lock);
 181
 182         return 0;
 183 }
 184
 185 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
 186                                 unsigned int timeout)
 187 {
 188         struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
 189
 190         mutex_lock(&wdev->lock);
 191         omap_wdt_disable(wdev);
 192         omap_wdt_set_timer(wdev, timeout);
 193         omap_wdt_enable(wdev);
 194         omap_wdt_reload(wdev);
 195         wdog->timeout = timeout;
 196         mutex_unlock(&wdev->lock);
 197
 198         return 0;
 199 }
 200
 201 static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog)
 202 {
 203         struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
 204         void __iomem *base = wdev->base;
 205         u32 value;
 206
 207         value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
 208         return GET_WCCR_SECS(value);
 209 }
 210
 211 static const struct watchdog_info omap_wdt_info = {
 212         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
 213         .identity = "OMAP Watchdog",
 214 };
 215
 216 static const struct watchdog_ops omap_wdt_ops = {
 217         .owner          = THIS_MODULE,
 218         .start          = omap_wdt_start,
 219         .stop           = omap_wdt_stop,
 220         .ping           = omap_wdt_ping,
 221         .set_timeout    = omap_wdt_set_timeout,
 222         .get_timeleft   = omap_wdt_get_timeleft,
 223 };
 224
 225 static int omap_wdt_probe(struct platform_device *pdev)
 226 {
 227         struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
 228         struct resource *res;
 229         struct omap_wdt_dev *wdev;
 230         int ret;
 231
 232         wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 233         if (!wdev)
 234                 return -ENOMEM;
 235
 236         wdev->omap_wdt_users    = false;
 237         wdev->dev               = &pdev->dev;
 238         wdev->wdt_trgr_pattern  = 0x1234;
 239         mutex_init(&wdev->lock);
 240
 241         /* reserve static register mappings */
 242         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 243         wdev->base = devm_ioremap_resource(&pdev->dev, res);
 244         if (IS_ERR(wdev->base))
 245                 return PTR_ERR(wdev->base);
 246
 247         wdev->wdog.info = &omap_wdt_info;
 248         wdev->wdog.ops = &omap_wdt_ops;
 249         wdev->wdog.min_timeout = TIMER_MARGIN_MIN;
 250         wdev->wdog.max_timeout = TIMER_MARGIN_MAX;
 251
 252         if (watchdog_init_timeout(&wdev->wdog, timer_margin, &pdev->dev) < 0)
 253                 wdev->wdog.timeout = TIMER_MARGIN_DEFAULT;
 254
 255         watchdog_set_nowayout(&wdev->wdog, nowayout);
 256
 257         platform_set_drvdata(pdev, wdev);
 258
 259         pm_runtime_enable(wdev->dev);
 260         pm_runtime_get_sync(wdev->dev);
 261
 262         if (pdata && pdata->read_reset_sources) {
 263                 u32 rs = pdata->read_reset_sources();
 264                 if (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT))
 265                         wdev->wdog.bootstatus = WDIOF_CARDRESET;
 266         }
 267
 268         omap_wdt_disable(wdev);
 269
 270         ret = watchdog_register_device(&wdev->wdog);
 271         if (ret) {
 272                 pm_runtime_disable(wdev->dev);
 273                 return ret;
 274         }
 275
 276         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 277                 readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 278                 wdev->wdog.timeout);
 279
 280         pm_runtime_put_sync(wdev->dev);
 281
 282         return 0;
 283 }
 284
 285 static void omap_wdt_shutdown(struct platform_device *pdev)
 286 {
 287         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
 288
 289         mutex_lock(&wdev->lock);
 290         if (wdev->omap_wdt_users) {
 291                 omap_wdt_disable(wdev);
 292                 pm_runtime_put_sync(wdev->dev);
 293         }
 294         mutex_unlock(&wdev->lock);
 295 }
 296
 297 static int omap_wdt_remove(struct platform_device *pdev)
 298 {
 299         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
 300
 301         pm_runtime_disable(wdev->dev);
 302         watchdog_unregister_device(&wdev->wdog);
 303
 304         return 0;
 305 }
 306
 307 #ifdef  CONFIG_PM
 308
 309 /* REVISIT ... not clear this is the best way to handle system suspend; and
 310  * it's very inappropriate for selective device suspend (e.g. suspending this
 311  * through sysfs rather than by stopping the watchdog daemon).  Also, this
 312  * may not play well enough with NOWAYOUT...
 313  */
 314
 315 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
 316 {
 317         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
 318
 319         mutex_lock(&wdev->lock);
 320         if (wdev->omap_wdt_users) {
 321                 omap_wdt_disable(wdev);
 322                 pm_runtime_put_sync(wdev->dev);
 323         }
 324         mutex_unlock(&wdev->lock);
 325
 326         return 0;
 327 }
 328
 329 static int omap_wdt_resume(struct platform_device *pdev)
 330 {
 331         struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
 332
 333         mutex_lock(&wdev->lock);
 334         if (wdev->omap_wdt_users) {
 335                 pm_runtime_get_sync(wdev->dev);
 336                 omap_wdt_enable(wdev);
 337                 omap_wdt_reload(wdev);
 338         }
 339         mutex_unlock(&wdev->lock);
 340
 341         return 0;
 342 }
 343
 344 #else
 345 #define omap_wdt_suspend        NULL
 346 #define omap_wdt_resume         NULL
 347 #endif
 348
 349 static const struct of_device_id omap_wdt_of_match[] = {
 350         { .compatible = "ti,omap3-wdt", },
 351         {},
 352 };
 353 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
 354
 355 static struct platform_driver omap_wdt_driver = {
 356         .probe          = omap_wdt_probe,
 357         .remove         = omap_wdt_remove,
 358         .shutdown       = omap_wdt_shutdown,
 359         .suspend        = omap_wdt_suspend,
 360         .resume         = omap_wdt_resume,
 361         .driver         = {
 362                 .name   = "omap_wdt",
 363                 .of_match_table = omap_wdt_of_match,
 364         },
 365 };
 366
 367 module_platform_driver(omap_wdt_driver);
 368
 369 MODULE_AUTHOR("George G. Davis");
 370 MODULE_LICENSE("GPL");
 371 MODULE_ALIAS("platform:omap_wdt");