drivers/watchdog/imx2_wdt.c

   1 /*
   2  * Watchdog driver for IMX2 and later processors
   3  *
   4  *  Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
   5  *  Copyright (C) 2014 Freescale Semiconductor, Inc.
   6  *
   7  * some parts adapted by similar drivers from Darius Augulis and Vladimir
   8  * Zapolskiy, additional improvements by Wim Van Sebroeck.
   9  *
  10  * This program is free software; you can redistribute it and/or modify it
  11  * under the terms of the GNU General Public License version 2 as published by
  12  * the Free Software Foundation.
  13  *
  14  * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
  15  *
  16  *                      MX1:            MX2+:
  17  *                      ----            -----
  18  * Registers:           32-bit          16-bit
  19  * Stopable timer:      Yes             No
  20  * Need to enable clk:  No              Yes
  21  * Halt on suspend:     Manual          Can be automatic
  22  */
  23
  24 #include <linux/clk.h>
  25 #include <linux/init.h>
  26 #include <linux/io.h>
  27 #include <linux/jiffies.h>
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/moduleparam.h>
  31 #include <linux/of_address.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/regmap.h>
  34 #include <linux/timer.h>
  35 #include <linux/watchdog.h>
  36
  37 #define DRIVER_NAME "imx2-wdt"
  38
  39 #define IMX2_WDT_WCR            0x00            /* Control Register */
  40 #define IMX2_WDT_WCR_WT         (0xFF << 8)     /* -> Watchdog Timeout Field */
  41 #define IMX2_WDT_WCR_WRE        (1 << 3)        /* -> WDOG Reset Enable */
  42 #define IMX2_WDT_WCR_WDE        (1 << 2)        /* -> Watchdog Enable */
  43 #define IMX2_WDT_WCR_WDZST      (1 << 0)        /* -> Watchdog timer Suspend */
  44
  45 #define IMX2_WDT_WSR            0x02            /* Service Register */
  46 #define IMX2_WDT_SEQ1           0x5555          /* -> service sequence 1 */
  47 #define IMX2_WDT_SEQ2           0xAAAA          /* -> service sequence 2 */
  48
  49 #define IMX2_WDT_WRSR           0x04            /* Reset Status Register */
  50 #define IMX2_WDT_WRSR_TOUT      (1 << 1)        /* -> Reset due to Timeout */
  51
  52 #define IMX2_WDT_MAX_TIME       128
  53 #define IMX2_WDT_DEFAULT_TIME   60              /* in seconds */
  54
  55 #define WDOG_SEC_TO_COUNT(s)    ((s * 2 - 1) << 8)
  56
  57 struct imx2_wdt_device {
  58         struct clk *clk;
  59         struct regmap *regmap;
  60         struct timer_list timer;        /* Pings the watchdog when closed */
  61         struct watchdog_device wdog;
  62 };
  63
  64 static bool nowayout = WATCHDOG_NOWAYOUT;
  65 module_param(nowayout, bool, 0);
  66 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  67                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  68
  69
  70 static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
  71 module_param(timeout, uint, 0);
  72 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
  73                                 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
  74
  75 static const struct watchdog_info imx2_wdt_info = {
  76         .identity = "imx2+ watchdog",
  77         .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  78 };
  79
  80 static inline void imx2_wdt_setup(struct watchdog_device *wdog)
  81 {
  82         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
  83         u32 val;
  84
  85         regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
  86
  87         /* Suspend timer in low power mode, write once-only */
  88         val |= IMX2_WDT_WCR_WDZST;
  89         /* Strip the old watchdog Time-Out value */
  90         val &= ~IMX2_WDT_WCR_WT;
  91         /* Generate reset if WDOG times out */
  92         val &= ~IMX2_WDT_WCR_WRE;
  93         /* Keep Watchdog Disabled */
  94         val &= ~IMX2_WDT_WCR_WDE;
  95         /* Set the watchdog's Time-Out value */
  96         val |= WDOG_SEC_TO_COUNT(wdog->timeout);
  97
  98         regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
  99
 100         /* enable the watchdog */
 101         val |= IMX2_WDT_WCR_WDE;
 102         regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
 103 }
 104
 105 static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
 106 {
 107         u32 val;
 108
 109         regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
 110
 111         return val & IMX2_WDT_WCR_WDE;
 112 }
 113
 114 static int imx2_wdt_ping(struct watchdog_device *wdog)
 115 {
 116         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 117
 118         regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
 119         regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
 120         return 0;
 121 }
 122
 123 static void imx2_wdt_timer_ping(unsigned long arg)
 124 {
 125         struct watchdog_device *wdog = (struct watchdog_device *)arg;
 126         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 127
 128         /* ping it every wdog->timeout / 2 seconds to prevent reboot */
 129         imx2_wdt_ping(wdog);
 130         mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
 131 }
 132
 133 static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
 134                                 unsigned int new_timeout)
 135 {
 136         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 137
 138         regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
 139                            WDOG_SEC_TO_COUNT(new_timeout));
 140         return 0;
 141 }
 142
 143 static int imx2_wdt_start(struct watchdog_device *wdog)
 144 {
 145         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 146
 147         if (imx2_wdt_is_running(wdev)) {
 148                 /* delete the timer that pings the watchdog after close */
 149                 del_timer_sync(&wdev->timer);
 150                 imx2_wdt_set_timeout(wdog, wdog->timeout);
 151         } else
 152                 imx2_wdt_setup(wdog);
 153
 154         return imx2_wdt_ping(wdog);
 155 }
 156
 157 static int imx2_wdt_stop(struct watchdog_device *wdog)
 158 {
 159         /*
 160          * We don't need a clk_disable, it cannot be disabled once started.
 161          * We use a timer to ping the watchdog while /dev/watchdog is closed
 162          */
 163         imx2_wdt_timer_ping((unsigned long)wdog);
 164         return 0;
 165 }
 166
 167 static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
 168 {
 169         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 170
 171         if (imx2_wdt_is_running(wdev)) {
 172                 imx2_wdt_set_timeout(wdog, wdog->timeout);
 173                 imx2_wdt_timer_ping((unsigned long)wdog);
 174         }
 175 }
 176
 177 static struct watchdog_ops imx2_wdt_ops = {
 178         .owner = THIS_MODULE,
 179         .start = imx2_wdt_start,
 180         .stop = imx2_wdt_stop,
 181         .ping = imx2_wdt_ping,
 182         .set_timeout = imx2_wdt_set_timeout,
 183 };
 184
 185 static struct regmap_config imx2_wdt_regmap_config = {
 186         .reg_bits = 16,
 187         .reg_stride = 2,
 188         .val_bits = 16,
 189         .max_register = 0x8,
 190 };
 191
 192 static int __init imx2_wdt_probe(struct platform_device *pdev)
 193 {
 194         struct imx2_wdt_device *wdev;
 195         struct watchdog_device *wdog;
 196         struct resource *res;
 197         void __iomem *base;
 198         int ret;
 199         u32 val;
 200
 201         wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 202         if (!wdev)
 203                 return -ENOMEM;
 204
 205         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 206         base = devm_ioremap_resource(&pdev->dev, res);
 207         if (IS_ERR(base))
 208                 return PTR_ERR(base);
 209
 210         wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
 211                                                  &imx2_wdt_regmap_config);
 212         if (IS_ERR(wdev->regmap)) {
 213                 dev_err(&pdev->dev, "regmap init failed\n");
 214                 return PTR_ERR(wdev->regmap);
 215         }
 216
 217         wdev->clk = devm_clk_get(&pdev->dev, NULL);
 218         if (IS_ERR(wdev->clk)) {
 219                 dev_err(&pdev->dev, "can't get Watchdog clock\n");
 220                 return PTR_ERR(wdev->clk);
 221         }
 222
 223         wdog                    = &wdev->wdog;
 224         wdog->info              = &imx2_wdt_info;
 225         wdog->ops               = &imx2_wdt_ops;
 226         wdog->min_timeout       = 1;
 227         wdog->max_timeout       = IMX2_WDT_MAX_TIME;
 228
 229         clk_prepare_enable(wdev->clk);
 230
 231         regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
 232         wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
 233
 234         wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
 235         if (wdog->timeout != timeout)
 236                 dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
 237                          timeout, wdog->timeout);
 238
 239         platform_set_drvdata(pdev, wdog);
 240         watchdog_set_drvdata(wdog, wdev);
 241         watchdog_set_nowayout(wdog, nowayout);
 242         watchdog_init_timeout(wdog, timeout, &pdev->dev);
 243
 244         setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
 245
 246         imx2_wdt_ping_if_active(wdog);
 247
 248         ret = watchdog_register_device(wdog);
 249         if (ret) {
 250                 dev_err(&pdev->dev, "cannot register watchdog device\n");
 251                 return ret;
 252         }
 253
 254         dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
 255                  wdog->timeout, nowayout);
 256
 257         return 0;
 258 }
 259
 260 static int __exit imx2_wdt_remove(struct platform_device *pdev)
 261 {
 262         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 263         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 264
 265         watchdog_unregister_device(wdog);
 266
 267         if (imx2_wdt_is_running(wdev)) {
 268                 del_timer_sync(&wdev->timer);
 269                 imx2_wdt_ping(wdog);
 270                 dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
 271         }
 272         return 0;
 273 }
 274
 275 static void imx2_wdt_shutdown(struct platform_device *pdev)
 276 {
 277         struct watchdog_device *wdog = platform_get_drvdata(pdev);
 278         struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 279
 280         if (imx2_wdt_is_running(wdev)) {
 281                 /*
 282                  * We are running, we need to delete the timer but will
 283                  * give max timeout before reboot will take place
 284                  */
 285                 del_timer_sync(&wdev->timer);
 286                 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
 287                 imx2_wdt_ping(wdog);
 288                 dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
 289         }
 290 }
 291
 292 static const struct of_device_id imx2_wdt_dt_ids[] = {
 293         { .compatible = "fsl,imx21-wdt", },
 294         { /* sentinel */ }
 295 };
 296 MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
 297
 298 static struct platform_driver imx2_wdt_driver = {
 299         .remove         = __exit_p(imx2_wdt_remove),
 300         .shutdown       = imx2_wdt_shutdown,
 301         .driver         = {
 302                 .name   = DRIVER_NAME,
 303                 .owner  = THIS_MODULE,
 304                 .of_match_table = imx2_wdt_dt_ids,
 305         },
 306 };
 307
 308 module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
 309
 310 MODULE_AUTHOR("Wolfram Sang");
 311 MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
 312 MODULE_LICENSE("GPL v2");
 313 MODULE_ALIAS("platform:" DRIVER_NAME);