2 * linux/drivers/video/sa1100fb.h
3 * -- StrongARM 1100 LCD Controller Frame Buffer Device
5 * Copyright (C) 1999 Eric A. Thomas
6 * Based on acornfb.c Copyright (C) Russell King.
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */
16 #define LCSR 0x0004 /* LCD Status Reg. */
17 #define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */
18 #define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */
19 #define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */
20 #define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */
21 #define LCCR1 0x0020 /* LCD Control Reg. 1 */
22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */
23 #define LCCR3 0x0028 /* LCD Control Reg. 3 */
25 /* Shadows for LCD controller registers */
26 struct sa1100fb_lcd_reg {
33 struct sa1100fb_info {
36 const struct sa1100fb_rgb *rgb[NR_RGB];
38 struct gpio_desc *shannon_lcden;
41 * These are the addresses we mapped
42 * the framebuffer memory region to.
49 dma_addr_t screen_dma;
51 dma_addr_t palette_dma;
62 volatile u_char state;
63 volatile u_char task_state;
64 struct mutex ctrlr_lock;
65 wait_queue_head_t ctrlr_wait;
66 struct work_struct task;
68 #ifdef CONFIG_CPU_FREQ
69 struct notifier_block freq_transition;
72 const struct sa1100fb_mach_info *inf;
75 u32 pseudo_palette[16];
78 #define TO_INF(ptr,member) container_of(ptr,struct sa1100fb_info,member)
80 #define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9)
83 * These are the actions for set_ctrlr_state
87 #define C_DISABLE_CLKCHANGE (2)
88 #define C_ENABLE_CLKCHANGE (3)
89 #define C_REENABLE (4)
90 #define C_DISABLE_PM (5)
91 #define C_ENABLE_PM (6)
94 #define SA1100_NAME "SA1100"
97 * Minimum X and Y resolutions