1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/video/omap2/dss/dpi.c
5 * Copyright (C) 2009 Nokia Corporation
6 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
8 * Some code and ideas taken from drivers/video/omap/ driver
12 #define DSS_SUBSYS_NAME "DPI"
14 #include <linux/kernel.h>
15 #include <linux/delay.h>
16 #include <linux/export.h>
17 #include <linux/err.h>
18 #include <linux/errno.h>
19 #include <linux/platform_device.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/string.h>
23 #include <linux/clk.h>
24 #include <linux/component.h>
26 #include <video/omapfb_dss.h>
29 #include "dss_features.h"
34 struct platform_device *pdev;
36 struct regulator *vdds_dsi_reg;
41 struct omap_video_timings timings;
42 struct dss_lcd_mgr_config mgr_config;
45 struct omap_dss_device output;
47 bool port_initialized;
50 static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
52 return container_of(dssdev, struct dpi_data, output);
55 /* only used in non-DT mode */
56 static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
58 return dev_get_drvdata(&pdev->dev);
61 static struct dss_pll *dpi_get_pll(enum omap_channel channel)
64 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
65 * would also be used for DISPC fclk. Meaning, when the DPI output is
66 * disabled, DISPC clock will be disabled, and TV out will stop.
68 switch (omapdss_get_version()) {
69 case OMAPDSS_VER_OMAP24xx:
70 case OMAPDSS_VER_OMAP34xx_ES1:
71 case OMAPDSS_VER_OMAP34xx_ES3:
72 case OMAPDSS_VER_OMAP3630:
73 case OMAPDSS_VER_AM35xx:
74 case OMAPDSS_VER_AM43xx:
77 case OMAPDSS_VER_OMAP4430_ES1:
78 case OMAPDSS_VER_OMAP4430_ES2:
79 case OMAPDSS_VER_OMAP4:
81 case OMAP_DSS_CHANNEL_LCD:
82 return dss_pll_find("dsi0");
83 case OMAP_DSS_CHANNEL_LCD2:
84 return dss_pll_find("dsi1");
89 case OMAPDSS_VER_OMAP5:
91 case OMAP_DSS_CHANNEL_LCD:
92 return dss_pll_find("dsi0");
93 case OMAP_DSS_CHANNEL_LCD3:
94 return dss_pll_find("dsi1");
99 case OMAPDSS_VER_DRA7xx:
101 case OMAP_DSS_CHANNEL_LCD:
102 case OMAP_DSS_CHANNEL_LCD2:
103 return dss_pll_find("video0");
104 case OMAP_DSS_CHANNEL_LCD3:
105 return dss_pll_find("video1");
115 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
118 case OMAP_DSS_CHANNEL_LCD:
119 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
120 case OMAP_DSS_CHANNEL_LCD2:
121 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
122 case OMAP_DSS_CHANNEL_LCD3:
123 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
125 /* this shouldn't happen */
127 return OMAP_DSS_CLK_SRC_FCK;
131 struct dpi_clk_calc_ctx {
136 unsigned long pck_min, pck_max;
140 struct dss_pll_clock_info dsi_cinfo;
142 struct dispc_clock_info dispc_cinfo;
145 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
146 unsigned long pck, void *data)
148 struct dpi_clk_calc_ctx *ctx = data;
151 * Odd dividers give us uneven duty cycle, causing problem when level
152 * shifted. So skip all odd dividers when the pixel clock is on the
155 if (ctx->pck_min >= 100000000) {
156 if (lckd > 1 && lckd % 2 != 0)
159 if (pckd > 1 && pckd % 2 != 0)
163 ctx->dispc_cinfo.lck_div = lckd;
164 ctx->dispc_cinfo.pck_div = pckd;
165 ctx->dispc_cinfo.lck = lck;
166 ctx->dispc_cinfo.pck = pck;
172 static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
175 struct dpi_clk_calc_ctx *ctx = data;
178 * Odd dividers give us uneven duty cycle, causing problem when level
179 * shifted. So skip all odd dividers when the pixel clock is on the
182 if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 100000000)
185 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc;
186 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc;
188 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
189 dpi_calc_dispc_cb, ctx);
193 static bool dpi_calc_pll_cb(int n, int m, unsigned long fint,
194 unsigned long clkdco,
197 struct dpi_clk_calc_ctx *ctx = data;
199 ctx->dsi_cinfo.n = n;
200 ctx->dsi_cinfo.m = m;
201 ctx->dsi_cinfo.fint = fint;
202 ctx->dsi_cinfo.clkdco = clkdco;
204 return dss_pll_hsdiv_calc(ctx->pll, clkdco,
205 ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
206 dpi_calc_hsdiv_cb, ctx);
209 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
211 struct dpi_clk_calc_ctx *ctx = data;
215 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
216 dpi_calc_dispc_cb, ctx);
219 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
220 struct dpi_clk_calc_ctx *ctx)
223 unsigned long pll_min, pll_max;
225 memset(ctx, 0, sizeof(*ctx));
227 ctx->pck_min = pck - 1000;
228 ctx->pck_max = pck + 1000;
233 clkin = clk_get_rate(ctx->pll->clkin);
235 return dss_pll_calc(ctx->pll, clkin,
237 dpi_calc_pll_cb, ctx);
240 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
245 * DSS fck gives us very few possibilities, so finding a good pixel
246 * clock may not be possible. We try multiple times to find the clock,
247 * each time widening the pixel clock range we look for, up to
251 for (i = 0; i < 25; ++i) {
254 memset(ctx, 0, sizeof(*ctx));
255 if (pck > 1000 * i * i * i)
256 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
259 ctx->pck_max = pck + 1000 * i * i * i;
261 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
271 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
272 unsigned long pck_req, unsigned long *fck, int *lck_div,
275 struct dpi_clk_calc_ctx ctx;
279 ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
283 r = dss_pll_set_config(dpi->pll, &ctx.dsi_cinfo);
287 dss_select_lcd_clk_source(channel,
288 dpi_get_alt_clk_src(channel));
290 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
292 *fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
293 *lck_div = ctx.dispc_cinfo.lck_div;
294 *pck_div = ctx.dispc_cinfo.pck_div;
299 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
300 unsigned long *fck, int *lck_div, int *pck_div)
302 struct dpi_clk_calc_ctx ctx;
306 ok = dpi_dss_clk_calc(pck_req, &ctx);
310 r = dss_set_fck_rate(ctx.fck);
314 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
317 *lck_div = ctx.dispc_cinfo.lck_div;
318 *pck_div = ctx.dispc_cinfo.pck_div;
323 static int dpi_set_mode(struct dpi_data *dpi)
325 struct omap_dss_device *out = &dpi->output;
326 struct omap_overlay_manager *mgr = out->manager;
327 struct omap_video_timings *t = &dpi->timings;
328 int lck_div = 0, pck_div = 0;
329 unsigned long fck = 0;
334 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
337 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
342 pck = fck / lck_div / pck_div;
344 if (pck != t->pixelclock) {
345 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
351 dss_mgr_set_timings(mgr, t);
356 static void dpi_config_lcd_manager(struct dpi_data *dpi)
358 struct omap_dss_device *out = &dpi->output;
359 struct omap_overlay_manager *mgr = out->manager;
361 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
363 dpi->mgr_config.stallmode = false;
364 dpi->mgr_config.fifohandcheck = false;
366 dpi->mgr_config.video_port_width = dpi->data_lines;
368 dpi->mgr_config.lcden_sig_polarity = 0;
370 dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
373 static int dpi_display_enable(struct omap_dss_device *dssdev)
375 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
376 struct omap_dss_device *out = &dpi->output;
379 mutex_lock(&dpi->lock);
381 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
382 DSSERR("no VDSS_DSI regulator\n");
387 if (out->manager == NULL) {
388 DSSERR("failed to enable display: no output/manager\n");
393 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
394 r = regulator_enable(dpi->vdds_dsi_reg);
399 r = dispc_runtime_get();
403 r = dss_dpi_select_source(out->port_num, out->manager->id);
408 r = dss_pll_enable(dpi->pll);
410 goto err_dsi_pll_init;
413 r = dpi_set_mode(dpi);
417 dpi_config_lcd_manager(dpi);
421 r = dss_mgr_enable(out->manager);
425 mutex_unlock(&dpi->lock);
432 dss_pll_disable(dpi->pll);
437 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
438 regulator_disable(dpi->vdds_dsi_reg);
442 mutex_unlock(&dpi->lock);
446 static void dpi_display_disable(struct omap_dss_device *dssdev)
448 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
449 struct omap_overlay_manager *mgr = dpi->output.manager;
451 mutex_lock(&dpi->lock);
453 dss_mgr_disable(mgr);
456 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
457 dss_pll_disable(dpi->pll);
462 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
463 regulator_disable(dpi->vdds_dsi_reg);
465 mutex_unlock(&dpi->lock);
468 static void dpi_set_timings(struct omap_dss_device *dssdev,
469 struct omap_video_timings *timings)
471 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
473 DSSDBG("dpi_set_timings\n");
475 mutex_lock(&dpi->lock);
477 dpi->timings = *timings;
479 mutex_unlock(&dpi->lock);
482 static void dpi_get_timings(struct omap_dss_device *dssdev,
483 struct omap_video_timings *timings)
485 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
487 mutex_lock(&dpi->lock);
489 *timings = dpi->timings;
491 mutex_unlock(&dpi->lock);
494 static int dpi_check_timings(struct omap_dss_device *dssdev,
495 struct omap_video_timings *timings)
497 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
498 struct omap_overlay_manager *mgr = dpi->output.manager;
499 int lck_div, pck_div;
502 struct dpi_clk_calc_ctx ctx;
505 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
508 if (timings->pixelclock == 0)
512 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
516 fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
518 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
525 lck_div = ctx.dispc_cinfo.lck_div;
526 pck_div = ctx.dispc_cinfo.pck_div;
528 pck = fck / lck_div / pck_div;
530 timings->pixelclock = pck;
535 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
537 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
539 mutex_lock(&dpi->lock);
541 dpi->data_lines = data_lines;
543 mutex_unlock(&dpi->lock);
546 static int dpi_verify_dsi_pll(struct dss_pll *pll)
550 /* do initial setup with the PLL to see if it is operational */
552 r = dss_pll_enable(pll);
556 dss_pll_disable(pll);
561 static int dpi_init_regulator(struct dpi_data *dpi)
563 struct regulator *vdds_dsi;
565 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
568 if (dpi->vdds_dsi_reg)
571 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
572 if (IS_ERR(vdds_dsi)) {
573 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
574 DSSERR("can't get VDDS_DSI regulator\n");
575 return PTR_ERR(vdds_dsi);
578 dpi->vdds_dsi_reg = vdds_dsi;
583 static void dpi_init_pll(struct dpi_data *dpi)
590 pll = dpi_get_pll(dpi->output.dispc_channel);
594 /* On DRA7 we need to set a mux to use the PLL */
595 if (omapdss_get_version() == OMAPDSS_VER_DRA7xx)
596 dss_ctrl_pll_set_control_mux(pll->id, dpi->output.dispc_channel);
598 if (dpi_verify_dsi_pll(pll)) {
599 DSSWARN("DSI PLL not operational\n");
607 * Return a hardcoded channel for the DPI output. This should work for
608 * current use cases, but this can be later expanded to either resolve
609 * the channel in some more dynamic manner, or get the channel as a user
612 static enum omap_channel dpi_get_channel(int port_num)
614 switch (omapdss_get_version()) {
615 case OMAPDSS_VER_OMAP24xx:
616 case OMAPDSS_VER_OMAP34xx_ES1:
617 case OMAPDSS_VER_OMAP34xx_ES3:
618 case OMAPDSS_VER_OMAP3630:
619 case OMAPDSS_VER_AM35xx:
620 case OMAPDSS_VER_AM43xx:
621 return OMAP_DSS_CHANNEL_LCD;
623 case OMAPDSS_VER_DRA7xx:
626 return OMAP_DSS_CHANNEL_LCD3;
628 return OMAP_DSS_CHANNEL_LCD2;
631 return OMAP_DSS_CHANNEL_LCD;
634 case OMAPDSS_VER_OMAP4430_ES1:
635 case OMAPDSS_VER_OMAP4430_ES2:
636 case OMAPDSS_VER_OMAP4:
637 return OMAP_DSS_CHANNEL_LCD2;
639 case OMAPDSS_VER_OMAP5:
640 return OMAP_DSS_CHANNEL_LCD3;
643 DSSWARN("unsupported DSS version\n");
644 return OMAP_DSS_CHANNEL_LCD;
648 static int dpi_connect(struct omap_dss_device *dssdev,
649 struct omap_dss_device *dst)
651 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
652 struct omap_overlay_manager *mgr;
655 r = dpi_init_regulator(dpi);
661 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
665 r = dss_mgr_connect(mgr, dssdev);
669 r = omapdss_output_set_device(dssdev, dst);
671 DSSERR("failed to connect output to new device: %s\n",
673 dss_mgr_disconnect(mgr, dssdev);
680 static void dpi_disconnect(struct omap_dss_device *dssdev,
681 struct omap_dss_device *dst)
683 WARN_ON(dst != dssdev->dst);
685 if (dst != dssdev->dst)
688 omapdss_output_unset_device(dssdev);
691 dss_mgr_disconnect(dssdev->manager, dssdev);
694 static const struct omapdss_dpi_ops dpi_ops = {
695 .connect = dpi_connect,
696 .disconnect = dpi_disconnect,
698 .enable = dpi_display_enable,
699 .disable = dpi_display_disable,
701 .check_timings = dpi_check_timings,
702 .set_timings = dpi_set_timings,
703 .get_timings = dpi_get_timings,
705 .set_data_lines = dpi_set_data_lines,
708 static void dpi_init_output(struct platform_device *pdev)
710 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
711 struct omap_dss_device *out = &dpi->output;
713 out->dev = &pdev->dev;
714 out->id = OMAP_DSS_OUTPUT_DPI;
715 out->output_type = OMAP_DISPLAY_TYPE_DPI;
717 out->dispc_channel = dpi_get_channel(0);
718 out->ops.dpi = &dpi_ops;
719 out->owner = THIS_MODULE;
721 omapdss_register_output(out);
724 static void dpi_uninit_output(struct platform_device *pdev)
726 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
727 struct omap_dss_device *out = &dpi->output;
729 omapdss_unregister_output(out);
732 static void dpi_init_output_port(struct platform_device *pdev,
733 struct device_node *port)
735 struct dpi_data *dpi = port->data;
736 struct omap_dss_device *out = &dpi->output;
740 r = of_property_read_u32(port, "reg", &port_num);
757 out->dev = &pdev->dev;
758 out->id = OMAP_DSS_OUTPUT_DPI;
759 out->output_type = OMAP_DISPLAY_TYPE_DPI;
760 out->dispc_channel = dpi_get_channel(port_num);
761 out->port_num = port_num;
762 out->ops.dpi = &dpi_ops;
763 out->owner = THIS_MODULE;
765 omapdss_register_output(out);
768 static void dpi_uninit_output_port(struct device_node *port)
770 struct dpi_data *dpi = port->data;
771 struct omap_dss_device *out = &dpi->output;
773 omapdss_unregister_output(out);
776 static int dpi_bind(struct device *dev, struct device *master, void *data)
778 struct platform_device *pdev = to_platform_device(dev);
779 struct dpi_data *dpi;
781 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
787 dev_set_drvdata(&pdev->dev, dpi);
789 mutex_init(&dpi->lock);
791 dpi_init_output(pdev);
796 static void dpi_unbind(struct device *dev, struct device *master, void *data)
798 struct platform_device *pdev = to_platform_device(dev);
800 dpi_uninit_output(pdev);
803 static const struct component_ops dpi_component_ops = {
805 .unbind = dpi_unbind,
808 static int dpi_probe(struct platform_device *pdev)
810 return component_add(&pdev->dev, &dpi_component_ops);
813 static int dpi_remove(struct platform_device *pdev)
815 component_del(&pdev->dev, &dpi_component_ops);
819 static struct platform_driver omap_dpi_driver = {
821 .remove = dpi_remove,
823 .name = "omapdss_dpi",
824 .suppress_bind_attrs = true,
828 int __init dpi_init_platform_driver(void)
830 return platform_driver_register(&omap_dpi_driver);
833 void dpi_uninit_platform_driver(void)
835 platform_driver_unregister(&omap_dpi_driver);
838 int dpi_init_port(struct platform_device *pdev, struct device_node *port)
840 struct dpi_data *dpi;
841 struct device_node *ep;
845 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
849 ep = omapdss_of_get_next_endpoint(port, NULL);
853 r = of_property_read_u32(ep, "data-lines", &datalines);
855 DSSERR("failed to parse datalines\n");
859 dpi->data_lines = datalines;
866 mutex_init(&dpi->lock);
868 dpi_init_output_port(pdev, port);
870 dpi->port_initialized = true;
880 void dpi_uninit_port(struct device_node *port)
882 struct dpi_data *dpi = port->data;
884 if (!dpi->port_initialized)
887 dpi_uninit_output_port(port);