2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
34 #include <linux/clk.h>
36 #include <video/omapdss.h>
39 #include "dss_features.h"
44 struct platform_device *pdev;
46 struct regulator *vdds_dsi_reg;
51 struct omap_video_timings timings;
52 struct dss_lcd_mgr_config mgr_config;
55 struct omap_dss_device output;
57 bool port_initialized;
60 static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
62 return container_of(dssdev, struct dpi_data, output);
65 /* only used in non-DT mode */
66 static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
68 return dev_get_drvdata(&pdev->dev);
71 static struct dss_pll *dpi_get_pll(enum omap_channel channel)
74 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
75 * would also be used for DISPC fclk. Meaning, when the DPI output is
76 * disabled, DISPC clock will be disabled, and TV out will stop.
78 switch (omapdss_get_version()) {
79 case OMAPDSS_VER_OMAP24xx:
80 case OMAPDSS_VER_OMAP34xx_ES1:
81 case OMAPDSS_VER_OMAP34xx_ES3:
82 case OMAPDSS_VER_OMAP3630:
83 case OMAPDSS_VER_AM35xx:
84 case OMAPDSS_VER_AM43xx:
87 case OMAPDSS_VER_OMAP4430_ES1:
88 case OMAPDSS_VER_OMAP4430_ES2:
89 case OMAPDSS_VER_OMAP4:
91 case OMAP_DSS_CHANNEL_LCD:
92 return dss_pll_find("dsi0");
93 case OMAP_DSS_CHANNEL_LCD2:
94 return dss_pll_find("dsi1");
99 case OMAPDSS_VER_OMAP5:
101 case OMAP_DSS_CHANNEL_LCD:
102 return dss_pll_find("dsi0");
103 case OMAP_DSS_CHANNEL_LCD3:
104 return dss_pll_find("dsi1");
114 static enum omap_dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel)
117 case OMAP_DSS_CHANNEL_LCD:
118 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;
119 case OMAP_DSS_CHANNEL_LCD2:
120 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
121 case OMAP_DSS_CHANNEL_LCD3:
122 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;
124 /* this shouldn't happen */
126 return OMAP_DSS_CLK_SRC_FCK;
130 struct dpi_clk_calc_ctx {
135 unsigned long pck_min, pck_max;
139 struct dss_pll_clock_info dsi_cinfo;
141 struct dispc_clock_info dispc_cinfo;
144 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
145 unsigned long pck, void *data)
147 struct dpi_clk_calc_ctx *ctx = data;
150 * Odd dividers give us uneven duty cycle, causing problem when level
151 * shifted. So skip all odd dividers when the pixel clock is on the
154 if (ctx->pck_min >= 100000000) {
155 if (lckd > 1 && lckd % 2 != 0)
158 if (pckd > 1 && pckd % 2 != 0)
162 ctx->dispc_cinfo.lck_div = lckd;
163 ctx->dispc_cinfo.pck_div = pckd;
164 ctx->dispc_cinfo.lck = lck;
165 ctx->dispc_cinfo.pck = pck;
171 static bool dpi_calc_hsdiv_cb(int m_dispc, unsigned long dispc,
174 struct dpi_clk_calc_ctx *ctx = data;
177 * Odd dividers give us uneven duty cycle, causing problem when level
178 * shifted. So skip all odd dividers when the pixel clock is on the
181 if (m_dispc > 1 && m_dispc % 2 != 0 && ctx->pck_min >= 100000000)
184 ctx->dsi_cinfo.mX[HSDIV_DISPC] = m_dispc;
185 ctx->dsi_cinfo.clkout[HSDIV_DISPC] = dispc;
187 return dispc_div_calc(dispc, ctx->pck_min, ctx->pck_max,
188 dpi_calc_dispc_cb, ctx);
192 static bool dpi_calc_pll_cb(int n, int m, unsigned long fint,
193 unsigned long clkdco,
196 struct dpi_clk_calc_ctx *ctx = data;
198 ctx->dsi_cinfo.n = n;
199 ctx->dsi_cinfo.m = m;
200 ctx->dsi_cinfo.fint = fint;
201 ctx->dsi_cinfo.clkdco = clkdco;
203 return dss_pll_hsdiv_calc(ctx->pll, clkdco,
204 ctx->pck_min, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
205 dpi_calc_hsdiv_cb, ctx);
208 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
210 struct dpi_clk_calc_ctx *ctx = data;
214 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
215 dpi_calc_dispc_cb, ctx);
218 static bool dpi_dsi_clk_calc(struct dpi_data *dpi, unsigned long pck,
219 struct dpi_clk_calc_ctx *ctx)
222 unsigned long pll_min, pll_max;
224 memset(ctx, 0, sizeof(*ctx));
226 ctx->pck_min = pck - 1000;
227 ctx->pck_max = pck + 1000;
232 clkin = clk_get_rate(ctx->pll->clkin);
234 return dss_pll_calc(ctx->pll, clkin,
236 dpi_calc_pll_cb, ctx);
239 static bool dpi_dss_clk_calc(unsigned long pck, struct dpi_clk_calc_ctx *ctx)
244 * DSS fck gives us very few possibilities, so finding a good pixel
245 * clock may not be possible. We try multiple times to find the clock,
246 * each time widening the pixel clock range we look for, up to
250 for (i = 0; i < 25; ++i) {
253 memset(ctx, 0, sizeof(*ctx));
254 if (pck > 1000 * i * i * i)
255 ctx->pck_min = max(pck - 1000 * i * i * i, 0lu);
258 ctx->pck_max = pck + 1000 * i * i * i;
260 ok = dss_div_calc(pck, ctx->pck_min, dpi_calc_dss_cb, ctx);
270 static int dpi_set_dsi_clk(struct dpi_data *dpi, enum omap_channel channel,
271 unsigned long pck_req, unsigned long *fck, int *lck_div,
274 struct dpi_clk_calc_ctx ctx;
278 ok = dpi_dsi_clk_calc(dpi, pck_req, &ctx);
282 r = dss_pll_set_config(dpi->pll, &ctx.dsi_cinfo);
286 dss_select_lcd_clk_source(channel,
287 dpi_get_alt_clk_src(channel));
289 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
291 *fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
292 *lck_div = ctx.dispc_cinfo.lck_div;
293 *pck_div = ctx.dispc_cinfo.pck_div;
298 static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
299 unsigned long *fck, int *lck_div, int *pck_div)
301 struct dpi_clk_calc_ctx ctx;
305 ok = dpi_dss_clk_calc(pck_req, &ctx);
309 r = dss_set_fck_rate(ctx.fck);
313 dpi->mgr_config.clock_info = ctx.dispc_cinfo;
316 *lck_div = ctx.dispc_cinfo.lck_div;
317 *pck_div = ctx.dispc_cinfo.pck_div;
322 static int dpi_set_mode(struct dpi_data *dpi)
324 struct omap_dss_device *out = &dpi->output;
325 struct omap_overlay_manager *mgr = out->manager;
326 struct omap_video_timings *t = &dpi->timings;
327 int lck_div = 0, pck_div = 0;
328 unsigned long fck = 0;
333 r = dpi_set_dsi_clk(dpi, mgr->id, t->pixelclock, &fck,
336 r = dpi_set_dispc_clk(dpi, t->pixelclock, &fck,
341 pck = fck / lck_div / pck_div;
343 if (pck != t->pixelclock) {
344 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
350 dss_mgr_set_timings(mgr, t);
355 static void dpi_config_lcd_manager(struct dpi_data *dpi)
357 struct omap_dss_device *out = &dpi->output;
358 struct omap_overlay_manager *mgr = out->manager;
360 dpi->mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
362 dpi->mgr_config.stallmode = false;
363 dpi->mgr_config.fifohandcheck = false;
365 dpi->mgr_config.video_port_width = dpi->data_lines;
367 dpi->mgr_config.lcden_sig_polarity = 0;
369 dss_mgr_set_lcd_config(mgr, &dpi->mgr_config);
372 static int dpi_display_enable(struct omap_dss_device *dssdev)
374 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
375 struct omap_dss_device *out = &dpi->output;
378 mutex_lock(&dpi->lock);
380 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi->vdds_dsi_reg) {
381 DSSERR("no VDSS_DSI regulator\n");
386 if (out == NULL || out->manager == NULL) {
387 DSSERR("failed to enable display: no output/manager\n");
392 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
393 r = regulator_enable(dpi->vdds_dsi_reg);
398 r = dispc_runtime_get();
402 r = dss_dpi_select_source(out->port_num, out->manager->id);
407 r = dss_pll_enable(dpi->pll);
409 goto err_dsi_pll_init;
412 r = dpi_set_mode(dpi);
416 dpi_config_lcd_manager(dpi);
420 r = dss_mgr_enable(out->manager);
424 mutex_unlock(&dpi->lock);
431 dss_pll_disable(dpi->pll);
436 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
437 regulator_disable(dpi->vdds_dsi_reg);
441 mutex_unlock(&dpi->lock);
445 static void dpi_display_disable(struct omap_dss_device *dssdev)
447 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
448 struct omap_overlay_manager *mgr = dpi->output.manager;
450 mutex_lock(&dpi->lock);
452 dss_mgr_disable(mgr);
455 dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
456 dss_pll_disable(dpi->pll);
461 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
462 regulator_disable(dpi->vdds_dsi_reg);
464 mutex_unlock(&dpi->lock);
467 static void dpi_set_timings(struct omap_dss_device *dssdev,
468 struct omap_video_timings *timings)
470 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
472 DSSDBG("dpi_set_timings\n");
474 mutex_lock(&dpi->lock);
476 dpi->timings = *timings;
478 mutex_unlock(&dpi->lock);
481 static void dpi_get_timings(struct omap_dss_device *dssdev,
482 struct omap_video_timings *timings)
484 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
486 mutex_lock(&dpi->lock);
488 *timings = dpi->timings;
490 mutex_unlock(&dpi->lock);
493 static int dpi_check_timings(struct omap_dss_device *dssdev,
494 struct omap_video_timings *timings)
496 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
497 struct omap_overlay_manager *mgr = dpi->output.manager;
498 int lck_div, pck_div;
501 struct dpi_clk_calc_ctx ctx;
504 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
507 if (timings->pixelclock == 0)
511 ok = dpi_dsi_clk_calc(dpi, timings->pixelclock, &ctx);
515 fck = ctx.dsi_cinfo.clkout[HSDIV_DISPC];
517 ok = dpi_dss_clk_calc(timings->pixelclock, &ctx);
524 lck_div = ctx.dispc_cinfo.lck_div;
525 pck_div = ctx.dispc_cinfo.pck_div;
527 pck = fck / lck_div / pck_div;
529 timings->pixelclock = pck;
534 static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
536 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
538 mutex_lock(&dpi->lock);
540 dpi->data_lines = data_lines;
542 mutex_unlock(&dpi->lock);
545 static int dpi_verify_dsi_pll(struct dss_pll *pll)
549 /* do initial setup with the PLL to see if it is operational */
551 r = dss_pll_enable(pll);
555 dss_pll_disable(pll);
560 static int dpi_init_regulator(struct dpi_data *dpi)
562 struct regulator *vdds_dsi;
564 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
567 if (dpi->vdds_dsi_reg)
570 vdds_dsi = devm_regulator_get(&dpi->pdev->dev, "vdds_dsi");
571 if (IS_ERR(vdds_dsi)) {
572 if (PTR_ERR(vdds_dsi) != -EPROBE_DEFER)
573 DSSERR("can't get VDDS_DSI regulator\n");
574 return PTR_ERR(vdds_dsi);
577 dpi->vdds_dsi_reg = vdds_dsi;
582 static void dpi_init_pll(struct dpi_data *dpi)
589 pll = dpi_get_pll(dpi->output.dispc_channel);
593 if (dpi_verify_dsi_pll(pll)) {
594 DSSWARN("DSI PLL not operational\n");
602 * Return a hardcoded channel for the DPI output. This should work for
603 * current use cases, but this can be later expanded to either resolve
604 * the channel in some more dynamic manner, or get the channel as a user
607 static enum omap_channel dpi_get_channel(int port_num)
609 switch (omapdss_get_version()) {
610 case OMAPDSS_VER_OMAP24xx:
611 case OMAPDSS_VER_OMAP34xx_ES1:
612 case OMAPDSS_VER_OMAP34xx_ES3:
613 case OMAPDSS_VER_OMAP3630:
614 case OMAPDSS_VER_AM35xx:
615 case OMAPDSS_VER_AM43xx:
616 return OMAP_DSS_CHANNEL_LCD;
618 case OMAPDSS_VER_OMAP4430_ES1:
619 case OMAPDSS_VER_OMAP4430_ES2:
620 case OMAPDSS_VER_OMAP4:
621 return OMAP_DSS_CHANNEL_LCD2;
623 case OMAPDSS_VER_OMAP5:
624 return OMAP_DSS_CHANNEL_LCD3;
627 DSSWARN("unsupported DSS version\n");
628 return OMAP_DSS_CHANNEL_LCD;
632 static int dpi_connect(struct omap_dss_device *dssdev,
633 struct omap_dss_device *dst)
635 struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
636 struct omap_overlay_manager *mgr;
639 r = dpi_init_regulator(dpi);
645 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
649 r = dss_mgr_connect(mgr, dssdev);
653 r = omapdss_output_set_device(dssdev, dst);
655 DSSERR("failed to connect output to new device: %s\n",
657 dss_mgr_disconnect(mgr, dssdev);
664 static void dpi_disconnect(struct omap_dss_device *dssdev,
665 struct omap_dss_device *dst)
667 WARN_ON(dst != dssdev->dst);
669 if (dst != dssdev->dst)
672 omapdss_output_unset_device(dssdev);
675 dss_mgr_disconnect(dssdev->manager, dssdev);
678 static const struct omapdss_dpi_ops dpi_ops = {
679 .connect = dpi_connect,
680 .disconnect = dpi_disconnect,
682 .enable = dpi_display_enable,
683 .disable = dpi_display_disable,
685 .check_timings = dpi_check_timings,
686 .set_timings = dpi_set_timings,
687 .get_timings = dpi_get_timings,
689 .set_data_lines = dpi_set_data_lines,
692 static void dpi_init_output(struct platform_device *pdev)
694 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
695 struct omap_dss_device *out = &dpi->output;
697 out->dev = &pdev->dev;
698 out->id = OMAP_DSS_OUTPUT_DPI;
699 out->output_type = OMAP_DISPLAY_TYPE_DPI;
701 out->dispc_channel = dpi_get_channel(0);
702 out->ops.dpi = &dpi_ops;
703 out->owner = THIS_MODULE;
705 omapdss_register_output(out);
708 static void __exit dpi_uninit_output(struct platform_device *pdev)
710 struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
711 struct omap_dss_device *out = &dpi->output;
713 omapdss_unregister_output(out);
716 static void dpi_init_output_port(struct platform_device *pdev,
717 struct device_node *port)
719 struct dpi_data *dpi = port->data;
720 struct omap_dss_device *out = &dpi->output;
724 r = of_property_read_u32(port, "reg", &port_num);
741 out->dev = &pdev->dev;
742 out->id = OMAP_DSS_OUTPUT_DPI;
743 out->output_type = OMAP_DISPLAY_TYPE_DPI;
744 out->dispc_channel = dpi_get_channel(port_num);
745 out->port_num = port_num;
746 out->ops.dpi = &dpi_ops;
747 out->owner = THIS_MODULE;
749 omapdss_register_output(out);
752 static void __exit dpi_uninit_output_port(struct device_node *port)
754 struct dpi_data *dpi = port->data;
755 struct omap_dss_device *out = &dpi->output;
757 omapdss_unregister_output(out);
760 static int omap_dpi_probe(struct platform_device *pdev)
762 struct dpi_data *dpi;
764 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
770 dev_set_drvdata(&pdev->dev, dpi);
772 mutex_init(&dpi->lock);
774 dpi_init_output(pdev);
779 static int __exit omap_dpi_remove(struct platform_device *pdev)
781 dpi_uninit_output(pdev);
786 static struct platform_driver omap_dpi_driver = {
787 .probe = omap_dpi_probe,
788 .remove = __exit_p(omap_dpi_remove),
790 .name = "omapdss_dpi",
791 .suppress_bind_attrs = true,
795 int __init dpi_init_platform_driver(void)
797 return platform_driver_register(&omap_dpi_driver);
800 void __exit dpi_uninit_platform_driver(void)
802 platform_driver_unregister(&omap_dpi_driver);
805 int __init dpi_init_port(struct platform_device *pdev, struct device_node *port)
807 struct dpi_data *dpi;
808 struct device_node *ep;
812 dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
816 ep = omapdss_of_get_next_endpoint(port, NULL);
820 r = of_property_read_u32(ep, "data-lines", &datalines);
822 DSSERR("failed to parse datalines\n");
826 dpi->data_lines = datalines;
833 mutex_init(&dpi->lock);
835 dpi_init_output_port(pdev, port);
837 dpi->port_initialized = true;
847 void __exit dpi_uninit_port(struct device_node *port)
849 struct dpi_data *dpi = port->data;
851 if (!dpi->port_initialized)
854 dpi_uninit_output_port(port);