drivers/video/fbdev/cyber2000fb.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  linux/drivers/video/cyber2000fb.c
   4  *
   5  *  Copyright (C) 1998-2002 Russell King
   6  *
   7  *  MIPS and 50xx clock support
   8  *  Copyright (C) 2001 Bradley D. LaRonde <brad@ltc.com>
   9  *
  10  *  32 bit support, text color and panning fixes for modes != 8 bit
  11  *  Copyright (C) 2002 Denis Oliver Kropp <dok@directfb.org>
  12  *
  13  * Integraphics CyberPro 2000, 2010 and 5000 frame buffer device
  14  *
  15  * Based on cyberfb.c.
  16  *
  17  * Note that we now use the new fbcon fix, var and cmap scheme.  We do
  18  * still have to check which console is the currently displayed one
  19  * however, especially for the colourmap stuff.
  20  *
  21  * We also use the new hotplug PCI subsystem.  I'm not sure if there
  22  * are any such cards, but I'm erring on the side of caution.  We don't
  23  * want to go pop just because someone does have one.
  24  *
  25  * Note that this doesn't work fully in the case of multiple CyberPro
  26  * cards with grabbers.  We currently can only attach to the first
  27  * CyberPro card found.
  28  *
  29  * When we're in truecolour mode, we power down the LUT RAM as a power
  30  * saving feature.  Also, when we enter any of the powersaving modes
  31  * (except soft blanking) we power down the RAMDACs.  This saves about
  32  * 1W, which is roughly 8% of the power consumption of a NetWinder
  33  * (which, incidentally, is about the same saving as a 2.5in hard disk
  34  * entering standby mode.)
  35  */
  36 #include <linux/module.h>
  37 #include <linux/kernel.h>
  38 #include <linux/errno.h>
  39 #include <linux/string.h>
  40 #include <linux/mm.h>
  41 #include <linux/slab.h>
  42 #include <linux/delay.h>
  43 #include <linux/fb.h>
  44 #include <linux/pci.h>
  45 #include <linux/init.h>
  46 #include <linux/io.h>
  47 #include <linux/i2c.h>
  48 #include <linux/i2c-algo-bit.h>
  49
  50
  51 #ifdef __arm__
  52 #include <asm/mach-types.h>
  53 #endif
  54
  55 #include "cyber2000fb.h"
  56
  57 struct cfb_info {
  58         struct fb_info          fb;
  59         struct display_switch   *dispsw;
  60         unsigned char           __iomem *region;
  61         unsigned char           __iomem *regs;
  62         u_int                   id;
  63         u_int                   irq;
  64         int                     func_use_count;
  65         u_long                  ref_ps;
  66
  67         /*
  68          * Clock divisors
  69          */
  70         u_int                   divisors[4];
  71
  72         struct {
  73                 u8 red, green, blue;
  74         } palette[NR_PALETTE];
  75
  76         u_char                  mem_ctl1;
  77         u_char                  mem_ctl2;
  78         u_char                  mclk_mult;
  79         u_char                  mclk_div;
  80         /*
  81          * RAMDAC control register is both of these or'ed together
  82          */
  83         u_char                  ramdac_ctrl;
  84         u_char                  ramdac_powerdown;
  85
  86         u32                     pseudo_palette[16];
  87
  88         spinlock_t              reg_b0_lock;
  89
  90 #ifdef CONFIG_FB_CYBER2000_DDC
  91         bool                    ddc_registered;
  92         struct i2c_adapter      ddc_adapter;
  93         struct i2c_algo_bit_data        ddc_algo;
  94 #endif
  95
  96 #ifdef CONFIG_FB_CYBER2000_I2C
  97         struct i2c_adapter      i2c_adapter;
  98         struct i2c_algo_bit_data i2c_algo;
  99 #endif
 100 };
 101
 102 static char *default_font = "Acorn8x8";
 103 module_param(default_font, charp, 0);
 104 MODULE_PARM_DESC(default_font, "Default font name");
 105
 106 /*
 107  * Our access methods.
 108  */
 109 #define cyber2000fb_writel(val, reg, cfb)       writel(val, (cfb)->regs + (reg))
 110 #define cyber2000fb_writew(val, reg, cfb)       writew(val, (cfb)->regs + (reg))
 111 #define cyber2000fb_writeb(val, reg, cfb)       writeb(val, (cfb)->regs + (reg))
 112
 113 #define cyber2000fb_readb(reg, cfb)             readb((cfb)->regs + (reg))
 114
 115 static inline void
 116 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 117 {
 118         cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
 119 }
 120
 121 static inline void
 122 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 123 {
 124         cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
 125 }
 126
 127 static inline unsigned int
 128 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
 129 {
 130         cyber2000fb_writeb(reg, 0x3ce, cfb);
 131         return cyber2000fb_readb(0x3cf, cfb);
 132 }
 133
 134 static inline void
 135 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 136 {
 137         cyber2000fb_readb(0x3da, cfb);
 138         cyber2000fb_writeb(reg, 0x3c0, cfb);
 139         cyber2000fb_readb(0x3c1, cfb);
 140         cyber2000fb_writeb(val, 0x3c0, cfb);
 141 }
 142
 143 static inline void
 144 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 145 {
 146         cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
 147 }
 148
 149 /* -------------------- Hardware specific routines ------------------------- */
 150
 151 /*
 152  * Hardware Cyber2000 Acceleration
 153  */
 154 static void
 155 cyber2000fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 156 {
 157         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 158         unsigned long dst, col;
 159
 160         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 161                 cfb_fillrect(info, rect);
 162                 return;
 163         }
 164
 165         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 166         cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
 167         cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
 168
 169         col = rect->color;
 170         if (cfb->fb.var.bits_per_pixel > 8)
 171                 col = ((u32 *)cfb->fb.pseudo_palette)[col];
 172         cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
 173
 174         dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
 175         if (cfb->fb.var.bits_per_pixel == 24) {
 176                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 177                 dst *= 3;
 178         }
 179
 180         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 181         cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 182         cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
 183         cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
 184 }
 185
 186 static void
 187 cyber2000fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 188 {
 189         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 190         unsigned int cmd = CO_CMD_L_PATTERN_FGCOL;
 191         unsigned long src, dst;
 192
 193         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 194                 cfb_copyarea(info, region);
 195                 return;
 196         }
 197
 198         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 199         cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
 200         cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
 201
 202         src = region->sx + region->sy * cfb->fb.var.xres_virtual;
 203         dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
 204
 205         if (region->sx < region->dx) {
 206                 src += region->width - 1;
 207                 dst += region->width - 1;
 208                 cmd |= CO_CMD_L_INC_LEFT;
 209         }
 210
 211         if (region->sy < region->dy) {
 212                 src += (region->height - 1) * cfb->fb.var.xres_virtual;
 213                 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
 214                 cmd |= CO_CMD_L_INC_UP;
 215         }
 216
 217         if (cfb->fb.var.bits_per_pixel == 24) {
 218                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 219                 src *= 3;
 220                 dst *= 3;
 221         }
 222         cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
 223         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 224         cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 225         cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
 226         cyber2000fb_writew(CO_CMD_H_FGSRCMAP | CO_CMD_H_BLITTER,
 227                            CO_REG_CMD_H, cfb);
 228 }
 229
 230 static void
 231 cyber2000fb_imageblit(struct fb_info *info, const struct fb_image *image)
 232 {
 233         cfb_imageblit(info, image);
 234         return;
 235 }
 236
 237 static int cyber2000fb_sync(struct fb_info *info)
 238 {
 239         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 240         int count = 100000;
 241
 242         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
 243                 return 0;
 244
 245         while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
 246                 if (!count--) {
 247                         debug_printf("accel_wait timed out\n");
 248                         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 249                         break;
 250                 }
 251                 udelay(1);
 252         }
 253         return 0;
 254 }
 255
 256 /*
 257  * ===========================================================================
 258  */
 259
 260 static inline u32 convert_bitfield(u_int val, struct fb_bitfield *bf)
 261 {
 262         u_int mask = (1 << bf->length) - 1;
 263
 264         return (val >> (16 - bf->length) & mask) << bf->offset;
 265 }
 266
 267 /*
 268  *    Set a single color register. Return != 0 for invalid regno.
 269  */
 270 static int
 271 cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 272                       u_int transp, struct fb_info *info)
 273 {
 274         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 275         struct fb_var_screeninfo *var = &cfb->fb.var;
 276         u32 pseudo_val;
 277         int ret = 1;
 278
 279         switch (cfb->fb.fix.visual) {
 280         default:
 281                 return 1;
 282
 283         /*
 284          * Pseudocolour:
 285          *         8     8
 286          * pixel --/--+--/-->  red lut  --> red dac
 287          *            |  8
 288          *            +--/--> green lut --> green dac
 289          *            |  8
 290          *            +--/-->  blue lut --> blue dac
 291          */
 292         case FB_VISUAL_PSEUDOCOLOR:
 293                 if (regno >= NR_PALETTE)
 294                         return 1;
 295
 296                 red >>= 8;
 297                 green >>= 8;
 298                 blue >>= 8;
 299
 300                 cfb->palette[regno].red = red;
 301                 cfb->palette[regno].green = green;
 302                 cfb->palette[regno].blue = blue;
 303
 304                 cyber2000fb_writeb(regno, 0x3c8, cfb);
 305                 cyber2000fb_writeb(red, 0x3c9, cfb);
 306                 cyber2000fb_writeb(green, 0x3c9, cfb);
 307                 cyber2000fb_writeb(blue, 0x3c9, cfb);
 308                 return 0;
 309
 310         /*
 311          * Direct colour:
 312          *         n     rl
 313          * pixel --/--+--/-->  red lut  --> red dac
 314          *            |  gl
 315          *            +--/--> green lut --> green dac
 316          *            |  bl
 317          *            +--/-->  blue lut --> blue dac
 318          * n = bpp, rl = red length, gl = green length, bl = blue length
 319          */
 320         case FB_VISUAL_DIRECTCOLOR:
 321                 red >>= 8;
 322                 green >>= 8;
 323                 blue >>= 8;
 324
 325                 if (var->green.length == 6 && regno < 64) {
 326                         cfb->palette[regno << 2].green = green;
 327
 328                         /*
 329                          * The 6 bits of the green component are applied
 330                          * to the high 6 bits of the LUT.
 331                          */
 332                         cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
 333                         cyber2000fb_writeb(cfb->palette[regno >> 1].red,
 334                                            0x3c9, cfb);
 335                         cyber2000fb_writeb(green, 0x3c9, cfb);
 336                         cyber2000fb_writeb(cfb->palette[regno >> 1].blue,
 337                                            0x3c9, cfb);
 338
 339                         green = cfb->palette[regno << 3].green;
 340
 341                         ret = 0;
 342                 }
 343
 344                 if (var->green.length >= 5 && regno < 32) {
 345                         cfb->palette[regno << 3].red = red;
 346                         cfb->palette[regno << 3].green = green;
 347                         cfb->palette[regno << 3].blue = blue;
 348
 349                         /*
 350                          * The 5 bits of each colour component are
 351                          * applied to the high 5 bits of the LUT.
 352                          */
 353                         cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
 354                         cyber2000fb_writeb(red, 0x3c9, cfb);
 355                         cyber2000fb_writeb(green, 0x3c9, cfb);
 356                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 357                         ret = 0;
 358                 }
 359
 360                 if (var->green.length == 4 && regno < 16) {
 361                         cfb->palette[regno << 4].red = red;
 362                         cfb->palette[regno << 4].green = green;
 363                         cfb->palette[regno << 4].blue = blue;
 364
 365                         /*
 366                          * The 5 bits of each colour component are
 367                          * applied to the high 5 bits of the LUT.
 368                          */
 369                         cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
 370                         cyber2000fb_writeb(red, 0x3c9, cfb);
 371                         cyber2000fb_writeb(green, 0x3c9, cfb);
 372                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 373                         ret = 0;
 374                 }
 375
 376                 /*
 377                  * Since this is only used for the first 16 colours, we
 378                  * don't have to care about overflowing for regno >= 32
 379                  */
 380                 pseudo_val = regno << var->red.offset |
 381                              regno << var->green.offset |
 382                              regno << var->blue.offset;
 383                 break;
 384
 385         /*
 386          * True colour:
 387          *         n     rl
 388          * pixel --/--+--/--> red dac
 389          *            |  gl
 390          *            +--/--> green dac
 391          *            |  bl
 392          *            +--/--> blue dac
 393          * n = bpp, rl = red length, gl = green length, bl = blue length
 394          */
 395         case FB_VISUAL_TRUECOLOR:
 396                 pseudo_val = convert_bitfield(transp ^ 0xffff, &var->transp);
 397                 pseudo_val |= convert_bitfield(red, &var->red);
 398                 pseudo_val |= convert_bitfield(green, &var->green);
 399                 pseudo_val |= convert_bitfield(blue, &var->blue);
 400                 ret = 0;
 401                 break;
 402         }
 403
 404         /*
 405          * Now set our pseudo palette for the CFB16/24/32 drivers.
 406          */
 407         if (regno < 16)
 408                 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
 409
 410         return ret;
 411 }
 412
 413 struct par_info {
 414         /*
 415          * Hardware
 416          */
 417         u_char  clock_mult;
 418         u_char  clock_div;
 419         u_char  extseqmisc;
 420         u_char  co_pixfmt;
 421         u_char  crtc_ofl;
 422         u_char  crtc[19];
 423         u_int   width;
 424         u_int   pitch;
 425         u_int   fetch;
 426
 427         /*
 428          * Other
 429          */
 430         u_char  ramdac;
 431 };
 432
 433 static const u_char crtc_idx[] = {
 434         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 435         0x08, 0x09,
 436         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
 437 };
 438
 439 static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
 440 {
 441         unsigned int i;
 442         unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
 443
 444         cyber2000fb_writeb(0x56, 0x3ce, cfb);
 445         i = cyber2000fb_readb(0x3cf, cfb);
 446         cyber2000fb_writeb(i | 4, 0x3cf, cfb);
 447         cyber2000fb_writeb(val, 0x3c6, cfb);
 448         cyber2000fb_writeb(i, 0x3cf, cfb);
 449         /* prevent card lock-up observed on x86 with CyberPro 2000 */
 450         cyber2000fb_readb(0x3cf, cfb);
 451 }
 452
 453 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
 454 {
 455         u_int i;
 456
 457         /*
 458          * Blank palette
 459          */
 460         for (i = 0; i < NR_PALETTE; i++) {
 461                 cyber2000fb_writeb(i, 0x3c8, cfb);
 462                 cyber2000fb_writeb(0, 0x3c9, cfb);
 463                 cyber2000fb_writeb(0, 0x3c9, cfb);
 464                 cyber2000fb_writeb(0, 0x3c9, cfb);
 465         }
 466
 467         cyber2000fb_writeb(0xef, 0x3c2, cfb);
 468         cyber2000_crtcw(0x11, 0x0b, cfb);
 469         cyber2000_attrw(0x11, 0x00, cfb);
 470
 471         cyber2000_seqw(0x00, 0x01, cfb);
 472         cyber2000_seqw(0x01, 0x01, cfb);
 473         cyber2000_seqw(0x02, 0x0f, cfb);
 474         cyber2000_seqw(0x03, 0x00, cfb);
 475         cyber2000_seqw(0x04, 0x0e, cfb);
 476         cyber2000_seqw(0x00, 0x03, cfb);
 477
 478         for (i = 0; i < sizeof(crtc_idx); i++)
 479                 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
 480
 481         for (i = 0x0a; i < 0x10; i++)
 482                 cyber2000_crtcw(i, 0, cfb);
 483
 484         cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
 485         cyber2000_grphw(0x00, 0x00, cfb);
 486         cyber2000_grphw(0x01, 0x00, cfb);
 487         cyber2000_grphw(0x02, 0x00, cfb);
 488         cyber2000_grphw(0x03, 0x00, cfb);
 489         cyber2000_grphw(0x04, 0x00, cfb);
 490         cyber2000_grphw(0x05, 0x60, cfb);
 491         cyber2000_grphw(0x06, 0x05, cfb);
 492         cyber2000_grphw(0x07, 0x0f, cfb);
 493         cyber2000_grphw(0x08, 0xff, cfb);
 494
 495         /* Attribute controller registers */
 496         for (i = 0; i < 16; i++)
 497                 cyber2000_attrw(i, i, cfb);
 498
 499         cyber2000_attrw(0x10, 0x01, cfb);
 500         cyber2000_attrw(0x11, 0x00, cfb);
 501         cyber2000_attrw(0x12, 0x0f, cfb);
 502         cyber2000_attrw(0x13, 0x00, cfb);
 503         cyber2000_attrw(0x14, 0x00, cfb);
 504
 505         /* PLL registers */
 506         spin_lock(&cfb->reg_b0_lock);
 507         cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
 508         cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb);
 509         cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
 510         cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb);
 511         cyber2000_grphw(0x90, 0x01, cfb);
 512         cyber2000_grphw(0xb9, 0x80, cfb);
 513         cyber2000_grphw(0xb9, 0x00, cfb);
 514         spin_unlock(&cfb->reg_b0_lock);
 515
 516         cfb->ramdac_ctrl = hw->ramdac;
 517         cyber2000fb_write_ramdac_ctrl(cfb);
 518
 519         cyber2000fb_writeb(0x20, 0x3c0, cfb);
 520         cyber2000fb_writeb(0xff, 0x3c6, cfb);
 521
 522         cyber2000_grphw(0x14, hw->fetch, cfb);
 523         cyber2000_grphw(0x15, ((hw->fetch >> 8) & 0x03) |
 524                               ((hw->pitch >> 4) & 0x30), cfb);
 525         cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
 526
 527         /*
 528          * Set up accelerator registers
 529          */
 530         cyber2000fb_writew(hw->width, CO_REG_SRC_WIDTH, cfb);
 531         cyber2000fb_writew(hw->width, CO_REG_DEST_WIDTH, cfb);
 532         cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
 533 }
 534
 535 static inline int
 536 cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
 537 {
 538         u_int base = var->yoffset * var->xres_virtual + var->xoffset;
 539
 540         base *= var->bits_per_pixel;
 541
 542         /*
 543          * Convert to bytes and shift two extra bits because DAC
 544          * can only start on 4 byte aligned data.
 545          */
 546         base >>= 5;
 547
 548         if (base >= 1 << 20)
 549                 return -EINVAL;
 550
 551         cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
 552         cyber2000_crtcw(0x0c, base >> 8, cfb);
 553         cyber2000_crtcw(0x0d, base, cfb);
 554
 555         return 0;
 556 }
 557
 558 static int
 559 cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
 560                         struct fb_var_screeninfo *var)
 561 {
 562         u_int Htotal, Hblankend, Hsyncend;
 563         u_int Vtotal, Vdispend, Vblankstart, Vblankend, Vsyncstart, Vsyncend;
 564 #define ENCODE_BIT(v, b1, m, b2) ((((v) >> (b1)) & (m)) << (b2))
 565
 566         hw->crtc[13] = hw->pitch;
 567         hw->crtc[17] = 0xe3;
 568         hw->crtc[14] = 0;
 569         hw->crtc[8]  = 0;
 570
 571         Htotal     = var->xres + var->right_margin +
 572                      var->hsync_len + var->left_margin;
 573
 574         if (Htotal > 2080)
 575                 return -EINVAL;
 576
 577         hw->crtc[0] = (Htotal >> 3) - 5;
 578         hw->crtc[1] = (var->xres >> 3) - 1;
 579         hw->crtc[2] = var->xres >> 3;
 580         hw->crtc[4] = (var->xres + var->right_margin) >> 3;
 581
 582         Hblankend   = (Htotal - 4 * 8) >> 3;
 583
 584         hw->crtc[3] = ENCODE_BIT(Hblankend,  0, 0x1f,  0) |
 585                       ENCODE_BIT(1,          0, 0x01,  7);
 586
 587         Hsyncend    = (var->xres + var->right_margin + var->hsync_len) >> 3;
 588
 589         hw->crtc[5] = ENCODE_BIT(Hsyncend,   0, 0x1f,  0) |
 590                       ENCODE_BIT(Hblankend,  5, 0x01,  7);
 591
 592         Vdispend    = var->yres - 1;
 593         Vsyncstart  = var->yres + var->lower_margin;
 594         Vsyncend    = var->yres + var->lower_margin + var->vsync_len;
 595         Vtotal      = var->yres + var->lower_margin + var->vsync_len +
 596                       var->upper_margin - 2;
 597
 598         if (Vtotal > 2047)
 599                 return -EINVAL;
 600
 601         Vblankstart = var->yres + 6;
 602         Vblankend   = Vtotal - 10;
 603
 604         hw->crtc[6]  = Vtotal;
 605         hw->crtc[7]  = ENCODE_BIT(Vtotal,     8, 0x01,  0) |
 606                         ENCODE_BIT(Vdispend,   8, 0x01,  1) |
 607                         ENCODE_BIT(Vsyncstart, 8, 0x01,  2) |
 608                         ENCODE_BIT(Vblankstart, 8, 0x01,  3) |
 609                         ENCODE_BIT(1,          0, 0x01,  4) |
 610                         ENCODE_BIT(Vtotal,     9, 0x01,  5) |
 611                         ENCODE_BIT(Vdispend,   9, 0x01,  6) |
 612                         ENCODE_BIT(Vsyncstart, 9, 0x01,  7);
 613         hw->crtc[9]  = ENCODE_BIT(0,          0, 0x1f,  0) |
 614                         ENCODE_BIT(Vblankstart, 9, 0x01,  5) |
 615                         ENCODE_BIT(1,          0, 0x01,  6);
 616         hw->crtc[10] = Vsyncstart;
 617         hw->crtc[11] = ENCODE_BIT(Vsyncend,   0, 0x0f,  0) |
 618                        ENCODE_BIT(1,          0, 0x01,  7);
 619         hw->crtc[12] = Vdispend;
 620         hw->crtc[15] = Vblankstart;
 621         hw->crtc[16] = Vblankend;
 622         hw->crtc[18] = 0xff;
 623
 624         /*
 625          * overflow - graphics reg 0x11
 626          * 0=VTOTAL:10 1=VDEND:10 2=VRSTART:10 3=VBSTART:10
 627          * 4=LINECOMP:10 5-IVIDEO 6=FIXCNT
 628          */
 629         hw->crtc_ofl =
 630                 ENCODE_BIT(Vtotal, 10, 0x01, 0) |
 631                 ENCODE_BIT(Vdispend, 10, 0x01, 1) |
 632                 ENCODE_BIT(Vsyncstart, 10, 0x01, 2) |
 633                 ENCODE_BIT(Vblankstart, 10, 0x01, 3) |
 634                 EXT_CRT_VRTOFL_LINECOMP10;
 635
 636         /* woody: set the interlaced bit... */
 637         /* FIXME: what about doublescan? */
 638         if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
 639                 hw->crtc_ofl |= EXT_CRT_VRTOFL_INTERLACE;
 640
 641         return 0;
 642 }
 643
 644 /*
 645  * The following was discovered by a good monitor, bit twiddling, theorising
 646  * and but mostly luck.  Strangely, it looks like everyone elses' PLL!
 647  *
 648  * Clock registers:
 649  *   fclock = fpll / div2
 650  *   fpll   = fref * mult / div1
 651  * where:
 652  *   fref = 14.318MHz (69842ps)
 653  *   mult = reg0xb0.7:0
 654  *   div1 = (reg0xb1.5:0 + 1)
 655  *   div2 =  2^(reg0xb1.7:6)
 656  *   fpll should be between 115 and 260 MHz
 657  *  (8696ps and 3846ps)
 658  */
 659 static int
 660 cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
 661                          struct fb_var_screeninfo *var)
 662 {
 663         u_long pll_ps = var->pixclock;
 664         const u_long ref_ps = cfb->ref_ps;
 665         u_int div2, t_div1, best_div1, best_mult;
 666         int best_diff;
 667         int vco;
 668
 669         /*
 670          * Step 1:
 671          *   find div2 such that 115MHz < fpll < 260MHz
 672          *   and 0 <= div2 < 4
 673          */
 674         for (div2 = 0; div2 < 4; div2++) {
 675                 u_long new_pll;
 676
 677                 new_pll = pll_ps / cfb->divisors[div2];
 678                 if (8696 > new_pll && new_pll > 3846) {
 679                         pll_ps = new_pll;
 680                         break;
 681                 }
 682         }
 683
 684         if (div2 == 4)
 685                 return -EINVAL;
 686
 687         /*
 688          * Step 2:
 689          *  Given pll_ps and ref_ps, find:
 690          *    pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
 691          *  where { 1 < best_div1 < 32, 1 < best_mult < 256 }
 692          *    pll_ps_calc = best_div1 / (ref_ps * best_mult)
 693          */
 694         best_diff = 0x7fffffff;
 695         best_mult = 2;
 696         best_div1 = 32;
 697         for (t_div1 = 2; t_div1 < 32; t_div1 += 1) {
 698                 u_int rr, t_mult, t_pll_ps;
 699                 int diff;
 700
 701                 /*
 702                  * Find the multiplier for this divisor
 703                  */
 704                 rr = ref_ps * t_div1;
 705                 t_mult = (rr + pll_ps / 2) / pll_ps;
 706
 707                 /*
 708                  * Is the multiplier within the correct range?
 709                  */
 710                 if (t_mult > 256 || t_mult < 2)
 711                         continue;
 712
 713                 /*
 714                  * Calculate the actual clock period from this multiplier
 715                  * and divisor, and estimate the error.
 716                  */
 717                 t_pll_ps = (rr + t_mult / 2) / t_mult;
 718                 diff = pll_ps - t_pll_ps;
 719                 if (diff < 0)
 720                         diff = -diff;
 721
 722                 if (diff < best_diff) {
 723                         best_diff = diff;
 724                         best_mult = t_mult;
 725                         best_div1 = t_div1;
 726                 }
 727
 728                 /*
 729                  * If we hit an exact value, there is no point in continuing.
 730                  */
 731                 if (diff == 0)
 732                         break;
 733         }
 734
 735         /*
 736          * Step 3:
 737          *  combine values
 738          */
 739         hw->clock_mult = best_mult - 1;
 740         hw->clock_div  = div2 << 6 | (best_div1 - 1);
 741
 742         vco = ref_ps * best_div1 / best_mult;
 743         if ((ref_ps == 40690) && (vco < 5556))
 744                 /* Set VFSEL when VCO > 180MHz (5.556 ps). */
 745                 hw->clock_div |= EXT_DCLK_DIV_VFSEL;
 746
 747         return 0;
 748 }
 749
 750 /*
 751  *    Set the User Defined Part of the Display
 752  */
 753 static int
 754 cyber2000fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 755 {
 756         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 757         struct par_info hw;
 758         unsigned int mem;
 759         int err;
 760
 761         var->transp.msb_right   = 0;
 762         var->red.msb_right      = 0;
 763         var->green.msb_right    = 0;
 764         var->blue.msb_right     = 0;
 765         var->transp.offset      = 0;
 766         var->transp.length      = 0;
 767
 768         switch (var->bits_per_pixel) {
 769         case 8: /* PSEUDOCOLOUR, 256 */
 770                 var->red.offset         = 0;
 771                 var->red.length         = 8;
 772                 var->green.offset       = 0;
 773                 var->green.length       = 8;
 774                 var->blue.offset        = 0;
 775                 var->blue.length        = 8;
 776                 break;
 777
 778         case 16:/* DIRECTCOLOUR, 64k or 32k */
 779                 switch (var->green.length) {
 780                 case 6: /* RGB565, 64k */
 781                         var->red.offset         = 11;
 782                         var->red.length         = 5;
 783                         var->green.offset       = 5;
 784                         var->green.length       = 6;
 785                         var->blue.offset        = 0;
 786                         var->blue.length        = 5;
 787                         break;
 788
 789                 default:
 790                 case 5: /* RGB555, 32k */
 791                         var->red.offset         = 10;
 792                         var->red.length         = 5;
 793                         var->green.offset       = 5;
 794                         var->green.length       = 5;
 795                         var->blue.offset        = 0;
 796                         var->blue.length        = 5;
 797                         break;
 798
 799                 case 4: /* RGB444, 4k + transparency? */
 800                         var->transp.offset      = 12;
 801                         var->transp.length      = 4;
 802                         var->red.offset         = 8;
 803                         var->red.length         = 4;
 804                         var->green.offset       = 4;
 805                         var->green.length       = 4;
 806                         var->blue.offset        = 0;
 807                         var->blue.length        = 4;
 808                         break;
 809                 }
 810                 break;
 811
 812         case 24:/* TRUECOLOUR, 16m */
 813                 var->red.offset         = 16;
 814                 var->red.length         = 8;
 815                 var->green.offset       = 8;
 816                 var->green.length       = 8;
 817                 var->blue.offset        = 0;
 818                 var->blue.length        = 8;
 819                 break;
 820
 821         case 32:/* TRUECOLOUR, 16m */
 822                 var->transp.offset      = 24;
 823                 var->transp.length      = 8;
 824                 var->red.offset         = 16;
 825                 var->red.length         = 8;
 826                 var->green.offset       = 8;
 827                 var->green.length       = 8;
 828                 var->blue.offset        = 0;
 829                 var->blue.length        = 8;
 830                 break;
 831
 832         default:
 833                 return -EINVAL;
 834         }
 835
 836         mem = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
 837         if (mem > cfb->fb.fix.smem_len)
 838                 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
 839                                     (var->bits_per_pixel * var->xres_virtual);
 840
 841         if (var->yres > var->yres_virtual)
 842                 var->yres = var->yres_virtual;
 843         if (var->xres > var->xres_virtual)
 844                 var->xres = var->xres_virtual;
 845
 846         err = cyber2000fb_decode_clock(&hw, cfb, var);
 847         if (err)
 848                 return err;
 849
 850         err = cyber2000fb_decode_crtc(&hw, cfb, var);
 851         if (err)
 852                 return err;
 853
 854         return 0;
 855 }
 856
 857 static int cyber2000fb_set_par(struct fb_info *info)
 858 {
 859         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 860         struct fb_var_screeninfo *var = &cfb->fb.var;
 861         struct par_info hw;
 862         unsigned int mem;
 863
 864         hw.width = var->xres_virtual;
 865         hw.ramdac = RAMDAC_VREFEN | RAMDAC_DAC8BIT;
 866
 867         switch (var->bits_per_pixel) {
 868         case 8:
 869                 hw.co_pixfmt            = CO_PIXFMT_8BPP;
 870                 hw.pitch                = hw.width >> 3;
 871                 hw.extseqmisc           = EXT_SEQ_MISC_8;
 872                 break;
 873
 874         case 16:
 875                 hw.co_pixfmt            = CO_PIXFMT_16BPP;
 876                 hw.pitch                = hw.width >> 2;
 877
 878                 switch (var->green.length) {
 879                 case 6: /* RGB565, 64k */
 880                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB565;
 881                         break;
 882                 case 5: /* RGB555, 32k */
 883                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB555;
 884                         break;
 885                 case 4: /* RGB444, 4k + transparency? */
 886                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB444;
 887                         break;
 888                 default:
 889                         BUG();
 890                 }
 891                 break;
 892
 893         case 24:/* TRUECOLOUR, 16m */
 894                 hw.co_pixfmt            = CO_PIXFMT_24BPP;
 895                 hw.width                *= 3;
 896                 hw.pitch                = hw.width >> 3;
 897                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 898                 hw.extseqmisc           = EXT_SEQ_MISC_24_RGB888;
 899                 break;
 900
 901         case 32:/* TRUECOLOUR, 16m */
 902                 hw.co_pixfmt            = CO_PIXFMT_32BPP;
 903                 hw.pitch                = hw.width >> 1;
 904                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 905                 hw.extseqmisc           = EXT_SEQ_MISC_32;
 906                 break;
 907
 908         default:
 909                 BUG();
 910         }
 911
 912         /*
 913          * Sigh, this is absolutely disgusting, but caused by
 914          * the way the fbcon developers want to separate out
 915          * the "checking" and the "setting" of the video mode.
 916          *
 917          * If the mode is not suitable for the hardware here,
 918          * we can't prevent it being set by returning an error.
 919          *
 920          * In theory, since NetWinders contain just one VGA card,
 921          * we should never end up hitting this problem.
 922          */
 923         BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
 924         BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
 925
 926         hw.width -= 1;
 927         hw.fetch = hw.pitch;
 928         if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
 929                 hw.fetch <<= 1;
 930         hw.fetch += 1;
 931
 932         cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
 933
 934         /*
 935          * Same here - if the size of the video mode exceeds the
 936          * available RAM, we can't prevent this mode being set.
 937          *
 938          * In theory, since NetWinders contain just one VGA card,
 939          * we should never end up hitting this problem.
 940          */
 941         mem = cfb->fb.fix.line_length * var->yres_virtual;
 942         BUG_ON(mem > cfb->fb.fix.smem_len);
 943
 944         /*
 945          * 8bpp displays are always pseudo colour.  16bpp and above
 946          * are direct colour or true colour, depending on whether
 947          * the RAMDAC palettes are bypassed.  (Direct colour has
 948          * palettes, true colour does not.)
 949          */
 950         if (var->bits_per_pixel == 8)
 951                 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 952         else if (hw.ramdac & RAMDAC_BYPASS)
 953                 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 954         else
 955                 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
 956
 957         cyber2000fb_set_timing(cfb, &hw);
 958         cyber2000fb_update_start(cfb, var);
 959
 960         return 0;
 961 }
 962
 963 /*
 964  *    Pan or Wrap the Display
 965  */
 966 static int
 967 cyber2000fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 968 {
 969         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
 970
 971         if (cyber2000fb_update_start(cfb, var))
 972                 return -EINVAL;
 973
 974         cfb->fb.var.xoffset = var->xoffset;
 975         cfb->fb.var.yoffset = var->yoffset;
 976
 977         if (var->vmode & FB_VMODE_YWRAP) {
 978                 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
 979         } else {
 980                 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
 981         }
 982
 983         return 0;
 984 }
 985
 986 /*
 987  *    (Un)Blank the display.
 988  *
 989  *  Blank the screen if blank_mode != 0, else unblank. If
 990  *  blank == NULL then the caller blanks by setting the CLUT
 991  *  (Color Look Up Table) to all black. Return 0 if blanking
 992  *  succeeded, != 0 if un-/blanking failed due to e.g. a
 993  *  video mode which doesn't support it. Implements VESA
 994  *  suspend and powerdown modes on hardware that supports
 995  *  disabling hsync/vsync:
 996  *    blank_mode == 2: suspend vsync
 997  *    blank_mode == 3: suspend hsync
 998  *    blank_mode == 4: powerdown
 999  *
1000  *  wms...Enable VESA DMPS compatible powerdown mode
1001  *  run "setterm -powersave powerdown" to take advantage
1002  */
1003 static int cyber2000fb_blank(int blank, struct fb_info *info)
1004 {
1005         struct cfb_info *cfb = container_of(info, struct cfb_info, fb);
1006         unsigned int sync = 0;
1007         int i;
1008
1009         switch (blank) {
1010         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1011                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_0;
1012                 break;
1013         case FB_BLANK_HSYNC_SUSPEND:    /* hsync off */
1014                 sync = EXT_SYNC_CTL_VS_NORMAL | EXT_SYNC_CTL_HS_0;
1015                 break;
1016         case FB_BLANK_VSYNC_SUSPEND:    /* vsync off */
1017                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_NORMAL;
1018                 break;
1019         case FB_BLANK_NORMAL:           /* soft blank */
1020         default:                        /* unblank */
1021                 break;
1022         }
1023
1024         cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1025
1026         if (blank <= 1) {
1027                 /* turn on ramdacs */
1028                 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1029                                            RAMDAC_RAMPWRDN);
1030                 cyber2000fb_write_ramdac_ctrl(cfb);
1031         }
1032
1033         /*
1034          * Soft blank/unblank the display.
1035          */
1036         if (blank) {    /* soft blank */
1037                 for (i = 0; i < NR_PALETTE; i++) {
1038                         cyber2000fb_writeb(i, 0x3c8, cfb);
1039                         cyber2000fb_writeb(0, 0x3c9, cfb);
1040                         cyber2000fb_writeb(0, 0x3c9, cfb);
1041                         cyber2000fb_writeb(0, 0x3c9, cfb);
1042                 }
1043         } else {        /* unblank */
1044                 for (i = 0; i < NR_PALETTE; i++) {
1045                         cyber2000fb_writeb(i, 0x3c8, cfb);
1046                         cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1047                         cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1048                         cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1049                 }
1050         }
1051
1052         if (blank >= 2) {
1053                 /* turn off ramdacs */
1054                 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1055                                          RAMDAC_RAMPWRDN;
1056                 cyber2000fb_write_ramdac_ctrl(cfb);
1057         }
1058
1059         return 0;
1060 }
1061
1062 static const struct fb_ops cyber2000fb_ops = {
1063         .owner          = THIS_MODULE,
1064         .fb_check_var   = cyber2000fb_check_var,
1065         .fb_set_par     = cyber2000fb_set_par,
1066         .fb_setcolreg   = cyber2000fb_setcolreg,
1067         .fb_blank       = cyber2000fb_blank,
1068         .fb_pan_display = cyber2000fb_pan_display,
1069         .fb_fillrect    = cyber2000fb_fillrect,
1070         .fb_copyarea    = cyber2000fb_copyarea,
1071         .fb_imageblit   = cyber2000fb_imageblit,
1072         .fb_sync        = cyber2000fb_sync,
1073 };
1074
1075 /*
1076  * This is the only "static" reference to the internal data structures
1077  * of this driver.  It is here solely at the moment to support the other
1078  * CyberPro modules external to this driver.
1079  */
1080 static struct cfb_info *int_cfb_info;
1081
1082 /*
1083  * Enable access to the extended registers
1084  */
1085 void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1086 {
1087         cfb->func_use_count += 1;
1088
1089         if (cfb->func_use_count == 1) {
1090                 int old;
1091
1092                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1093                 old |= EXT_FUNC_CTL_EXTREGENBL;
1094                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1095         }
1096 }
1097 EXPORT_SYMBOL(cyber2000fb_enable_extregs);
1098
1099 /*
1100  * Disable access to the extended registers
1101  */
1102 void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1103 {
1104         if (cfb->func_use_count == 1) {
1105                 int old;
1106
1107                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1108                 old &= ~EXT_FUNC_CTL_EXTREGENBL;
1109                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1110         }
1111
1112         if (cfb->func_use_count == 0)
1113                 printk(KERN_ERR "disable_extregs: count = 0\n");
1114         else
1115                 cfb->func_use_count -= 1;
1116 }
1117 EXPORT_SYMBOL(cyber2000fb_disable_extregs);
1118
1119 /*
1120  * Attach a capture/tv driver to the core CyberX0X0 driver.
1121  */
1122 int cyber2000fb_attach(struct cyberpro_info *info, int idx)
1123 {
1124         if (int_cfb_info != NULL) {
1125                 info->dev             = int_cfb_info->fb.device;
1126 #ifdef CONFIG_FB_CYBER2000_I2C
1127                 info->i2c             = &int_cfb_info->i2c_adapter;
1128 #else
1129                 info->i2c             = NULL;
1130 #endif
1131                 info->regs            = int_cfb_info->regs;
1132                 info->irq             = int_cfb_info->irq;
1133                 info->fb              = int_cfb_info->fb.screen_base;
1134                 info->fb_size         = int_cfb_info->fb.fix.smem_len;
1135                 info->info            = int_cfb_info;
1136
1137                 strlcpy(info->dev_name, int_cfb_info->fb.fix.id,
1138                         sizeof(info->dev_name));
1139         }
1140
1141         return int_cfb_info != NULL;
1142 }
1143 EXPORT_SYMBOL(cyber2000fb_attach);
1144
1145 /*
1146  * Detach a capture/tv driver from the core CyberX0X0 driver.
1147  */
1148 void cyber2000fb_detach(int idx)
1149 {
1150 }
1151 EXPORT_SYMBOL(cyber2000fb_detach);
1152
1153 #ifdef CONFIG_FB_CYBER2000_DDC
1154
1155 #define DDC_REG         0xb0
1156 #define DDC_SCL_OUT     (1 << 0)
1157 #define DDC_SDA_OUT     (1 << 4)
1158 #define DDC_SCL_IN      (1 << 2)
1159 #define DDC_SDA_IN      (1 << 6)
1160
1161 static void cyber2000fb_enable_ddc(struct cfb_info *cfb)
1162         __acquires(&cfb->reg_b0_lock)
1163 {
1164         spin_lock(&cfb->reg_b0_lock);
1165         cyber2000fb_writew(0x1bf, 0x3ce, cfb);
1166 }
1167
1168 static void cyber2000fb_disable_ddc(struct cfb_info *cfb)
1169         __releases(&cfb->reg_b0_lock)
1170 {
1171         cyber2000fb_writew(0x0bf, 0x3ce, cfb);
1172         spin_unlock(&cfb->reg_b0_lock);
1173 }
1174
1175
1176 static void cyber2000fb_ddc_setscl(void *data, int val)
1177 {
1178         struct cfb_info *cfb = data;
1179         unsigned char reg;
1180
1181         cyber2000fb_enable_ddc(cfb);
1182         reg = cyber2000_grphr(DDC_REG, cfb);
1183         if (!val)       /* bit is inverted */
1184                 reg |= DDC_SCL_OUT;
1185         else
1186                 reg &= ~DDC_SCL_OUT;
1187         cyber2000_grphw(DDC_REG, reg, cfb);
1188         cyber2000fb_disable_ddc(cfb);
1189 }
1190
1191 static void cyber2000fb_ddc_setsda(void *data, int val)
1192 {
1193         struct cfb_info *cfb = data;
1194         unsigned char reg;
1195
1196         cyber2000fb_enable_ddc(cfb);
1197         reg = cyber2000_grphr(DDC_REG, cfb);
1198         if (!val)       /* bit is inverted */
1199                 reg |= DDC_SDA_OUT;
1200         else
1201                 reg &= ~DDC_SDA_OUT;
1202         cyber2000_grphw(DDC_REG, reg, cfb);
1203         cyber2000fb_disable_ddc(cfb);
1204 }
1205
1206 static int cyber2000fb_ddc_getscl(void *data)
1207 {
1208         struct cfb_info *cfb = data;
1209         int retval;
1210
1211         cyber2000fb_enable_ddc(cfb);
1212         retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SCL_IN);
1213         cyber2000fb_disable_ddc(cfb);
1214
1215         return retval;
1216 }
1217
1218 static int cyber2000fb_ddc_getsda(void *data)
1219 {
1220         struct cfb_info *cfb = data;
1221         int retval;
1222
1223         cyber2000fb_enable_ddc(cfb);
1224         retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SDA_IN);
1225         cyber2000fb_disable_ddc(cfb);
1226
1227         return retval;
1228 }
1229
1230 static int cyber2000fb_setup_ddc_bus(struct cfb_info *cfb)
1231 {
1232         strlcpy(cfb->ddc_adapter.name, cfb->fb.fix.id,
1233                 sizeof(cfb->ddc_adapter.name));
1234         cfb->ddc_adapter.owner          = THIS_MODULE;
1235         cfb->ddc_adapter.class          = I2C_CLASS_DDC;
1236         cfb->ddc_adapter.algo_data      = &cfb->ddc_algo;
1237         cfb->ddc_adapter.dev.parent     = cfb->fb.device;
1238         cfb->ddc_algo.setsda            = cyber2000fb_ddc_setsda;
1239         cfb->ddc_algo.setscl            = cyber2000fb_ddc_setscl;
1240         cfb->ddc_algo.getsda            = cyber2000fb_ddc_getsda;
1241         cfb->ddc_algo.getscl            = cyber2000fb_ddc_getscl;
1242         cfb->ddc_algo.udelay            = 10;
1243         cfb->ddc_algo.timeout           = 20;
1244         cfb->ddc_algo.data              = cfb;
1245
1246         i2c_set_adapdata(&cfb->ddc_adapter, cfb);
1247
1248         return i2c_bit_add_bus(&cfb->ddc_adapter);
1249 }
1250 #endif /* CONFIG_FB_CYBER2000_DDC */
1251
1252 #ifdef CONFIG_FB_CYBER2000_I2C
1253 static void cyber2000fb_i2c_setsda(void *data, int state)
1254 {
1255         struct cfb_info *cfb = data;
1256         unsigned int latch2;
1257
1258         spin_lock(&cfb->reg_b0_lock);
1259         latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1260         latch2 &= EXT_LATCH2_I2C_CLKEN;
1261         if (state)
1262                 latch2 |= EXT_LATCH2_I2C_DATEN;
1263         cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1264         spin_unlock(&cfb->reg_b0_lock);
1265 }
1266
1267 static void cyber2000fb_i2c_setscl(void *data, int state)
1268 {
1269         struct cfb_info *cfb = data;
1270         unsigned int latch2;
1271
1272         spin_lock(&cfb->reg_b0_lock);
1273         latch2 = cyber2000_grphr(EXT_LATCH2, cfb);
1274         latch2 &= EXT_LATCH2_I2C_DATEN;
1275         if (state)
1276                 latch2 |= EXT_LATCH2_I2C_CLKEN;
1277         cyber2000_grphw(EXT_LATCH2, latch2, cfb);
1278         spin_unlock(&cfb->reg_b0_lock);
1279 }
1280
1281 static int cyber2000fb_i2c_getsda(void *data)
1282 {
1283         struct cfb_info *cfb = data;
1284         int ret;
1285
1286         spin_lock(&cfb->reg_b0_lock);
1287         ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_DAT);
1288         spin_unlock(&cfb->reg_b0_lock);
1289
1290         return ret;
1291 }
1292
1293 static int cyber2000fb_i2c_getscl(void *data)
1294 {
1295         struct cfb_info *cfb = data;
1296         int ret;
1297
1298         spin_lock(&cfb->reg_b0_lock);
1299         ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_CLK);
1300         spin_unlock(&cfb->reg_b0_lock);
1301
1302         return ret;
1303 }
1304
1305 static int cyber2000fb_i2c_register(struct cfb_info *cfb)
1306 {
1307         strlcpy(cfb->i2c_adapter.name, cfb->fb.fix.id,
1308                 sizeof(cfb->i2c_adapter.name));
1309         cfb->i2c_adapter.owner = THIS_MODULE;
1310         cfb->i2c_adapter.algo_data = &cfb->i2c_algo;
1311         cfb->i2c_adapter.dev.parent = cfb->fb.device;
1312         cfb->i2c_algo.setsda = cyber2000fb_i2c_setsda;
1313         cfb->i2c_algo.setscl = cyber2000fb_i2c_setscl;
1314         cfb->i2c_algo.getsda = cyber2000fb_i2c_getsda;
1315         cfb->i2c_algo.getscl = cyber2000fb_i2c_getscl;
1316         cfb->i2c_algo.udelay = 5;
1317         cfb->i2c_algo.timeout = msecs_to_jiffies(100);
1318         cfb->i2c_algo.data = cfb;
1319
1320         return i2c_bit_add_bus(&cfb->i2c_adapter);
1321 }
1322
1323 static void cyber2000fb_i2c_unregister(struct cfb_info *cfb)
1324 {
1325         i2c_del_adapter(&cfb->i2c_adapter);
1326 }
1327 #else
1328 #define cyber2000fb_i2c_register(cfb)   (0)
1329 #define cyber2000fb_i2c_unregister(cfb) do { } while (0)
1330 #endif
1331
1332 /*
1333  * These parameters give
1334  * 640x480, hsync 31.5kHz, vsync 60Hz
1335  */
1336 static const struct fb_videomode cyber2000fb_default_mode = {
1337         .refresh        = 60,
1338         .xres           = 640,
1339         .yres           = 480,
1340         .pixclock       = 39722,
1341         .left_margin    = 56,
1342         .right_margin   = 16,
1343         .upper_margin   = 34,
1344         .lower_margin   = 9,
1345         .hsync_len      = 88,
1346         .vsync_len      = 2,
1347         .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1348         .vmode          = FB_VMODE_NONINTERLACED
1349 };
1350
1351 static char igs_regs[] = {
1352         EXT_CRT_IRQ,            0,
1353         EXT_CRT_TEST,           0,
1354         EXT_SYNC_CTL,           0,
1355         EXT_SEG_WRITE_PTR,      0,
1356         EXT_SEG_READ_PTR,       0,
1357         EXT_BIU_MISC,           EXT_BIU_MISC_LIN_ENABLE |
1358                                 EXT_BIU_MISC_COP_ENABLE |
1359                                 EXT_BIU_MISC_COP_BFC,
1360         EXT_FUNC_CTL,           0,
1361         CURS_H_START,           0,
1362         CURS_H_START + 1,       0,
1363         CURS_H_PRESET,          0,
1364         CURS_V_START,           0,
1365         CURS_V_START + 1,       0,
1366         CURS_V_PRESET,          0,
1367         CURS_CTL,               0,
1368         EXT_ATTRIB_CTL,         EXT_ATTRIB_CTL_EXT,
1369         EXT_OVERSCAN_RED,       0,
1370         EXT_OVERSCAN_GREEN,     0,
1371         EXT_OVERSCAN_BLUE,      0,
1372
1373         /* some of these are questionable when we have a BIOS */
1374         EXT_MEM_CTL0,           EXT_MEM_CTL0_7CLK |
1375                                 EXT_MEM_CTL0_RAS_1 |
1376                                 EXT_MEM_CTL0_MULTCAS,
1377         EXT_HIDDEN_CTL1,        0x30,
1378         EXT_FIFO_CTL,           0x0b,
1379         EXT_FIFO_CTL + 1,       0x17,
1380         0x76,                   0x00,
1381         EXT_HIDDEN_CTL4,        0xc8
1382 };
1383
1384 /*
1385  * Initialise the CyberPro hardware.  On the CyberPro5XXXX,
1386  * ensure that we're using the correct PLL (5XXX's may be
1387  * programmed to use an additional set of PLLs.)
1388  */
1389 static void cyberpro_init_hw(struct cfb_info *cfb)
1390 {
1391         int i;
1392
1393         for (i = 0; i < sizeof(igs_regs); i += 2)
1394                 cyber2000_grphw(igs_regs[i], igs_regs[i + 1], cfb);
1395
1396         if (cfb->id == ID_CYBERPRO_5000) {
1397                 unsigned char val;
1398                 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1399                 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1400                 cyber2000fb_writeb(val, 0x3cf, cfb);
1401         }
1402 }
1403
1404 static struct cfb_info *cyberpro_alloc_fb_info(unsigned int id, char *name)
1405 {
1406         struct cfb_info *cfb;
1407
1408         cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
1409         if (!cfb)
1410                 return NULL;
1411
1412
1413         cfb->id                 = id;
1414
1415         if (id == ID_CYBERPRO_5000)
1416                 cfb->ref_ps     = 40690; /* 24.576 MHz */
1417         else
1418                 cfb->ref_ps     = 69842; /* 14.31818 MHz (69841?) */
1419
1420         cfb->divisors[0]        = 1;
1421         cfb->divisors[1]        = 2;
1422         cfb->divisors[2]        = 4;
1423
1424         if (id == ID_CYBERPRO_2000)
1425                 cfb->divisors[3] = 8;
1426         else
1427                 cfb->divisors[3] = 6;
1428
1429         strcpy(cfb->fb.fix.id, name);
1430
1431         cfb->fb.fix.type        = FB_TYPE_PACKED_PIXELS;
1432         cfb->fb.fix.type_aux    = 0;
1433         cfb->fb.fix.xpanstep    = 0;
1434         cfb->fb.fix.ypanstep    = 1;
1435         cfb->fb.fix.ywrapstep   = 0;
1436
1437         switch (id) {
1438         case ID_IGA_1682:
1439                 cfb->fb.fix.accel = 0;
1440                 break;
1441
1442         case ID_CYBERPRO_2000:
1443                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1444                 break;
1445
1446         case ID_CYBERPRO_2010:
1447                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1448                 break;
1449
1450         case ID_CYBERPRO_5000:
1451                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1452                 break;
1453         }
1454
1455         cfb->fb.var.nonstd      = 0;
1456         cfb->fb.var.activate    = FB_ACTIVATE_NOW;
1457         cfb->fb.var.height      = -1;
1458         cfb->fb.var.width       = -1;
1459         cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1460
1461         cfb->fb.fbops           = &cyber2000fb_ops;
1462         cfb->fb.flags           = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1463         cfb->fb.pseudo_palette  = cfb->pseudo_palette;
1464
1465         spin_lock_init(&cfb->reg_b0_lock);
1466
1467         fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1468
1469         return cfb;
1470 }
1471
1472 static void cyberpro_free_fb_info(struct cfb_info *cfb)
1473 {
1474         if (cfb) {
1475                 /*
1476                  * Free the colourmap
1477                  */
1478                 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1479
1480                 kfree(cfb);
1481         }
1482 }
1483
1484 /*
1485  * Parse Cyber2000fb options.  Usage:
1486  *  video=cyber2000:font:fontname
1487  */
1488 #ifndef MODULE
1489 static int cyber2000fb_setup(char *options)
1490 {
1491         char *opt;
1492
1493         if (!options || !*options)
1494                 return 0;
1495
1496         while ((opt = strsep(&options, ",")) != NULL) {
1497                 if (!*opt)
1498                         continue;
1499
1500                 if (strncmp(opt, "font:", 5) == 0) {
1501                         static char default_font_storage[40];
1502
1503                         strlcpy(default_font_storage, opt + 5,
1504                                 sizeof(default_font_storage));
1505                         default_font = default_font_storage;
1506                         continue;
1507                 }
1508
1509                 printk(KERN_ERR "CyberPro20x0: unknown parameter: %s\n", opt);
1510         }
1511         return 0;
1512 }
1513 #endif  /*  MODULE  */
1514
1515 /*
1516  * The CyberPro chips can be placed on many different bus types.
1517  * This probe function is common to all bus types.  The bus-specific
1518  * probe function is expected to have:
1519  *  - enabled access to the linear memory region
1520  *  - memory mapped access to the registers
1521  *  - initialised mem_ctl1 and mem_ctl2 appropriately.
1522  */
1523 static int cyberpro_common_probe(struct cfb_info *cfb)
1524 {
1525         u_long smem_size;
1526         u_int h_sync, v_sync;
1527         int err;
1528
1529         cyberpro_init_hw(cfb);
1530
1531         /*
1532          * Get the video RAM size and width from the VGA register.
1533          * This should have been already initialised by the BIOS,
1534          * but if it's garbage, claim default 1MB VRAM (woody)
1535          */
1536         cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1537         cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1538
1539         /*
1540          * Determine the size of the memory.
1541          */
1542         switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
1543         case MEM_CTL2_SIZE_4MB:
1544                 smem_size = 0x00400000;
1545                 break;
1546         case MEM_CTL2_SIZE_2MB:
1547                 smem_size = 0x00200000;
1548                 break;
1549         case MEM_CTL2_SIZE_1MB:
1550                 smem_size = 0x00100000;
1551                 break;
1552         default:
1553                 smem_size = 0x00100000;
1554                 break;
1555         }
1556
1557         cfb->fb.fix.smem_len   = smem_size;
1558         cfb->fb.fix.mmio_len   = MMIO_SIZE;
1559         cfb->fb.screen_base    = cfb->region;
1560
1561 #ifdef CONFIG_FB_CYBER2000_DDC
1562         if (cyber2000fb_setup_ddc_bus(cfb) == 0)
1563                 cfb->ddc_registered = true;
1564 #endif
1565
1566         err = -EINVAL;
1567         if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
1568                           &cyber2000fb_default_mode, 8)) {
1569                 printk(KERN_ERR "%s: no valid mode found\n", cfb->fb.fix.id);
1570                 goto failed;
1571         }
1572
1573         cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1574                         (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1575
1576         if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1577                 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1578
1579 /*      fb_set_var(&cfb->fb.var, -1, &cfb->fb); */
1580
1581         /*
1582          * Calculate the hsync and vsync frequencies.  Note that
1583          * we split the 1e12 constant up so that we can preserve
1584          * the precision and fit the results into 32-bit registers.
1585          *  (1953125000 * 512 = 1e12)
1586          */
1587         h_sync = 1953125000 / cfb->fb.var.pixclock;
1588         h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1589                  cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1590         v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1591                  cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1592
1593         printk(KERN_INFO "%s: %dKiB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
1594                 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1595                 cfb->fb.var.xres, cfb->fb.var.yres,
1596                 h_sync / 1000, h_sync % 1000, v_sync);
1597
1598         err = cyber2000fb_i2c_register(cfb);
1599         if (err)
1600                 goto failed;
1601
1602         err = register_framebuffer(&cfb->fb);
1603         if (err)
1604                 cyber2000fb_i2c_unregister(cfb);
1605
1606 failed:
1607 #ifdef CONFIG_FB_CYBER2000_DDC
1608         if (err && cfb->ddc_registered)
1609                 i2c_del_adapter(&cfb->ddc_adapter);
1610 #endif
1611         return err;
1612 }
1613
1614 static void cyberpro_common_remove(struct cfb_info *cfb)
1615 {
1616         unregister_framebuffer(&cfb->fb);
1617 #ifdef CONFIG_FB_CYBER2000_DDC
1618         if (cfb->ddc_registered)
1619                 i2c_del_adapter(&cfb->ddc_adapter);
1620 #endif
1621         cyber2000fb_i2c_unregister(cfb);
1622 }
1623
1624 static void cyberpro_common_resume(struct cfb_info *cfb)
1625 {
1626         cyberpro_init_hw(cfb);
1627
1628         /*
1629          * Reprogram the MEM_CTL1 and MEM_CTL2 registers
1630          */
1631         cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1632         cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1633
1634         /*
1635          * Restore the old video mode and the palette.
1636          * We also need to tell fbcon to redraw the console.
1637          */
1638         cyber2000fb_set_par(&cfb->fb);
1639 }
1640
1641 /*
1642  * We need to wake up the CyberPro, and make sure its in linear memory
1643  * mode.  Unfortunately, this is specific to the platform and card that
1644  * we are running on.
1645  *
1646  * On x86 and ARM, should we be initialising the CyberPro first via the
1647  * IO registers, and then the MMIO registers to catch all cases?  Can we
1648  * end up in the situation where the chip is in MMIO mode, but not awake
1649  * on an x86 system?
1650  */
1651 static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1652 {
1653         unsigned char val;
1654
1655 #if defined(__sparc_v9__)
1656 #error "You lose, consult DaveM."
1657 #elif defined(__sparc__)
1658         /*
1659          * SPARC does not have an "outb" instruction, so we generate
1660          * I/O cycles storing into a reserved memory space at
1661          * physical address 0x3000000
1662          */
1663         unsigned char __iomem *iop;
1664
1665         iop = ioremap(0x3000000, 0x5000);
1666         if (iop == NULL) {
1667                 printk(KERN_ERR "iga5000: cannot map I/O\n");
1668                 return -ENOMEM;
1669         }
1670
1671         writeb(0x18, iop + 0x46e8);
1672         writeb(0x01, iop + 0x102);
1673         writeb(0x08, iop + 0x46e8);
1674         writeb(EXT_BIU_MISC, iop + 0x3ce);
1675         writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
1676
1677         iounmap(iop);
1678 #else
1679         /*
1680          * Most other machine types are "normal", so
1681          * we use the standard IO-based wakeup.
1682          */
1683         outb(0x18, 0x46e8);
1684         outb(0x01, 0x102);
1685         outb(0x08, 0x46e8);
1686         outb(EXT_BIU_MISC, 0x3ce);
1687         outb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf);
1688 #endif
1689
1690         /*
1691          * Allow the CyberPro to accept PCI burst accesses
1692          */
1693         if (cfb->id == ID_CYBERPRO_2010) {
1694                 printk(KERN_INFO "%s: NOT enabling PCI bursts\n",
1695                        cfb->fb.fix.id);
1696         } else {
1697                 val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1698                 if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) {
1699                         printk(KERN_INFO "%s: enabling PCI bursts\n",
1700                                 cfb->fb.fix.id);
1701
1702                         val |= EXT_BUS_CTL_PCIBURST_WRITE;
1703
1704                         if (cfb->id == ID_CYBERPRO_5000)
1705                                 val |= EXT_BUS_CTL_PCIBURST_READ;
1706
1707                         cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1708                 }
1709         }
1710
1711         return 0;
1712 }
1713
1714 static int cyberpro_pci_probe(struct pci_dev *dev,
1715                               const struct pci_device_id *id)
1716 {
1717         struct cfb_info *cfb;
1718         char name[16];
1719         int err;
1720
1721         sprintf(name, "CyberPro%4X", id->device);
1722
1723         err = pci_enable_device(dev);
1724         if (err)
1725                 return err;
1726
1727         err = -ENOMEM;
1728         cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1729         if (!cfb)
1730                 goto failed_release;
1731
1732         err = pci_request_regions(dev, cfb->fb.fix.id);
1733         if (err)
1734                 goto failed_regions;
1735
1736         cfb->irq = dev->irq;
1737         cfb->region = pci_ioremap_bar(dev, 0);
1738         if (!cfb->region) {
1739                 err = -ENOMEM;
1740                 goto failed_ioremap;
1741         }
1742
1743         cfb->regs = cfb->region + MMIO_OFFSET;
1744         cfb->fb.device = &dev->dev;
1745         cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1746         cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1747
1748         /*
1749          * Bring up the hardware.  This is expected to enable access
1750          * to the linear memory region, and allow access to the memory
1751          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1752          * initialised.
1753          */
1754         err = cyberpro_pci_enable_mmio(cfb);
1755         if (err)
1756                 goto failed;
1757
1758         /*
1759          * Use MCLK from BIOS. FIXME: what about hotplug?
1760          */
1761         cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1762         cfb->mclk_div  = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1763
1764 #ifdef __arm__
1765         /*
1766          * MCLK on the NetWinder and the Shark is fixed at 75MHz
1767          */
1768         if (machine_is_netwinder()) {
1769                 cfb->mclk_mult = 0xdb;
1770                 cfb->mclk_div  = 0x54;
1771         }
1772 #endif
1773
1774         err = cyberpro_common_probe(cfb);
1775         if (err)
1776                 goto failed;
1777
1778         /*
1779          * Our driver data
1780          */
1781         pci_set_drvdata(dev, cfb);
1782         if (int_cfb_info == NULL)
1783                 int_cfb_info = cfb;
1784
1785         return 0;
1786
1787 failed:
1788         iounmap(cfb->region);
1789 failed_ioremap:
1790         pci_release_regions(dev);
1791 failed_regions:
1792         cyberpro_free_fb_info(cfb);
1793 failed_release:
1794         return err;
1795 }
1796
1797 static void cyberpro_pci_remove(struct pci_dev *dev)
1798 {
1799         struct cfb_info *cfb = pci_get_drvdata(dev);
1800
1801         if (cfb) {
1802                 cyberpro_common_remove(cfb);
1803                 iounmap(cfb->region);
1804                 cyberpro_free_fb_info(cfb);
1805
1806                 if (cfb == int_cfb_info)
1807                         int_cfb_info = NULL;
1808
1809                 pci_release_regions(dev);
1810         }
1811 }
1812
1813 static int __maybe_unused cyberpro_pci_suspend(struct device *dev)
1814 {
1815         return 0;
1816 }
1817
1818 /*
1819  * Re-initialise the CyberPro hardware
1820  */
1821 static int __maybe_unused cyberpro_pci_resume(struct device *dev)
1822 {
1823         struct cfb_info *cfb = dev_get_drvdata(dev);
1824
1825         if (cfb) {
1826                 cyberpro_pci_enable_mmio(cfb);
1827                 cyberpro_common_resume(cfb);
1828         }
1829
1830         return 0;
1831 }
1832
1833 static struct pci_device_id cyberpro_pci_table[] = {
1834 /*      Not yet
1835  *      { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
1836  *              PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
1837  */
1838         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2000,
1839                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2000 },
1840         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2010,
1841                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2010 },
1842         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5000,
1843                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_5000 },
1844         { 0, }
1845 };
1846
1847 MODULE_DEVICE_TABLE(pci, cyberpro_pci_table);
1848
1849 static SIMPLE_DEV_PM_OPS(cyberpro_pci_pm_ops,
1850                          cyberpro_pci_suspend,
1851                          cyberpro_pci_resume);
1852
1853 static struct pci_driver cyberpro_driver = {
1854         .name           = "CyberPro",
1855         .probe          = cyberpro_pci_probe,
1856         .remove         = cyberpro_pci_remove,
1857         .driver.pm      = &cyberpro_pci_pm_ops,
1858         .id_table       = cyberpro_pci_table
1859 };
1860
1861 /*
1862  * I don't think we can use the "module_init" stuff here because
1863  * the fbcon stuff may not be initialised yet.  Hence the #ifdef
1864  * around module_init.
1865  *
1866  * Tony: "module_init" is now required
1867  */
1868 static int __init cyber2000fb_init(void)
1869 {
1870         int ret = -1, err;
1871
1872 #ifndef MODULE
1873         char *option = NULL;
1874
1875         if (fb_get_options("cyber2000fb", &option))
1876                 return -ENODEV;
1877         cyber2000fb_setup(option);
1878 #endif
1879
1880         err = pci_register_driver(&cyberpro_driver);
1881         if (!err)
1882                 ret = 0;
1883
1884         return ret ? err : 0;
1885 }
1886 module_init(cyber2000fb_init);
1887
1888 static void __exit cyberpro_exit(void)
1889 {
1890         pci_unregister_driver(&cyberpro_driver);
1891 }
1892 module_exit(cyberpro_exit);
1893
1894 MODULE_AUTHOR("Russell King");
1895 MODULE_DESCRIPTION("CyberPro 2000, 2010 and 5000 framebuffer driver");
1896 MODULE_LICENSE("GPL");