drivers/video/fbdev/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/amba/bus.h>
  14 #include <linux/amba/clcd.h>
  15 #include <linux/backlight.h>
  16 #include <linux/clk.h>
  17 #include <linux/delay.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/fb.h>
  20 #include <linux/init.h>
  21 #include <linux/ioport.h>
  22 #include <linux/list.h>
  23 #include <linux/mm.h>
  24 #include <linux/module.h>
  25 #include <linux/of_address.h>
  26 #include <linux/of_graph.h>
  27 #include <linux/slab.h>
  28 #include <linux/string.h>
  29 #include <video/display_timing.h>
  30 #include <video/of_display_timing.h>
  31 #include <video/videomode.h>
  32
  33 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  34
  35 /* This is limited to 16 characters when displayed by X startup */
  36 static const char *clcd_name = "CLCD FB";
  37
  38 static inline void clcdfb_set_start(struct clcd_fb *fb)
  39 {
  40         unsigned long ustart = fb->fb.fix.smem_start;
  41         unsigned long lstart;
  42
  43         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  44         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  45
  46         writel(ustart, fb->regs + CLCD_UBAS);
  47         writel(lstart, fb->regs + CLCD_LBAS);
  48 }
  49
  50 static void clcdfb_disable(struct clcd_fb *fb)
  51 {
  52         u32 val;
  53
  54         if (fb->board->disable)
  55                 fb->board->disable(fb);
  56
  57         if (fb->panel->backlight) {
  58                 fb->panel->backlight->props.power = FB_BLANK_POWERDOWN;
  59                 backlight_update_status(fb->panel->backlight);
  60         }
  61
  62         val = readl(fb->regs + fb->off_cntl);
  63         if (val & CNTL_LCDPWR) {
  64                 val &= ~CNTL_LCDPWR;
  65                 writel(val, fb->regs + fb->off_cntl);
  66
  67                 msleep(20);
  68         }
  69         if (val & CNTL_LCDEN) {
  70                 val &= ~CNTL_LCDEN;
  71                 writel(val, fb->regs + fb->off_cntl);
  72         }
  73
  74         /*
  75          * Disable CLCD clock source.
  76          */
  77         if (fb->clk_enabled) {
  78                 fb->clk_enabled = false;
  79                 clk_disable(fb->clk);
  80         }
  81 }
  82
  83 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
  84 {
  85         /*
  86          * Enable the CLCD clock source.
  87          */
  88         if (!fb->clk_enabled) {
  89                 fb->clk_enabled = true;
  90                 clk_enable(fb->clk);
  91         }
  92
  93         /*
  94          * Bring up by first enabling..
  95          */
  96         cntl |= CNTL_LCDEN;
  97         writel(cntl, fb->regs + fb->off_cntl);
  98
  99         msleep(20);
 100
 101         /*
 102          * and now apply power.
 103          */
 104         cntl |= CNTL_LCDPWR;
 105         writel(cntl, fb->regs + fb->off_cntl);
 106
 107         /*
 108          * Turn on backlight
 109          */
 110         if (fb->panel->backlight) {
 111                 fb->panel->backlight->props.power = FB_BLANK_UNBLANK;
 112                 backlight_update_status(fb->panel->backlight);
 113         }
 114
 115         /*
 116          * finally, enable the interface.
 117          */
 118         if (fb->board->enable)
 119                 fb->board->enable(fb);
 120 }
 121
 122 static int
 123 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 124 {
 125         u32 caps;
 126         int ret = 0;
 127
 128         if (fb->panel->caps && fb->board->caps)
 129                 caps = fb->panel->caps & fb->board->caps;
 130         else {
 131                 /* Old way of specifying what can be used */
 132                 caps = fb->panel->cntl & CNTL_BGR ?
 133                         CLCD_CAP_BGR : CLCD_CAP_RGB;
 134                 /* But mask out 444 modes as they weren't supported */
 135                 caps &= ~CLCD_CAP_444;
 136         }
 137
 138         /* Only TFT panels can do RGB888/BGR888 */
 139         if (!(fb->panel->cntl & CNTL_LCDTFT))
 140                 caps &= ~CLCD_CAP_888;
 141
 142         memset(&var->transp, 0, sizeof(var->transp));
 143
 144         var->red.msb_right = 0;
 145         var->green.msb_right = 0;
 146         var->blue.msb_right = 0;
 147
 148         switch (var->bits_per_pixel) {
 149         case 1:
 150         case 2:
 151         case 4:
 152         case 8:
 153                 /* If we can't do 5551, reject */
 154                 caps &= CLCD_CAP_5551;
 155                 if (!caps) {
 156                         ret = -EINVAL;
 157                         break;
 158                 }
 159
 160                 var->red.length         = var->bits_per_pixel;
 161                 var->red.offset         = 0;
 162                 var->green.length       = var->bits_per_pixel;
 163                 var->green.offset       = 0;
 164                 var->blue.length        = var->bits_per_pixel;
 165                 var->blue.offset        = 0;
 166                 break;
 167
 168         case 16:
 169                 /* If we can't do 444, 5551 or 565, reject */
 170                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
 171                         ret = -EINVAL;
 172                         break;
 173                 }
 174
 175                 /*
 176                  * Green length can be 4, 5 or 6 depending whether
 177                  * we're operating in 444, 5551 or 565 mode.
 178                  */
 179                 if (var->green.length == 4 && caps & CLCD_CAP_444)
 180                         caps &= CLCD_CAP_444;
 181                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
 182                         caps &= CLCD_CAP_5551;
 183                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
 184                         caps &= CLCD_CAP_565;
 185                 else {
 186                         /*
 187                          * PL110 officially only supports RGB555,
 188                          * but may be wired up to allow RGB565.
 189                          */
 190                         if (caps & CLCD_CAP_565) {
 191                                 var->green.length = 6;
 192                                 caps &= CLCD_CAP_565;
 193                         } else if (caps & CLCD_CAP_5551) {
 194                                 var->green.length = 5;
 195                                 caps &= CLCD_CAP_5551;
 196                         } else {
 197                                 var->green.length = 4;
 198                                 caps &= CLCD_CAP_444;
 199                         }
 200                 }
 201
 202                 if (var->green.length >= 5) {
 203                         var->red.length = 5;
 204                         var->blue.length = 5;
 205                 } else {
 206                         var->red.length = 4;
 207                         var->blue.length = 4;
 208                 }
 209                 break;
 210         case 32:
 211                 /* If we can't do 888, reject */
 212                 caps &= CLCD_CAP_888;
 213                 if (!caps) {
 214                         ret = -EINVAL;
 215                         break;
 216                 }
 217
 218                 var->red.length = 8;
 219                 var->green.length = 8;
 220                 var->blue.length = 8;
 221                 break;
 222         default:
 223                 ret = -EINVAL;
 224                 break;
 225         }
 226
 227         /*
 228          * >= 16bpp displays have separate colour component bitfields
 229          * encoded in the pixel data.  Calculate their position from
 230          * the bitfield length defined above.
 231          */
 232         if (ret == 0 && var->bits_per_pixel >= 16) {
 233                 bool bgr, rgb;
 234
 235                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
 236                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
 237
 238                 if (!bgr && !rgb)
 239                         /*
 240                          * The requested format was not possible, try just
 241                          * our capabilities.  One of BGR or RGB must be
 242                          * supported.
 243                          */
 244                         bgr = caps & CLCD_CAP_BGR;
 245
 246                 if (bgr) {
 247                         var->blue.offset = 0;
 248                         var->green.offset = var->blue.offset + var->blue.length;
 249                         var->red.offset = var->green.offset + var->green.length;
 250                 } else {
 251                         var->red.offset = 0;
 252                         var->green.offset = var->red.offset + var->red.length;
 253                         var->blue.offset = var->green.offset + var->green.length;
 254                 }
 255         }
 256
 257         return ret;
 258 }
 259
 260 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 261 {
 262         struct clcd_fb *fb = to_clcd(info);
 263         int ret = -EINVAL;
 264
 265         if (fb->board->check)
 266                 ret = fb->board->check(fb, var);
 267
 268         if (ret == 0 &&
 269             var->xres_virtual * var->bits_per_pixel / 8 *
 270             var->yres_virtual > fb->fb.fix.smem_len)
 271                 ret = -EINVAL;
 272
 273         if (ret == 0)
 274                 ret = clcdfb_set_bitfields(fb, var);
 275
 276         return ret;
 277 }
 278
 279 static int clcdfb_set_par(struct fb_info *info)
 280 {
 281         struct clcd_fb *fb = to_clcd(info);
 282         struct clcd_regs regs;
 283
 284         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 285                                  fb->fb.var.bits_per_pixel / 8;
 286
 287         if (fb->fb.var.bits_per_pixel <= 8)
 288                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 289         else
 290                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 291
 292         fb->board->decode(fb, &regs);
 293
 294         clcdfb_disable(fb);
 295
 296         writel(regs.tim0, fb->regs + CLCD_TIM0);
 297         writel(regs.tim1, fb->regs + CLCD_TIM1);
 298         writel(regs.tim2, fb->regs + CLCD_TIM2);
 299         writel(regs.tim3, fb->regs + CLCD_TIM3);
 300
 301         clcdfb_set_start(fb);
 302
 303         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 304
 305         fb->clcd_cntl = regs.cntl;
 306
 307         clcdfb_enable(fb, regs.cntl);
 308
 309 #ifdef DEBUG
 310         printk(KERN_INFO
 311                "CLCD: Registers set to\n"
 312                "  %08x %08x %08x %08x\n"
 313                "  %08x %08x %08x %08x\n",
 314                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 315                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 316                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 317                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 318 #endif
 319
 320         return 0;
 321 }
 322
 323 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 324 {
 325         unsigned int mask = (1 << bf->length) - 1;
 326
 327         return (val >> (16 - bf->length) & mask) << bf->offset;
 328 }
 329
 330 /*
 331  *  Set a single color register. The values supplied have a 16 bit
 332  *  magnitude.  Return != 0 for invalid regno.
 333  */
 334 static int
 335 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 336                  unsigned int blue, unsigned int transp, struct fb_info *info)
 337 {
 338         struct clcd_fb *fb = to_clcd(info);
 339
 340         if (regno < 16)
 341                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 342                                   convert_bitfield(blue, &fb->fb.var.blue) |
 343                                   convert_bitfield(green, &fb->fb.var.green) |
 344                                   convert_bitfield(red, &fb->fb.var.red);
 345
 346         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 347                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 348                 u32 val, mask, newval;
 349
 350                 newval  = (red >> 11)  & 0x001f;
 351                 newval |= (green >> 6) & 0x03e0;
 352                 newval |= (blue >> 1)  & 0x7c00;
 353
 354                 /*
 355                  * 3.2.11: if we're configured for big endian
 356                  * byte order, the palette entries are swapped.
 357                  */
 358                 if (fb->clcd_cntl & CNTL_BEBO)
 359                         regno ^= 1;
 360
 361                 if (regno & 1) {
 362                         newval <<= 16;
 363                         mask = 0x0000ffff;
 364                 } else {
 365                         mask = 0xffff0000;
 366                 }
 367
 368                 val = readl(fb->regs + hw_reg) & mask;
 369                 writel(val | newval, fb->regs + hw_reg);
 370         }
 371
 372         return regno > 255;
 373 }
 374
 375 /*
 376  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 377  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 378  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 379  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 380  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 381  *    blank_mode == 2: suspend vsync
 382  *    blank_mode == 3: suspend hsync
 383  *    blank_mode == 4: powerdown
 384  */
 385 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 386 {
 387         struct clcd_fb *fb = to_clcd(info);
 388
 389         if (blank_mode != 0) {
 390                 clcdfb_disable(fb);
 391         } else {
 392                 clcdfb_enable(fb, fb->clcd_cntl);
 393         }
 394         return 0;
 395 }
 396
 397 static int clcdfb_mmap(struct fb_info *info,
 398                        struct vm_area_struct *vma)
 399 {
 400         struct clcd_fb *fb = to_clcd(info);
 401         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 402         int ret = -EINVAL;
 403
 404         len = info->fix.smem_len;
 405
 406         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 407             fb->board->mmap)
 408                 ret = fb->board->mmap(fb, vma);
 409
 410         return ret;
 411 }
 412
 413 static const struct fb_ops clcdfb_ops = {
 414         .owner          = THIS_MODULE,
 415         .fb_check_var   = clcdfb_check_var,
 416         .fb_set_par     = clcdfb_set_par,
 417         .fb_setcolreg   = clcdfb_setcolreg,
 418         .fb_blank       = clcdfb_blank,
 419         .fb_fillrect    = cfb_fillrect,
 420         .fb_copyarea    = cfb_copyarea,
 421         .fb_imageblit   = cfb_imageblit,
 422         .fb_mmap        = clcdfb_mmap,
 423 };
 424
 425 static int clcdfb_register(struct clcd_fb *fb)
 426 {
 427         int ret;
 428
 429         /*
 430          * ARM PL111 always has IENB at 0x1c; it's only PL110
 431          * which is reversed on some platforms.
 432          */
 433         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 434                 fb->off_ienb = CLCD_PL111_IENB;
 435                 fb->off_cntl = CLCD_PL111_CNTL;
 436         } else {
 437                 fb->off_ienb = CLCD_PL110_IENB;
 438                 fb->off_cntl = CLCD_PL110_CNTL;
 439         }
 440
 441         fb->clk = clk_get(&fb->dev->dev, NULL);
 442         if (IS_ERR(fb->clk)) {
 443                 ret = PTR_ERR(fb->clk);
 444                 goto out;
 445         }
 446
 447         ret = clk_prepare(fb->clk);
 448         if (ret)
 449                 goto free_clk;
 450
 451         fb->fb.device           = &fb->dev->dev;
 452
 453         fb->fb.fix.mmio_start   = fb->dev->res.start;
 454         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 455
 456         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 457         if (!fb->regs) {
 458                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 459                 ret = -ENOMEM;
 460                 goto clk_unprep;
 461         }
 462
 463         fb->fb.fbops            = &clcdfb_ops;
 464         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 465         fb->fb.pseudo_palette   = fb->cmap;
 466
 467         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 468         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 469         fb->fb.fix.type_aux     = 0;
 470         fb->fb.fix.xpanstep     = 0;
 471         fb->fb.fix.ypanstep     = 0;
 472         fb->fb.fix.ywrapstep    = 0;
 473         fb->fb.fix.accel        = FB_ACCEL_NONE;
 474
 475         fb->fb.var.xres         = fb->panel->mode.xres;
 476         fb->fb.var.yres         = fb->panel->mode.yres;
 477         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 478         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 479         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 480         fb->fb.var.grayscale    = fb->panel->grayscale;
 481         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 482         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 483         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 484         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 485         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 486         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 487         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 488         fb->fb.var.sync         = fb->panel->mode.sync;
 489         fb->fb.var.vmode        = fb->panel->mode.vmode;
 490         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 491         fb->fb.var.nonstd       = 0;
 492         fb->fb.var.height       = fb->panel->height;
 493         fb->fb.var.width        = fb->panel->width;
 494         fb->fb.var.accel_flags  = 0;
 495
 496         fb->fb.monspecs.hfmin   = 0;
 497         fb->fb.monspecs.hfmax   = 100000;
 498         fb->fb.monspecs.vfmin   = 0;
 499         fb->fb.monspecs.vfmax   = 400;
 500         fb->fb.monspecs.dclkmin = 1000000;
 501         fb->fb.monspecs.dclkmax = 100000000;
 502
 503         /*
 504          * Make sure that the bitfields are set appropriately.
 505          */
 506         clcdfb_set_bitfields(fb, &fb->fb.var);
 507
 508         /*
 509          * Allocate colourmap.
 510          */
 511         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 512         if (ret)
 513                 goto unmap;
 514
 515         /*
 516          * Ensure interrupts are disabled.
 517          */
 518         writel(0, fb->regs + fb->off_ienb);
 519
 520         fb_set_var(&fb->fb, &fb->fb.var);
 521
 522         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
 523                  fb->board->name, fb->panel->mode.name);
 524
 525         ret = register_framebuffer(&fb->fb);
 526         if (ret == 0)
 527                 goto out;
 528
 529         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 530
 531         fb_dealloc_cmap(&fb->fb.cmap);
 532  unmap:
 533         iounmap(fb->regs);
 534  clk_unprep:
 535         clk_unprepare(fb->clk);
 536  free_clk:
 537         clk_put(fb->clk);
 538  out:
 539         return ret;
 540 }
 541
 542 #ifdef CONFIG_OF
 543 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
 544                 struct clcd_panel *clcd_panel)
 545 {
 546         int err;
 547         struct display_timing timing;
 548         struct videomode video;
 549
 550         err = of_get_display_timing(node, "panel-timing", &timing);
 551         if (err) {
 552                 pr_err("%pOF: problems parsing panel-timing (%d)\n", node, err);
 553                 return err;
 554         }
 555
 556         videomode_from_timing(&timing, &video);
 557
 558         err = fb_videomode_from_videomode(&video, &clcd_panel->mode);
 559         if (err)
 560                 return err;
 561
 562         /* Set up some inversion flags */
 563         if (timing.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
 564                 clcd_panel->tim2 |= TIM2_IPC;
 565         else if (!(timing.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE))
 566                 /*
 567                  * To preserve backwards compatibility, the IPC (inverted
 568                  * pixel clock) flag needs to be set on any display that
 569                  * doesn't explicitly specify that the pixel clock is
 570                  * active on the negative or positive edge.
 571                  */
 572                 clcd_panel->tim2 |= TIM2_IPC;
 573
 574         if (timing.flags & DISPLAY_FLAGS_HSYNC_LOW)
 575                 clcd_panel->tim2 |= TIM2_IHS;
 576
 577         if (timing.flags & DISPLAY_FLAGS_VSYNC_LOW)
 578                 clcd_panel->tim2 |= TIM2_IVS;
 579
 580         if (timing.flags & DISPLAY_FLAGS_DE_LOW)
 581                 clcd_panel->tim2 |= TIM2_IOE;
 582
 583         return 0;
 584 }
 585
 586 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
 587 {
 588         return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
 589                         mode->refresh);
 590 }
 591
 592 static int clcdfb_of_get_backlight(struct device *dev,
 593                                    struct clcd_panel *clcd_panel)
 594 {
 595         struct backlight_device *backlight;
 596
 597         /* Look up the optional backlight device */
 598         backlight = devm_of_find_backlight(dev);
 599         if (IS_ERR(backlight))
 600                 return PTR_ERR(backlight);
 601
 602         clcd_panel->backlight = backlight;
 603         return 0;
 604 }
 605
 606 static int clcdfb_of_get_mode(struct device *dev, struct device_node *panel,
 607                               struct clcd_panel *clcd_panel)
 608 {
 609         int err;
 610         struct fb_videomode *mode;
 611         char *name;
 612         int len;
 613
 614         /* Only directly connected DPI panels supported for now */
 615         if (of_device_is_compatible(panel, "panel-dpi"))
 616                 err = clcdfb_of_get_dpi_panel_mode(panel, clcd_panel);
 617         else
 618                 err = -ENOENT;
 619         if (err)
 620                 return err;
 621         mode = &clcd_panel->mode;
 622
 623         len = clcdfb_snprintf_mode(NULL, 0, mode);
 624         name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
 625         if (!name)
 626                 return -ENOMEM;
 627
 628         clcdfb_snprintf_mode(name, len + 1, mode);
 629         mode->name = name;
 630
 631         return 0;
 632 }
 633
 634 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
 635 {
 636         static struct {
 637                 unsigned int part;
 638                 u32 r0, g0, b0;
 639                 u32 caps;
 640         } panels[] = {
 641                 { 0x110, 1,  7, 13, CLCD_CAP_5551 },
 642                 { 0x110, 0,  8, 16, CLCD_CAP_888 },
 643                 { 0x110, 16, 8, 0,  CLCD_CAP_888 },
 644                 { 0x111, 4, 14, 20, CLCD_CAP_444 },
 645                 { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
 646                 { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
 647                                     CLCD_CAP_565 },
 648                 { 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
 649                                     CLCD_CAP_565 | CLCD_CAP_888 },
 650         };
 651         int i;
 652
 653         /* Bypass pixel clock divider */
 654         fb->panel->tim2 |= TIM2_BCD;
 655
 656         /* TFT display, vert. comp. interrupt at the start of the back porch */
 657         fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
 658
 659         fb->panel->caps = 0;
 660
 661         /* Match the setup with known variants */
 662         for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
 663                 if (amba_part(fb->dev) != panels[i].part)
 664                         continue;
 665                 if (g0 != panels[i].g0)
 666                         continue;
 667                 if (r0 == panels[i].r0 && b0 == panels[i].b0)
 668                         fb->panel->caps = panels[i].caps;
 669         }
 670
 671         /*
 672          * If we actually physically connected the R lines to B and
 673          * vice versa
 674          */
 675         if (r0 != 0 && b0 == 0)
 676                 fb->panel->bgr_connection = true;
 677
 678         return fb->panel->caps ? 0 : -EINVAL;
 679 }
 680
 681 static int clcdfb_of_init_display(struct clcd_fb *fb)
 682 {
 683         struct device_node *endpoint, *panel;
 684         int err;
 685         unsigned int bpp;
 686         u32 max_bandwidth;
 687         u32 tft_r0b0g0[3];
 688
 689         fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
 690         if (!fb->panel)
 691                 return -ENOMEM;
 692
 693         /*
 694          * Fetch the panel endpoint.
 695          */
 696         endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
 697         if (!endpoint)
 698                 return -ENODEV;
 699
 700         panel = of_graph_get_remote_port_parent(endpoint);
 701         if (!panel)
 702                 return -ENODEV;
 703
 704         err = clcdfb_of_get_backlight(&fb->dev->dev, fb->panel);
 705         if (err)
 706                 return err;
 707
 708         err = clcdfb_of_get_mode(&fb->dev->dev, panel, fb->panel);
 709         if (err)
 710                 return err;
 711
 712         err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
 713                         &max_bandwidth);
 714         if (!err) {
 715                 /*
 716                  * max_bandwidth is in bytes per second and pixclock in
 717                  * pico-seconds, so the maximum allowed bits per pixel is
 718                  *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
 719                  * Rearrange this calculation to avoid overflow and then ensure
 720                  * result is a valid format.
 721                  */
 722                 bpp = max_bandwidth / (1000 / 8)
 723                         / PICOS2KHZ(fb->panel->mode.pixclock);
 724                 bpp = rounddown_pow_of_two(bpp);
 725                 if (bpp > 32)
 726                         bpp = 32;
 727         } else
 728                 bpp = 32;
 729         fb->panel->bpp = bpp;
 730
 731 #ifdef CONFIG_CPU_BIG_ENDIAN
 732         fb->panel->cntl |= CNTL_BEBO;
 733 #endif
 734         fb->panel->width = -1;
 735         fb->panel->height = -1;
 736
 737         if (of_property_read_u32_array(endpoint,
 738                         "arm,pl11x,tft-r0g0b0-pads",
 739                         tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) != 0)
 740                 return -ENOENT;
 741
 742         return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
 743                                         tft_r0b0g0[1],  tft_r0b0g0[2]);
 744 }
 745
 746 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
 747 {
 748         int err;
 749         struct device_node *memory;
 750         u64 size;
 751
 752         err = clcdfb_of_init_display(fb);
 753         if (err)
 754                 return err;
 755
 756         memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
 757         if (!memory)
 758                 return -ENODEV;
 759
 760         fb->fb.screen_base = of_iomap(memory, 0);
 761         if (!fb->fb.screen_base)
 762                 return -ENOMEM;
 763
 764         fb->fb.fix.smem_start = of_translate_address(memory,
 765                         of_get_address(memory, 0, &size, NULL));
 766         fb->fb.fix.smem_len = size;
 767
 768         return 0;
 769 }
 770
 771 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 772 {
 773         unsigned long off, user_size, kernel_size;
 774
 775
 776         off = vma->vm_pgoff << PAGE_SHIFT;
 777         user_size = vma->vm_end - vma->vm_start;
 778         kernel_size = fb->fb.fix.smem_len;
 779
 780         if (off >= kernel_size || user_size > (kernel_size - off))
 781                 return -ENXIO;
 782
 783         return remap_pfn_range(vma, vma->vm_start,
 784                         __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
 785                         user_size,
 786                         pgprot_writecombine(vma->vm_page_prot));
 787 }
 788
 789 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
 790 {
 791         iounmap(fb->fb.screen_base);
 792 }
 793
 794 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
 795 {
 796         unsigned long framesize;
 797         dma_addr_t dma;
 798         int err;
 799
 800         err = clcdfb_of_init_display(fb);
 801         if (err)
 802                 return err;
 803
 804         framesize = PAGE_ALIGN(fb->panel->mode.xres * fb->panel->mode.yres *
 805                         fb->panel->bpp / 8);
 806         fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
 807                         &dma, GFP_KERNEL);
 808         if (!fb->fb.screen_base)
 809                 return -ENOMEM;
 810
 811         fb->fb.fix.smem_start = dma;
 812         fb->fb.fix.smem_len = framesize;
 813
 814         return 0;
 815 }
 816
 817 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 818 {
 819         return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
 820                            fb->fb.fix.smem_start, fb->fb.fix.smem_len);
 821 }
 822
 823 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
 824 {
 825         dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
 826                         fb->fb.screen_base, fb->fb.fix.smem_start);
 827 }
 828
 829 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 830 {
 831         struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
 832                         GFP_KERNEL);
 833         struct device_node *node = dev->dev.of_node;
 834
 835         if (!board)
 836                 return NULL;
 837
 838         board->name = of_node_full_name(node);
 839         board->caps = CLCD_CAP_ALL;
 840         board->check = clcdfb_check;
 841         board->decode = clcdfb_decode;
 842         if (of_find_property(node, "memory-region", NULL)) {
 843                 board->setup = clcdfb_of_vram_setup;
 844                 board->mmap = clcdfb_of_vram_mmap;
 845                 board->remove = clcdfb_of_vram_remove;
 846         } else {
 847                 board->setup = clcdfb_of_dma_setup;
 848                 board->mmap = clcdfb_of_dma_mmap;
 849                 board->remove = clcdfb_of_dma_remove;
 850         }
 851
 852         return board;
 853 }
 854 #else
 855 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 856 {
 857         return NULL;
 858 }
 859 #endif
 860
 861 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
 862 {
 863         struct clcd_board *board = dev_get_platdata(&dev->dev);
 864         struct clcd_fb *fb;
 865         int ret;
 866
 867         if (!board)
 868                 board = clcdfb_of_get_board(dev);
 869
 870         if (!board)
 871                 return -EINVAL;
 872
 873         ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
 874         if (ret)
 875                 goto out;
 876
 877         ret = amba_request_regions(dev, NULL);
 878         if (ret) {
 879                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 880                 goto out;
 881         }
 882
 883         fb = kzalloc(sizeof(*fb), GFP_KERNEL);
 884         if (!fb) {
 885                 ret = -ENOMEM;
 886                 goto free_region;
 887         }
 888
 889         fb->dev = dev;
 890         fb->board = board;
 891
 892         dev_info(&fb->dev->dev, "PL%03x designer %02x rev%u at 0x%08llx\n",
 893                 amba_part(dev), amba_manf(dev), amba_rev(dev),
 894                 (unsigned long long)dev->res.start);
 895
 896         ret = fb->board->setup(fb);
 897         if (ret)
 898                 goto free_fb;
 899
 900         ret = clcdfb_register(fb);
 901         if (ret == 0) {
 902                 amba_set_drvdata(dev, fb);
 903                 goto out;
 904         }
 905
 906         fb->board->remove(fb);
 907  free_fb:
 908         kfree(fb);
 909  free_region:
 910         amba_release_regions(dev);
 911  out:
 912         return ret;
 913 }
 914
 915 static void clcdfb_remove(struct amba_device *dev)
 916 {
 917         struct clcd_fb *fb = amba_get_drvdata(dev);
 918
 919         clcdfb_disable(fb);
 920         unregister_framebuffer(&fb->fb);
 921         if (fb->fb.cmap.len)
 922                 fb_dealloc_cmap(&fb->fb.cmap);
 923         iounmap(fb->regs);
 924         clk_unprepare(fb->clk);
 925         clk_put(fb->clk);
 926
 927         fb->board->remove(fb);
 928
 929         kfree(fb);
 930
 931         amba_release_regions(dev);
 932 }
 933
 934 static const struct amba_id clcdfb_id_table[] = {
 935         {
 936                 .id     = 0x00041110,
 937                 .mask   = 0x000ffffe,
 938         },
 939         { 0, 0 },
 940 };
 941
 942 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
 943
 944 static struct amba_driver clcd_driver = {
 945         .drv            = {
 946                 .name   = "clcd-pl11x",
 947         },
 948         .probe          = clcdfb_probe,
 949         .remove         = clcdfb_remove,
 950         .id_table       = clcdfb_id_table,
 951 };
 952
 953 static int __init amba_clcdfb_init(void)
 954 {
 955         if (fb_get_options("ambafb", NULL))
 956                 return -ENODEV;
 957
 958         return amba_driver_register(&clcd_driver);
 959 }
 960
 961 module_init(amba_clcdfb_init);
 962
 963 static void __exit amba_clcdfb_exit(void)
 964 {
 965         amba_driver_unregister(&clcd_driver);
 966 }
 967
 968 module_exit(amba_clcdfb_exit);
 969
 970 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 971 MODULE_LICENSE("GPL");