1 // SPDX-License-Identifier: GPL-2.0-only
3 * VFIO PCI Intel Graphics support
5 * Copyright (C) 2016 Red Hat, Inc. All rights reserved.
6 * Author: Alex Williamson <alex.williamson@redhat.com>
8 * Register a device specific region through which to provide read-only
9 * access to the Intel IGD opregion. The register defining the opregion
10 * address is also virtualized to prevent user modification.
14 #include <linux/pci.h>
15 #include <linux/uaccess.h>
16 #include <linux/vfio.h>
18 #include "vfio_pci_private.h"
20 #define OPREGION_SIGNATURE "IntelGraphicsMem"
21 #define OPREGION_SIZE (8 * 1024)
22 #define OPREGION_PCI_ADDR 0xfc
24 #define OPREGION_RVDA 0x3ba
25 #define OPREGION_RVDS 0x3c2
26 #define OPREGION_VERSION 0x16
28 static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
29 size_t count, loff_t *ppos, bool iswrite)
31 unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
32 void *base = vdev->region[i].data;
33 loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
35 if (pos >= vdev->region[i].size || iswrite)
38 count = min(count, (size_t)(vdev->region[i].size - pos));
40 if (copy_to_user(buf, base + pos, count))
48 static void vfio_pci_igd_release(struct vfio_pci_device *vdev,
49 struct vfio_pci_region *region)
51 memunmap(region->data);
54 static const struct vfio_pci_regops vfio_pci_igd_regops = {
55 .rw = vfio_pci_igd_rw,
56 .release = vfio_pci_igd_release,
59 static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
61 __le32 *dwordp = (__le32 *)(vdev->vconfig + OPREGION_PCI_ADDR);
67 ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
71 if (!addr || !(~addr))
74 base = memremap(addr, OPREGION_SIZE, MEMREMAP_WB);
78 if (memcmp(base, OPREGION_SIGNATURE, 16)) {
83 size = le32_to_cpu(*(__le32 *)(base + 16));
89 size *= 1024; /* In KB */
92 * Support opregion v2.1+
93 * When VBT data exceeds 6KB size and cannot be within mailbox #4, then
94 * the Extended VBT region next to opregion is used to hold the VBT data.
95 * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
96 * (Raw VBT Data Size) from opregion structure member are used to hold the
97 * address from region base and size of VBT data. RVDA/RVDS are not
98 * defined before opregion 2.0.
100 * opregion 2.1+: RVDA is unsigned, relative offset from
101 * opregion base, and should point to the end of opregion.
102 * otherwise, exposing to userspace to allow read access to everything between
103 * the OpRegion and VBT is not safe.
104 * RVDS is defined as size in bytes.
106 * opregion 2.0: rvda is the physical VBT address.
107 * Since rvda is HPA it cannot be directly used in guest.
108 * And it should not be practically available for end user,so it is not supported.
110 version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
111 if (version >= 0x0200) {
115 rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
116 rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
118 /* no support for opregion v2.0 with physical VBT address */
119 if (version == 0x0200) {
122 "IGD assignment does not support opregion v2.0 with an extended VBT region\n");
129 "Extended VBT does not follow opregion on version 0x%04x\n",
134 /* region size for opregion v2.0+: opregion and VBT size. */
139 if (size != OPREGION_SIZE) {
141 base = memremap(addr, size, MEMREMAP_WB);
146 ret = vfio_pci_register_dev_region(vdev,
147 PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
148 VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION,
149 &vfio_pci_igd_regops, size, VFIO_REGION_INFO_FLAG_READ, base);
155 /* Fill vconfig with the hw value and virtualize register */
156 *dwordp = cpu_to_le32(addr);
157 memset(vdev->pci_config_map + OPREGION_PCI_ADDR,
158 PCI_CAP_ID_INVALID_VIRT, 4);
163 static size_t vfio_pci_igd_cfg_rw(struct vfio_pci_device *vdev,
164 char __user *buf, size_t count, loff_t *ppos,
167 unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
168 struct pci_dev *pdev = vdev->region[i].data;
169 loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
173 if (pos >= vdev->region[i].size || iswrite)
176 size = count = min(count, (size_t)(vdev->region[i].size - pos));
178 if ((pos & 1) && size) {
181 ret = pci_user_read_config_byte(pdev, pos, &val);
185 if (copy_to_user(buf + count - size, &val, 1))
192 if ((pos & 3) && size > 2) {
195 ret = pci_user_read_config_word(pdev, pos, &val);
199 val = cpu_to_le16(val);
200 if (copy_to_user(buf + count - size, &val, 2))
210 ret = pci_user_read_config_dword(pdev, pos, &val);
214 val = cpu_to_le32(val);
215 if (copy_to_user(buf + count - size, &val, 4))
225 ret = pci_user_read_config_word(pdev, pos, &val);
229 val = cpu_to_le16(val);
230 if (copy_to_user(buf + count - size, &val, 2))
240 ret = pci_user_read_config_byte(pdev, pos, &val);
244 if (copy_to_user(buf + count - size, &val, 1))
256 static void vfio_pci_igd_cfg_release(struct vfio_pci_device *vdev,
257 struct vfio_pci_region *region)
259 struct pci_dev *pdev = region->data;
264 static const struct vfio_pci_regops vfio_pci_igd_cfg_regops = {
265 .rw = vfio_pci_igd_cfg_rw,
266 .release = vfio_pci_igd_cfg_release,
269 static int vfio_pci_igd_cfg_init(struct vfio_pci_device *vdev)
271 struct pci_dev *host_bridge, *lpc_bridge;
274 host_bridge = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
278 if (host_bridge->vendor != PCI_VENDOR_ID_INTEL ||
279 host_bridge->class != (PCI_CLASS_BRIDGE_HOST << 8)) {
280 pci_dev_put(host_bridge);
284 ret = vfio_pci_register_dev_region(vdev,
285 PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
286 VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG,
287 &vfio_pci_igd_cfg_regops, host_bridge->cfg_size,
288 VFIO_REGION_INFO_FLAG_READ, host_bridge);
290 pci_dev_put(host_bridge);
294 lpc_bridge = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0x1f, 0));
298 if (lpc_bridge->vendor != PCI_VENDOR_ID_INTEL ||
299 lpc_bridge->class != (PCI_CLASS_BRIDGE_ISA << 8)) {
300 pci_dev_put(lpc_bridge);
304 ret = vfio_pci_register_dev_region(vdev,
305 PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
306 VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG,
307 &vfio_pci_igd_cfg_regops, lpc_bridge->cfg_size,
308 VFIO_REGION_INFO_FLAG_READ, lpc_bridge);
310 pci_dev_put(lpc_bridge);
317 int vfio_pci_igd_init(struct vfio_pci_device *vdev)
321 ret = vfio_pci_igd_opregion_init(vdev);
325 ret = vfio_pci_igd_cfg_init(vdev);