1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016 MediaTek Inc.
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
9 #include <linux/dma-mapping.h>
10 #include <linux/iopoll.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_irq.h>
15 #include <linux/platform_device.h>
20 /* u2-port0 should be powered on and enabled; */
21 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
23 void __iomem *ibase = ssusb->ippc_base;
27 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
30 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
31 (check_val == (value & check_val)), 100, 20000);
33 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
37 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
38 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
40 dev_err(ssusb->dev, "mac2 clock is not stable\n");
47 static int ssusb_phy_init(struct ssusb_mtk *ssusb)
52 for (i = 0; i < ssusb->num_phys; i++) {
53 ret = phy_init(ssusb->phys[i]);
61 phy_exit(ssusb->phys[i - 1]);
66 static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
70 for (i = 0; i < ssusb->num_phys; i++)
71 phy_exit(ssusb->phys[i]);
76 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
81 for (i = 0; i < ssusb->num_phys; i++) {
82 ret = phy_power_on(ssusb->phys[i]);
90 phy_power_off(ssusb->phys[i - 1]);
95 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
99 for (i = 0; i < ssusb->num_phys; i++)
100 phy_power_off(ssusb->phys[i]);
103 static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
107 ret = clk_prepare_enable(ssusb->sys_clk);
109 dev_err(ssusb->dev, "failed to enable sys_clk\n");
113 ret = clk_prepare_enable(ssusb->ref_clk);
115 dev_err(ssusb->dev, "failed to enable ref_clk\n");
119 ret = clk_prepare_enable(ssusb->mcu_clk);
121 dev_err(ssusb->dev, "failed to enable mcu_clk\n");
125 ret = clk_prepare_enable(ssusb->dma_clk);
127 dev_err(ssusb->dev, "failed to enable dma_clk\n");
134 clk_disable_unprepare(ssusb->mcu_clk);
136 clk_disable_unprepare(ssusb->ref_clk);
138 clk_disable_unprepare(ssusb->sys_clk);
143 static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
145 clk_disable_unprepare(ssusb->dma_clk);
146 clk_disable_unprepare(ssusb->mcu_clk);
147 clk_disable_unprepare(ssusb->ref_clk);
148 clk_disable_unprepare(ssusb->sys_clk);
151 static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
155 ret = regulator_enable(ssusb->vusb33);
157 dev_err(ssusb->dev, "failed to enable vusb33\n");
161 ret = ssusb_clks_enable(ssusb);
165 ret = ssusb_phy_init(ssusb);
167 dev_err(ssusb->dev, "failed to init phy\n");
171 ret = ssusb_phy_power_on(ssusb);
173 dev_err(ssusb->dev, "failed to power on phy\n");
180 ssusb_phy_exit(ssusb);
182 ssusb_clks_disable(ssusb);
184 regulator_disable(ssusb->vusb33);
189 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
191 ssusb_clks_disable(ssusb);
192 regulator_disable(ssusb->vusb33);
193 ssusb_phy_power_off(ssusb);
194 ssusb_phy_exit(ssusb);
197 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
199 /* reset whole ip (xhci & u3d) */
200 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
202 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
205 * device ip may be powered on in firmware/BROM stage before entering
207 * power down device ip, otherwise ip-sleep will fail when working as
210 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
213 /* ignore the error if the clock does not exist */
214 static struct clk *get_optional_clk(struct device *dev, const char *id)
218 opt_clk = devm_clk_get(dev, id);
219 /* ignore error number except EPROBE_DEFER */
220 if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
226 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
228 struct device_node *node = pdev->dev.of_node;
229 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
230 struct device *dev = &pdev->dev;
231 struct regulator *vbus;
232 struct resource *res;
236 ssusb->vusb33 = devm_regulator_get(&pdev->dev, "vusb33");
237 if (IS_ERR(ssusb->vusb33)) {
238 dev_err(dev, "failed to get vusb33\n");
239 return PTR_ERR(ssusb->vusb33);
242 ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
243 if (IS_ERR(ssusb->sys_clk)) {
244 dev_err(dev, "failed to get sys clock\n");
245 return PTR_ERR(ssusb->sys_clk);
248 ssusb->ref_clk = get_optional_clk(dev, "ref_ck");
249 if (IS_ERR(ssusb->ref_clk))
250 return PTR_ERR(ssusb->ref_clk);
252 ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck");
253 if (IS_ERR(ssusb->mcu_clk))
254 return PTR_ERR(ssusb->mcu_clk);
256 ssusb->dma_clk = get_optional_clk(dev, "dma_ck");
257 if (IS_ERR(ssusb->dma_clk))
258 return PTR_ERR(ssusb->dma_clk);
260 ssusb->num_phys = of_count_phandle_with_args(node,
261 "phys", "#phy-cells");
262 if (ssusb->num_phys > 0) {
263 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
264 sizeof(*ssusb->phys), GFP_KERNEL);
271 for (i = 0; i < ssusb->num_phys; i++) {
272 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
273 if (IS_ERR(ssusb->phys[i])) {
274 dev_err(dev, "failed to get phy-%d\n", i);
275 return PTR_ERR(ssusb->phys[i]);
279 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
280 ssusb->ippc_base = devm_ioremap_resource(dev, res);
281 if (IS_ERR(ssusb->ippc_base))
282 return PTR_ERR(ssusb->ippc_base);
284 ssusb->dr_mode = usb_get_dr_mode(dev);
285 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
286 ssusb->dr_mode = USB_DR_MODE_OTG;
288 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
291 /* if host role is supported */
292 ret = ssusb_wakeup_of_property_parse(ssusb, node);
294 dev_err(dev, "failed to parse uwk property\n");
298 /* optional property, ignore the error if it does not exist */
299 of_property_read_u32(node, "mediatek,u3p-dis-msk",
300 &ssusb->u3p_dis_msk);
302 vbus = devm_regulator_get(&pdev->dev, "vbus");
304 dev_err(dev, "failed to get vbus\n");
305 return PTR_ERR(vbus);
309 if (ssusb->dr_mode == USB_DR_MODE_HOST)
312 /* if dual-role mode is supported */
313 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
314 otg_sx->manual_drd_enabled =
315 of_property_read_bool(node, "enable-manual-drd");
317 if (of_property_read_bool(node, "extcon")) {
318 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
319 if (IS_ERR(otg_sx->edev)) {
320 dev_err(ssusb->dev, "couldn't get extcon device\n");
321 return PTR_ERR(otg_sx->edev);
325 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
326 ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
327 otg_sx->manual_drd_enabled ? "manual" : "auto");
332 static int mtu3_probe(struct platform_device *pdev)
334 struct device_node *node = pdev->dev.of_node;
335 struct device *dev = &pdev->dev;
336 struct ssusb_mtk *ssusb;
339 /* all elements are set to ZERO as default value */
340 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
344 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
346 dev_err(dev, "No suitable DMA config available\n");
350 platform_set_drvdata(pdev, ssusb);
353 ret = get_ssusb_rscs(pdev, ssusb);
357 /* enable power domain */
358 pm_runtime_enable(dev);
359 pm_runtime_get_sync(dev);
360 device_enable_async_suspend(dev);
362 ret = ssusb_rscs_init(ssusb);
366 ssusb_ip_sw_reset(ssusb);
368 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
369 ssusb->dr_mode = USB_DR_MODE_HOST;
370 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
371 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
373 /* default as host */
374 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
376 switch (ssusb->dr_mode) {
377 case USB_DR_MODE_PERIPHERAL:
378 ret = ssusb_gadget_init(ssusb);
380 dev_err(dev, "failed to initialize gadget\n");
384 case USB_DR_MODE_HOST:
385 ret = ssusb_host_init(ssusb, node);
387 dev_err(dev, "failed to initialize host\n");
391 case USB_DR_MODE_OTG:
392 ret = ssusb_gadget_init(ssusb);
394 dev_err(dev, "failed to initialize gadget\n");
398 ret = ssusb_host_init(ssusb, node);
400 dev_err(dev, "failed to initialize host\n");
404 ssusb_otg_switch_init(ssusb);
407 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
415 ssusb_gadget_exit(ssusb);
417 ssusb_rscs_exit(ssusb);
419 pm_runtime_put_sync(dev);
420 pm_runtime_disable(dev);
425 static int mtu3_remove(struct platform_device *pdev)
427 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
429 switch (ssusb->dr_mode) {
430 case USB_DR_MODE_PERIPHERAL:
431 ssusb_gadget_exit(ssusb);
433 case USB_DR_MODE_HOST:
434 ssusb_host_exit(ssusb);
436 case USB_DR_MODE_OTG:
437 ssusb_otg_switch_exit(ssusb);
438 ssusb_gadget_exit(ssusb);
439 ssusb_host_exit(ssusb);
445 ssusb_rscs_exit(ssusb);
446 pm_runtime_put_sync(&pdev->dev);
447 pm_runtime_disable(&pdev->dev);
453 * when support dual-role mode, we reject suspend when
454 * it works as device mode;
456 static int __maybe_unused mtu3_suspend(struct device *dev)
458 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
460 dev_dbg(dev, "%s\n", __func__);
462 /* REVISIT: disconnect it for only device mode? */
466 ssusb_host_disable(ssusb, true);
467 ssusb_phy_power_off(ssusb);
468 ssusb_clks_disable(ssusb);
469 ssusb_wakeup_set(ssusb, true);
474 static int __maybe_unused mtu3_resume(struct device *dev)
476 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
479 dev_dbg(dev, "%s\n", __func__);
484 ssusb_wakeup_set(ssusb, false);
485 ret = ssusb_clks_enable(ssusb);
489 ret = ssusb_phy_power_on(ssusb);
493 ssusb_host_enable(ssusb);
498 ssusb_clks_disable(ssusb);
503 static const struct dev_pm_ops mtu3_pm_ops = {
504 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
507 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
511 static const struct of_device_id mtu3_of_match[] = {
512 {.compatible = "mediatek,mt8173-mtu3",},
513 {.compatible = "mediatek,mtu3",},
517 MODULE_DEVICE_TABLE(of, mtu3_of_match);
521 static struct platform_driver mtu3_driver = {
523 .remove = mtu3_remove,
525 .name = MTU3_DRIVER_NAME,
527 .of_match_table = of_match_ptr(mtu3_of_match),
530 module_platform_driver(mtu3_driver);
532 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
533 MODULE_LICENSE("GPL v2");
534 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");