1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_dr.c - dual role switch and host glue layer
5 * Copyright (C) 2016 MediaTek Inc.
7 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
10 #include <linux/clk.h>
11 #include <linux/iopoll.h>
12 #include <linux/irq.h>
13 #include <linux/kernel.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/of_device.h>
16 #include <linux/regmap.h>
22 #define PERI_WK_CTRL1 0x4
23 #define WC1_IS_C(x) (((x) & 0xf) << 26) /* cycle debounce */
24 #define WC1_IS_EN BIT(25)
25 #define WC1_IS_P BIT(6) /* polarity for ip sleep */
28 #define PERI_WK_CTRL0 0x0
29 #define WC0_IS_C(x) ((u32)(((x) & 0xf) << 28)) /* cycle debounce */
30 #define WC0_IS_P BIT(12) /* polarity */
31 #define WC0_IS_EN BIT(6)
34 #define WC0_SSUSB0_CDEN BIT(6)
35 #define WC0_IS_SPM_EN BIT(1)
38 #define PERI_SSUSB_SPM_CTRL 0x0
39 #define SSC_IP_SLEEP_EN BIT(4)
40 #define SSC_SPM_INT_EN BIT(1)
45 SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */
46 SSUSB_UWK_V1_2, /* specific revision 1.02 */
50 * ip-sleep wakeup mode:
51 * all clocks can be turn off, but power domain should be kept on
53 static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable)
57 switch (ssusb->uwk_vers) {
59 reg = ssusb->uwk_reg_base + PERI_WK_CTRL1;
60 msk = WC1_IS_EN | WC1_IS_C(0xf) | WC1_IS_P;
61 val = enable ? (WC1_IS_EN | WC1_IS_C(0x8)) : 0;
64 reg = ssusb->uwk_reg_base + PERI_WK_CTRL0;
65 msk = WC0_IS_EN | WC0_IS_C(0xf) | WC0_IS_P;
66 val = enable ? (WC0_IS_EN | WC0_IS_C(0x8)) : 0;
69 reg = ssusb->uwk_reg_base + PERI_WK_CTRL0;
70 msk = WC0_SSUSB0_CDEN | WC0_IS_SPM_EN;
71 val = enable ? msk : 0;
74 reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL;
75 msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
76 val = enable ? msk : 0;
81 regmap_update_bits(ssusb->uwk, reg, msk, val);
84 int ssusb_wakeup_of_property_parse(struct ssusb_mtk *ssusb,
85 struct device_node *dn)
87 struct of_phandle_args args;
90 /* wakeup function is optional */
91 ssusb->uwk_en = of_property_read_bool(dn, "wakeup-source");
95 ret = of_parse_phandle_with_fixed_args(dn,
96 "mediatek,syscon-wakeup", 2, 0, &args);
100 ssusb->uwk_reg_base = args.args[0];
101 ssusb->uwk_vers = args.args[1];
102 ssusb->uwk = syscon_node_to_regmap(args.np);
103 of_node_put(args.np);
104 dev_info(ssusb->dev, "uwk - reg:0x%x, version:%d\n",
105 ssusb->uwk_reg_base, ssusb->uwk_vers);
107 return PTR_ERR_OR_ZERO(ssusb->uwk);
110 void ssusb_wakeup_set(struct ssusb_mtk *ssusb, bool enable)
113 ssusb_wakeup_ip_sleep_set(ssusb, enable);
116 static void host_ports_num_get(struct ssusb_mtk *ssusb)
120 xhci_cap = mtu3_readl(ssusb->ippc_base, U3D_SSUSB_IP_XHCI_CAP);
121 ssusb->u2_ports = SSUSB_IP_XHCI_U2_PORT_NUM(xhci_cap);
122 ssusb->u3_ports = SSUSB_IP_XHCI_U3_PORT_NUM(xhci_cap);
124 dev_dbg(ssusb->dev, "host - u2_ports:%d, u3_ports:%d\n",
125 ssusb->u2_ports, ssusb->u3_ports);
128 /* only configure ports will be used later */
129 int ssusb_host_enable(struct ssusb_mtk *ssusb)
131 void __iomem *ibase = ssusb->ippc_base;
132 int num_u3p = ssusb->u3_ports;
133 int num_u2p = ssusb->u2_ports;
134 int u3_ports_disabled;
139 /* power on host ip */
140 mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
142 /* power on and enable u3 ports except skipped ones */
143 u3_ports_disabled = 0;
144 for (i = 0; i < num_u3p; i++) {
145 if ((0x1 << i) & ssusb->u3p_dis_msk) {
150 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
151 value &= ~(SSUSB_U3_PORT_PDN | SSUSB_U3_PORT_DIS);
152 value |= SSUSB_U3_PORT_HOST_SEL;
153 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
156 /* power on and enable all u2 ports */
157 for (i = 0; i < num_u2p; i++) {
158 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
159 value &= ~(SSUSB_U2_PORT_PDN | SSUSB_U2_PORT_DIS);
160 value |= SSUSB_U2_PORT_HOST_SEL;
161 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
164 check_clk = SSUSB_XHCI_RST_B_STS;
165 if (num_u3p > u3_ports_disabled)
166 check_clk = SSUSB_U3_MAC_RST_B_STS;
168 return ssusb_check_clocks(ssusb, check_clk);
171 int ssusb_host_disable(struct ssusb_mtk *ssusb, bool suspend)
173 void __iomem *ibase = ssusb->ippc_base;
174 int num_u3p = ssusb->u3_ports;
175 int num_u2p = ssusb->u2_ports;
180 /* power down and disable u3 ports except skipped ones */
181 for (i = 0; i < num_u3p; i++) {
182 if ((0x1 << i) & ssusb->u3p_dis_msk)
185 value = mtu3_readl(ibase, SSUSB_U3_CTRL(i));
186 value |= SSUSB_U3_PORT_PDN;
187 value |= suspend ? 0 : SSUSB_U3_PORT_DIS;
188 mtu3_writel(ibase, SSUSB_U3_CTRL(i), value);
191 /* power down and disable all u2 ports */
192 for (i = 0; i < num_u2p; i++) {
193 value = mtu3_readl(ibase, SSUSB_U2_CTRL(i));
194 value |= SSUSB_U2_PORT_PDN;
195 value |= suspend ? 0 : SSUSB_U2_PORT_DIS;
196 mtu3_writel(ibase, SSUSB_U2_CTRL(i), value);
199 /* power down host ip */
200 mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
205 /* wait for host ip to sleep */
206 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
207 (value & SSUSB_IP_SLEEP_STS), 100, 100000);
209 dev_err(ssusb->dev, "ip sleep failed!!!\n");
214 static void ssusb_host_setup(struct ssusb_mtk *ssusb)
216 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
218 host_ports_num_get(ssusb);
221 * power on host and power on/enable all ports
222 * if support OTG, gadget driver will switch port0 to device mode
224 ssusb_host_enable(ssusb);
226 if (otg_sx->manual_drd_enabled)
227 ssusb_set_force_mode(ssusb, MTU3_DR_FORCE_HOST);
229 /* if port0 supports dual-role, works as host mode by default */
230 ssusb_set_vbus(&ssusb->otg_switch, 1);
233 static void ssusb_host_cleanup(struct ssusb_mtk *ssusb)
236 ssusb_set_vbus(&ssusb->otg_switch, 0);
238 ssusb_host_disable(ssusb, false);
242 * If host supports multiple ports, the VBUSes(5V) of ports except port0
243 * which supports OTG are better to be enabled by default in DTS.
244 * Because the host driver will keep link with devices attached when system
245 * enters suspend mode, so no need to control VBUSes after initialization.
247 int ssusb_host_init(struct ssusb_mtk *ssusb, struct device_node *parent_dn)
249 struct device *parent_dev = ssusb->dev;
252 ssusb_host_setup(ssusb);
254 ret = of_platform_populate(parent_dn, NULL, NULL, parent_dev);
256 dev_dbg(parent_dev, "failed to create child devices at %pOF\n",
261 dev_info(parent_dev, "xHCI platform device register success...\n");
266 void ssusb_host_exit(struct ssusb_mtk *ssusb)
268 of_platform_depopulate(ssusb->dev);
269 ssusb_host_cleanup(ssusb);