1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the NXP ISP1760 chip
5 * Copyright 2014 Laurent Pinchart
6 * Copyright 2007 Sebastian Siewior
9 * Sebastian Siewior <bigeasy@linutronix.de>
10 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20 #include <linux/usb.h>
22 #include "isp1760-core.h"
23 #include "isp1760-hcd.h"
24 #include "isp1760-regs.h"
25 #include "isp1760-udc.h"
27 static void isp1760_init_core(struct isp1760_device *isp)
29 struct isp1760_hcd *hcd = &isp->hcd;
30 struct isp1760_udc *udc = &isp->udc;
32 /* Low-level chip reset */
34 gpiod_set_value_cansleep(isp->rst_gpio, 1);
36 gpiod_set_value_cansleep(isp->rst_gpio, 0);
40 * Reset the host controller, including the CPU interface
43 isp1760_field_set(hcd->fields, SW_RESET_RESET_ALL);
46 /* Setup HW Mode Control: This assumes a level active-low interrupt */
47 if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
48 isp1760_field_clear(hcd->fields, HW_DATA_BUS_WIDTH);
49 if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
50 isp1760_field_set(hcd->fields, HW_ANA_DIGI_OC);
51 if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
52 isp1760_field_set(hcd->fields, HW_DACK_POL_HIGH);
53 if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
54 isp1760_field_set(hcd->fields, HW_DREQ_POL_HIGH);
55 if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
56 isp1760_field_set(hcd->fields, HW_INTR_HIGH_ACT);
57 if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
58 isp1760_field_set(hcd->fields, HW_INTR_EDGE_TRIG);
61 * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
62 * IRQ line for both the host and device controllers. Hardcode IRQ
63 * sharing for now and disable the DC interrupts globally to avoid
64 * spurious interrupts during HCD registration.
66 if (isp->devflags & ISP1760_FLAG_ISP1761) {
67 isp1760_reg_write(udc->regs, ISP176x_DC_MODE, 0);
68 isp1760_field_set(hcd->fields, HW_COMN_IRQ);
72 * PORT 1 Control register of the ISP1760 is the OTG control register
75 * TODO: Really support OTG. For now we configure port 1 in device mode
77 if ((isp->devflags & ISP1760_FLAG_ISP1761) &&
78 (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) {
79 isp1760_field_set(hcd->fields, HW_DM_PULLDOWN);
80 isp1760_field_set(hcd->fields, HW_DP_PULLDOWN);
81 isp1760_field_set(hcd->fields, HW_OTG_DISABLE);
83 isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC);
84 isp1760_field_set(hcd->fields, HW_VBUS_DRV);
85 isp1760_field_set(hcd->fields, HW_SEL_CP_EXT);
88 dev_info(isp->dev, "bus width: %u, oc: %s\n",
89 isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
90 isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
93 void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
95 struct isp1760_udc *udc = &isp->udc;
98 isp1760_field_set(udc->fields, HW_DP_PULLUP);
100 isp1760_field_set(udc->fields, HW_DP_PULLUP_CLEAR);
105 * - 32 blocks @ 256 bytes
106 * - 20 blocks @ 1024 bytes
107 * - 4 blocks @ 8192 bytes
109 static const struct isp1760_memory_layout isp176x_memory_conf = {
111 .blocks_size[0] = 256,
113 .blocks_size[1] = 1024,
115 .blocks_size[2] = 8192,
118 .payload_blocks = 32 + 20 + 4,
119 .payload_area_size = 0xf000,
122 static const struct regmap_range isp176x_hc_volatile_ranges[] = {
123 regmap_reg_range(ISP176x_HC_USBCMD, ISP176x_HC_ATL_PTD_LASTPTD),
124 regmap_reg_range(ISP176x_HC_BUFFER_STATUS, ISP176x_HC_MEMORY),
125 regmap_reg_range(ISP176x_HC_INTERRUPT, ISP176x_HC_ATL_IRQ_MASK_AND),
128 static const struct regmap_access_table isp176x_hc_volatile_table = {
129 .yes_ranges = isp176x_hc_volatile_ranges,
130 .n_yes_ranges = ARRAY_SIZE(isp176x_hc_volatile_ranges),
133 static struct regmap_config isp1760_hc_regmap_conf = {
134 .name = "isp1760-hc",
139 .max_register = ISP176x_HC_MEMORY,
140 .volatile_table = &isp176x_hc_volatile_table,
143 static const struct reg_field isp1760_hc_reg_fields[] = {
144 [HCS_PPC] = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
145 [HCS_N_PORTS] = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
146 [HCC_ISOC_CACHE] = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
147 [HCC_ISOC_THRES] = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
148 [CMD_LRESET] = REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
149 [CMD_RESET] = REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
150 [CMD_RUN] = REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
151 [STS_PCD] = REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
152 [HC_FRINDEX] = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
153 [FLAG_CF] = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
154 [PORT_OWNER] = REG_FIELD(ISP176x_HC_PORTSC1, 13, 13),
155 [PORT_POWER] = REG_FIELD(ISP176x_HC_PORTSC1, 12, 12),
156 [PORT_LSTATUS] = REG_FIELD(ISP176x_HC_PORTSC1, 10, 11),
157 [PORT_RESET] = REG_FIELD(ISP176x_HC_PORTSC1, 8, 8),
158 [PORT_SUSPEND] = REG_FIELD(ISP176x_HC_PORTSC1, 7, 7),
159 [PORT_RESUME] = REG_FIELD(ISP176x_HC_PORTSC1, 6, 6),
160 [PORT_PE] = REG_FIELD(ISP176x_HC_PORTSC1, 2, 2),
161 [PORT_CSC] = REG_FIELD(ISP176x_HC_PORTSC1, 1, 1),
162 [PORT_CONNECT] = REG_FIELD(ISP176x_HC_PORTSC1, 0, 0),
163 [ALL_ATX_RESET] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31),
164 [HW_ANA_DIGI_OC] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15),
165 [HW_COMN_IRQ] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10),
166 [HW_DATA_BUS_WIDTH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8),
167 [HW_DACK_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6),
168 [HW_DREQ_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5),
169 [HW_INTR_HIGH_ACT] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2),
170 [HW_INTR_EDGE_TRIG] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1),
171 [HW_GLOBAL_INTR_EN] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0),
172 [SW_RESET_RESET_ALL] = REG_FIELD(ISP176x_HC_RESET, 0, 0),
173 [INT_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1),
174 [ATL_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0),
175 [MEM_BANK_SEL] = REG_FIELD(ISP176x_HC_MEMORY, 16, 17),
176 [MEM_START_ADDR] = REG_FIELD(ISP176x_HC_MEMORY, 0, 15),
177 [HC_INT_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 8),
180 static const struct regmap_range isp176x_dc_volatile_ranges[] = {
181 regmap_reg_range(ISP176x_DC_EPMAXPKTSZ, ISP176x_DC_EPTYPE),
182 regmap_reg_range(ISP176x_DC_BUFLEN, ISP176x_DC_EPINDEX),
183 regmap_reg_range(ISP1761_DC_OTG_CTRL_SET, ISP1761_DC_OTG_CTRL_CLEAR),
186 static const struct regmap_access_table isp176x_dc_volatile_table = {
187 .yes_ranges = isp176x_dc_volatile_ranges,
188 .n_yes_ranges = ARRAY_SIZE(isp176x_dc_volatile_ranges),
191 static struct regmap_config isp1761_dc_regmap_conf = {
192 .name = "isp1761-dc",
197 .max_register = ISP1761_DC_OTG_CTRL_CLEAR,
198 .volatile_table = &isp176x_dc_volatile_table,
201 static const struct reg_field isp1761_dc_reg_fields[] = {
202 [DC_DEVEN] = REG_FIELD(ISP176x_DC_ADDRESS, 7, 7),
203 [DC_DEVADDR] = REG_FIELD(ISP176x_DC_ADDRESS, 0, 6),
204 [DC_VBUSSTAT] = REG_FIELD(ISP176x_DC_MODE, 8, 8),
205 [DC_SFRESET] = REG_FIELD(ISP176x_DC_MODE, 4, 4),
206 [DC_GLINTENA] = REG_FIELD(ISP176x_DC_MODE, 3, 3),
207 [DC_CDBGMOD_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 6, 6),
208 [DC_DDBGMODIN_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 4, 4),
209 [DC_DDBGMODOUT_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 2, 2),
210 [DC_INTPOL] = REG_FIELD(ISP176x_DC_INTCONF, 0, 0),
211 [DC_IEPRXTX_7] = REG_FIELD(ISP176x_DC_INTENABLE, 25, 25),
212 [DC_IEPRXTX_6] = REG_FIELD(ISP176x_DC_INTENABLE, 23, 23),
213 [DC_IEPRXTX_5] = REG_FIELD(ISP176x_DC_INTENABLE, 21, 21),
214 [DC_IEPRXTX_4] = REG_FIELD(ISP176x_DC_INTENABLE, 19, 19),
215 [DC_IEPRXTX_3] = REG_FIELD(ISP176x_DC_INTENABLE, 17, 17),
216 [DC_IEPRXTX_2] = REG_FIELD(ISP176x_DC_INTENABLE, 15, 15),
217 [DC_IEPRXTX_1] = REG_FIELD(ISP176x_DC_INTENABLE, 13, 13),
218 [DC_IEPRXTX_0] = REG_FIELD(ISP176x_DC_INTENABLE, 11, 11),
219 [DC_IEP0SETUP] = REG_FIELD(ISP176x_DC_INTENABLE, 8, 8),
220 [DC_IEVBUS] = REG_FIELD(ISP176x_DC_INTENABLE, 7, 7),
221 [DC_IEHS_STA] = REG_FIELD(ISP176x_DC_INTENABLE, 5, 5),
222 [DC_IERESM] = REG_FIELD(ISP176x_DC_INTENABLE, 4, 4),
223 [DC_IESUSP] = REG_FIELD(ISP176x_DC_INTENABLE, 3, 3),
224 [DC_IEBRST] = REG_FIELD(ISP176x_DC_INTENABLE, 0, 0),
225 [DC_EP0SETUP] = REG_FIELD(ISP176x_DC_EPINDEX, 5, 5),
226 [DC_ENDPIDX] = REG_FIELD(ISP176x_DC_EPINDEX, 1, 4),
227 [DC_EPDIR] = REG_FIELD(ISP176x_DC_EPINDEX, 0, 0),
228 [DC_CLBUF] = REG_FIELD(ISP176x_DC_CTRLFUNC, 4, 4),
229 [DC_VENDP] = REG_FIELD(ISP176x_DC_CTRLFUNC, 3, 3),
230 [DC_DSEN] = REG_FIELD(ISP176x_DC_CTRLFUNC, 2, 2),
231 [DC_STATUS] = REG_FIELD(ISP176x_DC_CTRLFUNC, 1, 1),
232 [DC_STALL] = REG_FIELD(ISP176x_DC_CTRLFUNC, 0, 0),
233 [DC_BUFLEN] = REG_FIELD(ISP176x_DC_BUFLEN, 0, 15),
234 [DC_FFOSZ] = REG_FIELD(ISP176x_DC_EPMAXPKTSZ, 0, 10),
235 [DC_EPENABLE] = REG_FIELD(ISP176x_DC_EPTYPE, 3, 3),
236 [DC_ENDPTYP] = REG_FIELD(ISP176x_DC_EPTYPE, 0, 1),
237 [DC_UFRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 11, 13),
238 [DC_FRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 0, 10),
239 [HW_OTG_DISABLE] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 10, 10),
240 [HW_SW_SEL_HC_DC] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 7, 7),
241 [HW_VBUS_DRV] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 4, 4),
242 [HW_SEL_CP_EXT] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 3, 3),
243 [HW_DM_PULLDOWN] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 2, 2),
244 [HW_DP_PULLDOWN] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 1, 1),
245 [HW_DP_PULLUP] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 0, 0),
246 [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 10, 10),
247 [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 7, 7),
248 [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 4, 4),
249 [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 3, 3),
250 [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 2, 2),
251 [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 1, 1),
252 [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 0, 0),
255 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
256 struct device *dev, unsigned int devflags)
258 struct isp1760_device *isp;
259 struct isp1760_hcd *hcd;
260 struct isp1760_udc *udc;
261 bool udc_disabled = !(devflags & ISP1760_FLAG_ISP1761);
262 struct regmap_field *f;
268 * If neither the HCD not the UDC is enabled return an error, as no
269 * device would be registered.
271 if ((!IS_ENABLED(CONFIG_USB_ISP1760_HCD) || usb_disabled()) &&
272 (!IS_ENABLED(CONFIG_USB_ISP1761_UDC) || udc_disabled))
275 isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
280 isp->devflags = devflags;
284 if (devflags & ISP1760_FLAG_BUS_WIDTH_16) {
285 isp1760_hc_regmap_conf.val_bits = 16;
286 isp1761_dc_regmap_conf.val_bits = 16;
289 isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
290 if (IS_ERR(isp->rst_gpio))
291 return PTR_ERR(isp->rst_gpio);
293 hcd->base = devm_ioremap_resource(dev, mem);
294 if (IS_ERR(hcd->base))
295 return PTR_ERR(hcd->base);
297 hcd->regs = devm_regmap_init_mmio(dev, base, &isp1760_hc_regmap_conf);
298 if (IS_ERR(hcd->regs))
299 return PTR_ERR(hcd->regs);
301 for (i = 0; i < HC_FIELD_MAX; i++) {
302 f = devm_regmap_field_alloc(dev, hcd->regs,
303 isp1760_hc_reg_fields[i]);
310 udc->regs = devm_regmap_init_mmio(dev, base, &isp1761_dc_regmap_conf);
311 if (IS_ERR(udc->regs))
312 return PTR_ERR(udc->regs);
314 for (i = 0; i < DC_FIELD_MAX; i++) {
315 f = devm_regmap_field_alloc(dev, udc->regs,
316 isp1761_dc_reg_fields[i]);
323 hcd->memory_layout = &isp176x_memory_conf;
325 isp1760_init_core(isp);
327 if (IS_ENABLED(CONFIG_USB_ISP1760_HCD) && !usb_disabled()) {
328 ret = isp1760_hcd_register(hcd, mem, irq,
329 irqflags | IRQF_SHARED, dev);
334 if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && !udc_disabled) {
335 ret = isp1760_udc_register(isp, irq, irqflags);
337 isp1760_hcd_unregister(hcd);
342 dev_set_drvdata(dev, isp);
347 void isp1760_unregister(struct device *dev)
349 struct isp1760_device *isp = dev_get_drvdata(dev);
351 isp1760_udc_unregister(isp);
352 isp1760_hcd_unregister(&isp->hcd);
355 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
356 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
357 MODULE_LICENSE("GPL v2");