2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
36 #define DRIVER_AUTHOR "Sarah Sharp"
37 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
39 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
41 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
42 static int link_quirk;
43 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
44 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
46 static unsigned int quirks;
47 module_param(quirks, uint, S_IRUGO);
48 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
50 /* TODO: copied from ehci-hcd.c - can this be refactored? */
52 * xhci_handshake - spin reading hc until handshake completes or fails
53 * @ptr: address of hc register to be read
54 * @mask: bits to look at in result of read
55 * @done: value of those bits when handshake succeeds
56 * @usec: timeout in microseconds
58 * Returns negative errno, or zero on success
60 * Success happens when the "mask" bits have the specified value (hardware
61 * handshake done). There are two failure modes: "usec" have passed (major
62 * hardware flakeout), or the register reads as all-ones (hardware removed).
64 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
70 if (result == ~(u32)0) /* card removed */
82 * Disable interrupts and begin the xHCI halting process.
84 void xhci_quiesce(struct xhci_hcd *xhci)
91 halted = readl(&xhci->op_regs->status) & STS_HALT;
95 cmd = readl(&xhci->op_regs->command);
97 writel(cmd, &xhci->op_regs->command);
101 * Force HC into halt state.
103 * Disable any IRQs and clear the run/stop bit.
104 * HC will complete any current and actively pipelined transactions, and
105 * should halt within 16 ms of the run/stop bit being cleared.
106 * Read HC Halted bit in the status register to see when the HC is finished.
108 int xhci_halt(struct xhci_hcd *xhci)
111 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
114 ret = xhci_handshake(&xhci->op_regs->status,
115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
117 xhci_warn(xhci, "Host halt failed, %d\n", ret);
120 xhci->xhc_state |= XHCI_STATE_HALTED;
121 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
126 * Set the run bit and wait for the host to be running.
128 int xhci_start(struct xhci_hcd *xhci)
133 temp = readl(&xhci->op_regs->command);
135 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
137 writel(temp, &xhci->op_regs->command);
140 * Wait for the HCHalted Status bit to be 0 to indicate the host is
143 ret = xhci_handshake(&xhci->op_regs->status,
144 STS_HALT, 0, XHCI_MAX_HALT_USEC);
145 if (ret == -ETIMEDOUT)
146 xhci_err(xhci, "Host took too long to start, "
147 "waited %u microseconds.\n",
150 /* clear state flags. Including dying, halted or removing */
159 * This resets pipelines, timers, counters, state machines, etc.
160 * Transactions will be terminated immediately, and operational registers
161 * will be set to their defaults.
163 int xhci_reset(struct xhci_hcd *xhci)
169 state = readl(&xhci->op_regs->status);
171 if (state == ~(u32)0) {
172 xhci_warn(xhci, "Host not accessible, reset failed.\n");
176 if ((state & STS_HALT) == 0) {
177 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
182 command = readl(&xhci->op_regs->command);
183 command |= CMD_RESET;
184 writel(command, &xhci->op_regs->command);
186 /* Existing Intel xHCI controllers require a delay of 1 mS,
187 * after setting the CMD_RESET bit, and before accessing any
188 * HC registers. This allows the HC to complete the
189 * reset operation and be ready for HC register access.
190 * Without this delay, the subsequent HC register access,
191 * may result in a system hang very rarely.
193 if (xhci->quirks & XHCI_INTEL_HOST)
196 ret = xhci_handshake(&xhci->op_regs->command,
197 CMD_RESET, 0, 10 * 1000 * 1000);
201 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
202 "Wait for controller to be ready for doorbell rings");
204 * xHCI cannot write to any doorbells or operational registers other
205 * than status until the "Controller Not Ready" flag is cleared.
207 ret = xhci_handshake(&xhci->op_regs->status,
208 STS_CNR, 0, 10 * 1000 * 1000);
210 for (i = 0; i < 2; i++) {
211 xhci->bus_state[i].port_c_suspend = 0;
212 xhci->bus_state[i].suspended_ports = 0;
213 xhci->bus_state[i].resuming_ports = 0;
220 #ifdef CONFIG_USB_PCI
224 static int xhci_setup_msi(struct xhci_hcd *xhci)
228 * TODO:Check with MSI Soc for sysdev
230 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
234 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
235 "failed to allocate MSI entry");
239 ret = request_irq(pdev->irq, xhci_msi_irq,
240 0, "xhci_hcd", xhci_to_hcd(xhci));
242 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
243 "disable MSI interrupt");
244 pci_free_irq_vectors(pdev);
253 static int xhci_setup_msix(struct xhci_hcd *xhci)
256 struct usb_hcd *hcd = xhci_to_hcd(xhci);
257 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
260 * calculate number of msi-x vectors supported.
261 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
262 * with max number of interrupters based on the xhci HCSPARAMS1.
263 * - num_online_cpus: maximum msi-x vectors per CPUs core.
264 * Add additional 1 vector to ensure always available interrupt.
266 xhci->msix_count = min(num_online_cpus() + 1,
267 HCS_MAX_INTRS(xhci->hcs_params1));
269 ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count,
272 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
273 "Failed to enable MSI-X");
277 for (i = 0; i < xhci->msix_count; i++) {
278 ret = request_irq(pci_irq_vector(pdev, i), xhci_msi_irq, 0,
279 "xhci_hcd", xhci_to_hcd(xhci));
284 hcd->msix_enabled = 1;
288 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
290 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
291 pci_free_irq_vectors(pdev);
295 /* Free any IRQs and disable MSI-X */
296 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
298 struct usb_hcd *hcd = xhci_to_hcd(xhci);
299 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
301 if (xhci->quirks & XHCI_PLAT)
304 /* return if using legacy interrupt */
308 if (hcd->msix_enabled) {
311 for (i = 0; i < xhci->msix_count; i++)
312 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
314 free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci));
317 pci_free_irq_vectors(pdev);
318 hcd->msix_enabled = 0;
321 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
323 struct usb_hcd *hcd = xhci_to_hcd(xhci);
325 if (hcd->msix_enabled) {
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
329 for (i = 0; i < xhci->msix_count; i++)
330 synchronize_irq(pci_irq_vector(pdev, i));
334 static int xhci_try_enable_msi(struct usb_hcd *hcd)
336 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
337 struct pci_dev *pdev;
340 /* The xhci platform device has set up IRQs through usb_add_hcd. */
341 if (xhci->quirks & XHCI_PLAT)
344 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
346 * Some Fresco Logic host controllers advertise MSI, but fail to
347 * generate interrupts. Don't even try to enable MSI.
349 if (xhci->quirks & XHCI_BROKEN_MSI)
352 /* unregister the legacy interrupt */
354 free_irq(hcd->irq, hcd);
357 ret = xhci_setup_msix(xhci);
359 /* fall back to msi*/
360 ret = xhci_setup_msi(xhci);
363 hcd->msi_enabled = 1;
368 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
373 if (!strlen(hcd->irq_descr))
374 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
375 hcd->driver->description, hcd->self.busnum);
377 /* fall back to legacy interrupt*/
378 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
379 hcd->irq_descr, hcd);
381 xhci_err(xhci, "request interrupt %d failed\n",
385 hcd->irq = pdev->irq;
391 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
396 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
400 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
406 static void compliance_mode_recovery(unsigned long arg)
408 struct xhci_hcd *xhci;
413 xhci = (struct xhci_hcd *)arg;
415 for (i = 0; i < xhci->num_usb3_ports; i++) {
416 temp = readl(xhci->usb3_ports[i]);
417 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
419 * Compliance Mode Detected. Letting USB Core
420 * handle the Warm Reset
422 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
423 "Compliance mode detected->port %d",
425 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
426 "Attempting compliance mode recovery");
427 hcd = xhci->shared_hcd;
429 if (hcd->state == HC_STATE_SUSPENDED)
430 usb_hcd_resume_root_hub(hcd);
432 usb_hcd_poll_rh_status(hcd);
436 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
437 mod_timer(&xhci->comp_mode_recovery_timer,
438 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
442 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
443 * that causes ports behind that hardware to enter compliance mode sometimes.
444 * The quirk creates a timer that polls every 2 seconds the link state of
445 * each host controller's port and recovers it by issuing a Warm reset
446 * if Compliance mode is detected, otherwise the port will become "dead" (no
447 * device connections or disconnections will be detected anymore). Becasue no
448 * status event is generated when entering compliance mode (per xhci spec),
449 * this quirk is needed on systems that have the failing hardware installed.
451 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
453 xhci->port_status_u0 = 0;
454 setup_timer(&xhci->comp_mode_recovery_timer,
455 compliance_mode_recovery, (unsigned long)xhci);
456 xhci->comp_mode_recovery_timer.expires = jiffies +
457 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
459 add_timer(&xhci->comp_mode_recovery_timer);
460 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
461 "Compliance mode recovery timer initialized");
465 * This function identifies the systems that have installed the SN65LVPE502CP
466 * USB3.0 re-driver and that need the Compliance Mode Quirk.
468 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
470 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
472 const char *dmi_product_name, *dmi_sys_vendor;
474 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
475 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
476 if (!dmi_product_name || !dmi_sys_vendor)
479 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
482 if (strstr(dmi_product_name, "Z420") ||
483 strstr(dmi_product_name, "Z620") ||
484 strstr(dmi_product_name, "Z820") ||
485 strstr(dmi_product_name, "Z1 Workstation"))
491 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
493 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
498 * Initialize memory for HCD and xHC (one-time init).
500 * Program the PAGESIZE register, initialize the device context array, create
501 * device contexts (?), set up a command ring segment (or two?), create event
502 * ring (one for now).
504 static int xhci_init(struct usb_hcd *hcd)
506 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
509 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
510 spin_lock_init(&xhci->lock);
511 if (xhci->hci_version == 0x95 && link_quirk) {
512 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
513 "QUIRK: Not clearing Link TRB chain bits.");
514 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
516 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
517 "xHCI doesn't need link TRB QUIRK");
519 retval = xhci_mem_init(xhci, GFP_KERNEL);
520 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
522 /* Initializing Compliance Mode Recovery Data If Needed */
523 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
524 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
525 compliance_mode_recovery_timer_init(xhci);
531 /*-------------------------------------------------------------------------*/
534 static int xhci_run_finished(struct xhci_hcd *xhci)
536 if (xhci_start(xhci)) {
540 xhci->shared_hcd->state = HC_STATE_RUNNING;
541 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
543 if (xhci->quirks & XHCI_NEC_HOST)
544 xhci_ring_cmd_db(xhci);
546 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
547 "Finished xhci_run for USB3 roothub");
552 * Start the HC after it was halted.
554 * This function is called by the USB core when the HC driver is added.
555 * Its opposite is xhci_stop().
557 * xhci_init() must be called once before this function can be called.
558 * Reset the HC, enable device slot contexts, program DCBAAP, and
559 * set command ring pointer and event ring pointer.
561 * Setup MSI-X vectors and enable interrupts.
563 int xhci_run(struct usb_hcd *hcd)
568 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
570 /* Start the xHCI host controller running only after the USB 2.0 roothub
574 hcd->uses_new_polling = 1;
575 if (!usb_hcd_is_primary_hcd(hcd))
576 return xhci_run_finished(xhci);
578 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
580 ret = xhci_try_enable_msi(hcd);
584 xhci_dbg_cmd_ptrs(xhci);
586 xhci_dbg(xhci, "ERST memory map follows:\n");
587 xhci_dbg_erst(xhci, &xhci->erst);
588 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
589 temp_64 &= ~ERST_PTR_MASK;
590 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
591 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
593 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
594 "// Set the interrupt modulation register");
595 temp = readl(&xhci->ir_set->irq_control);
596 temp &= ~ER_IRQ_INTERVAL_MASK;
598 * the increment interval is 8 times as much as that defined
599 * in xHCI spec on MTK's controller
601 temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
602 writel(temp, &xhci->ir_set->irq_control);
604 /* Set the HCD state before we enable the irqs */
605 temp = readl(&xhci->op_regs->command);
607 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
608 "// Enable interrupts, cmd = 0x%x.", temp);
609 writel(temp, &xhci->op_regs->command);
611 temp = readl(&xhci->ir_set->irq_pending);
612 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
613 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
614 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
615 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
616 xhci_print_ir_set(xhci, 0);
618 if (xhci->quirks & XHCI_NEC_HOST) {
619 struct xhci_command *command;
621 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
625 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
626 TRB_TYPE(TRB_NEC_GET_FW));
628 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
629 "Finished xhci_run for USB2 roothub");
632 EXPORT_SYMBOL_GPL(xhci_run);
637 * This function is called by the USB core when the HC driver is removed.
638 * Its opposite is xhci_run().
640 * Disable device contexts, disable IRQs, and quiesce the HC.
641 * Reset the HC, finish any completed transactions, and cleanup memory.
643 static void xhci_stop(struct usb_hcd *hcd)
646 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
648 mutex_lock(&xhci->mutex);
650 /* Only halt host and free memory after both hcds are removed */
651 if (!usb_hcd_is_primary_hcd(hcd)) {
652 /* usb core will free this hcd shortly, unset pointer */
653 xhci->shared_hcd = NULL;
654 mutex_unlock(&xhci->mutex);
658 spin_lock_irq(&xhci->lock);
659 xhci->xhc_state |= XHCI_STATE_HALTED;
660 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
663 spin_unlock_irq(&xhci->lock);
665 xhci_cleanup_msix(xhci);
667 /* Deleting Compliance Mode Recovery Timer */
668 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
669 (!(xhci_all_ports_seen_u0(xhci)))) {
670 del_timer_sync(&xhci->comp_mode_recovery_timer);
671 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
672 "%s: compliance mode recovery timer deleted",
676 if (xhci->quirks & XHCI_AMD_PLL_FIX)
679 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
680 "// Disabling event ring interrupts");
681 temp = readl(&xhci->op_regs->status);
682 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
683 temp = readl(&xhci->ir_set->irq_pending);
684 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
685 xhci_print_ir_set(xhci, 0);
687 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
688 xhci_mem_cleanup(xhci);
689 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
690 "xhci_stop completed - status = %x",
691 readl(&xhci->op_regs->status));
692 mutex_unlock(&xhci->mutex);
696 * Shutdown HC (not bus-specific)
698 * This is called when the machine is rebooting or halting. We assume that the
699 * machine will be powered off, and the HC's internal state will be reset.
700 * Don't bother to free memory.
702 * This will only ever be called with the main usb_hcd (the USB3 roothub).
704 static void xhci_shutdown(struct usb_hcd *hcd)
706 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
708 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
709 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev));
711 spin_lock_irq(&xhci->lock);
713 /* Workaround for spurious wakeups at shutdown with HSW */
714 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
716 spin_unlock_irq(&xhci->lock);
718 xhci_cleanup_msix(xhci);
720 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
721 "xhci_shutdown completed - status = %x",
722 readl(&xhci->op_regs->status));
724 /* Yet another workaround for spurious wakeups at shutdown with HSW */
725 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
726 pci_set_power_state(to_pci_dev(hcd->self.sysdev), PCI_D3hot);
730 static void xhci_save_registers(struct xhci_hcd *xhci)
732 xhci->s3.command = readl(&xhci->op_regs->command);
733 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
734 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
735 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
736 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
737 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
738 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
739 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
740 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
743 static void xhci_restore_registers(struct xhci_hcd *xhci)
745 writel(xhci->s3.command, &xhci->op_regs->command);
746 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
747 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
748 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
749 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
750 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
751 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
752 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
753 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
756 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
760 /* step 2: initialize command ring buffer */
761 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
762 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
763 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
764 xhci->cmd_ring->dequeue) &
765 (u64) ~CMD_RING_RSVD_BITS) |
766 xhci->cmd_ring->cycle_state;
767 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
768 "// Setting command ring address to 0x%llx",
769 (long unsigned long) val_64);
770 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
774 * The whole command ring must be cleared to zero when we suspend the host.
776 * The host doesn't save the command ring pointer in the suspend well, so we
777 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
778 * aligned, because of the reserved bits in the command ring dequeue pointer
779 * register. Therefore, we can't just set the dequeue pointer back in the
780 * middle of the ring (TRBs are 16-byte aligned).
782 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
784 struct xhci_ring *ring;
785 struct xhci_segment *seg;
787 ring = xhci->cmd_ring;
791 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
792 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
793 cpu_to_le32(~TRB_CYCLE);
795 } while (seg != ring->deq_seg);
797 /* Reset the software enqueue and dequeue pointers */
798 ring->deq_seg = ring->first_seg;
799 ring->dequeue = ring->first_seg->trbs;
800 ring->enq_seg = ring->deq_seg;
801 ring->enqueue = ring->dequeue;
803 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
805 * Ring is now zeroed, so the HW should look for change of ownership
806 * when the cycle bit is set to 1.
808 ring->cycle_state = 1;
811 * Reset the hardware dequeue pointer.
812 * Yes, this will need to be re-written after resume, but we're paranoid
813 * and want to make sure the hardware doesn't access bogus memory
814 * because, say, the BIOS or an SMI started the host without changing
815 * the command ring pointers.
817 xhci_set_cmd_ring_deq(xhci);
820 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
823 __le32 __iomem **port_array;
827 spin_lock_irqsave(&xhci->lock, flags);
829 /* disable usb3 ports Wake bits */
830 port_index = xhci->num_usb3_ports;
831 port_array = xhci->usb3_ports;
832 while (port_index--) {
833 t1 = readl(port_array[port_index]);
834 t1 = xhci_port_state_to_neutral(t1);
835 t2 = t1 & ~PORT_WAKE_BITS;
837 writel(t2, port_array[port_index]);
840 /* disable usb2 ports Wake bits */
841 port_index = xhci->num_usb2_ports;
842 port_array = xhci->usb2_ports;
843 while (port_index--) {
844 t1 = readl(port_array[port_index]);
845 t1 = xhci_port_state_to_neutral(t1);
846 t2 = t1 & ~PORT_WAKE_BITS;
848 writel(t2, port_array[port_index]);
851 spin_unlock_irqrestore(&xhci->lock, flags);
855 * Stop HC (not bus-specific)
857 * This is called when the machine transition into S3/S4 mode.
860 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
863 unsigned int delay = XHCI_MAX_HALT_USEC;
864 struct usb_hcd *hcd = xhci_to_hcd(xhci);
870 if (hcd->state != HC_STATE_SUSPENDED ||
871 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
874 /* Clear root port wake on bits if wakeup not allowed. */
876 xhci_disable_port_wake_on_bits(xhci);
878 /* Don't poll the roothubs on bus suspend. */
879 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
880 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
881 del_timer_sync(&hcd->rh_timer);
882 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
883 del_timer_sync(&xhci->shared_hcd->rh_timer);
885 spin_lock_irq(&xhci->lock);
886 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
887 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
888 /* step 1: stop endpoint */
889 /* skipped assuming that port suspend has done */
891 /* step 2: clear Run/Stop bit */
892 command = readl(&xhci->op_regs->command);
894 writel(command, &xhci->op_regs->command);
896 /* Some chips from Fresco Logic need an extraordinary delay */
897 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
899 if (xhci_handshake(&xhci->op_regs->status,
900 STS_HALT, STS_HALT, delay)) {
901 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
902 spin_unlock_irq(&xhci->lock);
905 xhci_clear_command_ring(xhci);
907 /* step 3: save registers */
908 xhci_save_registers(xhci);
910 /* step 4: set CSS flag */
911 command = readl(&xhci->op_regs->command);
913 writel(command, &xhci->op_regs->command);
914 if (xhci_handshake(&xhci->op_regs->status,
915 STS_SAVE, 0, 10 * 1000)) {
916 xhci_warn(xhci, "WARN: xHC save state timeout\n");
917 spin_unlock_irq(&xhci->lock);
920 spin_unlock_irq(&xhci->lock);
923 * Deleting Compliance Mode Recovery Timer because the xHCI Host
924 * is about to be suspended.
926 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
927 (!(xhci_all_ports_seen_u0(xhci)))) {
928 del_timer_sync(&xhci->comp_mode_recovery_timer);
929 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
930 "%s: compliance mode recovery timer deleted",
934 /* step 5: remove core well power */
935 /* synchronize irq when using MSI-X */
936 xhci_msix_sync_irqs(xhci);
940 EXPORT_SYMBOL_GPL(xhci_suspend);
943 * start xHC (not bus-specific)
945 * This is called when the machine transition from S3/S4 mode.
948 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
950 u32 command, temp = 0, status;
951 struct usb_hcd *hcd = xhci_to_hcd(xhci);
952 struct usb_hcd *secondary_hcd;
954 bool comp_timer_running = false;
959 /* Wait a bit if either of the roothubs need to settle from the
960 * transition into bus suspend.
962 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
964 xhci->bus_state[1].next_statechange))
967 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
968 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
970 spin_lock_irq(&xhci->lock);
971 if (xhci->quirks & XHCI_RESET_ON_RESUME)
975 /* step 1: restore register */
976 xhci_restore_registers(xhci);
977 /* step 2: initialize command ring buffer */
978 xhci_set_cmd_ring_deq(xhci);
979 /* step 3: restore state and start state*/
980 /* step 3: set CRS flag */
981 command = readl(&xhci->op_regs->command);
983 writel(command, &xhci->op_regs->command);
984 if (xhci_handshake(&xhci->op_regs->status,
985 STS_RESTORE, 0, 10 * 1000)) {
986 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
987 spin_unlock_irq(&xhci->lock);
990 temp = readl(&xhci->op_regs->status);
993 /* If restore operation fails, re-initialize the HC during resume */
994 if ((temp & STS_SRE) || hibernated) {
996 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
997 !(xhci_all_ports_seen_u0(xhci))) {
998 del_timer_sync(&xhci->comp_mode_recovery_timer);
999 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1000 "Compliance Mode Recovery Timer deleted!");
1003 /* Let the USB core know _both_ roothubs lost power. */
1004 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1005 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1007 xhci_dbg(xhci, "Stop HCD\n");
1010 spin_unlock_irq(&xhci->lock);
1011 xhci_cleanup_msix(xhci);
1013 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1014 temp = readl(&xhci->op_regs->status);
1015 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
1016 temp = readl(&xhci->ir_set->irq_pending);
1017 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1018 xhci_print_ir_set(xhci, 0);
1020 xhci_dbg(xhci, "cleaning up memory\n");
1021 xhci_mem_cleanup(xhci);
1022 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1023 readl(&xhci->op_regs->status));
1025 /* USB core calls the PCI reinit and start functions twice:
1026 * first with the primary HCD, and then with the secondary HCD.
1027 * If we don't do the same, the host will never be started.
1029 if (!usb_hcd_is_primary_hcd(hcd))
1030 secondary_hcd = hcd;
1032 secondary_hcd = xhci->shared_hcd;
1034 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1035 retval = xhci_init(hcd->primary_hcd);
1038 comp_timer_running = true;
1040 xhci_dbg(xhci, "Start the primary HCD\n");
1041 retval = xhci_run(hcd->primary_hcd);
1043 xhci_dbg(xhci, "Start the secondary HCD\n");
1044 retval = xhci_run(secondary_hcd);
1046 hcd->state = HC_STATE_SUSPENDED;
1047 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1051 /* step 4: set Run/Stop bit */
1052 command = readl(&xhci->op_regs->command);
1054 writel(command, &xhci->op_regs->command);
1055 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1058 /* step 5: walk topology and initialize portsc,
1059 * portpmsc and portli
1061 /* this is done in bus_resume */
1063 /* step 6: restart each of the previously
1064 * Running endpoints by ringing their doorbells
1067 spin_unlock_irq(&xhci->lock);
1071 /* Resume root hubs only when have pending events. */
1072 status = readl(&xhci->op_regs->status);
1073 if (status & STS_EINT) {
1074 usb_hcd_resume_root_hub(xhci->shared_hcd);
1075 usb_hcd_resume_root_hub(hcd);
1080 * If system is subject to the Quirk, Compliance Mode Timer needs to
1081 * be re-initialized Always after a system resume. Ports are subject
1082 * to suffer the Compliance Mode issue again. It doesn't matter if
1083 * ports have entered previously to U0 before system's suspension.
1085 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1086 compliance_mode_recovery_timer_init(xhci);
1088 /* Re-enable port polling. */
1089 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1090 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1091 usb_hcd_poll_rh_status(xhci->shared_hcd);
1092 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1093 usb_hcd_poll_rh_status(hcd);
1097 EXPORT_SYMBOL_GPL(xhci_resume);
1098 #endif /* CONFIG_PM */
1100 /*-------------------------------------------------------------------------*/
1103 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1104 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1105 * value to right shift 1 for the bitmask.
1107 * Index = (epnum * 2) + direction - 1,
1108 * where direction = 0 for OUT, 1 for IN.
1109 * For control endpoints, the IN index is used (OUT index is unused), so
1110 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1112 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1115 if (usb_endpoint_xfer_control(desc))
1116 index = (unsigned int) (usb_endpoint_num(desc)*2);
1118 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1119 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1123 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1124 * address from the XHCI endpoint index.
1126 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1128 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1129 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1130 return direction | number;
1133 /* Find the flag for this endpoint (for use in the control context). Use the
1134 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1137 static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1139 return 1 << (xhci_get_endpoint_index(desc) + 1);
1142 /* Find the flag for this endpoint (for use in the control context). Use the
1143 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1146 static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1148 return 1 << (ep_index + 1);
1151 /* Compute the last valid endpoint context index. Basically, this is the
1152 * endpoint index plus one. For slot contexts with more than valid endpoint,
1153 * we find the most significant bit set in the added contexts flags.
1154 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1155 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1157 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1159 return fls(added_ctxs) - 1;
1162 /* Returns 1 if the arguments are OK;
1163 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1165 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1166 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1168 struct xhci_hcd *xhci;
1169 struct xhci_virt_device *virt_dev;
1171 if (!hcd || (check_ep && !ep) || !udev) {
1172 pr_debug("xHCI %s called with invalid args\n", func);
1175 if (!udev->parent) {
1176 pr_debug("xHCI %s called for root hub\n", func);
1180 xhci = hcd_to_xhci(hcd);
1181 if (check_virt_dev) {
1182 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1183 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1188 virt_dev = xhci->devs[udev->slot_id];
1189 if (virt_dev->udev != udev) {
1190 xhci_dbg(xhci, "xHCI %s called with udev and "
1191 "virt_dev does not match\n", func);
1196 if (xhci->xhc_state & XHCI_STATE_HALTED)
1202 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1203 struct usb_device *udev, struct xhci_command *command,
1204 bool ctx_change, bool must_succeed);
1207 * Full speed devices may have a max packet size greater than 8 bytes, but the
1208 * USB core doesn't know that until it reads the first 8 bytes of the
1209 * descriptor. If the usb_device's max packet size changes after that point,
1210 * we need to issue an evaluate context command and wait on it.
1212 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1213 unsigned int ep_index, struct urb *urb)
1215 struct xhci_container_ctx *out_ctx;
1216 struct xhci_input_control_ctx *ctrl_ctx;
1217 struct xhci_ep_ctx *ep_ctx;
1218 struct xhci_command *command;
1219 int max_packet_size;
1220 int hw_max_packet_size;
1223 out_ctx = xhci->devs[slot_id]->out_ctx;
1224 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1225 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1226 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1227 if (hw_max_packet_size != max_packet_size) {
1228 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1229 "Max Packet Size for ep 0 changed.");
1230 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1231 "Max packet size in usb_device = %d",
1233 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1234 "Max packet size in xHCI HW = %d",
1235 hw_max_packet_size);
1236 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1237 "Issuing evaluate context command.");
1239 /* Set up the input context flags for the command */
1240 /* FIXME: This won't work if a non-default control endpoint
1241 * changes max packet sizes.
1244 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1248 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1249 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1251 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1254 goto command_cleanup;
1256 /* Set up the modified control endpoint 0 */
1257 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1258 xhci->devs[slot_id]->out_ctx, ep_index);
1260 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1261 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1262 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1264 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1265 ctrl_ctx->drop_flags = 0;
1267 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1270 /* Clean up the input context for later use by bandwidth
1273 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1275 kfree(command->completion);
1282 * non-error returns are a promise to giveback() the urb later
1283 * we drop ownership so next owner (or urb unlink) can get it
1285 static int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1287 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1288 unsigned long flags;
1290 unsigned int slot_id, ep_index, ep_state;
1291 struct urb_priv *urb_priv;
1294 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1295 true, true, __func__) <= 0)
1298 slot_id = urb->dev->slot_id;
1299 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1301 if (!HCD_HW_ACCESSIBLE(hcd)) {
1302 if (!in_interrupt())
1303 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1307 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1308 num_tds = urb->number_of_packets;
1309 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1310 urb->transfer_buffer_length > 0 &&
1311 urb->transfer_flags & URB_ZERO_PACKET &&
1312 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1317 urb_priv = kzalloc(sizeof(struct urb_priv) +
1318 num_tds * sizeof(struct xhci_td), mem_flags);
1322 urb_priv->num_tds = num_tds;
1323 urb_priv->num_tds_done = 0;
1324 urb->hcpriv = urb_priv;
1326 trace_xhci_urb_enqueue(urb);
1328 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1329 /* Check to see if the max packet size for the default control
1330 * endpoint changed during FS device enumeration
1332 if (urb->dev->speed == USB_SPEED_FULL) {
1333 ret = xhci_check_maxpacket(xhci, slot_id,
1336 xhci_urb_free_priv(urb_priv);
1343 spin_lock_irqsave(&xhci->lock, flags);
1345 if (xhci->xhc_state & XHCI_STATE_DYING) {
1346 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1347 urb->ep->desc.bEndpointAddress, urb);
1352 switch (usb_endpoint_type(&urb->ep->desc)) {
1354 case USB_ENDPOINT_XFER_CONTROL:
1355 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1358 case USB_ENDPOINT_XFER_BULK:
1359 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1360 if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
1361 xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1366 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1371 case USB_ENDPOINT_XFER_INT:
1372 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1376 case USB_ENDPOINT_XFER_ISOC:
1377 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1383 xhci_urb_free_priv(urb_priv);
1386 spin_unlock_irqrestore(&xhci->lock, flags);
1391 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1392 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1393 * should pick up where it left off in the TD, unless a Set Transfer Ring
1394 * Dequeue Pointer is issued.
1396 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1397 * the ring. Since the ring is a contiguous structure, they can't be physically
1398 * removed. Instead, there are two options:
1400 * 1) If the HC is in the middle of processing the URB to be canceled, we
1401 * simply move the ring's dequeue pointer past those TRBs using the Set
1402 * Transfer Ring Dequeue Pointer command. This will be the common case,
1403 * when drivers timeout on the last submitted URB and attempt to cancel.
1405 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1406 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1407 * HC will need to invalidate the any TRBs it has cached after the stop
1408 * endpoint command, as noted in the xHCI 0.95 errata.
1410 * 3) The TD may have completed by the time the Stop Endpoint Command
1411 * completes, so software needs to handle that case too.
1413 * This function should protect against the TD enqueueing code ringing the
1414 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1415 * It also needs to account for multiple cancellations on happening at the same
1416 * time for the same endpoint.
1418 * Note that this function can be called in any context, or so says
1419 * usb_hcd_unlink_urb()
1421 static int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1423 unsigned long flags;
1426 struct xhci_hcd *xhci;
1427 struct urb_priv *urb_priv;
1429 unsigned int ep_index;
1430 struct xhci_ring *ep_ring;
1431 struct xhci_virt_ep *ep;
1432 struct xhci_command *command;
1433 struct xhci_virt_device *vdev;
1435 xhci = hcd_to_xhci(hcd);
1436 spin_lock_irqsave(&xhci->lock, flags);
1438 trace_xhci_urb_dequeue(urb);
1440 /* Make sure the URB hasn't completed or been unlinked already */
1441 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1445 /* give back URB now if we can't queue it for cancel */
1446 vdev = xhci->devs[urb->dev->slot_id];
1447 urb_priv = urb->hcpriv;
1448 if (!vdev || !urb_priv)
1451 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1452 ep = &vdev->eps[ep_index];
1453 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1454 if (!ep || !ep_ring)
1457 /* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1458 temp = readl(&xhci->op_regs->status);
1459 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) {
1464 if (xhci->xhc_state & XHCI_STATE_HALTED) {
1465 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1466 "HC halted, freeing TD manually.");
1467 for (i = urb_priv->num_tds_done;
1468 i < urb_priv->num_tds;
1470 td = &urb_priv->td[i];
1471 if (!list_empty(&td->td_list))
1472 list_del_init(&td->td_list);
1473 if (!list_empty(&td->cancelled_td_list))
1474 list_del_init(&td->cancelled_td_list);
1479 i = urb_priv->num_tds_done;
1480 if (i < urb_priv->num_tds)
1481 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1482 "Cancel URB %p, dev %s, ep 0x%x, "
1483 "starting at offset 0x%llx",
1484 urb, urb->dev->devpath,
1485 urb->ep->desc.bEndpointAddress,
1486 (unsigned long long) xhci_trb_virt_to_dma(
1487 urb_priv->td[i].start_seg,
1488 urb_priv->td[i].first_trb));
1490 for (; i < urb_priv->num_tds; i++) {
1491 td = &urb_priv->td[i];
1492 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1495 /* Queue a stop endpoint command, but only if this is
1496 * the first cancellation to be handled.
1498 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
1499 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1504 ep->ep_state |= EP_STOP_CMD_PENDING;
1505 ep->stop_cmd_timer.expires = jiffies +
1506 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1507 add_timer(&ep->stop_cmd_timer);
1508 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1510 xhci_ring_cmd_db(xhci);
1513 spin_unlock_irqrestore(&xhci->lock, flags);
1518 xhci_urb_free_priv(urb_priv);
1519 usb_hcd_unlink_urb_from_ep(hcd, urb);
1520 spin_unlock_irqrestore(&xhci->lock, flags);
1521 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1525 /* Drop an endpoint from a new bandwidth configuration for this device.
1526 * Only one call to this function is allowed per endpoint before
1527 * check_bandwidth() or reset_bandwidth() must be called.
1528 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1529 * add the endpoint to the schedule with possibly new parameters denoted by a
1530 * different endpoint descriptor in usb_host_endpoint.
1531 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1534 * The USB core will not allow URBs to be queued to an endpoint that is being
1535 * disabled, so there's no need for mutual exclusion to protect
1536 * the xhci->devs[slot_id] structure.
1538 static int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1539 struct usb_host_endpoint *ep)
1541 struct xhci_hcd *xhci;
1542 struct xhci_container_ctx *in_ctx, *out_ctx;
1543 struct xhci_input_control_ctx *ctrl_ctx;
1544 unsigned int ep_index;
1545 struct xhci_ep_ctx *ep_ctx;
1547 u32 new_add_flags, new_drop_flags;
1550 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1553 xhci = hcd_to_xhci(hcd);
1554 if (xhci->xhc_state & XHCI_STATE_DYING)
1557 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1558 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1559 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1560 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1561 __func__, drop_flag);
1565 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1566 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1567 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1569 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1574 ep_index = xhci_get_endpoint_index(&ep->desc);
1575 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1576 /* If the HC already knows the endpoint is disabled,
1577 * or the HCD has noted it is disabled, ignore this request
1579 if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
1580 le32_to_cpu(ctrl_ctx->drop_flags) &
1581 xhci_get_endpoint_flag(&ep->desc)) {
1582 /* Do not warn when called after a usb_device_reset */
1583 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1584 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1589 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1590 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1592 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1593 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1595 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1597 if (xhci->quirks & XHCI_MTK_HOST)
1598 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1600 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1601 (unsigned int) ep->desc.bEndpointAddress,
1603 (unsigned int) new_drop_flags,
1604 (unsigned int) new_add_flags);
1608 /* Add an endpoint to a new possible bandwidth configuration for this device.
1609 * Only one call to this function is allowed per endpoint before
1610 * check_bandwidth() or reset_bandwidth() must be called.
1611 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1612 * add the endpoint to the schedule with possibly new parameters denoted by a
1613 * different endpoint descriptor in usb_host_endpoint.
1614 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1617 * The USB core will not allow URBs to be queued to an endpoint until the
1618 * configuration or alt setting is installed in the device, so there's no need
1619 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1621 static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1622 struct usb_host_endpoint *ep)
1624 struct xhci_hcd *xhci;
1625 struct xhci_container_ctx *in_ctx;
1626 unsigned int ep_index;
1627 struct xhci_input_control_ctx *ctrl_ctx;
1629 u32 new_add_flags, new_drop_flags;
1630 struct xhci_virt_device *virt_dev;
1633 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1635 /* So we won't queue a reset ep command for a root hub */
1639 xhci = hcd_to_xhci(hcd);
1640 if (xhci->xhc_state & XHCI_STATE_DYING)
1643 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1644 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1645 /* FIXME when we have to issue an evaluate endpoint command to
1646 * deal with ep0 max packet size changing once we get the
1649 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1650 __func__, added_ctxs);
1654 virt_dev = xhci->devs[udev->slot_id];
1655 in_ctx = virt_dev->in_ctx;
1656 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1658 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1663 ep_index = xhci_get_endpoint_index(&ep->desc);
1664 /* If this endpoint is already in use, and the upper layers are trying
1665 * to add it again without dropping it, reject the addition.
1667 if (virt_dev->eps[ep_index].ring &&
1668 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1669 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1670 "without dropping it.\n",
1671 (unsigned int) ep->desc.bEndpointAddress);
1675 /* If the HCD has already noted the endpoint is enabled,
1676 * ignore this request.
1678 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1679 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1685 * Configuration and alternate setting changes must be done in
1686 * process context, not interrupt context (or so documenation
1687 * for usb_set_interface() and usb_set_configuration() claim).
1689 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1690 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1691 __func__, ep->desc.bEndpointAddress);
1695 if (xhci->quirks & XHCI_MTK_HOST) {
1696 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1698 xhci_free_endpoint_ring(xhci, virt_dev, ep_index);
1703 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1704 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1706 /* If xhci_endpoint_disable() was called for this endpoint, but the
1707 * xHC hasn't been notified yet through the check_bandwidth() call,
1708 * this re-adds a new state for the endpoint from the new endpoint
1709 * descriptors. We must drop and re-add this endpoint, so we leave the
1712 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1714 /* Store the usb_device pointer for later use */
1717 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1718 (unsigned int) ep->desc.bEndpointAddress,
1720 (unsigned int) new_drop_flags,
1721 (unsigned int) new_add_flags);
1725 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1727 struct xhci_input_control_ctx *ctrl_ctx;
1728 struct xhci_ep_ctx *ep_ctx;
1729 struct xhci_slot_ctx *slot_ctx;
1732 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1734 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1739 /* When a device's add flag and drop flag are zero, any subsequent
1740 * configure endpoint command will leave that endpoint's state
1741 * untouched. Make sure we don't leave any old state in the input
1742 * endpoint contexts.
1744 ctrl_ctx->drop_flags = 0;
1745 ctrl_ctx->add_flags = 0;
1746 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1747 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1748 /* Endpoint 0 is always valid */
1749 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1750 for (i = 1; i < 31; i++) {
1751 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1752 ep_ctx->ep_info = 0;
1753 ep_ctx->ep_info2 = 0;
1755 ep_ctx->tx_info = 0;
1759 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1760 struct usb_device *udev, u32 *cmd_status)
1764 switch (*cmd_status) {
1765 case COMP_COMMAND_ABORTED:
1766 case COMP_COMMAND_RING_STOPPED:
1767 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1770 case COMP_RESOURCE_ERROR:
1771 dev_warn(&udev->dev,
1772 "Not enough host controller resources for new device state.\n");
1774 /* FIXME: can we allocate more resources for the HC? */
1776 case COMP_BANDWIDTH_ERROR:
1777 case COMP_SECONDARY_BANDWIDTH_ERROR:
1778 dev_warn(&udev->dev,
1779 "Not enough bandwidth for new device state.\n");
1781 /* FIXME: can we go back to the old state? */
1783 case COMP_TRB_ERROR:
1784 /* the HCD set up something wrong */
1785 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1787 "and endpoint is not disabled.\n");
1790 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1791 dev_warn(&udev->dev,
1792 "ERROR: Incompatible device for endpoint configure command.\n");
1796 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1797 "Successful Endpoint Configure command");
1801 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1809 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1810 struct usb_device *udev, u32 *cmd_status)
1814 switch (*cmd_status) {
1815 case COMP_COMMAND_ABORTED:
1816 case COMP_COMMAND_RING_STOPPED:
1817 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1820 case COMP_PARAMETER_ERROR:
1821 dev_warn(&udev->dev,
1822 "WARN: xHCI driver setup invalid evaluate context command.\n");
1825 case COMP_SLOT_NOT_ENABLED_ERROR:
1826 dev_warn(&udev->dev,
1827 "WARN: slot not enabled for evaluate context command.\n");
1830 case COMP_CONTEXT_STATE_ERROR:
1831 dev_warn(&udev->dev,
1832 "WARN: invalid context state for evaluate context command.\n");
1835 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1836 dev_warn(&udev->dev,
1837 "ERROR: Incompatible device for evaluate context command.\n");
1840 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
1841 /* Max Exit Latency too large error */
1842 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1846 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1847 "Successful evaluate context command");
1851 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1859 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1860 struct xhci_input_control_ctx *ctrl_ctx)
1862 u32 valid_add_flags;
1863 u32 valid_drop_flags;
1865 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1866 * (bit 1). The default control endpoint is added during the Address
1867 * Device command and is never removed until the slot is disabled.
1869 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1870 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1872 /* Use hweight32 to count the number of ones in the add flags, or
1873 * number of endpoints added. Don't count endpoints that are changed
1874 * (both added and dropped).
1876 return hweight32(valid_add_flags) -
1877 hweight32(valid_add_flags & valid_drop_flags);
1880 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1881 struct xhci_input_control_ctx *ctrl_ctx)
1883 u32 valid_add_flags;
1884 u32 valid_drop_flags;
1886 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1887 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1889 return hweight32(valid_drop_flags) -
1890 hweight32(valid_add_flags & valid_drop_flags);
1894 * We need to reserve the new number of endpoints before the configure endpoint
1895 * command completes. We can't subtract the dropped endpoints from the number
1896 * of active endpoints until the command completes because we can oversubscribe
1897 * the host in this case:
1899 * - the first configure endpoint command drops more endpoints than it adds
1900 * - a second configure endpoint command that adds more endpoints is queued
1901 * - the first configure endpoint command fails, so the config is unchanged
1902 * - the second command may succeed, even though there isn't enough resources
1904 * Must be called with xhci->lock held.
1906 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1907 struct xhci_input_control_ctx *ctrl_ctx)
1911 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1912 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1913 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1914 "Not enough ep ctxs: "
1915 "%u active, need to add %u, limit is %u.",
1916 xhci->num_active_eps, added_eps,
1917 xhci->limit_active_eps);
1920 xhci->num_active_eps += added_eps;
1921 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1922 "Adding %u ep ctxs, %u now active.", added_eps,
1923 xhci->num_active_eps);
1928 * The configure endpoint was failed by the xHC for some other reason, so we
1929 * need to revert the resources that failed configuration would have used.
1931 * Must be called with xhci->lock held.
1933 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1934 struct xhci_input_control_ctx *ctrl_ctx)
1938 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1939 xhci->num_active_eps -= num_failed_eps;
1940 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1941 "Removing %u failed ep ctxs, %u now active.",
1943 xhci->num_active_eps);
1947 * Now that the command has completed, clean up the active endpoint count by
1948 * subtracting out the endpoints that were dropped (but not changed).
1950 * Must be called with xhci->lock held.
1952 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1953 struct xhci_input_control_ctx *ctrl_ctx)
1955 u32 num_dropped_eps;
1957 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1958 xhci->num_active_eps -= num_dropped_eps;
1959 if (num_dropped_eps)
1960 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1961 "Removing %u dropped ep ctxs, %u now active.",
1963 xhci->num_active_eps);
1966 static unsigned int xhci_get_block_size(struct usb_device *udev)
1968 switch (udev->speed) {
1970 case USB_SPEED_FULL:
1972 case USB_SPEED_HIGH:
1974 case USB_SPEED_SUPER:
1975 case USB_SPEED_SUPER_PLUS:
1977 case USB_SPEED_UNKNOWN:
1978 case USB_SPEED_WIRELESS:
1980 /* Should never happen */
1986 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1988 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1990 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1995 /* If we are changing a LS/FS device under a HS hub,
1996 * make sure (if we are activating a new TT) that the HS bus has enough
1997 * bandwidth for this new TT.
1999 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2000 struct xhci_virt_device *virt_dev,
2003 struct xhci_interval_bw_table *bw_table;
2004 struct xhci_tt_bw_info *tt_info;
2006 /* Find the bandwidth table for the root port this TT is attached to. */
2007 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2008 tt_info = virt_dev->tt_info;
2009 /* If this TT already had active endpoints, the bandwidth for this TT
2010 * has already been added. Removing all periodic endpoints (and thus
2011 * making the TT enactive) will only decrease the bandwidth used.
2015 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2016 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2020 /* Not sure why we would have no new active endpoints...
2022 * Maybe because of an Evaluate Context change for a hub update or a
2023 * control endpoint 0 max packet size change?
2024 * FIXME: skip the bandwidth calculation in that case.
2029 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2030 struct xhci_virt_device *virt_dev)
2032 unsigned int bw_reserved;
2034 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2035 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2038 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2039 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2046 * This algorithm is a very conservative estimate of the worst-case scheduling
2047 * scenario for any one interval. The hardware dynamically schedules the
2048 * packets, so we can't tell which microframe could be the limiting factor in
2049 * the bandwidth scheduling. This only takes into account periodic endpoints.
2051 * Obviously, we can't solve an NP complete problem to find the minimum worst
2052 * case scenario. Instead, we come up with an estimate that is no less than
2053 * the worst case bandwidth used for any one microframe, but may be an
2056 * We walk the requirements for each endpoint by interval, starting with the
2057 * smallest interval, and place packets in the schedule where there is only one
2058 * possible way to schedule packets for that interval. In order to simplify
2059 * this algorithm, we record the largest max packet size for each interval, and
2060 * assume all packets will be that size.
2062 * For interval 0, we obviously must schedule all packets for each interval.
2063 * The bandwidth for interval 0 is just the amount of data to be transmitted
2064 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2065 * the number of packets).
2067 * For interval 1, we have two possible microframes to schedule those packets
2068 * in. For this algorithm, if we can schedule the same number of packets for
2069 * each possible scheduling opportunity (each microframe), we will do so. The
2070 * remaining number of packets will be saved to be transmitted in the gaps in
2071 * the next interval's scheduling sequence.
2073 * As we move those remaining packets to be scheduled with interval 2 packets,
2074 * we have to double the number of remaining packets to transmit. This is
2075 * because the intervals are actually powers of 2, and we would be transmitting
2076 * the previous interval's packets twice in this interval. We also have to be
2077 * sure that when we look at the largest max packet size for this interval, we
2078 * also look at the largest max packet size for the remaining packets and take
2079 * the greater of the two.
2081 * The algorithm continues to evenly distribute packets in each scheduling
2082 * opportunity, and push the remaining packets out, until we get to the last
2083 * interval. Then those packets and their associated overhead are just added
2084 * to the bandwidth used.
2086 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2087 struct xhci_virt_device *virt_dev,
2090 unsigned int bw_reserved;
2091 unsigned int max_bandwidth;
2092 unsigned int bw_used;
2093 unsigned int block_size;
2094 struct xhci_interval_bw_table *bw_table;
2095 unsigned int packet_size = 0;
2096 unsigned int overhead = 0;
2097 unsigned int packets_transmitted = 0;
2098 unsigned int packets_remaining = 0;
2101 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2102 return xhci_check_ss_bw(xhci, virt_dev);
2104 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2105 max_bandwidth = HS_BW_LIMIT;
2106 /* Convert percent of bus BW reserved to blocks reserved */
2107 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2109 max_bandwidth = FS_BW_LIMIT;
2110 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2113 bw_table = virt_dev->bw_table;
2114 /* We need to translate the max packet size and max ESIT payloads into
2115 * the units the hardware uses.
2117 block_size = xhci_get_block_size(virt_dev->udev);
2119 /* If we are manipulating a LS/FS device under a HS hub, double check
2120 * that the HS bus has enough bandwidth if we are activing a new TT.
2122 if (virt_dev->tt_info) {
2123 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2124 "Recalculating BW for rootport %u",
2125 virt_dev->real_port);
2126 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2127 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2128 "newly activated TT.\n");
2131 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2132 "Recalculating BW for TT slot %u port %u",
2133 virt_dev->tt_info->slot_id,
2134 virt_dev->tt_info->ttport);
2136 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2137 "Recalculating BW for rootport %u",
2138 virt_dev->real_port);
2141 /* Add in how much bandwidth will be used for interval zero, or the
2142 * rounded max ESIT payload + number of packets * largest overhead.
2144 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2145 bw_table->interval_bw[0].num_packets *
2146 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2148 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2149 unsigned int bw_added;
2150 unsigned int largest_mps;
2151 unsigned int interval_overhead;
2154 * How many packets could we transmit in this interval?
2155 * If packets didn't fit in the previous interval, we will need
2156 * to transmit that many packets twice within this interval.
2158 packets_remaining = 2 * packets_remaining +
2159 bw_table->interval_bw[i].num_packets;
2161 /* Find the largest max packet size of this or the previous
2164 if (list_empty(&bw_table->interval_bw[i].endpoints))
2167 struct xhci_virt_ep *virt_ep;
2168 struct list_head *ep_entry;
2170 ep_entry = bw_table->interval_bw[i].endpoints.next;
2171 virt_ep = list_entry(ep_entry,
2172 struct xhci_virt_ep, bw_endpoint_list);
2173 /* Convert to blocks, rounding up */
2174 largest_mps = DIV_ROUND_UP(
2175 virt_ep->bw_info.max_packet_size,
2178 if (largest_mps > packet_size)
2179 packet_size = largest_mps;
2181 /* Use the larger overhead of this or the previous interval. */
2182 interval_overhead = xhci_get_largest_overhead(
2183 &bw_table->interval_bw[i]);
2184 if (interval_overhead > overhead)
2185 overhead = interval_overhead;
2187 /* How many packets can we evenly distribute across
2188 * (1 << (i + 1)) possible scheduling opportunities?
2190 packets_transmitted = packets_remaining >> (i + 1);
2192 /* Add in the bandwidth used for those scheduled packets */
2193 bw_added = packets_transmitted * (overhead + packet_size);
2195 /* How many packets do we have remaining to transmit? */
2196 packets_remaining = packets_remaining % (1 << (i + 1));
2198 /* What largest max packet size should those packets have? */
2199 /* If we've transmitted all packets, don't carry over the
2200 * largest packet size.
2202 if (packets_remaining == 0) {
2205 } else if (packets_transmitted > 0) {
2206 /* Otherwise if we do have remaining packets, and we've
2207 * scheduled some packets in this interval, take the
2208 * largest max packet size from endpoints with this
2211 packet_size = largest_mps;
2212 overhead = interval_overhead;
2214 /* Otherwise carry over packet_size and overhead from the last
2215 * time we had a remainder.
2217 bw_used += bw_added;
2218 if (bw_used > max_bandwidth) {
2219 xhci_warn(xhci, "Not enough bandwidth. "
2220 "Proposed: %u, Max: %u\n",
2221 bw_used, max_bandwidth);
2226 * Ok, we know we have some packets left over after even-handedly
2227 * scheduling interval 15. We don't know which microframes they will
2228 * fit into, so we over-schedule and say they will be scheduled every
2231 if (packets_remaining > 0)
2232 bw_used += overhead + packet_size;
2234 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2235 unsigned int port_index = virt_dev->real_port - 1;
2237 /* OK, we're manipulating a HS device attached to a
2238 * root port bandwidth domain. Include the number of active TTs
2239 * in the bandwidth used.
2241 bw_used += TT_HS_OVERHEAD *
2242 xhci->rh_bw[port_index].num_active_tts;
2245 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2246 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2247 "Available: %u " "percent",
2248 bw_used, max_bandwidth, bw_reserved,
2249 (max_bandwidth - bw_used - bw_reserved) * 100 /
2252 bw_used += bw_reserved;
2253 if (bw_used > max_bandwidth) {
2254 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2255 bw_used, max_bandwidth);
2259 bw_table->bw_used = bw_used;
2263 static bool xhci_is_async_ep(unsigned int ep_type)
2265 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2266 ep_type != ISOC_IN_EP &&
2267 ep_type != INT_IN_EP);
2270 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2272 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2275 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2277 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2279 if (ep_bw->ep_interval == 0)
2280 return SS_OVERHEAD_BURST +
2281 (ep_bw->mult * ep_bw->num_packets *
2282 (SS_OVERHEAD + mps));
2283 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2284 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2285 1 << ep_bw->ep_interval);
2289 static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2290 struct xhci_bw_info *ep_bw,
2291 struct xhci_interval_bw_table *bw_table,
2292 struct usb_device *udev,
2293 struct xhci_virt_ep *virt_ep,
2294 struct xhci_tt_bw_info *tt_info)
2296 struct xhci_interval_bw *interval_bw;
2297 int normalized_interval;
2299 if (xhci_is_async_ep(ep_bw->type))
2302 if (udev->speed >= USB_SPEED_SUPER) {
2303 if (xhci_is_sync_in_ep(ep_bw->type))
2304 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2305 xhci_get_ss_bw_consumed(ep_bw);
2307 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2308 xhci_get_ss_bw_consumed(ep_bw);
2312 /* SuperSpeed endpoints never get added to intervals in the table, so
2313 * this check is only valid for HS/FS/LS devices.
2315 if (list_empty(&virt_ep->bw_endpoint_list))
2317 /* For LS/FS devices, we need to translate the interval expressed in
2318 * microframes to frames.
2320 if (udev->speed == USB_SPEED_HIGH)
2321 normalized_interval = ep_bw->ep_interval;
2323 normalized_interval = ep_bw->ep_interval - 3;
2325 if (normalized_interval == 0)
2326 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2327 interval_bw = &bw_table->interval_bw[normalized_interval];
2328 interval_bw->num_packets -= ep_bw->num_packets;
2329 switch (udev->speed) {
2331 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2333 case USB_SPEED_FULL:
2334 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2336 case USB_SPEED_HIGH:
2337 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2339 case USB_SPEED_SUPER:
2340 case USB_SPEED_SUPER_PLUS:
2341 case USB_SPEED_UNKNOWN:
2342 case USB_SPEED_WIRELESS:
2343 /* Should never happen because only LS/FS/HS endpoints will get
2344 * added to the endpoint list.
2349 tt_info->active_eps -= 1;
2350 list_del_init(&virt_ep->bw_endpoint_list);
2353 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2354 struct xhci_bw_info *ep_bw,
2355 struct xhci_interval_bw_table *bw_table,
2356 struct usb_device *udev,
2357 struct xhci_virt_ep *virt_ep,
2358 struct xhci_tt_bw_info *tt_info)
2360 struct xhci_interval_bw *interval_bw;
2361 struct xhci_virt_ep *smaller_ep;
2362 int normalized_interval;
2364 if (xhci_is_async_ep(ep_bw->type))
2367 if (udev->speed == USB_SPEED_SUPER) {
2368 if (xhci_is_sync_in_ep(ep_bw->type))
2369 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2370 xhci_get_ss_bw_consumed(ep_bw);
2372 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2373 xhci_get_ss_bw_consumed(ep_bw);
2377 /* For LS/FS devices, we need to translate the interval expressed in
2378 * microframes to frames.
2380 if (udev->speed == USB_SPEED_HIGH)
2381 normalized_interval = ep_bw->ep_interval;
2383 normalized_interval = ep_bw->ep_interval - 3;
2385 if (normalized_interval == 0)
2386 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2387 interval_bw = &bw_table->interval_bw[normalized_interval];
2388 interval_bw->num_packets += ep_bw->num_packets;
2389 switch (udev->speed) {
2391 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2393 case USB_SPEED_FULL:
2394 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2396 case USB_SPEED_HIGH:
2397 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2399 case USB_SPEED_SUPER:
2400 case USB_SPEED_SUPER_PLUS:
2401 case USB_SPEED_UNKNOWN:
2402 case USB_SPEED_WIRELESS:
2403 /* Should never happen because only LS/FS/HS endpoints will get
2404 * added to the endpoint list.
2410 tt_info->active_eps += 1;
2411 /* Insert the endpoint into the list, largest max packet size first. */
2412 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2414 if (ep_bw->max_packet_size >=
2415 smaller_ep->bw_info.max_packet_size) {
2416 /* Add the new ep before the smaller endpoint */
2417 list_add_tail(&virt_ep->bw_endpoint_list,
2418 &smaller_ep->bw_endpoint_list);
2422 /* Add the new endpoint at the end of the list. */
2423 list_add_tail(&virt_ep->bw_endpoint_list,
2424 &interval_bw->endpoints);
2427 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2428 struct xhci_virt_device *virt_dev,
2431 struct xhci_root_port_bw_info *rh_bw_info;
2432 if (!virt_dev->tt_info)
2435 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2436 if (old_active_eps == 0 &&
2437 virt_dev->tt_info->active_eps != 0) {
2438 rh_bw_info->num_active_tts += 1;
2439 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2440 } else if (old_active_eps != 0 &&
2441 virt_dev->tt_info->active_eps == 0) {
2442 rh_bw_info->num_active_tts -= 1;
2443 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2447 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2448 struct xhci_virt_device *virt_dev,
2449 struct xhci_container_ctx *in_ctx)
2451 struct xhci_bw_info ep_bw_info[31];
2453 struct xhci_input_control_ctx *ctrl_ctx;
2454 int old_active_eps = 0;
2456 if (virt_dev->tt_info)
2457 old_active_eps = virt_dev->tt_info->active_eps;
2459 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2461 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2466 for (i = 0; i < 31; i++) {
2467 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2470 /* Make a copy of the BW info in case we need to revert this */
2471 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2472 sizeof(ep_bw_info[i]));
2473 /* Drop the endpoint from the interval table if the endpoint is
2474 * being dropped or changed.
2476 if (EP_IS_DROPPED(ctrl_ctx, i))
2477 xhci_drop_ep_from_interval_table(xhci,
2478 &virt_dev->eps[i].bw_info,
2484 /* Overwrite the information stored in the endpoints' bw_info */
2485 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2486 for (i = 0; i < 31; i++) {
2487 /* Add any changed or added endpoints to the interval table */
2488 if (EP_IS_ADDED(ctrl_ctx, i))
2489 xhci_add_ep_to_interval_table(xhci,
2490 &virt_dev->eps[i].bw_info,
2497 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2498 /* Ok, this fits in the bandwidth we have.
2499 * Update the number of active TTs.
2501 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2505 /* We don't have enough bandwidth for this, revert the stored info. */
2506 for (i = 0; i < 31; i++) {
2507 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2510 /* Drop the new copies of any added or changed endpoints from
2511 * the interval table.
2513 if (EP_IS_ADDED(ctrl_ctx, i)) {
2514 xhci_drop_ep_from_interval_table(xhci,
2515 &virt_dev->eps[i].bw_info,
2521 /* Revert the endpoint back to its old information */
2522 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2523 sizeof(ep_bw_info[i]));
2524 /* Add any changed or dropped endpoints back into the table */
2525 if (EP_IS_DROPPED(ctrl_ctx, i))
2526 xhci_add_ep_to_interval_table(xhci,
2527 &virt_dev->eps[i].bw_info,
2537 /* Issue a configure endpoint command or evaluate context command
2538 * and wait for it to finish.
2540 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2541 struct usb_device *udev,
2542 struct xhci_command *command,
2543 bool ctx_change, bool must_succeed)
2546 unsigned long flags;
2547 struct xhci_input_control_ctx *ctrl_ctx;
2548 struct xhci_virt_device *virt_dev;
2553 spin_lock_irqsave(&xhci->lock, flags);
2555 if (xhci->xhc_state & XHCI_STATE_DYING) {
2556 spin_unlock_irqrestore(&xhci->lock, flags);
2560 virt_dev = xhci->devs[udev->slot_id];
2562 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2564 spin_unlock_irqrestore(&xhci->lock, flags);
2565 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2570 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2571 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2572 spin_unlock_irqrestore(&xhci->lock, flags);
2573 xhci_warn(xhci, "Not enough host resources, "
2574 "active endpoint contexts = %u\n",
2575 xhci->num_active_eps);
2578 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2579 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2580 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2581 xhci_free_host_resources(xhci, ctrl_ctx);
2582 spin_unlock_irqrestore(&xhci->lock, flags);
2583 xhci_warn(xhci, "Not enough bandwidth\n");
2588 ret = xhci_queue_configure_endpoint(xhci, command,
2589 command->in_ctx->dma,
2590 udev->slot_id, must_succeed);
2592 ret = xhci_queue_evaluate_context(xhci, command,
2593 command->in_ctx->dma,
2594 udev->slot_id, must_succeed);
2596 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2597 xhci_free_host_resources(xhci, ctrl_ctx);
2598 spin_unlock_irqrestore(&xhci->lock, flags);
2599 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2600 "FIXME allocate a new ring segment");
2603 xhci_ring_cmd_db(xhci);
2604 spin_unlock_irqrestore(&xhci->lock, flags);
2606 /* Wait for the configure endpoint command to complete */
2607 wait_for_completion(command->completion);
2610 ret = xhci_configure_endpoint_result(xhci, udev,
2613 ret = xhci_evaluate_context_result(xhci, udev,
2616 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2617 spin_lock_irqsave(&xhci->lock, flags);
2618 /* If the command failed, remove the reserved resources.
2619 * Otherwise, clean up the estimate to include dropped eps.
2622 xhci_free_host_resources(xhci, ctrl_ctx);
2624 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2625 spin_unlock_irqrestore(&xhci->lock, flags);
2630 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2631 struct xhci_virt_device *vdev, int i)
2633 struct xhci_virt_ep *ep = &vdev->eps[i];
2635 if (ep->ep_state & EP_HAS_STREAMS) {
2636 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2637 xhci_get_endpoint_address(i));
2638 xhci_free_stream_info(xhci, ep->stream_info);
2639 ep->stream_info = NULL;
2640 ep->ep_state &= ~EP_HAS_STREAMS;
2644 /* Called after one or more calls to xhci_add_endpoint() or
2645 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2646 * to call xhci_reset_bandwidth().
2648 * Since we are in the middle of changing either configuration or
2649 * installing a new alt setting, the USB core won't allow URBs to be
2650 * enqueued for any endpoint on the old config or interface. Nothing
2651 * else should be touching the xhci->devs[slot_id] structure, so we
2652 * don't need to take the xhci->lock for manipulating that.
2654 static int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2658 struct xhci_hcd *xhci;
2659 struct xhci_virt_device *virt_dev;
2660 struct xhci_input_control_ctx *ctrl_ctx;
2661 struct xhci_slot_ctx *slot_ctx;
2662 struct xhci_command *command;
2664 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2667 xhci = hcd_to_xhci(hcd);
2668 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
2669 (xhci->xhc_state & XHCI_STATE_REMOVING))
2672 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2673 virt_dev = xhci->devs[udev->slot_id];
2675 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2679 command->in_ctx = virt_dev->in_ctx;
2681 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2682 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2684 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2687 goto command_cleanup;
2689 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2690 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2691 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2693 /* Don't issue the command if there's no endpoints to update. */
2694 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2695 ctrl_ctx->drop_flags == 0) {
2697 goto command_cleanup;
2699 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2700 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2701 for (i = 31; i >= 1; i--) {
2702 __le32 le32 = cpu_to_le32(BIT(i));
2704 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2705 || (ctrl_ctx->add_flags & le32) || i == 1) {
2706 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2707 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2712 ret = xhci_configure_endpoint(xhci, udev, command,
2715 /* Callee should call reset_bandwidth() */
2716 goto command_cleanup;
2718 /* Free any rings that were dropped, but not changed. */
2719 for (i = 1; i < 31; i++) {
2720 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2721 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2722 xhci_free_endpoint_ring(xhci, virt_dev, i);
2723 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2726 xhci_zero_in_ctx(xhci, virt_dev);
2728 * Install any rings for completely new endpoints or changed endpoints,
2729 * and free any old rings from changed endpoints.
2731 for (i = 1; i < 31; i++) {
2732 if (!virt_dev->eps[i].new_ring)
2734 /* Only free the old ring if it exists.
2735 * It may not if this is the first add of an endpoint.
2737 if (virt_dev->eps[i].ring) {
2738 xhci_free_endpoint_ring(xhci, virt_dev, i);
2740 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2741 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2742 virt_dev->eps[i].new_ring = NULL;
2745 kfree(command->completion);
2751 static void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2753 struct xhci_hcd *xhci;
2754 struct xhci_virt_device *virt_dev;
2757 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2760 xhci = hcd_to_xhci(hcd);
2762 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2763 virt_dev = xhci->devs[udev->slot_id];
2764 /* Free any rings allocated for added endpoints */
2765 for (i = 0; i < 31; i++) {
2766 if (virt_dev->eps[i].new_ring) {
2767 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2768 virt_dev->eps[i].new_ring = NULL;
2771 xhci_zero_in_ctx(xhci, virt_dev);
2774 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2775 struct xhci_container_ctx *in_ctx,
2776 struct xhci_container_ctx *out_ctx,
2777 struct xhci_input_control_ctx *ctrl_ctx,
2778 u32 add_flags, u32 drop_flags)
2780 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2781 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2782 xhci_slot_copy(xhci, in_ctx, out_ctx);
2783 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2786 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2787 unsigned int slot_id, unsigned int ep_index,
2788 struct xhci_dequeue_state *deq_state)
2790 struct xhci_input_control_ctx *ctrl_ctx;
2791 struct xhci_container_ctx *in_ctx;
2792 struct xhci_ep_ctx *ep_ctx;
2796 in_ctx = xhci->devs[slot_id]->in_ctx;
2797 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2799 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2804 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2805 xhci->devs[slot_id]->out_ctx, ep_index);
2806 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2807 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2808 deq_state->new_deq_ptr);
2810 xhci_warn(xhci, "WARN Cannot submit config ep after "
2811 "reset ep command\n");
2812 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2813 deq_state->new_deq_seg,
2814 deq_state->new_deq_ptr);
2817 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2819 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2820 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2821 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2822 added_ctxs, added_ctxs);
2825 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
2826 unsigned int stream_id, struct xhci_td *td)
2828 struct xhci_dequeue_state deq_state;
2829 struct xhci_virt_ep *ep;
2830 struct usb_device *udev = td->urb->dev;
2832 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2833 "Cleaning up stalled endpoint ring");
2834 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2835 /* We need to move the HW's dequeue pointer past this TD,
2836 * or it will attempt to resend it on the next doorbell ring.
2838 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2839 ep_index, stream_id, td, &deq_state);
2841 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2844 /* HW with the reset endpoint quirk will use the saved dequeue state to
2845 * issue a configure endpoint command later.
2847 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2848 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2849 "Queueing new dequeue state");
2850 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2851 ep_index, &deq_state);
2853 /* Better hope no one uses the input context between now and the
2854 * reset endpoint completion!
2855 * XXX: No idea how this hardware will react when stream rings
2858 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2859 "Setting up input context for "
2860 "configure endpoint command");
2861 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2862 ep_index, &deq_state);
2866 /* Called when clearing halted device. The core should have sent the control
2867 * message to clear the device halt condition. The host side of the halt should
2868 * already be cleared with a reset endpoint command issued when the STALL tx
2869 * event was received.
2871 * Context: in_interrupt
2874 static void xhci_endpoint_reset(struct usb_hcd *hcd,
2875 struct usb_host_endpoint *ep)
2877 struct xhci_hcd *xhci;
2879 xhci = hcd_to_xhci(hcd);
2882 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2883 * The Reset Endpoint Command may only be issued to endpoints in the
2884 * Halted state. If software wishes reset the Data Toggle or Sequence
2885 * Number of an endpoint that isn't in the Halted state, then software
2886 * may issue a Configure Endpoint Command with the Drop and Add bits set
2887 * for the target endpoint. that is in the Stopped state.
2890 /* For now just print debug to follow the situation */
2891 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2892 ep->desc.bEndpointAddress);
2895 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2896 struct usb_device *udev, struct usb_host_endpoint *ep,
2897 unsigned int slot_id)
2900 unsigned int ep_index;
2901 unsigned int ep_state;
2905 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2908 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2909 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2910 " descriptor for ep 0x%x does not support streams\n",
2911 ep->desc.bEndpointAddress);
2915 ep_index = xhci_get_endpoint_index(&ep->desc);
2916 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2917 if (ep_state & EP_HAS_STREAMS ||
2918 ep_state & EP_GETTING_STREAMS) {
2919 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2920 "already has streams set up.\n",
2921 ep->desc.bEndpointAddress);
2922 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2923 "dynamic stream context array reallocation.\n");
2926 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2927 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2928 "endpoint 0x%x; URBs are pending.\n",
2929 ep->desc.bEndpointAddress);
2935 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2936 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2938 unsigned int max_streams;
2940 /* The stream context array size must be a power of two */
2941 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2943 * Find out how many primary stream array entries the host controller
2944 * supports. Later we may use secondary stream arrays (similar to 2nd
2945 * level page entries), but that's an optional feature for xHCI host
2946 * controllers. xHCs must support at least 4 stream IDs.
2948 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2949 if (*num_stream_ctxs > max_streams) {
2950 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2952 *num_stream_ctxs = max_streams;
2953 *num_streams = max_streams;
2957 /* Returns an error code if one of the endpoint already has streams.
2958 * This does not change any data structures, it only checks and gathers
2961 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2962 struct usb_device *udev,
2963 struct usb_host_endpoint **eps, unsigned int num_eps,
2964 unsigned int *num_streams, u32 *changed_ep_bitmask)
2966 unsigned int max_streams;
2967 unsigned int endpoint_flag;
2971 for (i = 0; i < num_eps; i++) {
2972 ret = xhci_check_streams_endpoint(xhci, udev,
2973 eps[i], udev->slot_id);
2977 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2978 if (max_streams < (*num_streams - 1)) {
2979 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2980 eps[i]->desc.bEndpointAddress,
2982 *num_streams = max_streams+1;
2985 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2986 if (*changed_ep_bitmask & endpoint_flag)
2988 *changed_ep_bitmask |= endpoint_flag;
2993 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2994 struct usb_device *udev,
2995 struct usb_host_endpoint **eps, unsigned int num_eps)
2997 u32 changed_ep_bitmask = 0;
2998 unsigned int slot_id;
2999 unsigned int ep_index;
3000 unsigned int ep_state;
3003 slot_id = udev->slot_id;
3004 if (!xhci->devs[slot_id])
3007 for (i = 0; i < num_eps; i++) {
3008 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3009 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3010 /* Are streams already being freed for the endpoint? */
3011 if (ep_state & EP_GETTING_NO_STREAMS) {
3012 xhci_warn(xhci, "WARN Can't disable streams for "
3014 "streams are being disabled already\n",
3015 eps[i]->desc.bEndpointAddress);
3018 /* Are there actually any streams to free? */
3019 if (!(ep_state & EP_HAS_STREAMS) &&
3020 !(ep_state & EP_GETTING_STREAMS)) {
3021 xhci_warn(xhci, "WARN Can't disable streams for "
3023 "streams are already disabled!\n",
3024 eps[i]->desc.bEndpointAddress);
3025 xhci_warn(xhci, "WARN xhci_free_streams() called "
3026 "with non-streams endpoint\n");
3029 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3031 return changed_ep_bitmask;
3035 * The USB device drivers use this function (through the HCD interface in USB
3036 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3037 * coordinate mass storage command queueing across multiple endpoints (basically
3038 * a stream ID == a task ID).
3040 * Setting up streams involves allocating the same size stream context array
3041 * for each endpoint and issuing a configure endpoint command for all endpoints.
3043 * Don't allow the call to succeed if one endpoint only supports one stream
3044 * (which means it doesn't support streams at all).
3046 * Drivers may get less stream IDs than they asked for, if the host controller
3047 * hardware or endpoints claim they can't support the number of requested
3050 static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3051 struct usb_host_endpoint **eps, unsigned int num_eps,
3052 unsigned int num_streams, gfp_t mem_flags)
3055 struct xhci_hcd *xhci;
3056 struct xhci_virt_device *vdev;
3057 struct xhci_command *config_cmd;
3058 struct xhci_input_control_ctx *ctrl_ctx;
3059 unsigned int ep_index;
3060 unsigned int num_stream_ctxs;
3061 unsigned int max_packet;
3062 unsigned long flags;
3063 u32 changed_ep_bitmask = 0;
3068 /* Add one to the number of streams requested to account for
3069 * stream 0 that is reserved for xHCI usage.
3072 xhci = hcd_to_xhci(hcd);
3073 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3076 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3077 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3078 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3079 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3083 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3087 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3089 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3091 xhci_free_command(xhci, config_cmd);
3095 /* Check to make sure all endpoints are not already configured for
3096 * streams. While we're at it, find the maximum number of streams that
3097 * all the endpoints will support and check for duplicate endpoints.
3099 spin_lock_irqsave(&xhci->lock, flags);
3100 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3101 num_eps, &num_streams, &changed_ep_bitmask);
3103 xhci_free_command(xhci, config_cmd);
3104 spin_unlock_irqrestore(&xhci->lock, flags);
3107 if (num_streams <= 1) {
3108 xhci_warn(xhci, "WARN: endpoints can't handle "
3109 "more than one stream.\n");
3110 xhci_free_command(xhci, config_cmd);
3111 spin_unlock_irqrestore(&xhci->lock, flags);
3114 vdev = xhci->devs[udev->slot_id];
3115 /* Mark each endpoint as being in transition, so
3116 * xhci_urb_enqueue() will reject all URBs.
3118 for (i = 0; i < num_eps; i++) {
3119 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3120 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3122 spin_unlock_irqrestore(&xhci->lock, flags);
3124 /* Setup internal data structures and allocate HW data structures for
3125 * streams (but don't install the HW structures in the input context
3126 * until we're sure all memory allocation succeeded).
3128 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3129 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3130 num_stream_ctxs, num_streams);
3132 for (i = 0; i < num_eps; i++) {
3133 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3134 max_packet = usb_endpoint_maxp(&eps[i]->desc);
3135 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3138 max_packet, mem_flags);
3139 if (!vdev->eps[ep_index].stream_info)
3141 /* Set maxPstreams in endpoint context and update deq ptr to
3142 * point to stream context array. FIXME
3146 /* Set up the input context for a configure endpoint command. */
3147 for (i = 0; i < num_eps; i++) {
3148 struct xhci_ep_ctx *ep_ctx;
3150 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3151 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3153 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3154 vdev->out_ctx, ep_index);
3155 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3156 vdev->eps[ep_index].stream_info);
3158 /* Tell the HW to drop its old copy of the endpoint context info
3159 * and add the updated copy from the input context.
3161 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3162 vdev->out_ctx, ctrl_ctx,
3163 changed_ep_bitmask, changed_ep_bitmask);
3165 /* Issue and wait for the configure endpoint command */
3166 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3169 /* xHC rejected the configure endpoint command for some reason, so we
3170 * leave the old ring intact and free our internal streams data
3176 spin_lock_irqsave(&xhci->lock, flags);
3177 for (i = 0; i < num_eps; i++) {
3178 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3179 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3180 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3181 udev->slot_id, ep_index);
3182 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3184 xhci_free_command(xhci, config_cmd);
3185 spin_unlock_irqrestore(&xhci->lock, flags);
3187 /* Subtract 1 for stream 0, which drivers can't use */
3188 return num_streams - 1;
3191 /* If it didn't work, free the streams! */
3192 for (i = 0; i < num_eps; i++) {
3193 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3194 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3195 vdev->eps[ep_index].stream_info = NULL;
3196 /* FIXME Unset maxPstreams in endpoint context and
3197 * update deq ptr to point to normal string ring.
3199 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3200 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3201 xhci_endpoint_zero(xhci, vdev, eps[i]);
3203 xhci_free_command(xhci, config_cmd);
3207 /* Transition the endpoint from using streams to being a "normal" endpoint
3210 * Modify the endpoint context state, submit a configure endpoint command,
3211 * and free all endpoint rings for streams if that completes successfully.
3213 static int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3214 struct usb_host_endpoint **eps, unsigned int num_eps,
3218 struct xhci_hcd *xhci;
3219 struct xhci_virt_device *vdev;
3220 struct xhci_command *command;
3221 struct xhci_input_control_ctx *ctrl_ctx;
3222 unsigned int ep_index;
3223 unsigned long flags;
3224 u32 changed_ep_bitmask;
3226 xhci = hcd_to_xhci(hcd);
3227 vdev = xhci->devs[udev->slot_id];
3229 /* Set up a configure endpoint command to remove the streams rings */
3230 spin_lock_irqsave(&xhci->lock, flags);
3231 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3232 udev, eps, num_eps);
3233 if (changed_ep_bitmask == 0) {
3234 spin_unlock_irqrestore(&xhci->lock, flags);
3238 /* Use the xhci_command structure from the first endpoint. We may have
3239 * allocated too many, but the driver may call xhci_free_streams() for
3240 * each endpoint it grouped into one call to xhci_alloc_streams().
3242 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3243 command = vdev->eps[ep_index].stream_info->free_streams_command;
3244 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3246 spin_unlock_irqrestore(&xhci->lock, flags);
3247 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3252 for (i = 0; i < num_eps; i++) {
3253 struct xhci_ep_ctx *ep_ctx;
3255 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3256 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3257 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3258 EP_GETTING_NO_STREAMS;
3260 xhci_endpoint_copy(xhci, command->in_ctx,
3261 vdev->out_ctx, ep_index);
3262 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3263 &vdev->eps[ep_index]);
3265 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3266 vdev->out_ctx, ctrl_ctx,
3267 changed_ep_bitmask, changed_ep_bitmask);
3268 spin_unlock_irqrestore(&xhci->lock, flags);
3270 /* Issue and wait for the configure endpoint command,
3271 * which must succeed.
3273 ret = xhci_configure_endpoint(xhci, udev, command,
3276 /* xHC rejected the configure endpoint command for some reason, so we
3277 * leave the streams rings intact.
3282 spin_lock_irqsave(&xhci->lock, flags);
3283 for (i = 0; i < num_eps; i++) {
3284 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3285 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3286 vdev->eps[ep_index].stream_info = NULL;
3287 /* FIXME Unset maxPstreams in endpoint context and
3288 * update deq ptr to point to normal string ring.
3290 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3291 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3293 spin_unlock_irqrestore(&xhci->lock, flags);
3299 * Deletes endpoint resources for endpoints that were active before a Reset
3300 * Device command, or a Disable Slot command. The Reset Device command leaves
3301 * the control endpoint intact, whereas the Disable Slot command deletes it.
3303 * Must be called with xhci->lock held.
3305 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3306 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3309 unsigned int num_dropped_eps = 0;
3310 unsigned int drop_flags = 0;
3312 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3313 if (virt_dev->eps[i].ring) {
3314 drop_flags |= 1 << i;
3318 xhci->num_active_eps -= num_dropped_eps;
3319 if (num_dropped_eps)
3320 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3321 "Dropped %u ep ctxs, flags = 0x%x, "
3323 num_dropped_eps, drop_flags,
3324 xhci->num_active_eps);
3328 * This submits a Reset Device Command, which will set the device state to 0,
3329 * set the device address to 0, and disable all the endpoints except the default
3330 * control endpoint. The USB core should come back and call
3331 * xhci_address_device(), and then re-set up the configuration. If this is
3332 * called because of a usb_reset_and_verify_device(), then the old alternate
3333 * settings will be re-installed through the normal bandwidth allocation
3336 * Wait for the Reset Device command to finish. Remove all structures
3337 * associated with the endpoints that were disabled. Clear the input device
3338 * structure? Reset the control endpoint 0 max packet size?
3340 * If the virt_dev to be reset does not exist or does not match the udev,
3341 * it means the device is lost, possibly due to the xHC restore error and
3342 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3343 * re-allocate the device.
3345 static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
3346 struct usb_device *udev)
3349 unsigned long flags;
3350 struct xhci_hcd *xhci;
3351 unsigned int slot_id;
3352 struct xhci_virt_device *virt_dev;
3353 struct xhci_command *reset_device_cmd;
3354 int last_freed_endpoint;
3355 struct xhci_slot_ctx *slot_ctx;
3356 int old_active_eps = 0;
3358 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3361 xhci = hcd_to_xhci(hcd);
3362 slot_id = udev->slot_id;
3363 virt_dev = xhci->devs[slot_id];
3365 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3366 "not exist. Re-allocate the device\n", slot_id);
3367 ret = xhci_alloc_dev(hcd, udev);
3374 if (virt_dev->tt_info)
3375 old_active_eps = virt_dev->tt_info->active_eps;
3377 if (virt_dev->udev != udev) {
3378 /* If the virt_dev and the udev does not match, this virt_dev
3379 * may belong to another udev.
3380 * Re-allocate the device.
3382 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3383 "not match the udev. Re-allocate the device\n",
3385 ret = xhci_alloc_dev(hcd, udev);
3392 /* If device is not setup, there is no point in resetting it */
3393 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3394 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3395 SLOT_STATE_DISABLED)
3398 trace_xhci_discover_or_reset_device(slot_ctx);
3400 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3401 /* Allocate the command structure that holds the struct completion.
3402 * Assume we're in process context, since the normal device reset
3403 * process has to wait for the device anyway. Storage devices are
3404 * reset as part of error handling, so use GFP_NOIO instead of
3407 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3408 if (!reset_device_cmd) {
3409 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3413 /* Attempt to submit the Reset Device command to the command ring */
3414 spin_lock_irqsave(&xhci->lock, flags);
3416 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3418 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3419 spin_unlock_irqrestore(&xhci->lock, flags);
3420 goto command_cleanup;
3422 xhci_ring_cmd_db(xhci);
3423 spin_unlock_irqrestore(&xhci->lock, flags);
3425 /* Wait for the Reset Device command to finish */
3426 wait_for_completion(reset_device_cmd->completion);
3428 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3429 * unless we tried to reset a slot ID that wasn't enabled,
3430 * or the device wasn't in the addressed or configured state.
3432 ret = reset_device_cmd->status;
3434 case COMP_COMMAND_ABORTED:
3435 case COMP_COMMAND_RING_STOPPED:
3436 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3438 goto command_cleanup;
3439 case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
3440 case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
3441 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3443 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3444 xhci_dbg(xhci, "Not freeing device rings.\n");
3445 /* Don't treat this as an error. May change my mind later. */
3447 goto command_cleanup;
3449 xhci_dbg(xhci, "Successful reset device command.\n");
3452 if (xhci_is_vendor_info_code(xhci, ret))
3454 xhci_warn(xhci, "Unknown completion code %u for "
3455 "reset device command.\n", ret);
3457 goto command_cleanup;
3460 /* Free up host controller endpoint resources */
3461 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3462 spin_lock_irqsave(&xhci->lock, flags);
3463 /* Don't delete the default control endpoint resources */
3464 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3465 spin_unlock_irqrestore(&xhci->lock, flags);
3468 /* Everything but endpoint 0 is disabled, so free the rings. */
3469 last_freed_endpoint = 1;
3470 for (i = 1; i < 31; i++) {
3471 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3473 if (ep->ep_state & EP_HAS_STREAMS) {
3474 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3475 xhci_get_endpoint_address(i));
3476 xhci_free_stream_info(xhci, ep->stream_info);
3477 ep->stream_info = NULL;
3478 ep->ep_state &= ~EP_HAS_STREAMS;
3482 xhci_free_endpoint_ring(xhci, virt_dev, i);
3483 last_freed_endpoint = i;
3485 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3486 xhci_drop_ep_from_interval_table(xhci,
3487 &virt_dev->eps[i].bw_info,
3492 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3494 /* If necessary, update the number of active TTs on this root port */
3495 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3499 xhci_free_command(xhci, reset_device_cmd);
3504 * At this point, the struct usb_device is about to go away, the device has
3505 * disconnected, and all traffic has been stopped and the endpoints have been
3506 * disabled. Free any HC data structures associated with that device.
3508 static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3510 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3511 struct xhci_virt_device *virt_dev;
3512 struct xhci_slot_ctx *slot_ctx;
3514 struct xhci_command *command;
3516 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3520 #ifndef CONFIG_USB_DEFAULT_PERSIST
3522 * We called pm_runtime_get_noresume when the device was attached.
3523 * Decrement the counter here to allow controller to runtime suspend
3524 * if no devices remain.
3526 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3527 pm_runtime_put_noidle(hcd->self.controller);
3530 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3531 /* If the host is halted due to driver unload, we still need to free the
3534 if (ret <= 0 && ret != -ENODEV) {
3539 virt_dev = xhci->devs[udev->slot_id];
3540 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3541 trace_xhci_free_dev(slot_ctx);
3543 /* Stop any wayward timer functions (which may grab the lock) */
3544 for (i = 0; i < 31; i++) {
3545 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
3546 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3549 xhci_disable_slot(xhci, command, udev->slot_id);
3551 * Event command completion handler will free any data structures
3552 * associated with the slot. XXX Can free sleep?
3556 int xhci_disable_slot(struct xhci_hcd *xhci, struct xhci_command *command,
3559 unsigned long flags;
3562 struct xhci_virt_device *virt_dev;
3564 virt_dev = xhci->devs[slot_id];
3568 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3572 spin_lock_irqsave(&xhci->lock, flags);
3573 /* Don't disable the slot if the host controller is dead. */
3574 state = readl(&xhci->op_regs->status);
3575 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3576 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3577 xhci_free_virt_device(xhci, slot_id);
3578 spin_unlock_irqrestore(&xhci->lock, flags);
3583 ret = xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3586 spin_unlock_irqrestore(&xhci->lock, flags);
3587 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3590 xhci_ring_cmd_db(xhci);
3591 spin_unlock_irqrestore(&xhci->lock, flags);
3596 * Checks if we have enough host controller resources for the default control
3599 * Must be called with xhci->lock held.
3601 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3603 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3604 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3605 "Not enough ep ctxs: "
3606 "%u active, need to add 1, limit is %u.",
3607 xhci->num_active_eps, xhci->limit_active_eps);
3610 xhci->num_active_eps += 1;
3611 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3612 "Adding 1 ep ctx, %u now active.",
3613 xhci->num_active_eps);
3619 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3620 * timed out, or allocating memory failed. Returns 1 on success.
3622 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3624 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3625 struct xhci_virt_device *vdev;
3626 struct xhci_slot_ctx *slot_ctx;
3627 unsigned long flags;
3629 struct xhci_command *command;
3631 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3635 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3636 mutex_lock(&xhci->mutex);
3637 spin_lock_irqsave(&xhci->lock, flags);
3638 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3640 spin_unlock_irqrestore(&xhci->lock, flags);
3641 mutex_unlock(&xhci->mutex);
3642 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3643 xhci_free_command(xhci, command);
3646 xhci_ring_cmd_db(xhci);
3647 spin_unlock_irqrestore(&xhci->lock, flags);
3649 wait_for_completion(command->completion);
3650 slot_id = command->slot_id;
3651 mutex_unlock(&xhci->mutex);
3653 if (!slot_id || command->status != COMP_SUCCESS) {
3654 xhci_err(xhci, "Error while assigning device slot ID\n");
3655 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3657 readl(&xhci->cap_regs->hcs_params1)));
3658 xhci_free_command(xhci, command);
3662 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3663 spin_lock_irqsave(&xhci->lock, flags);
3664 ret = xhci_reserve_host_control_ep_resources(xhci);
3666 spin_unlock_irqrestore(&xhci->lock, flags);
3667 xhci_warn(xhci, "Not enough host resources, "
3668 "active endpoint contexts = %u\n",
3669 xhci->num_active_eps);
3672 spin_unlock_irqrestore(&xhci->lock, flags);
3674 /* Use GFP_NOIO, since this function can be called from
3675 * xhci_discover_or_reset_device(), which may be called as part of
3676 * mass storage driver error handling.
3678 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3679 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3682 vdev = xhci->devs[slot_id];
3683 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
3684 trace_xhci_alloc_dev(slot_ctx);
3686 udev->slot_id = slot_id;
3688 #ifndef CONFIG_USB_DEFAULT_PERSIST
3690 * If resetting upon resume, we can't put the controller into runtime
3691 * suspend if there is a device attached.
3693 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3694 pm_runtime_get_noresume(hcd->self.controller);
3698 xhci_free_command(xhci, command);
3699 /* Is this a LS or FS device under a HS hub? */
3700 /* Hub or peripherial? */
3704 /* Disable slot, if we can do it without mem alloc */
3705 kfree(command->completion);
3706 command->completion = NULL;
3707 command->status = 0;
3708 return xhci_disable_slot(xhci, command, udev->slot_id);
3712 * Issue an Address Device command and optionally send a corresponding
3713 * SetAddress request to the device.
3715 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3716 enum xhci_setup_dev setup)
3718 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3719 unsigned long flags;
3720 struct xhci_virt_device *virt_dev;
3722 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3723 struct xhci_slot_ctx *slot_ctx;
3724 struct xhci_input_control_ctx *ctrl_ctx;
3726 struct xhci_command *command = NULL;
3728 mutex_lock(&xhci->mutex);
3730 if (xhci->xhc_state) { /* dying, removing or halted */
3735 if (!udev->slot_id) {
3736 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3737 "Bad Slot ID %d", udev->slot_id);
3742 virt_dev = xhci->devs[udev->slot_id];
3744 if (WARN_ON(!virt_dev)) {
3746 * In plug/unplug torture test with an NEC controller,
3747 * a zero-dereference was observed once due to virt_dev = 0.
3748 * Print useful debug rather than crash if it is observed again!
3750 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3755 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3756 trace_xhci_setup_device_slot(slot_ctx);
3758 if (setup == SETUP_CONTEXT_ONLY) {
3759 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3760 SLOT_STATE_DEFAULT) {
3761 xhci_dbg(xhci, "Slot already in default state\n");
3766 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3772 command->in_ctx = virt_dev->in_ctx;
3774 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3775 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3777 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3783 * If this is the first Set Address since device plug-in or
3784 * virt_device realloaction after a resume with an xHCI power loss,
3785 * then set up the slot context.
3787 if (!slot_ctx->dev_info)
3788 xhci_setup_addressable_virt_dev(xhci, udev);
3789 /* Otherwise, update the control endpoint ring enqueue pointer. */
3791 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3792 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3793 ctrl_ctx->drop_flags = 0;
3795 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3796 le32_to_cpu(slot_ctx->dev_info) >> 27);
3798 spin_lock_irqsave(&xhci->lock, flags);
3799 trace_xhci_setup_device(virt_dev);
3800 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3801 udev->slot_id, setup);
3803 spin_unlock_irqrestore(&xhci->lock, flags);
3804 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3805 "FIXME: allocate a command ring segment");
3808 xhci_ring_cmd_db(xhci);
3809 spin_unlock_irqrestore(&xhci->lock, flags);
3811 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3812 wait_for_completion(command->completion);
3814 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3815 * the SetAddress() "recovery interval" required by USB and aborting the
3816 * command on a timeout.
3818 switch (command->status) {
3819 case COMP_COMMAND_ABORTED:
3820 case COMP_COMMAND_RING_STOPPED:
3821 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3824 case COMP_CONTEXT_STATE_ERROR:
3825 case COMP_SLOT_NOT_ENABLED_ERROR:
3826 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3827 act, udev->slot_id);
3830 case COMP_USB_TRANSACTION_ERROR:
3831 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3834 case COMP_INCOMPATIBLE_DEVICE_ERROR:
3835 dev_warn(&udev->dev,
3836 "ERROR: Incompatible device for setup %s command\n", act);
3840 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3841 "Successful setup %s command", act);
3845 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3846 act, command->status);
3847 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3853 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3854 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3855 "Op regs DCBAA ptr = %#016llx", temp_64);
3856 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3857 "Slot ID %d dcbaa entry @%p = %#016llx",
3859 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3860 (unsigned long long)
3861 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3862 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3863 "Output Context DMA address = %#08llx",
3864 (unsigned long long)virt_dev->out_ctx->dma);
3865 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3866 le32_to_cpu(slot_ctx->dev_info) >> 27);
3868 * USB core uses address 1 for the roothubs, so we add one to the
3869 * address given back to us by the HC.
3871 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3872 le32_to_cpu(slot_ctx->dev_info) >> 27);
3873 /* Zero the input context control for later use */
3874 ctrl_ctx->add_flags = 0;
3875 ctrl_ctx->drop_flags = 0;
3877 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3878 "Internal device address = %d",
3879 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3881 mutex_unlock(&xhci->mutex);
3883 kfree(command->completion);
3889 static int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3891 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3894 static int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3896 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3900 * Transfer the port index into real index in the HW port status
3901 * registers. Caculate offset between the port's PORTSC register
3902 * and port status base. Divide the number of per port register
3903 * to get the real index. The raw port number bases 1.
3905 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3907 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3908 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3909 __le32 __iomem *addr;
3912 if (hcd->speed < HCD_USB3)
3913 addr = xhci->usb2_ports[port1 - 1];
3915 addr = xhci->usb3_ports[port1 - 1];
3917 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3922 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3923 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3925 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3926 struct usb_device *udev, u16 max_exit_latency)
3928 struct xhci_virt_device *virt_dev;
3929 struct xhci_command *command;
3930 struct xhci_input_control_ctx *ctrl_ctx;
3931 struct xhci_slot_ctx *slot_ctx;
3932 unsigned long flags;
3935 spin_lock_irqsave(&xhci->lock, flags);
3937 virt_dev = xhci->devs[udev->slot_id];
3940 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3941 * xHC was re-initialized. Exit latency will be set later after
3942 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3945 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3946 spin_unlock_irqrestore(&xhci->lock, flags);
3950 /* Attempt to issue an Evaluate Context command to change the MEL. */
3951 command = xhci->lpm_command;
3952 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3954 spin_unlock_irqrestore(&xhci->lock, flags);
3955 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3960 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3961 spin_unlock_irqrestore(&xhci->lock, flags);
3963 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3964 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3965 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3966 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3967 slot_ctx->dev_state = 0;
3969 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3970 "Set up evaluate context for LPM MEL change.");
3972 /* Issue and wait for the evaluate context command. */
3973 ret = xhci_configure_endpoint(xhci, udev, command,
3977 spin_lock_irqsave(&xhci->lock, flags);
3978 virt_dev->current_mel = max_exit_latency;
3979 spin_unlock_irqrestore(&xhci->lock, flags);
3986 /* BESL to HIRD Encoding array for USB2 LPM */
3987 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3988 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3990 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3991 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3992 struct usb_device *udev)
3994 int u2del, besl, besl_host;
3995 int besl_device = 0;
3998 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3999 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4001 if (field & USB_BESL_SUPPORT) {
4002 for (besl_host = 0; besl_host < 16; besl_host++) {
4003 if (xhci_besl_encoding[besl_host] >= u2del)
4006 /* Use baseline BESL value as default */
4007 if (field & USB_BESL_BASELINE_VALID)
4008 besl_device = USB_GET_BESL_BASELINE(field);
4009 else if (field & USB_BESL_DEEP_VALID)
4010 besl_device = USB_GET_BESL_DEEP(field);
4015 besl_host = (u2del - 51) / 75 + 1;
4018 besl = besl_host + besl_device;
4025 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4026 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4033 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4035 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4036 l1 = udev->l1_params.timeout / 256;
4038 /* device has preferred BESLD */
4039 if (field & USB_BESL_DEEP_VALID) {
4040 besld = USB_GET_BESL_DEEP(field);
4044 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4047 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4048 struct usb_device *udev, int enable)
4050 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4051 __le32 __iomem **port_array;
4052 __le32 __iomem *pm_addr, *hlpm_addr;
4053 u32 pm_val, hlpm_val, field;
4054 unsigned int port_num;
4055 unsigned long flags;
4056 int hird, exit_latency;
4059 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4063 if (!udev->parent || udev->parent->parent ||
4064 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4067 if (udev->usb2_hw_lpm_capable != 1)
4070 spin_lock_irqsave(&xhci->lock, flags);
4072 port_array = xhci->usb2_ports;
4073 port_num = udev->portnum - 1;
4074 pm_addr = port_array[port_num] + PORTPMSC;
4075 pm_val = readl(pm_addr);
4076 hlpm_addr = port_array[port_num] + PORTHLPMC;
4077 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4079 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4080 enable ? "enable" : "disable", port_num + 1);
4083 /* Host supports BESL timeout instead of HIRD */
4084 if (udev->usb2_hw_lpm_besl_capable) {
4085 /* if device doesn't have a preferred BESL value use a
4086 * default one which works with mixed HIRD and BESL
4087 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4089 if ((field & USB_BESL_SUPPORT) &&
4090 (field & USB_BESL_BASELINE_VALID))
4091 hird = USB_GET_BESL_BASELINE(field);
4093 hird = udev->l1_params.besl;
4095 exit_latency = xhci_besl_encoding[hird];
4096 spin_unlock_irqrestore(&xhci->lock, flags);
4098 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4099 * input context for link powermanagement evaluate
4100 * context commands. It is protected by hcd->bandwidth
4101 * mutex and is shared by all devices. We need to set
4102 * the max ext latency in USB 2 BESL LPM as well, so
4103 * use the same mutex and xhci_change_max_exit_latency()
4105 mutex_lock(hcd->bandwidth_mutex);
4106 ret = xhci_change_max_exit_latency(xhci, udev,
4108 mutex_unlock(hcd->bandwidth_mutex);
4112 spin_lock_irqsave(&xhci->lock, flags);
4114 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4115 writel(hlpm_val, hlpm_addr);
4119 hird = xhci_calculate_hird_besl(xhci, udev);
4122 pm_val &= ~PORT_HIRD_MASK;
4123 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4124 writel(pm_val, pm_addr);
4125 pm_val = readl(pm_addr);
4127 writel(pm_val, pm_addr);
4131 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4132 writel(pm_val, pm_addr);
4135 if (udev->usb2_hw_lpm_besl_capable) {
4136 spin_unlock_irqrestore(&xhci->lock, flags);
4137 mutex_lock(hcd->bandwidth_mutex);
4138 xhci_change_max_exit_latency(xhci, udev, 0);
4139 mutex_unlock(hcd->bandwidth_mutex);
4144 spin_unlock_irqrestore(&xhci->lock, flags);
4148 /* check if a usb2 port supports a given extened capability protocol
4149 * only USB2 ports extended protocol capability values are cached.
4150 * Return 1 if capability is supported
4152 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4153 unsigned capability)
4155 u32 port_offset, port_count;
4158 for (i = 0; i < xhci->num_ext_caps; i++) {
4159 if (xhci->ext_caps[i] & capability) {
4160 /* port offsets starts at 1 */
4161 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4162 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4163 if (port >= port_offset &&
4164 port < port_offset + port_count)
4171 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4173 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4174 int portnum = udev->portnum - 1;
4176 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4180 /* we only support lpm for non-hub device connected to root hub yet */
4181 if (!udev->parent || udev->parent->parent ||
4182 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4185 if (xhci->hw_lpm_support == 1 &&
4186 xhci_check_usb2_port_capability(
4187 xhci, portnum, XHCI_HLC)) {
4188 udev->usb2_hw_lpm_capable = 1;
4189 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4190 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4191 if (xhci_check_usb2_port_capability(xhci, portnum,
4193 udev->usb2_hw_lpm_besl_capable = 1;
4199 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4201 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4202 static unsigned long long xhci_service_interval_to_ns(
4203 struct usb_endpoint_descriptor *desc)
4205 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4208 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4209 enum usb3_link_state state)
4211 unsigned long long sel;
4212 unsigned long long pel;
4213 unsigned int max_sel_pel;
4218 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4219 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4220 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4221 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4225 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4226 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4227 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4231 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4233 return USB3_LPM_DISABLED;
4236 if (sel <= max_sel_pel && pel <= max_sel_pel)
4237 return USB3_LPM_DEVICE_INITIATED;
4239 if (sel > max_sel_pel)
4240 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4241 "due to long SEL %llu ms\n",
4244 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4245 "due to long PEL %llu ms\n",
4247 return USB3_LPM_DISABLED;
4250 /* The U1 timeout should be the maximum of the following values:
4251 * - For control endpoints, U1 system exit latency (SEL) * 3
4252 * - For bulk endpoints, U1 SEL * 5
4253 * - For interrupt endpoints:
4254 * - Notification EPs, U1 SEL * 3
4255 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4256 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4258 static unsigned long long xhci_calculate_intel_u1_timeout(
4259 struct usb_device *udev,
4260 struct usb_endpoint_descriptor *desc)
4262 unsigned long long timeout_ns;
4266 ep_type = usb_endpoint_type(desc);
4268 case USB_ENDPOINT_XFER_CONTROL:
4269 timeout_ns = udev->u1_params.sel * 3;
4271 case USB_ENDPOINT_XFER_BULK:
4272 timeout_ns = udev->u1_params.sel * 5;
4274 case USB_ENDPOINT_XFER_INT:
4275 intr_type = usb_endpoint_interrupt_type(desc);
4276 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4277 timeout_ns = udev->u1_params.sel * 3;
4280 /* Otherwise the calculation is the same as isoc eps */
4281 case USB_ENDPOINT_XFER_ISOC:
4282 timeout_ns = xhci_service_interval_to_ns(desc);
4283 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4284 if (timeout_ns < udev->u1_params.sel * 2)
4285 timeout_ns = udev->u1_params.sel * 2;
4294 /* Returns the hub-encoded U1 timeout value. */
4295 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4296 struct usb_device *udev,
4297 struct usb_endpoint_descriptor *desc)
4299 unsigned long long timeout_ns;
4301 if (xhci->quirks & XHCI_INTEL_HOST)
4302 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4304 timeout_ns = udev->u1_params.sel;
4306 /* The U1 timeout is encoded in 1us intervals.
4307 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4309 if (timeout_ns == USB3_LPM_DISABLED)
4312 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4314 /* If the necessary timeout value is bigger than what we can set in the
4315 * USB 3.0 hub, we have to disable hub-initiated U1.
4317 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4319 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4320 "due to long timeout %llu ms\n", timeout_ns);
4321 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4324 /* The U2 timeout should be the maximum of:
4325 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4326 * - largest bInterval of any active periodic endpoint (to avoid going
4327 * into lower power link states between intervals).
4328 * - the U2 Exit Latency of the device
4330 static unsigned long long xhci_calculate_intel_u2_timeout(
4331 struct usb_device *udev,
4332 struct usb_endpoint_descriptor *desc)
4334 unsigned long long timeout_ns;
4335 unsigned long long u2_del_ns;
4337 timeout_ns = 10 * 1000 * 1000;
4339 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4340 (xhci_service_interval_to_ns(desc) > timeout_ns))
4341 timeout_ns = xhci_service_interval_to_ns(desc);
4343 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4344 if (u2_del_ns > timeout_ns)
4345 timeout_ns = u2_del_ns;
4350 /* Returns the hub-encoded U2 timeout value. */
4351 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4352 struct usb_device *udev,
4353 struct usb_endpoint_descriptor *desc)
4355 unsigned long long timeout_ns;
4357 if (xhci->quirks & XHCI_INTEL_HOST)
4358 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4360 timeout_ns = udev->u2_params.sel;
4362 /* The U2 timeout is encoded in 256us intervals */
4363 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4364 /* If the necessary timeout value is bigger than what we can set in the
4365 * USB 3.0 hub, we have to disable hub-initiated U2.
4367 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4369 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4370 "due to long timeout %llu ms\n", timeout_ns);
4371 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4374 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4375 struct usb_device *udev,
4376 struct usb_endpoint_descriptor *desc,
4377 enum usb3_link_state state,
4380 if (state == USB3_LPM_U1)
4381 return xhci_calculate_u1_timeout(xhci, udev, desc);
4382 else if (state == USB3_LPM_U2)
4383 return xhci_calculate_u2_timeout(xhci, udev, desc);
4385 return USB3_LPM_DISABLED;
4388 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4389 struct usb_device *udev,
4390 struct usb_endpoint_descriptor *desc,
4391 enum usb3_link_state state,
4396 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4397 desc, state, timeout);
4399 /* If we found we can't enable hub-initiated LPM, or
4400 * the U1 or U2 exit latency was too high to allow
4401 * device-initiated LPM as well, just stop searching.
4403 if (alt_timeout == USB3_LPM_DISABLED ||
4404 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4405 *timeout = alt_timeout;
4408 if (alt_timeout > *timeout)
4409 *timeout = alt_timeout;
4413 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4414 struct usb_device *udev,
4415 struct usb_host_interface *alt,
4416 enum usb3_link_state state,
4421 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4422 if (xhci_update_timeout_for_endpoint(xhci, udev,
4423 &alt->endpoint[j].desc, state, timeout))
4430 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4431 enum usb3_link_state state)
4433 struct usb_device *parent;
4434 unsigned int num_hubs;
4436 if (state == USB3_LPM_U2)
4439 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4440 for (parent = udev->parent, num_hubs = 0; parent->parent;
4441 parent = parent->parent)
4447 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4448 " below second-tier hub.\n");
4449 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4450 "to decrease power consumption.\n");
4454 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4455 struct usb_device *udev,
4456 enum usb3_link_state state)
4458 if (xhci->quirks & XHCI_INTEL_HOST)
4459 return xhci_check_intel_tier_policy(udev, state);
4464 /* Returns the U1 or U2 timeout that should be enabled.
4465 * If the tier check or timeout setting functions return with a non-zero exit
4466 * code, that means the timeout value has been finalized and we shouldn't look
4467 * at any more endpoints.
4469 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4470 struct usb_device *udev, enum usb3_link_state state)
4472 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4473 struct usb_host_config *config;
4476 u16 timeout = USB3_LPM_DISABLED;
4478 if (state == USB3_LPM_U1)
4480 else if (state == USB3_LPM_U2)
4483 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4488 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4491 /* Gather some information about the currently installed configuration
4492 * and alternate interface settings.
4494 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4498 config = udev->actconfig;
4502 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4503 struct usb_driver *driver;
4504 struct usb_interface *intf = config->interface[i];
4509 /* Check if any currently bound drivers want hub-initiated LPM
4512 if (intf->dev.driver) {
4513 driver = to_usb_driver(intf->dev.driver);
4514 if (driver && driver->disable_hub_initiated_lpm) {
4515 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4516 "at request of driver %s\n",
4517 state_name, driver->name);
4518 return xhci_get_timeout_no_hub_lpm(udev, state);
4522 /* Not sure how this could happen... */
4523 if (!intf->cur_altsetting)
4526 if (xhci_update_timeout_for_interface(xhci, udev,
4527 intf->cur_altsetting,
4534 static int calculate_max_exit_latency(struct usb_device *udev,
4535 enum usb3_link_state state_changed,
4536 u16 hub_encoded_timeout)
4538 unsigned long long u1_mel_us = 0;
4539 unsigned long long u2_mel_us = 0;
4540 unsigned long long mel_us = 0;
4546 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4547 hub_encoded_timeout == USB3_LPM_DISABLED);
4548 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4549 hub_encoded_timeout == USB3_LPM_DISABLED);
4551 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4552 hub_encoded_timeout != USB3_LPM_DISABLED);
4553 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4554 hub_encoded_timeout != USB3_LPM_DISABLED);
4556 /* If U1 was already enabled and we're not disabling it,
4557 * or we're going to enable U1, account for the U1 max exit latency.
4559 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4561 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4562 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4564 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4566 if (u1_mel_us > u2_mel_us)
4570 /* xHCI host controller max exit latency field is only 16 bits wide. */
4571 if (mel_us > MAX_EXIT) {
4572 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4573 "is too big.\n", mel_us);
4579 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4580 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4581 struct usb_device *udev, enum usb3_link_state state)
4583 struct xhci_hcd *xhci;
4584 u16 hub_encoded_timeout;
4588 xhci = hcd_to_xhci(hcd);
4589 /* The LPM timeout values are pretty host-controller specific, so don't
4590 * enable hub-initiated timeouts unless the vendor has provided
4591 * information about their timeout algorithm.
4593 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4594 !xhci->devs[udev->slot_id])
4595 return USB3_LPM_DISABLED;
4597 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4598 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4600 /* Max Exit Latency is too big, disable LPM. */
4601 hub_encoded_timeout = USB3_LPM_DISABLED;
4605 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4608 return hub_encoded_timeout;
4611 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4612 struct usb_device *udev, enum usb3_link_state state)
4614 struct xhci_hcd *xhci;
4617 xhci = hcd_to_xhci(hcd);
4618 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4619 !xhci->devs[udev->slot_id])
4622 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4623 return xhci_change_max_exit_latency(xhci, udev, mel);
4625 #else /* CONFIG_PM */
4627 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4628 struct usb_device *udev, int enable)
4633 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4638 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4639 struct usb_device *udev, enum usb3_link_state state)
4641 return USB3_LPM_DISABLED;
4644 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4645 struct usb_device *udev, enum usb3_link_state state)
4649 #endif /* CONFIG_PM */
4651 /*-------------------------------------------------------------------------*/
4653 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4654 * internal data structures for the device.
4656 static int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4657 struct usb_tt *tt, gfp_t mem_flags)
4659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4660 struct xhci_virt_device *vdev;
4661 struct xhci_command *config_cmd;
4662 struct xhci_input_control_ctx *ctrl_ctx;
4663 struct xhci_slot_ctx *slot_ctx;
4664 unsigned long flags;
4665 unsigned think_time;
4668 /* Ignore root hubs */
4672 vdev = xhci->devs[hdev->slot_id];
4674 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4678 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4682 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4684 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4686 xhci_free_command(xhci, config_cmd);
4690 spin_lock_irqsave(&xhci->lock, flags);
4691 if (hdev->speed == USB_SPEED_HIGH &&
4692 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4693 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4694 xhci_free_command(xhci, config_cmd);
4695 spin_unlock_irqrestore(&xhci->lock, flags);
4699 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4700 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4701 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4702 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4704 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4705 * but it may be already set to 1 when setup an xHCI virtual
4706 * device, so clear it anyway.
4709 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4710 else if (hdev->speed == USB_SPEED_FULL)
4711 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4713 if (xhci->hci_version > 0x95) {
4714 xhci_dbg(xhci, "xHCI version %x needs hub "
4715 "TT think time and number of ports\n",
4716 (unsigned int) xhci->hci_version);
4717 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4718 /* Set TT think time - convert from ns to FS bit times.
4719 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4720 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4722 * xHCI 1.0: this field shall be 0 if the device is not a
4725 think_time = tt->think_time;
4726 if (think_time != 0)
4727 think_time = (think_time / 666) - 1;
4728 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4729 slot_ctx->tt_info |=
4730 cpu_to_le32(TT_THINK_TIME(think_time));
4732 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4733 "TT think time or number of ports\n",
4734 (unsigned int) xhci->hci_version);
4736 slot_ctx->dev_state = 0;
4737 spin_unlock_irqrestore(&xhci->lock, flags);
4739 xhci_dbg(xhci, "Set up %s for hub device.\n",
4740 (xhci->hci_version > 0x95) ?
4741 "configure endpoint" : "evaluate context");
4743 /* Issue and wait for the configure endpoint or
4744 * evaluate context command.
4746 if (xhci->hci_version > 0x95)
4747 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4750 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4753 xhci_free_command(xhci, config_cmd);
4757 static int xhci_get_frame(struct usb_hcd *hcd)
4759 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4760 /* EHCI mods by the periodic size. Why? */
4761 return readl(&xhci->run_regs->microframe_index) >> 3;
4764 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4766 struct xhci_hcd *xhci;
4768 * TODO: Check with DWC3 clients for sysdev according to
4771 struct device *dev = hcd->self.sysdev;
4774 /* Accept arbitrarily long scatter-gather lists */
4775 hcd->self.sg_tablesize = ~0;
4777 /* support to build packet from discontinuous buffers */
4778 hcd->self.no_sg_constraint = 1;
4780 /* XHCI controllers don't stop the ep queue on short packets :| */
4781 hcd->self.no_stop_on_short = 1;
4783 xhci = hcd_to_xhci(hcd);
4785 if (usb_hcd_is_primary_hcd(hcd)) {
4786 xhci->main_hcd = hcd;
4787 /* Mark the first roothub as being USB 2.0.
4788 * The xHCI driver will register the USB 3.0 roothub.
4790 hcd->speed = HCD_USB2;
4791 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4793 * USB 2.0 roothub under xHCI has an integrated TT,
4794 * (rate matching hub) as opposed to having an OHCI/UHCI
4795 * companion controller.
4799 if (xhci->sbrn == 0x31) {
4800 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4801 hcd->speed = HCD_USB31;
4802 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
4804 /* xHCI private pointer was set in xhci_pci_probe for the second
4805 * registered roothub.
4810 mutex_init(&xhci->mutex);
4811 xhci->cap_regs = hcd->regs;
4812 xhci->op_regs = hcd->regs +
4813 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4814 xhci->run_regs = hcd->regs +
4815 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4816 /* Cache read-only capability registers */
4817 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4818 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4819 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4820 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4821 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4822 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4823 if (xhci->hci_version > 0x100)
4824 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4825 xhci_print_registers(xhci);
4827 xhci->quirks |= quirks;
4829 get_quirks(dev, xhci);
4831 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4832 * success event after a short transfer. This quirk will ignore such
4835 if (xhci->hci_version > 0x96)
4836 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4838 /* Make sure the HC is halted. */
4839 retval = xhci_halt(xhci);
4843 xhci_dbg(xhci, "Resetting HCD\n");
4844 /* Reset the internal HC memory state and registers. */
4845 retval = xhci_reset(xhci);
4848 xhci_dbg(xhci, "Reset complete\n");
4851 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4852 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4853 * address memory pointers actually. So, this driver clears the AC64
4854 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4855 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4857 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
4858 xhci->hcc_params &= ~BIT(0);
4860 /* Set dma_mask and coherent_dma_mask to 64-bits,
4861 * if xHC supports 64-bit addressing */
4862 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4863 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4864 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4865 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4868 * This is to avoid error in cases where a 32-bit USB
4869 * controller is used on a 64-bit capable system.
4871 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4874 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4875 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4878 xhci_dbg(xhci, "Calling HCD init\n");
4879 /* Initialize HCD and host controller data structures. */
4880 retval = xhci_init(hcd);
4883 xhci_dbg(xhci, "Called HCD init\n");
4885 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4886 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4890 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4892 static const struct hc_driver xhci_hc_driver = {
4893 .description = "xhci-hcd",
4894 .product_desc = "xHCI Host Controller",
4895 .hcd_priv_size = sizeof(struct xhci_hcd),
4898 * generic hardware linkage
4901 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4904 * basic lifecycle operations
4906 .reset = NULL, /* set in xhci_init_driver() */
4909 .shutdown = xhci_shutdown,
4912 * managing i/o requests and associated device resources
4914 .urb_enqueue = xhci_urb_enqueue,
4915 .urb_dequeue = xhci_urb_dequeue,
4916 .alloc_dev = xhci_alloc_dev,
4917 .free_dev = xhci_free_dev,
4918 .alloc_streams = xhci_alloc_streams,
4919 .free_streams = xhci_free_streams,
4920 .add_endpoint = xhci_add_endpoint,
4921 .drop_endpoint = xhci_drop_endpoint,
4922 .endpoint_reset = xhci_endpoint_reset,
4923 .check_bandwidth = xhci_check_bandwidth,
4924 .reset_bandwidth = xhci_reset_bandwidth,
4925 .address_device = xhci_address_device,
4926 .enable_device = xhci_enable_device,
4927 .update_hub_device = xhci_update_hub_device,
4928 .reset_device = xhci_discover_or_reset_device,
4931 * scheduling support
4933 .get_frame_number = xhci_get_frame,
4938 .hub_control = xhci_hub_control,
4939 .hub_status_data = xhci_hub_status_data,
4940 .bus_suspend = xhci_bus_suspend,
4941 .bus_resume = xhci_bus_resume,
4944 * call back when device connected and addressed
4946 .update_device = xhci_update_device,
4947 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4948 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4949 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4950 .find_raw_port_number = xhci_find_raw_port_number,
4953 void xhci_init_driver(struct hc_driver *drv,
4954 const struct xhci_driver_overrides *over)
4958 /* Copy the generic table to drv then apply the overrides */
4959 *drv = xhci_hc_driver;
4962 drv->hcd_priv_size += over->extra_priv_size;
4964 drv->reset = over->reset;
4966 drv->start = over->start;
4969 EXPORT_SYMBOL_GPL(xhci_init_driver);
4971 MODULE_DESCRIPTION(DRIVER_DESC);
4972 MODULE_AUTHOR(DRIVER_AUTHOR);
4973 MODULE_LICENSE("GPL");
4975 static int __init xhci_hcd_init(void)
4978 * Check the compiler generated sizes of structures that must be laid
4979 * out in specific ways for hardware access.
4981 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4982 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4983 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4984 /* xhci_device_control has eight fields, and also
4985 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4987 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4988 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4989 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4990 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
4991 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4992 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4993 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5002 * If an init function is provided, an exit function must also be provided
5003 * to allow module unload.
5005 static void __exit xhci_hcd_fini(void) { }
5007 module_init(xhci_hcd_init);
5008 module_exit(xhci_hcd_fini);