2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #include "xhci-debugfs.h"
37 #define DRIVER_AUTHOR "Sarah Sharp"
38 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
40 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
42 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
43 static int link_quirk;
44 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
45 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
47 static unsigned int quirks;
48 module_param(quirks, uint, S_IRUGO);
49 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
51 /* TODO: copied from ehci-hcd.c - can this be refactored? */
53 * xhci_handshake - spin reading hc until handshake completes or fails
54 * @ptr: address of hc register to be read
55 * @mask: bits to look at in result of read
56 * @done: value of those bits when handshake succeeds
57 * @usec: timeout in microseconds
59 * Returns negative errno, or zero on success
61 * Success happens when the "mask" bits have the specified value (hardware
62 * handshake done). There are two failure modes: "usec" have passed (major
63 * hardware flakeout), or the register reads as all-ones (hardware removed).
65 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
71 if (result == ~(u32)0) /* card removed */
83 * Disable interrupts and begin the xHCI halting process.
85 void xhci_quiesce(struct xhci_hcd *xhci)
92 halted = readl(&xhci->op_regs->status) & STS_HALT;
96 cmd = readl(&xhci->op_regs->command);
98 writel(cmd, &xhci->op_regs->command);
102 * Force HC into halt state.
104 * Disable any IRQs and clear the run/stop bit.
105 * HC will complete any current and actively pipelined transactions, and
106 * should halt within 16 ms of the run/stop bit being cleared.
107 * Read HC Halted bit in the status register to see when the HC is finished.
109 int xhci_halt(struct xhci_hcd *xhci)
112 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
115 ret = xhci_handshake(&xhci->op_regs->status,
116 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
118 xhci_warn(xhci, "Host halt failed, %d\n", ret);
121 xhci->xhc_state |= XHCI_STATE_HALTED;
122 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
127 * Set the run bit and wait for the host to be running.
129 int xhci_start(struct xhci_hcd *xhci)
134 temp = readl(&xhci->op_regs->command);
136 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
138 writel(temp, &xhci->op_regs->command);
141 * Wait for the HCHalted Status bit to be 0 to indicate the host is
144 ret = xhci_handshake(&xhci->op_regs->status,
145 STS_HALT, 0, XHCI_MAX_HALT_USEC);
146 if (ret == -ETIMEDOUT)
147 xhci_err(xhci, "Host took too long to start, "
148 "waited %u microseconds.\n",
151 /* clear state flags. Including dying, halted or removing */
160 * This resets pipelines, timers, counters, state machines, etc.
161 * Transactions will be terminated immediately, and operational registers
162 * will be set to their defaults.
164 int xhci_reset(struct xhci_hcd *xhci)
170 state = readl(&xhci->op_regs->status);
172 if (state == ~(u32)0) {
173 xhci_warn(xhci, "Host not accessible, reset failed.\n");
177 if ((state & STS_HALT) == 0) {
178 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
182 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
183 command = readl(&xhci->op_regs->command);
184 command |= CMD_RESET;
185 writel(command, &xhci->op_regs->command);
187 /* Existing Intel xHCI controllers require a delay of 1 mS,
188 * after setting the CMD_RESET bit, and before accessing any
189 * HC registers. This allows the HC to complete the
190 * reset operation and be ready for HC register access.
191 * Without this delay, the subsequent HC register access,
192 * may result in a system hang very rarely.
194 if (xhci->quirks & XHCI_INTEL_HOST)
197 ret = xhci_handshake(&xhci->op_regs->command,
198 CMD_RESET, 0, 10 * 1000 * 1000);
202 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
203 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller));
205 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
206 "Wait for controller to be ready for doorbell rings");
208 * xHCI cannot write to any doorbells or operational registers other
209 * than status until the "Controller Not Ready" flag is cleared.
211 ret = xhci_handshake(&xhci->op_regs->status,
212 STS_CNR, 0, 10 * 1000 * 1000);
214 for (i = 0; i < 2; i++) {
215 xhci->bus_state[i].port_c_suspend = 0;
216 xhci->bus_state[i].suspended_ports = 0;
217 xhci->bus_state[i].resuming_ports = 0;
224 #ifdef CONFIG_USB_PCI
228 static int xhci_setup_msi(struct xhci_hcd *xhci)
232 * TODO:Check with MSI Soc for sysdev
234 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
236 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
238 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
239 "failed to allocate MSI entry");
243 ret = request_irq(pdev->irq, xhci_msi_irq,
244 0, "xhci_hcd", xhci_to_hcd(xhci));
246 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
247 "disable MSI interrupt");
248 pci_free_irq_vectors(pdev);
257 static int xhci_setup_msix(struct xhci_hcd *xhci)
260 struct usb_hcd *hcd = xhci_to_hcd(xhci);
261 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
264 * calculate number of msi-x vectors supported.
265 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
266 * with max number of interrupters based on the xhci HCSPARAMS1.
267 * - num_online_cpus: maximum msi-x vectors per CPUs core.
268 * Add additional 1 vector to ensure always available interrupt.
270 xhci->msix_count = min(num_online_cpus() + 1,
271 HCS_MAX_INTRS(xhci->hcs_params1));
273 ret = pci_alloc_irq_vectors(pdev, xhci->msix_count, xhci->msix_count,
276 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
277 "Failed to enable MSI-X");
281 for (i = 0; i < xhci->msix_count; i++) {
282 ret = request_irq(pci_irq_vector(pdev, i), xhci_msi_irq, 0,
283 "xhci_hcd", xhci_to_hcd(xhci));
288 hcd->msix_enabled = 1;
292 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
294 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
295 pci_free_irq_vectors(pdev);
299 /* Free any IRQs and disable MSI-X */
300 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
302 struct usb_hcd *hcd = xhci_to_hcd(xhci);
303 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
305 if (xhci->quirks & XHCI_PLAT)
308 /* return if using legacy interrupt */
312 if (hcd->msix_enabled) {
315 for (i = 0; i < xhci->msix_count; i++)
316 free_irq(pci_irq_vector(pdev, i), xhci_to_hcd(xhci));
318 free_irq(pci_irq_vector(pdev, 0), xhci_to_hcd(xhci));
321 pci_free_irq_vectors(pdev);
322 hcd->msix_enabled = 0;
325 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
327 struct usb_hcd *hcd = xhci_to_hcd(xhci);
329 if (hcd->msix_enabled) {
330 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
333 for (i = 0; i < xhci->msix_count; i++)
334 synchronize_irq(pci_irq_vector(pdev, i));
338 static int xhci_try_enable_msi(struct usb_hcd *hcd)
340 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
341 struct pci_dev *pdev;
344 /* The xhci platform device has set up IRQs through usb_add_hcd. */
345 if (xhci->quirks & XHCI_PLAT)
348 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
350 * Some Fresco Logic host controllers advertise MSI, but fail to
351 * generate interrupts. Don't even try to enable MSI.
353 if (xhci->quirks & XHCI_BROKEN_MSI)
356 /* unregister the legacy interrupt */
358 free_irq(hcd->irq, hcd);
361 ret = xhci_setup_msix(xhci);
363 /* fall back to msi*/
364 ret = xhci_setup_msi(xhci);
367 hcd->msi_enabled = 1;
372 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
377 if (!strlen(hcd->irq_descr))
378 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
379 hcd->driver->description, hcd->self.busnum);
381 /* fall back to legacy interrupt*/
382 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
383 hcd->irq_descr, hcd);
385 xhci_err(xhci, "request interrupt %d failed\n",
389 hcd->irq = pdev->irq;
395 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
400 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
404 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
410 static void compliance_mode_recovery(unsigned long arg)
412 struct xhci_hcd *xhci;
417 xhci = (struct xhci_hcd *)arg;
419 for (i = 0; i < xhci->num_usb3_ports; i++) {
420 temp = readl(xhci->usb3_ports[i]);
421 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
423 * Compliance Mode Detected. Letting USB Core
424 * handle the Warm Reset
426 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
427 "Compliance mode detected->port %d",
429 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
430 "Attempting compliance mode recovery");
431 hcd = xhci->shared_hcd;
433 if (hcd->state == HC_STATE_SUSPENDED)
434 usb_hcd_resume_root_hub(hcd);
436 usb_hcd_poll_rh_status(hcd);
440 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
441 mod_timer(&xhci->comp_mode_recovery_timer,
442 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
446 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
447 * that causes ports behind that hardware to enter compliance mode sometimes.
448 * The quirk creates a timer that polls every 2 seconds the link state of
449 * each host controller's port and recovers it by issuing a Warm reset
450 * if Compliance mode is detected, otherwise the port will become "dead" (no
451 * device connections or disconnections will be detected anymore). Becasue no
452 * status event is generated when entering compliance mode (per xhci spec),
453 * this quirk is needed on systems that have the failing hardware installed.
455 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
457 xhci->port_status_u0 = 0;
458 setup_timer(&xhci->comp_mode_recovery_timer,
459 compliance_mode_recovery, (unsigned long)xhci);
460 xhci->comp_mode_recovery_timer.expires = jiffies +
461 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
463 add_timer(&xhci->comp_mode_recovery_timer);
464 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
465 "Compliance mode recovery timer initialized");
469 * This function identifies the systems that have installed the SN65LVPE502CP
470 * USB3.0 re-driver and that need the Compliance Mode Quirk.
472 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
474 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
476 const char *dmi_product_name, *dmi_sys_vendor;
478 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
479 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
480 if (!dmi_product_name || !dmi_sys_vendor)
483 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
486 if (strstr(dmi_product_name, "Z420") ||
487 strstr(dmi_product_name, "Z620") ||
488 strstr(dmi_product_name, "Z820") ||
489 strstr(dmi_product_name, "Z1 Workstation"))
495 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
497 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
502 * Initialize memory for HCD and xHC (one-time init).
504 * Program the PAGESIZE register, initialize the device context array, create
505 * device contexts (?), set up a command ring segment (or two?), create event
506 * ring (one for now).
508 static int xhci_init(struct usb_hcd *hcd)
510 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
513 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
514 spin_lock_init(&xhci->lock);
515 if (xhci->hci_version == 0x95 && link_quirk) {
516 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
517 "QUIRK: Not clearing Link TRB chain bits.");
518 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
520 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
521 "xHCI doesn't need link TRB QUIRK");
523 retval = xhci_mem_init(xhci, GFP_KERNEL);
524 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
526 /* Initializing Compliance Mode Recovery Data If Needed */
527 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
528 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
529 compliance_mode_recovery_timer_init(xhci);
535 /*-------------------------------------------------------------------------*/
538 static int xhci_run_finished(struct xhci_hcd *xhci)
540 if (xhci_start(xhci)) {
544 xhci->shared_hcd->state = HC_STATE_RUNNING;
545 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
547 if (xhci->quirks & XHCI_NEC_HOST)
548 xhci_ring_cmd_db(xhci);
550 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
551 "Finished xhci_run for USB3 roothub");
556 * Start the HC after it was halted.
558 * This function is called by the USB core when the HC driver is added.
559 * Its opposite is xhci_stop().
561 * xhci_init() must be called once before this function can be called.
562 * Reset the HC, enable device slot contexts, program DCBAAP, and
563 * set command ring pointer and event ring pointer.
565 * Setup MSI-X vectors and enable interrupts.
567 int xhci_run(struct usb_hcd *hcd)
572 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
574 /* Start the xHCI host controller running only after the USB 2.0 roothub
578 hcd->uses_new_polling = 1;
579 if (!usb_hcd_is_primary_hcd(hcd))
580 return xhci_run_finished(xhci);
582 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
584 ret = xhci_try_enable_msi(hcd);
588 xhci_dbg_cmd_ptrs(xhci);
590 xhci_dbg(xhci, "ERST memory map follows:\n");
591 xhci_dbg_erst(xhci, &xhci->erst);
592 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
593 temp_64 &= ~ERST_PTR_MASK;
594 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
595 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
597 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
598 "// Set the interrupt modulation register");
599 temp = readl(&xhci->ir_set->irq_control);
600 temp &= ~ER_IRQ_INTERVAL_MASK;
602 * the increment interval is 8 times as much as that defined
603 * in xHCI spec on MTK's controller
605 temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
606 writel(temp, &xhci->ir_set->irq_control);
608 /* Set the HCD state before we enable the irqs */
609 temp = readl(&xhci->op_regs->command);
611 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
612 "// Enable interrupts, cmd = 0x%x.", temp);
613 writel(temp, &xhci->op_regs->command);
615 temp = readl(&xhci->ir_set->irq_pending);
616 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
617 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
618 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
619 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
620 xhci_print_ir_set(xhci, 0);
622 if (xhci->quirks & XHCI_NEC_HOST) {
623 struct xhci_command *command;
625 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
629 ret = xhci_queue_vendor_command(xhci, command, 0, 0, 0,
630 TRB_TYPE(TRB_NEC_GET_FW));
632 xhci_free_command(xhci, command);
634 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
635 "Finished xhci_run for USB2 roothub");
637 xhci_debugfs_init(xhci);
641 EXPORT_SYMBOL_GPL(xhci_run);
646 * This function is called by the USB core when the HC driver is removed.
647 * Its opposite is xhci_run().
649 * Disable device contexts, disable IRQs, and quiesce the HC.
650 * Reset the HC, finish any completed transactions, and cleanup memory.
652 static void xhci_stop(struct usb_hcd *hcd)
655 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
657 mutex_lock(&xhci->mutex);
659 /* Only halt host and free memory after both hcds are removed */
660 if (!usb_hcd_is_primary_hcd(hcd)) {
661 /* usb core will free this hcd shortly, unset pointer */
662 xhci->shared_hcd = NULL;
663 mutex_unlock(&xhci->mutex);
667 xhci_debugfs_exit(xhci);
669 spin_lock_irq(&xhci->lock);
670 xhci->xhc_state |= XHCI_STATE_HALTED;
671 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
674 spin_unlock_irq(&xhci->lock);
676 xhci_cleanup_msix(xhci);
678 /* Deleting Compliance Mode Recovery Timer */
679 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
680 (!(xhci_all_ports_seen_u0(xhci)))) {
681 del_timer_sync(&xhci->comp_mode_recovery_timer);
682 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
683 "%s: compliance mode recovery timer deleted",
687 if (xhci->quirks & XHCI_AMD_PLL_FIX)
690 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
691 "// Disabling event ring interrupts");
692 temp = readl(&xhci->op_regs->status);
693 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
694 temp = readl(&xhci->ir_set->irq_pending);
695 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
696 xhci_print_ir_set(xhci, 0);
698 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
699 xhci_mem_cleanup(xhci);
700 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
701 "xhci_stop completed - status = %x",
702 readl(&xhci->op_regs->status));
703 mutex_unlock(&xhci->mutex);
707 * Shutdown HC (not bus-specific)
709 * This is called when the machine is rebooting or halting. We assume that the
710 * machine will be powered off, and the HC's internal state will be reset.
711 * Don't bother to free memory.
713 * This will only ever be called with the main usb_hcd (the USB3 roothub).
715 static void xhci_shutdown(struct usb_hcd *hcd)
717 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
719 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
720 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev));
722 spin_lock_irq(&xhci->lock);
724 /* Workaround for spurious wakeups at shutdown with HSW */
725 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
727 spin_unlock_irq(&xhci->lock);
729 xhci_cleanup_msix(xhci);
731 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
732 "xhci_shutdown completed - status = %x",
733 readl(&xhci->op_regs->status));
735 /* Yet another workaround for spurious wakeups at shutdown with HSW */
736 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
737 pci_set_power_state(to_pci_dev(hcd->self.sysdev), PCI_D3hot);
741 static void xhci_save_registers(struct xhci_hcd *xhci)
743 xhci->s3.command = readl(&xhci->op_regs->command);
744 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
745 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
746 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
747 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
748 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
749 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
750 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
751 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
754 static void xhci_restore_registers(struct xhci_hcd *xhci)
756 writel(xhci->s3.command, &xhci->op_regs->command);
757 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
758 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
759 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
760 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
761 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
762 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
763 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
764 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
767 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
771 /* step 2: initialize command ring buffer */
772 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
773 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
774 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
775 xhci->cmd_ring->dequeue) &
776 (u64) ~CMD_RING_RSVD_BITS) |
777 xhci->cmd_ring->cycle_state;
778 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
779 "// Setting command ring address to 0x%llx",
780 (long unsigned long) val_64);
781 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
785 * The whole command ring must be cleared to zero when we suspend the host.
787 * The host doesn't save the command ring pointer in the suspend well, so we
788 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
789 * aligned, because of the reserved bits in the command ring dequeue pointer
790 * register. Therefore, we can't just set the dequeue pointer back in the
791 * middle of the ring (TRBs are 16-byte aligned).
793 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
795 struct xhci_ring *ring;
796 struct xhci_segment *seg;
798 ring = xhci->cmd_ring;
802 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
803 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
804 cpu_to_le32(~TRB_CYCLE);
806 } while (seg != ring->deq_seg);
808 /* Reset the software enqueue and dequeue pointers */
809 ring->deq_seg = ring->first_seg;
810 ring->dequeue = ring->first_seg->trbs;
811 ring->enq_seg = ring->deq_seg;
812 ring->enqueue = ring->dequeue;
814 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
816 * Ring is now zeroed, so the HW should look for change of ownership
817 * when the cycle bit is set to 1.
819 ring->cycle_state = 1;
822 * Reset the hardware dequeue pointer.
823 * Yes, this will need to be re-written after resume, but we're paranoid
824 * and want to make sure the hardware doesn't access bogus memory
825 * because, say, the BIOS or an SMI started the host without changing
826 * the command ring pointers.
828 xhci_set_cmd_ring_deq(xhci);
831 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
834 __le32 __iomem **port_array;
838 spin_lock_irqsave(&xhci->lock, flags);
840 /* disable usb3 ports Wake bits */
841 port_index = xhci->num_usb3_ports;
842 port_array = xhci->usb3_ports;
843 while (port_index--) {
844 t1 = readl(port_array[port_index]);
845 t1 = xhci_port_state_to_neutral(t1);
846 t2 = t1 & ~PORT_WAKE_BITS;
848 writel(t2, port_array[port_index]);
851 /* disable usb2 ports Wake bits */
852 port_index = xhci->num_usb2_ports;
853 port_array = xhci->usb2_ports;
854 while (port_index--) {
855 t1 = readl(port_array[port_index]);
856 t1 = xhci_port_state_to_neutral(t1);
857 t2 = t1 & ~PORT_WAKE_BITS;
859 writel(t2, port_array[port_index]);
862 spin_unlock_irqrestore(&xhci->lock, flags);
866 * Stop HC (not bus-specific)
868 * This is called when the machine transition into S3/S4 mode.
871 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
874 unsigned int delay = XHCI_MAX_HALT_USEC;
875 struct usb_hcd *hcd = xhci_to_hcd(xhci);
881 if (hcd->state != HC_STATE_SUSPENDED ||
882 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
885 /* Clear root port wake on bits if wakeup not allowed. */
887 xhci_disable_port_wake_on_bits(xhci);
889 /* Don't poll the roothubs on bus suspend. */
890 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
891 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
892 del_timer_sync(&hcd->rh_timer);
893 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
894 del_timer_sync(&xhci->shared_hcd->rh_timer);
896 spin_lock_irq(&xhci->lock);
897 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
898 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
899 /* step 1: stop endpoint */
900 /* skipped assuming that port suspend has done */
902 /* step 2: clear Run/Stop bit */
903 command = readl(&xhci->op_regs->command);
905 writel(command, &xhci->op_regs->command);
907 /* Some chips from Fresco Logic need an extraordinary delay */
908 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
910 if (xhci_handshake(&xhci->op_regs->status,
911 STS_HALT, STS_HALT, delay)) {
912 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
913 spin_unlock_irq(&xhci->lock);
916 xhci_clear_command_ring(xhci);
918 /* step 3: save registers */
919 xhci_save_registers(xhci);
921 /* step 4: set CSS flag */
922 command = readl(&xhci->op_regs->command);
924 writel(command, &xhci->op_regs->command);
925 if (xhci_handshake(&xhci->op_regs->status,
926 STS_SAVE, 0, 10 * 1000)) {
927 xhci_warn(xhci, "WARN: xHC save state timeout\n");
928 spin_unlock_irq(&xhci->lock);
931 spin_unlock_irq(&xhci->lock);
934 * Deleting Compliance Mode Recovery Timer because the xHCI Host
935 * is about to be suspended.
937 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
938 (!(xhci_all_ports_seen_u0(xhci)))) {
939 del_timer_sync(&xhci->comp_mode_recovery_timer);
940 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
941 "%s: compliance mode recovery timer deleted",
945 /* step 5: remove core well power */
946 /* synchronize irq when using MSI-X */
947 xhci_msix_sync_irqs(xhci);
951 EXPORT_SYMBOL_GPL(xhci_suspend);
954 * start xHC (not bus-specific)
956 * This is called when the machine transition from S3/S4 mode.
959 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
961 u32 command, temp = 0, status;
962 struct usb_hcd *hcd = xhci_to_hcd(xhci);
963 struct usb_hcd *secondary_hcd;
965 bool comp_timer_running = false;
970 /* Wait a bit if either of the roothubs need to settle from the
971 * transition into bus suspend.
973 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
975 xhci->bus_state[1].next_statechange))
978 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
979 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
981 spin_lock_irq(&xhci->lock);
982 if (xhci->quirks & XHCI_RESET_ON_RESUME)
986 /* step 1: restore register */
987 xhci_restore_registers(xhci);
988 /* step 2: initialize command ring buffer */
989 xhci_set_cmd_ring_deq(xhci);
990 /* step 3: restore state and start state*/
991 /* step 3: set CRS flag */
992 command = readl(&xhci->op_regs->command);
994 writel(command, &xhci->op_regs->command);
995 if (xhci_handshake(&xhci->op_regs->status,
996 STS_RESTORE, 0, 10 * 1000)) {
997 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
998 spin_unlock_irq(&xhci->lock);
1001 temp = readl(&xhci->op_regs->status);
1004 /* If restore operation fails, re-initialize the HC during resume */
1005 if ((temp & STS_SRE) || hibernated) {
1007 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1008 !(xhci_all_ports_seen_u0(xhci))) {
1009 del_timer_sync(&xhci->comp_mode_recovery_timer);
1010 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1011 "Compliance Mode Recovery Timer deleted!");
1014 /* Let the USB core know _both_ roothubs lost power. */
1015 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1016 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1018 xhci_dbg(xhci, "Stop HCD\n");
1021 spin_unlock_irq(&xhci->lock);
1022 xhci_cleanup_msix(xhci);
1024 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1025 temp = readl(&xhci->op_regs->status);
1026 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status);
1027 temp = readl(&xhci->ir_set->irq_pending);
1028 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1029 xhci_print_ir_set(xhci, 0);
1031 xhci_dbg(xhci, "cleaning up memory\n");
1032 xhci_mem_cleanup(xhci);
1033 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1034 readl(&xhci->op_regs->status));
1036 /* USB core calls the PCI reinit and start functions twice:
1037 * first with the primary HCD, and then with the secondary HCD.
1038 * If we don't do the same, the host will never be started.
1040 if (!usb_hcd_is_primary_hcd(hcd))
1041 secondary_hcd = hcd;
1043 secondary_hcd = xhci->shared_hcd;
1045 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1046 retval = xhci_init(hcd->primary_hcd);
1049 comp_timer_running = true;
1051 xhci_dbg(xhci, "Start the primary HCD\n");
1052 retval = xhci_run(hcd->primary_hcd);
1054 xhci_dbg(xhci, "Start the secondary HCD\n");
1055 retval = xhci_run(secondary_hcd);
1057 hcd->state = HC_STATE_SUSPENDED;
1058 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1062 /* step 4: set Run/Stop bit */
1063 command = readl(&xhci->op_regs->command);
1065 writel(command, &xhci->op_regs->command);
1066 xhci_handshake(&xhci->op_regs->status, STS_HALT,
1069 /* step 5: walk topology and initialize portsc,
1070 * portpmsc and portli
1072 /* this is done in bus_resume */
1074 /* step 6: restart each of the previously
1075 * Running endpoints by ringing their doorbells
1078 spin_unlock_irq(&xhci->lock);
1082 /* Resume root hubs only when have pending events. */
1083 status = readl(&xhci->op_regs->status);
1084 if (status & STS_EINT) {
1085 usb_hcd_resume_root_hub(xhci->shared_hcd);
1086 usb_hcd_resume_root_hub(hcd);
1091 * If system is subject to the Quirk, Compliance Mode Timer needs to
1092 * be re-initialized Always after a system resume. Ports are subject
1093 * to suffer the Compliance Mode issue again. It doesn't matter if
1094 * ports have entered previously to U0 before system's suspension.
1096 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1097 compliance_mode_recovery_timer_init(xhci);
1099 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL)
1100 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller));
1102 /* Re-enable port polling. */
1103 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1104 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1105 usb_hcd_poll_rh_status(xhci->shared_hcd);
1106 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1107 usb_hcd_poll_rh_status(hcd);
1111 EXPORT_SYMBOL_GPL(xhci_resume);
1112 #endif /* CONFIG_PM */
1114 /*-------------------------------------------------------------------------*/
1117 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1118 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1119 * value to right shift 1 for the bitmask.
1121 * Index = (epnum * 2) + direction - 1,
1122 * where direction = 0 for OUT, 1 for IN.
1123 * For control endpoints, the IN index is used (OUT index is unused), so
1124 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1126 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1129 if (usb_endpoint_xfer_control(desc))
1130 index = (unsigned int) (usb_endpoint_num(desc)*2);
1132 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1133 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1137 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1138 * address from the XHCI endpoint index.
1140 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1142 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1143 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1144 return direction | number;
1147 /* Find the flag for this endpoint (for use in the control context). Use the
1148 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1151 static unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1153 return 1 << (xhci_get_endpoint_index(desc) + 1);
1156 /* Find the flag for this endpoint (for use in the control context). Use the
1157 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1160 static unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1162 return 1 << (ep_index + 1);
1165 /* Compute the last valid endpoint context index. Basically, this is the
1166 * endpoint index plus one. For slot contexts with more than valid endpoint,
1167 * we find the most significant bit set in the added contexts flags.
1168 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1169 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1171 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1173 return fls(added_ctxs) - 1;
1176 /* Returns 1 if the arguments are OK;
1177 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1179 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1180 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1182 struct xhci_hcd *xhci;
1183 struct xhci_virt_device *virt_dev;
1185 if (!hcd || (check_ep && !ep) || !udev) {
1186 pr_debug("xHCI %s called with invalid args\n", func);
1189 if (!udev->parent) {
1190 pr_debug("xHCI %s called for root hub\n", func);
1194 xhci = hcd_to_xhci(hcd);
1195 if (check_virt_dev) {
1196 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1197 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1202 virt_dev = xhci->devs[udev->slot_id];
1203 if (virt_dev->udev != udev) {
1204 xhci_dbg(xhci, "xHCI %s called with udev and "
1205 "virt_dev does not match\n", func);
1210 if (xhci->xhc_state & XHCI_STATE_HALTED)
1216 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1217 struct usb_device *udev, struct xhci_command *command,
1218 bool ctx_change, bool must_succeed);
1221 * Full speed devices may have a max packet size greater than 8 bytes, but the
1222 * USB core doesn't know that until it reads the first 8 bytes of the
1223 * descriptor. If the usb_device's max packet size changes after that point,
1224 * we need to issue an evaluate context command and wait on it.
1226 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1227 unsigned int ep_index, struct urb *urb)
1229 struct xhci_container_ctx *out_ctx;
1230 struct xhci_input_control_ctx *ctrl_ctx;
1231 struct xhci_ep_ctx *ep_ctx;
1232 struct xhci_command *command;
1233 int max_packet_size;
1234 int hw_max_packet_size;
1237 out_ctx = xhci->devs[slot_id]->out_ctx;
1238 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1239 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1240 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1241 if (hw_max_packet_size != max_packet_size) {
1242 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1243 "Max Packet Size for ep 0 changed.");
1244 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1245 "Max packet size in usb_device = %d",
1247 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1248 "Max packet size in xHCI HW = %d",
1249 hw_max_packet_size);
1250 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1251 "Issuing evaluate context command.");
1253 /* Set up the input context flags for the command */
1254 /* FIXME: This won't work if a non-default control endpoint
1255 * changes max packet sizes.
1258 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1262 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1263 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1265 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1268 goto command_cleanup;
1270 /* Set up the modified control endpoint 0 */
1271 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1272 xhci->devs[slot_id]->out_ctx, ep_index);
1274 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1275 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1276 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1278 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1279 ctrl_ctx->drop_flags = 0;
1281 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1284 /* Clean up the input context for later use by bandwidth
1287 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1289 kfree(command->completion);
1296 * non-error returns are a promise to giveback() the urb later
1297 * we drop ownership so next owner (or urb unlink) can get it
1299 static int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1301 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1302 unsigned long flags;
1304 unsigned int slot_id, ep_index, ep_state;
1305 struct urb_priv *urb_priv;
1308 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1309 true, true, __func__) <= 0)
1312 slot_id = urb->dev->slot_id;
1313 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1315 if (!HCD_HW_ACCESSIBLE(hcd)) {
1316 if (!in_interrupt())
1317 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1321 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1322 num_tds = urb->number_of_packets;
1323 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1324 urb->transfer_buffer_length > 0 &&
1325 urb->transfer_flags & URB_ZERO_PACKET &&
1326 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1331 urb_priv = kzalloc(sizeof(struct urb_priv) +
1332 num_tds * sizeof(struct xhci_td), mem_flags);
1336 urb_priv->num_tds = num_tds;
1337 urb_priv->num_tds_done = 0;
1338 urb->hcpriv = urb_priv;
1340 trace_xhci_urb_enqueue(urb);
1342 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1343 /* Check to see if the max packet size for the default control
1344 * endpoint changed during FS device enumeration
1346 if (urb->dev->speed == USB_SPEED_FULL) {
1347 ret = xhci_check_maxpacket(xhci, slot_id,
1350 xhci_urb_free_priv(urb_priv);
1357 spin_lock_irqsave(&xhci->lock, flags);
1359 if (xhci->xhc_state & XHCI_STATE_DYING) {
1360 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n",
1361 urb->ep->desc.bEndpointAddress, urb);
1366 switch (usb_endpoint_type(&urb->ep->desc)) {
1368 case USB_ENDPOINT_XFER_CONTROL:
1369 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1372 case USB_ENDPOINT_XFER_BULK:
1373 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1374 if (ep_state & (EP_GETTING_STREAMS | EP_GETTING_NO_STREAMS)) {
1375 xhci_warn(xhci, "WARN: Can't enqueue URB, ep in streams transition state %x\n",
1380 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1385 case USB_ENDPOINT_XFER_INT:
1386 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1390 case USB_ENDPOINT_XFER_ISOC:
1391 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1397 xhci_urb_free_priv(urb_priv);
1400 spin_unlock_irqrestore(&xhci->lock, flags);
1405 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1406 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1407 * should pick up where it left off in the TD, unless a Set Transfer Ring
1408 * Dequeue Pointer is issued.
1410 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1411 * the ring. Since the ring is a contiguous structure, they can't be physically
1412 * removed. Instead, there are two options:
1414 * 1) If the HC is in the middle of processing the URB to be canceled, we
1415 * simply move the ring's dequeue pointer past those TRBs using the Set
1416 * Transfer Ring Dequeue Pointer command. This will be the common case,
1417 * when drivers timeout on the last submitted URB and attempt to cancel.
1419 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1420 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1421 * HC will need to invalidate the any TRBs it has cached after the stop
1422 * endpoint command, as noted in the xHCI 0.95 errata.
1424 * 3) The TD may have completed by the time the Stop Endpoint Command
1425 * completes, so software needs to handle that case too.
1427 * This function should protect against the TD enqueueing code ringing the
1428 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1429 * It also needs to account for multiple cancellations on happening at the same
1430 * time for the same endpoint.
1432 * Note that this function can be called in any context, or so says
1433 * usb_hcd_unlink_urb()
1435 static int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1437 unsigned long flags;
1440 struct xhci_hcd *xhci;
1441 struct urb_priv *urb_priv;
1443 unsigned int ep_index;
1444 struct xhci_ring *ep_ring;
1445 struct xhci_virt_ep *ep;
1446 struct xhci_command *command;
1447 struct xhci_virt_device *vdev;
1449 xhci = hcd_to_xhci(hcd);
1450 spin_lock_irqsave(&xhci->lock, flags);
1452 trace_xhci_urb_dequeue(urb);
1454 /* Make sure the URB hasn't completed or been unlinked already */
1455 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1459 /* give back URB now if we can't queue it for cancel */
1460 vdev = xhci->devs[urb->dev->slot_id];
1461 urb_priv = urb->hcpriv;
1462 if (!vdev || !urb_priv)
1465 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1466 ep = &vdev->eps[ep_index];
1467 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1468 if (!ep || !ep_ring)
1471 /* If xHC is dead take it down and return ALL URBs in xhci_hc_died() */
1472 temp = readl(&xhci->op_regs->status);
1473 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) {
1478 if (xhci->xhc_state & XHCI_STATE_HALTED) {
1479 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1480 "HC halted, freeing TD manually.");
1481 for (i = urb_priv->num_tds_done;
1482 i < urb_priv->num_tds;
1484 td = &urb_priv->td[i];
1485 if (!list_empty(&td->td_list))
1486 list_del_init(&td->td_list);
1487 if (!list_empty(&td->cancelled_td_list))
1488 list_del_init(&td->cancelled_td_list);
1493 i = urb_priv->num_tds_done;
1494 if (i < urb_priv->num_tds)
1495 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1496 "Cancel URB %p, dev %s, ep 0x%x, "
1497 "starting at offset 0x%llx",
1498 urb, urb->dev->devpath,
1499 urb->ep->desc.bEndpointAddress,
1500 (unsigned long long) xhci_trb_virt_to_dma(
1501 urb_priv->td[i].start_seg,
1502 urb_priv->td[i].first_trb));
1504 for (; i < urb_priv->num_tds; i++) {
1505 td = &urb_priv->td[i];
1506 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1509 /* Queue a stop endpoint command, but only if this is
1510 * the first cancellation to be handled.
1512 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) {
1513 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1518 ep->ep_state |= EP_STOP_CMD_PENDING;
1519 ep->stop_cmd_timer.expires = jiffies +
1520 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1521 add_timer(&ep->stop_cmd_timer);
1522 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1524 xhci_ring_cmd_db(xhci);
1527 spin_unlock_irqrestore(&xhci->lock, flags);
1532 xhci_urb_free_priv(urb_priv);
1533 usb_hcd_unlink_urb_from_ep(hcd, urb);
1534 spin_unlock_irqrestore(&xhci->lock, flags);
1535 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1539 /* Drop an endpoint from a new bandwidth configuration for this device.
1540 * Only one call to this function is allowed per endpoint before
1541 * check_bandwidth() or reset_bandwidth() must be called.
1542 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1543 * add the endpoint to the schedule with possibly new parameters denoted by a
1544 * different endpoint descriptor in usb_host_endpoint.
1545 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1548 * The USB core will not allow URBs to be queued to an endpoint that is being
1549 * disabled, so there's no need for mutual exclusion to protect
1550 * the xhci->devs[slot_id] structure.
1552 static int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1553 struct usb_host_endpoint *ep)
1555 struct xhci_hcd *xhci;
1556 struct xhci_container_ctx *in_ctx, *out_ctx;
1557 struct xhci_input_control_ctx *ctrl_ctx;
1558 unsigned int ep_index;
1559 struct xhci_ep_ctx *ep_ctx;
1561 u32 new_add_flags, new_drop_flags;
1564 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1567 xhci = hcd_to_xhci(hcd);
1568 if (xhci->xhc_state & XHCI_STATE_DYING)
1571 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1572 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1573 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1574 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1575 __func__, drop_flag);
1579 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1580 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1581 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1583 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1588 ep_index = xhci_get_endpoint_index(&ep->desc);
1589 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1590 /* If the HC already knows the endpoint is disabled,
1591 * or the HCD has noted it is disabled, ignore this request
1593 if ((GET_EP_CTX_STATE(ep_ctx) == EP_STATE_DISABLED) ||
1594 le32_to_cpu(ctrl_ctx->drop_flags) &
1595 xhci_get_endpoint_flag(&ep->desc)) {
1596 /* Do not warn when called after a usb_device_reset */
1597 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1598 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1603 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1604 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1606 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1607 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1609 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index);
1611 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1613 if (xhci->quirks & XHCI_MTK_HOST)
1614 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1616 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1617 (unsigned int) ep->desc.bEndpointAddress,
1619 (unsigned int) new_drop_flags,
1620 (unsigned int) new_add_flags);
1624 /* Add an endpoint to a new possible bandwidth configuration for this device.
1625 * Only one call to this function is allowed per endpoint before
1626 * check_bandwidth() or reset_bandwidth() must be called.
1627 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1628 * add the endpoint to the schedule with possibly new parameters denoted by a
1629 * different endpoint descriptor in usb_host_endpoint.
1630 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1633 * The USB core will not allow URBs to be queued to an endpoint until the
1634 * configuration or alt setting is installed in the device, so there's no need
1635 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1637 static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1638 struct usb_host_endpoint *ep)
1640 struct xhci_hcd *xhci;
1641 struct xhci_container_ctx *in_ctx;
1642 unsigned int ep_index;
1643 struct xhci_input_control_ctx *ctrl_ctx;
1645 u32 new_add_flags, new_drop_flags;
1646 struct xhci_virt_device *virt_dev;
1649 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1651 /* So we won't queue a reset ep command for a root hub */
1655 xhci = hcd_to_xhci(hcd);
1656 if (xhci->xhc_state & XHCI_STATE_DYING)
1659 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1660 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1661 /* FIXME when we have to issue an evaluate endpoint command to
1662 * deal with ep0 max packet size changing once we get the
1665 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1666 __func__, added_ctxs);
1670 virt_dev = xhci->devs[udev->slot_id];
1671 in_ctx = virt_dev->in_ctx;
1672 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1674 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1679 ep_index = xhci_get_endpoint_index(&ep->desc);
1680 /* If this endpoint is already in use, and the upper layers are trying
1681 * to add it again without dropping it, reject the addition.
1683 if (virt_dev->eps[ep_index].ring &&
1684 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1685 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1686 "without dropping it.\n",
1687 (unsigned int) ep->desc.bEndpointAddress);
1691 /* If the HCD has already noted the endpoint is enabled,
1692 * ignore this request.
1694 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1695 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1701 * Configuration and alternate setting changes must be done in
1702 * process context, not interrupt context (or so documenation
1703 * for usb_set_interface() and usb_set_configuration() claim).
1705 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1706 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1707 __func__, ep->desc.bEndpointAddress);
1711 if (xhci->quirks & XHCI_MTK_HOST) {
1712 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1714 xhci_free_endpoint_ring(xhci, virt_dev, ep_index);
1719 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1720 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1722 /* If xhci_endpoint_disable() was called for this endpoint, but the
1723 * xHC hasn't been notified yet through the check_bandwidth() call,
1724 * this re-adds a new state for the endpoint from the new endpoint
1725 * descriptors. We must drop and re-add this endpoint, so we leave the
1728 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1730 /* Store the usb_device pointer for later use */
1733 xhci_debugfs_create_endpoint(xhci, virt_dev, ep_index);
1735 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1736 (unsigned int) ep->desc.bEndpointAddress,
1738 (unsigned int) new_drop_flags,
1739 (unsigned int) new_add_flags);
1743 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1745 struct xhci_input_control_ctx *ctrl_ctx;
1746 struct xhci_ep_ctx *ep_ctx;
1747 struct xhci_slot_ctx *slot_ctx;
1750 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1752 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1757 /* When a device's add flag and drop flag are zero, any subsequent
1758 * configure endpoint command will leave that endpoint's state
1759 * untouched. Make sure we don't leave any old state in the input
1760 * endpoint contexts.
1762 ctrl_ctx->drop_flags = 0;
1763 ctrl_ctx->add_flags = 0;
1764 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1765 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1766 /* Endpoint 0 is always valid */
1767 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1768 for (i = 1; i < 31; i++) {
1769 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1770 ep_ctx->ep_info = 0;
1771 ep_ctx->ep_info2 = 0;
1773 ep_ctx->tx_info = 0;
1777 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1778 struct usb_device *udev, u32 *cmd_status)
1782 switch (*cmd_status) {
1783 case COMP_COMMAND_ABORTED:
1784 case COMP_COMMAND_RING_STOPPED:
1785 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1788 case COMP_RESOURCE_ERROR:
1789 dev_warn(&udev->dev,
1790 "Not enough host controller resources for new device state.\n");
1792 /* FIXME: can we allocate more resources for the HC? */
1794 case COMP_BANDWIDTH_ERROR:
1795 case COMP_SECONDARY_BANDWIDTH_ERROR:
1796 dev_warn(&udev->dev,
1797 "Not enough bandwidth for new device state.\n");
1799 /* FIXME: can we go back to the old state? */
1801 case COMP_TRB_ERROR:
1802 /* the HCD set up something wrong */
1803 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1805 "and endpoint is not disabled.\n");
1808 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1809 dev_warn(&udev->dev,
1810 "ERROR: Incompatible device for endpoint configure command.\n");
1814 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1815 "Successful Endpoint Configure command");
1819 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1827 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1828 struct usb_device *udev, u32 *cmd_status)
1832 switch (*cmd_status) {
1833 case COMP_COMMAND_ABORTED:
1834 case COMP_COMMAND_RING_STOPPED:
1835 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1838 case COMP_PARAMETER_ERROR:
1839 dev_warn(&udev->dev,
1840 "WARN: xHCI driver setup invalid evaluate context command.\n");
1843 case COMP_SLOT_NOT_ENABLED_ERROR:
1844 dev_warn(&udev->dev,
1845 "WARN: slot not enabled for evaluate context command.\n");
1848 case COMP_CONTEXT_STATE_ERROR:
1849 dev_warn(&udev->dev,
1850 "WARN: invalid context state for evaluate context command.\n");
1853 case COMP_INCOMPATIBLE_DEVICE_ERROR:
1854 dev_warn(&udev->dev,
1855 "ERROR: Incompatible device for evaluate context command.\n");
1858 case COMP_MAX_EXIT_LATENCY_TOO_LARGE_ERROR:
1859 /* Max Exit Latency too large error */
1860 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1864 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1865 "Successful evaluate context command");
1869 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1877 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1878 struct xhci_input_control_ctx *ctrl_ctx)
1880 u32 valid_add_flags;
1881 u32 valid_drop_flags;
1883 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1884 * (bit 1). The default control endpoint is added during the Address
1885 * Device command and is never removed until the slot is disabled.
1887 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1888 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1890 /* Use hweight32 to count the number of ones in the add flags, or
1891 * number of endpoints added. Don't count endpoints that are changed
1892 * (both added and dropped).
1894 return hweight32(valid_add_flags) -
1895 hweight32(valid_add_flags & valid_drop_flags);
1898 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1899 struct xhci_input_control_ctx *ctrl_ctx)
1901 u32 valid_add_flags;
1902 u32 valid_drop_flags;
1904 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1905 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1907 return hweight32(valid_drop_flags) -
1908 hweight32(valid_add_flags & valid_drop_flags);
1912 * We need to reserve the new number of endpoints before the configure endpoint
1913 * command completes. We can't subtract the dropped endpoints from the number
1914 * of active endpoints until the command completes because we can oversubscribe
1915 * the host in this case:
1917 * - the first configure endpoint command drops more endpoints than it adds
1918 * - a second configure endpoint command that adds more endpoints is queued
1919 * - the first configure endpoint command fails, so the config is unchanged
1920 * - the second command may succeed, even though there isn't enough resources
1922 * Must be called with xhci->lock held.
1924 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1925 struct xhci_input_control_ctx *ctrl_ctx)
1929 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1930 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1931 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1932 "Not enough ep ctxs: "
1933 "%u active, need to add %u, limit is %u.",
1934 xhci->num_active_eps, added_eps,
1935 xhci->limit_active_eps);
1938 xhci->num_active_eps += added_eps;
1939 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1940 "Adding %u ep ctxs, %u now active.", added_eps,
1941 xhci->num_active_eps);
1946 * The configure endpoint was failed by the xHC for some other reason, so we
1947 * need to revert the resources that failed configuration would have used.
1949 * Must be called with xhci->lock held.
1951 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1952 struct xhci_input_control_ctx *ctrl_ctx)
1956 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1957 xhci->num_active_eps -= num_failed_eps;
1958 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1959 "Removing %u failed ep ctxs, %u now active.",
1961 xhci->num_active_eps);
1965 * Now that the command has completed, clean up the active endpoint count by
1966 * subtracting out the endpoints that were dropped (but not changed).
1968 * Must be called with xhci->lock held.
1970 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1971 struct xhci_input_control_ctx *ctrl_ctx)
1973 u32 num_dropped_eps;
1975 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1976 xhci->num_active_eps -= num_dropped_eps;
1977 if (num_dropped_eps)
1978 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1979 "Removing %u dropped ep ctxs, %u now active.",
1981 xhci->num_active_eps);
1984 static unsigned int xhci_get_block_size(struct usb_device *udev)
1986 switch (udev->speed) {
1988 case USB_SPEED_FULL:
1990 case USB_SPEED_HIGH:
1992 case USB_SPEED_SUPER:
1993 case USB_SPEED_SUPER_PLUS:
1995 case USB_SPEED_UNKNOWN:
1996 case USB_SPEED_WIRELESS:
1998 /* Should never happen */
2004 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2006 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2008 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2013 /* If we are changing a LS/FS device under a HS hub,
2014 * make sure (if we are activating a new TT) that the HS bus has enough
2015 * bandwidth for this new TT.
2017 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2018 struct xhci_virt_device *virt_dev,
2021 struct xhci_interval_bw_table *bw_table;
2022 struct xhci_tt_bw_info *tt_info;
2024 /* Find the bandwidth table for the root port this TT is attached to. */
2025 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2026 tt_info = virt_dev->tt_info;
2027 /* If this TT already had active endpoints, the bandwidth for this TT
2028 * has already been added. Removing all periodic endpoints (and thus
2029 * making the TT enactive) will only decrease the bandwidth used.
2033 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2034 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2038 /* Not sure why we would have no new active endpoints...
2040 * Maybe because of an Evaluate Context change for a hub update or a
2041 * control endpoint 0 max packet size change?
2042 * FIXME: skip the bandwidth calculation in that case.
2047 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2048 struct xhci_virt_device *virt_dev)
2050 unsigned int bw_reserved;
2052 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2053 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2056 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2057 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2064 * This algorithm is a very conservative estimate of the worst-case scheduling
2065 * scenario for any one interval. The hardware dynamically schedules the
2066 * packets, so we can't tell which microframe could be the limiting factor in
2067 * the bandwidth scheduling. This only takes into account periodic endpoints.
2069 * Obviously, we can't solve an NP complete problem to find the minimum worst
2070 * case scenario. Instead, we come up with an estimate that is no less than
2071 * the worst case bandwidth used for any one microframe, but may be an
2074 * We walk the requirements for each endpoint by interval, starting with the
2075 * smallest interval, and place packets in the schedule where there is only one
2076 * possible way to schedule packets for that interval. In order to simplify
2077 * this algorithm, we record the largest max packet size for each interval, and
2078 * assume all packets will be that size.
2080 * For interval 0, we obviously must schedule all packets for each interval.
2081 * The bandwidth for interval 0 is just the amount of data to be transmitted
2082 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2083 * the number of packets).
2085 * For interval 1, we have two possible microframes to schedule those packets
2086 * in. For this algorithm, if we can schedule the same number of packets for
2087 * each possible scheduling opportunity (each microframe), we will do so. The
2088 * remaining number of packets will be saved to be transmitted in the gaps in
2089 * the next interval's scheduling sequence.
2091 * As we move those remaining packets to be scheduled with interval 2 packets,
2092 * we have to double the number of remaining packets to transmit. This is
2093 * because the intervals are actually powers of 2, and we would be transmitting
2094 * the previous interval's packets twice in this interval. We also have to be
2095 * sure that when we look at the largest max packet size for this interval, we
2096 * also look at the largest max packet size for the remaining packets and take
2097 * the greater of the two.
2099 * The algorithm continues to evenly distribute packets in each scheduling
2100 * opportunity, and push the remaining packets out, until we get to the last
2101 * interval. Then those packets and their associated overhead are just added
2102 * to the bandwidth used.
2104 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2105 struct xhci_virt_device *virt_dev,
2108 unsigned int bw_reserved;
2109 unsigned int max_bandwidth;
2110 unsigned int bw_used;
2111 unsigned int block_size;
2112 struct xhci_interval_bw_table *bw_table;
2113 unsigned int packet_size = 0;
2114 unsigned int overhead = 0;
2115 unsigned int packets_transmitted = 0;
2116 unsigned int packets_remaining = 0;
2119 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2120 return xhci_check_ss_bw(xhci, virt_dev);
2122 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2123 max_bandwidth = HS_BW_LIMIT;
2124 /* Convert percent of bus BW reserved to blocks reserved */
2125 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2127 max_bandwidth = FS_BW_LIMIT;
2128 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2131 bw_table = virt_dev->bw_table;
2132 /* We need to translate the max packet size and max ESIT payloads into
2133 * the units the hardware uses.
2135 block_size = xhci_get_block_size(virt_dev->udev);
2137 /* If we are manipulating a LS/FS device under a HS hub, double check
2138 * that the HS bus has enough bandwidth if we are activing a new TT.
2140 if (virt_dev->tt_info) {
2141 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2142 "Recalculating BW for rootport %u",
2143 virt_dev->real_port);
2144 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2145 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2146 "newly activated TT.\n");
2149 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2150 "Recalculating BW for TT slot %u port %u",
2151 virt_dev->tt_info->slot_id,
2152 virt_dev->tt_info->ttport);
2154 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2155 "Recalculating BW for rootport %u",
2156 virt_dev->real_port);
2159 /* Add in how much bandwidth will be used for interval zero, or the
2160 * rounded max ESIT payload + number of packets * largest overhead.
2162 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2163 bw_table->interval_bw[0].num_packets *
2164 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2166 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2167 unsigned int bw_added;
2168 unsigned int largest_mps;
2169 unsigned int interval_overhead;
2172 * How many packets could we transmit in this interval?
2173 * If packets didn't fit in the previous interval, we will need
2174 * to transmit that many packets twice within this interval.
2176 packets_remaining = 2 * packets_remaining +
2177 bw_table->interval_bw[i].num_packets;
2179 /* Find the largest max packet size of this or the previous
2182 if (list_empty(&bw_table->interval_bw[i].endpoints))
2185 struct xhci_virt_ep *virt_ep;
2186 struct list_head *ep_entry;
2188 ep_entry = bw_table->interval_bw[i].endpoints.next;
2189 virt_ep = list_entry(ep_entry,
2190 struct xhci_virt_ep, bw_endpoint_list);
2191 /* Convert to blocks, rounding up */
2192 largest_mps = DIV_ROUND_UP(
2193 virt_ep->bw_info.max_packet_size,
2196 if (largest_mps > packet_size)
2197 packet_size = largest_mps;
2199 /* Use the larger overhead of this or the previous interval. */
2200 interval_overhead = xhci_get_largest_overhead(
2201 &bw_table->interval_bw[i]);
2202 if (interval_overhead > overhead)
2203 overhead = interval_overhead;
2205 /* How many packets can we evenly distribute across
2206 * (1 << (i + 1)) possible scheduling opportunities?
2208 packets_transmitted = packets_remaining >> (i + 1);
2210 /* Add in the bandwidth used for those scheduled packets */
2211 bw_added = packets_transmitted * (overhead + packet_size);
2213 /* How many packets do we have remaining to transmit? */
2214 packets_remaining = packets_remaining % (1 << (i + 1));
2216 /* What largest max packet size should those packets have? */
2217 /* If we've transmitted all packets, don't carry over the
2218 * largest packet size.
2220 if (packets_remaining == 0) {
2223 } else if (packets_transmitted > 0) {
2224 /* Otherwise if we do have remaining packets, and we've
2225 * scheduled some packets in this interval, take the
2226 * largest max packet size from endpoints with this
2229 packet_size = largest_mps;
2230 overhead = interval_overhead;
2232 /* Otherwise carry over packet_size and overhead from the last
2233 * time we had a remainder.
2235 bw_used += bw_added;
2236 if (bw_used > max_bandwidth) {
2237 xhci_warn(xhci, "Not enough bandwidth. "
2238 "Proposed: %u, Max: %u\n",
2239 bw_used, max_bandwidth);
2244 * Ok, we know we have some packets left over after even-handedly
2245 * scheduling interval 15. We don't know which microframes they will
2246 * fit into, so we over-schedule and say they will be scheduled every
2249 if (packets_remaining > 0)
2250 bw_used += overhead + packet_size;
2252 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2253 unsigned int port_index = virt_dev->real_port - 1;
2255 /* OK, we're manipulating a HS device attached to a
2256 * root port bandwidth domain. Include the number of active TTs
2257 * in the bandwidth used.
2259 bw_used += TT_HS_OVERHEAD *
2260 xhci->rh_bw[port_index].num_active_tts;
2263 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2264 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2265 "Available: %u " "percent",
2266 bw_used, max_bandwidth, bw_reserved,
2267 (max_bandwidth - bw_used - bw_reserved) * 100 /
2270 bw_used += bw_reserved;
2271 if (bw_used > max_bandwidth) {
2272 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2273 bw_used, max_bandwidth);
2277 bw_table->bw_used = bw_used;
2281 static bool xhci_is_async_ep(unsigned int ep_type)
2283 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2284 ep_type != ISOC_IN_EP &&
2285 ep_type != INT_IN_EP);
2288 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2290 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2293 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2295 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2297 if (ep_bw->ep_interval == 0)
2298 return SS_OVERHEAD_BURST +
2299 (ep_bw->mult * ep_bw->num_packets *
2300 (SS_OVERHEAD + mps));
2301 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2302 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2303 1 << ep_bw->ep_interval);
2307 static void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2308 struct xhci_bw_info *ep_bw,
2309 struct xhci_interval_bw_table *bw_table,
2310 struct usb_device *udev,
2311 struct xhci_virt_ep *virt_ep,
2312 struct xhci_tt_bw_info *tt_info)
2314 struct xhci_interval_bw *interval_bw;
2315 int normalized_interval;
2317 if (xhci_is_async_ep(ep_bw->type))
2320 if (udev->speed >= USB_SPEED_SUPER) {
2321 if (xhci_is_sync_in_ep(ep_bw->type))
2322 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2323 xhci_get_ss_bw_consumed(ep_bw);
2325 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2326 xhci_get_ss_bw_consumed(ep_bw);
2330 /* SuperSpeed endpoints never get added to intervals in the table, so
2331 * this check is only valid for HS/FS/LS devices.
2333 if (list_empty(&virt_ep->bw_endpoint_list))
2335 /* For LS/FS devices, we need to translate the interval expressed in
2336 * microframes to frames.
2338 if (udev->speed == USB_SPEED_HIGH)
2339 normalized_interval = ep_bw->ep_interval;
2341 normalized_interval = ep_bw->ep_interval - 3;
2343 if (normalized_interval == 0)
2344 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2345 interval_bw = &bw_table->interval_bw[normalized_interval];
2346 interval_bw->num_packets -= ep_bw->num_packets;
2347 switch (udev->speed) {
2349 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2351 case USB_SPEED_FULL:
2352 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2354 case USB_SPEED_HIGH:
2355 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2357 case USB_SPEED_SUPER:
2358 case USB_SPEED_SUPER_PLUS:
2359 case USB_SPEED_UNKNOWN:
2360 case USB_SPEED_WIRELESS:
2361 /* Should never happen because only LS/FS/HS endpoints will get
2362 * added to the endpoint list.
2367 tt_info->active_eps -= 1;
2368 list_del_init(&virt_ep->bw_endpoint_list);
2371 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2372 struct xhci_bw_info *ep_bw,
2373 struct xhci_interval_bw_table *bw_table,
2374 struct usb_device *udev,
2375 struct xhci_virt_ep *virt_ep,
2376 struct xhci_tt_bw_info *tt_info)
2378 struct xhci_interval_bw *interval_bw;
2379 struct xhci_virt_ep *smaller_ep;
2380 int normalized_interval;
2382 if (xhci_is_async_ep(ep_bw->type))
2385 if (udev->speed == USB_SPEED_SUPER) {
2386 if (xhci_is_sync_in_ep(ep_bw->type))
2387 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2388 xhci_get_ss_bw_consumed(ep_bw);
2390 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2391 xhci_get_ss_bw_consumed(ep_bw);
2395 /* For LS/FS devices, we need to translate the interval expressed in
2396 * microframes to frames.
2398 if (udev->speed == USB_SPEED_HIGH)
2399 normalized_interval = ep_bw->ep_interval;
2401 normalized_interval = ep_bw->ep_interval - 3;
2403 if (normalized_interval == 0)
2404 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2405 interval_bw = &bw_table->interval_bw[normalized_interval];
2406 interval_bw->num_packets += ep_bw->num_packets;
2407 switch (udev->speed) {
2409 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2411 case USB_SPEED_FULL:
2412 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2414 case USB_SPEED_HIGH:
2415 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2417 case USB_SPEED_SUPER:
2418 case USB_SPEED_SUPER_PLUS:
2419 case USB_SPEED_UNKNOWN:
2420 case USB_SPEED_WIRELESS:
2421 /* Should never happen because only LS/FS/HS endpoints will get
2422 * added to the endpoint list.
2428 tt_info->active_eps += 1;
2429 /* Insert the endpoint into the list, largest max packet size first. */
2430 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2432 if (ep_bw->max_packet_size >=
2433 smaller_ep->bw_info.max_packet_size) {
2434 /* Add the new ep before the smaller endpoint */
2435 list_add_tail(&virt_ep->bw_endpoint_list,
2436 &smaller_ep->bw_endpoint_list);
2440 /* Add the new endpoint at the end of the list. */
2441 list_add_tail(&virt_ep->bw_endpoint_list,
2442 &interval_bw->endpoints);
2445 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2446 struct xhci_virt_device *virt_dev,
2449 struct xhci_root_port_bw_info *rh_bw_info;
2450 if (!virt_dev->tt_info)
2453 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2454 if (old_active_eps == 0 &&
2455 virt_dev->tt_info->active_eps != 0) {
2456 rh_bw_info->num_active_tts += 1;
2457 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2458 } else if (old_active_eps != 0 &&
2459 virt_dev->tt_info->active_eps == 0) {
2460 rh_bw_info->num_active_tts -= 1;
2461 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2465 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2466 struct xhci_virt_device *virt_dev,
2467 struct xhci_container_ctx *in_ctx)
2469 struct xhci_bw_info ep_bw_info[31];
2471 struct xhci_input_control_ctx *ctrl_ctx;
2472 int old_active_eps = 0;
2474 if (virt_dev->tt_info)
2475 old_active_eps = virt_dev->tt_info->active_eps;
2477 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2479 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2484 for (i = 0; i < 31; i++) {
2485 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2488 /* Make a copy of the BW info in case we need to revert this */
2489 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2490 sizeof(ep_bw_info[i]));
2491 /* Drop the endpoint from the interval table if the endpoint is
2492 * being dropped or changed.
2494 if (EP_IS_DROPPED(ctrl_ctx, i))
2495 xhci_drop_ep_from_interval_table(xhci,
2496 &virt_dev->eps[i].bw_info,
2502 /* Overwrite the information stored in the endpoints' bw_info */
2503 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2504 for (i = 0; i < 31; i++) {
2505 /* Add any changed or added endpoints to the interval table */
2506 if (EP_IS_ADDED(ctrl_ctx, i))
2507 xhci_add_ep_to_interval_table(xhci,
2508 &virt_dev->eps[i].bw_info,
2515 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2516 /* Ok, this fits in the bandwidth we have.
2517 * Update the number of active TTs.
2519 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2523 /* We don't have enough bandwidth for this, revert the stored info. */
2524 for (i = 0; i < 31; i++) {
2525 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2528 /* Drop the new copies of any added or changed endpoints from
2529 * the interval table.
2531 if (EP_IS_ADDED(ctrl_ctx, i)) {
2532 xhci_drop_ep_from_interval_table(xhci,
2533 &virt_dev->eps[i].bw_info,
2539 /* Revert the endpoint back to its old information */
2540 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2541 sizeof(ep_bw_info[i]));
2542 /* Add any changed or dropped endpoints back into the table */
2543 if (EP_IS_DROPPED(ctrl_ctx, i))
2544 xhci_add_ep_to_interval_table(xhci,
2545 &virt_dev->eps[i].bw_info,
2555 /* Issue a configure endpoint command or evaluate context command
2556 * and wait for it to finish.
2558 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2559 struct usb_device *udev,
2560 struct xhci_command *command,
2561 bool ctx_change, bool must_succeed)
2564 unsigned long flags;
2565 struct xhci_input_control_ctx *ctrl_ctx;
2566 struct xhci_virt_device *virt_dev;
2571 spin_lock_irqsave(&xhci->lock, flags);
2573 if (xhci->xhc_state & XHCI_STATE_DYING) {
2574 spin_unlock_irqrestore(&xhci->lock, flags);
2578 virt_dev = xhci->devs[udev->slot_id];
2580 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2582 spin_unlock_irqrestore(&xhci->lock, flags);
2583 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2588 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2589 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2590 spin_unlock_irqrestore(&xhci->lock, flags);
2591 xhci_warn(xhci, "Not enough host resources, "
2592 "active endpoint contexts = %u\n",
2593 xhci->num_active_eps);
2596 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2597 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2598 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2599 xhci_free_host_resources(xhci, ctrl_ctx);
2600 spin_unlock_irqrestore(&xhci->lock, flags);
2601 xhci_warn(xhci, "Not enough bandwidth\n");
2606 ret = xhci_queue_configure_endpoint(xhci, command,
2607 command->in_ctx->dma,
2608 udev->slot_id, must_succeed);
2610 ret = xhci_queue_evaluate_context(xhci, command,
2611 command->in_ctx->dma,
2612 udev->slot_id, must_succeed);
2614 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2615 xhci_free_host_resources(xhci, ctrl_ctx);
2616 spin_unlock_irqrestore(&xhci->lock, flags);
2617 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2618 "FIXME allocate a new ring segment");
2621 xhci_ring_cmd_db(xhci);
2622 spin_unlock_irqrestore(&xhci->lock, flags);
2624 /* Wait for the configure endpoint command to complete */
2625 wait_for_completion(command->completion);
2628 ret = xhci_configure_endpoint_result(xhci, udev,
2631 ret = xhci_evaluate_context_result(xhci, udev,
2634 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2635 spin_lock_irqsave(&xhci->lock, flags);
2636 /* If the command failed, remove the reserved resources.
2637 * Otherwise, clean up the estimate to include dropped eps.
2640 xhci_free_host_resources(xhci, ctrl_ctx);
2642 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2643 spin_unlock_irqrestore(&xhci->lock, flags);
2648 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2649 struct xhci_virt_device *vdev, int i)
2651 struct xhci_virt_ep *ep = &vdev->eps[i];
2653 if (ep->ep_state & EP_HAS_STREAMS) {
2654 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2655 xhci_get_endpoint_address(i));
2656 xhci_free_stream_info(xhci, ep->stream_info);
2657 ep->stream_info = NULL;
2658 ep->ep_state &= ~EP_HAS_STREAMS;
2662 /* Called after one or more calls to xhci_add_endpoint() or
2663 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2664 * to call xhci_reset_bandwidth().
2666 * Since we are in the middle of changing either configuration or
2667 * installing a new alt setting, the USB core won't allow URBs to be
2668 * enqueued for any endpoint on the old config or interface. Nothing
2669 * else should be touching the xhci->devs[slot_id] structure, so we
2670 * don't need to take the xhci->lock for manipulating that.
2672 static int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2676 struct xhci_hcd *xhci;
2677 struct xhci_virt_device *virt_dev;
2678 struct xhci_input_control_ctx *ctrl_ctx;
2679 struct xhci_slot_ctx *slot_ctx;
2680 struct xhci_command *command;
2682 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2685 xhci = hcd_to_xhci(hcd);
2686 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
2687 (xhci->xhc_state & XHCI_STATE_REMOVING))
2690 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2691 virt_dev = xhci->devs[udev->slot_id];
2693 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2697 command->in_ctx = virt_dev->in_ctx;
2699 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2700 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2702 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2705 goto command_cleanup;
2707 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2708 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2709 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2711 /* Don't issue the command if there's no endpoints to update. */
2712 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2713 ctrl_ctx->drop_flags == 0) {
2715 goto command_cleanup;
2717 /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2718 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2719 for (i = 31; i >= 1; i--) {
2720 __le32 le32 = cpu_to_le32(BIT(i));
2722 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2723 || (ctrl_ctx->add_flags & le32) || i == 1) {
2724 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2725 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2730 ret = xhci_configure_endpoint(xhci, udev, command,
2733 /* Callee should call reset_bandwidth() */
2734 goto command_cleanup;
2736 /* Free any rings that were dropped, but not changed. */
2737 for (i = 1; i < 31; i++) {
2738 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2739 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2740 xhci_free_endpoint_ring(xhci, virt_dev, i);
2741 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2744 xhci_zero_in_ctx(xhci, virt_dev);
2746 * Install any rings for completely new endpoints or changed endpoints,
2747 * and free any old rings from changed endpoints.
2749 for (i = 1; i < 31; i++) {
2750 if (!virt_dev->eps[i].new_ring)
2752 /* Only free the old ring if it exists.
2753 * It may not if this is the first add of an endpoint.
2755 if (virt_dev->eps[i].ring) {
2756 xhci_free_endpoint_ring(xhci, virt_dev, i);
2758 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2759 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2760 virt_dev->eps[i].new_ring = NULL;
2763 kfree(command->completion);
2769 static void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2771 struct xhci_hcd *xhci;
2772 struct xhci_virt_device *virt_dev;
2775 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2778 xhci = hcd_to_xhci(hcd);
2780 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2781 virt_dev = xhci->devs[udev->slot_id];
2782 /* Free any rings allocated for added endpoints */
2783 for (i = 0; i < 31; i++) {
2784 if (virt_dev->eps[i].new_ring) {
2785 xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
2786 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2787 virt_dev->eps[i].new_ring = NULL;
2790 xhci_zero_in_ctx(xhci, virt_dev);
2793 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2794 struct xhci_container_ctx *in_ctx,
2795 struct xhci_container_ctx *out_ctx,
2796 struct xhci_input_control_ctx *ctrl_ctx,
2797 u32 add_flags, u32 drop_flags)
2799 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2800 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2801 xhci_slot_copy(xhci, in_ctx, out_ctx);
2802 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2805 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2806 unsigned int slot_id, unsigned int ep_index,
2807 struct xhci_dequeue_state *deq_state)
2809 struct xhci_input_control_ctx *ctrl_ctx;
2810 struct xhci_container_ctx *in_ctx;
2811 struct xhci_ep_ctx *ep_ctx;
2815 in_ctx = xhci->devs[slot_id]->in_ctx;
2816 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2818 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2823 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2824 xhci->devs[slot_id]->out_ctx, ep_index);
2825 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2826 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2827 deq_state->new_deq_ptr);
2829 xhci_warn(xhci, "WARN Cannot submit config ep after "
2830 "reset ep command\n");
2831 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2832 deq_state->new_deq_seg,
2833 deq_state->new_deq_ptr);
2836 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2838 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2839 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2840 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2841 added_ctxs, added_ctxs);
2844 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
2845 unsigned int stream_id, struct xhci_td *td)
2847 struct xhci_dequeue_state deq_state;
2848 struct xhci_virt_ep *ep;
2849 struct usb_device *udev = td->urb->dev;
2851 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2852 "Cleaning up stalled endpoint ring");
2853 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2854 /* We need to move the HW's dequeue pointer past this TD,
2855 * or it will attempt to resend it on the next doorbell ring.
2857 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2858 ep_index, stream_id, td, &deq_state);
2860 if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2863 /* HW with the reset endpoint quirk will use the saved dequeue state to
2864 * issue a configure endpoint command later.
2866 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2867 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2868 "Queueing new dequeue state");
2869 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2870 ep_index, &deq_state);
2872 /* Better hope no one uses the input context between now and the
2873 * reset endpoint completion!
2874 * XXX: No idea how this hardware will react when stream rings
2877 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2878 "Setting up input context for "
2879 "configure endpoint command");
2880 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2881 ep_index, &deq_state);
2885 /* Called when clearing halted device. The core should have sent the control
2886 * message to clear the device halt condition. The host side of the halt should
2887 * already be cleared with a reset endpoint command issued when the STALL tx
2888 * event was received.
2890 * Context: in_interrupt
2893 static void xhci_endpoint_reset(struct usb_hcd *hcd,
2894 struct usb_host_endpoint *ep)
2896 struct xhci_hcd *xhci;
2898 xhci = hcd_to_xhci(hcd);
2901 * We might need to implement the config ep cmd in xhci 4.8.1 note:
2902 * The Reset Endpoint Command may only be issued to endpoints in the
2903 * Halted state. If software wishes reset the Data Toggle or Sequence
2904 * Number of an endpoint that isn't in the Halted state, then software
2905 * may issue a Configure Endpoint Command with the Drop and Add bits set
2906 * for the target endpoint. that is in the Stopped state.
2909 /* For now just print debug to follow the situation */
2910 xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
2911 ep->desc.bEndpointAddress);
2914 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2915 struct usb_device *udev, struct usb_host_endpoint *ep,
2916 unsigned int slot_id)
2919 unsigned int ep_index;
2920 unsigned int ep_state;
2924 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2927 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2928 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2929 " descriptor for ep 0x%x does not support streams\n",
2930 ep->desc.bEndpointAddress);
2934 ep_index = xhci_get_endpoint_index(&ep->desc);
2935 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2936 if (ep_state & EP_HAS_STREAMS ||
2937 ep_state & EP_GETTING_STREAMS) {
2938 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2939 "already has streams set up.\n",
2940 ep->desc.bEndpointAddress);
2941 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2942 "dynamic stream context array reallocation.\n");
2945 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2946 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2947 "endpoint 0x%x; URBs are pending.\n",
2948 ep->desc.bEndpointAddress);
2954 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2955 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2957 unsigned int max_streams;
2959 /* The stream context array size must be a power of two */
2960 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2962 * Find out how many primary stream array entries the host controller
2963 * supports. Later we may use secondary stream arrays (similar to 2nd
2964 * level page entries), but that's an optional feature for xHCI host
2965 * controllers. xHCs must support at least 4 stream IDs.
2967 max_streams = HCC_MAX_PSA(xhci->hcc_params);
2968 if (*num_stream_ctxs > max_streams) {
2969 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2971 *num_stream_ctxs = max_streams;
2972 *num_streams = max_streams;
2976 /* Returns an error code if one of the endpoint already has streams.
2977 * This does not change any data structures, it only checks and gathers
2980 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2981 struct usb_device *udev,
2982 struct usb_host_endpoint **eps, unsigned int num_eps,
2983 unsigned int *num_streams, u32 *changed_ep_bitmask)
2985 unsigned int max_streams;
2986 unsigned int endpoint_flag;
2990 for (i = 0; i < num_eps; i++) {
2991 ret = xhci_check_streams_endpoint(xhci, udev,
2992 eps[i], udev->slot_id);
2996 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2997 if (max_streams < (*num_streams - 1)) {
2998 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2999 eps[i]->desc.bEndpointAddress,
3001 *num_streams = max_streams+1;
3004 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3005 if (*changed_ep_bitmask & endpoint_flag)
3007 *changed_ep_bitmask |= endpoint_flag;
3012 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3013 struct usb_device *udev,
3014 struct usb_host_endpoint **eps, unsigned int num_eps)
3016 u32 changed_ep_bitmask = 0;
3017 unsigned int slot_id;
3018 unsigned int ep_index;
3019 unsigned int ep_state;
3022 slot_id = udev->slot_id;
3023 if (!xhci->devs[slot_id])
3026 for (i = 0; i < num_eps; i++) {
3027 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3028 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3029 /* Are streams already being freed for the endpoint? */
3030 if (ep_state & EP_GETTING_NO_STREAMS) {
3031 xhci_warn(xhci, "WARN Can't disable streams for "
3033 "streams are being disabled already\n",
3034 eps[i]->desc.bEndpointAddress);
3037 /* Are there actually any streams to free? */
3038 if (!(ep_state & EP_HAS_STREAMS) &&
3039 !(ep_state & EP_GETTING_STREAMS)) {
3040 xhci_warn(xhci, "WARN Can't disable streams for "
3042 "streams are already disabled!\n",
3043 eps[i]->desc.bEndpointAddress);
3044 xhci_warn(xhci, "WARN xhci_free_streams() called "
3045 "with non-streams endpoint\n");
3048 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3050 return changed_ep_bitmask;
3054 * The USB device drivers use this function (through the HCD interface in USB
3055 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3056 * coordinate mass storage command queueing across multiple endpoints (basically
3057 * a stream ID == a task ID).
3059 * Setting up streams involves allocating the same size stream context array
3060 * for each endpoint and issuing a configure endpoint command for all endpoints.
3062 * Don't allow the call to succeed if one endpoint only supports one stream
3063 * (which means it doesn't support streams at all).
3065 * Drivers may get less stream IDs than they asked for, if the host controller
3066 * hardware or endpoints claim they can't support the number of requested
3069 static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3070 struct usb_host_endpoint **eps, unsigned int num_eps,
3071 unsigned int num_streams, gfp_t mem_flags)
3074 struct xhci_hcd *xhci;
3075 struct xhci_virt_device *vdev;
3076 struct xhci_command *config_cmd;
3077 struct xhci_input_control_ctx *ctrl_ctx;
3078 unsigned int ep_index;
3079 unsigned int num_stream_ctxs;
3080 unsigned int max_packet;
3081 unsigned long flags;
3082 u32 changed_ep_bitmask = 0;
3087 /* Add one to the number of streams requested to account for
3088 * stream 0 that is reserved for xHCI usage.
3091 xhci = hcd_to_xhci(hcd);
3092 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3095 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3096 if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3097 HCC_MAX_PSA(xhci->hcc_params) < 4) {
3098 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3102 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3106 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3108 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3110 xhci_free_command(xhci, config_cmd);
3114 /* Check to make sure all endpoints are not already configured for
3115 * streams. While we're at it, find the maximum number of streams that
3116 * all the endpoints will support and check for duplicate endpoints.
3118 spin_lock_irqsave(&xhci->lock, flags);
3119 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3120 num_eps, &num_streams, &changed_ep_bitmask);
3122 xhci_free_command(xhci, config_cmd);
3123 spin_unlock_irqrestore(&xhci->lock, flags);
3126 if (num_streams <= 1) {
3127 xhci_warn(xhci, "WARN: endpoints can't handle "
3128 "more than one stream.\n");
3129 xhci_free_command(xhci, config_cmd);
3130 spin_unlock_irqrestore(&xhci->lock, flags);
3133 vdev = xhci->devs[udev->slot_id];
3134 /* Mark each endpoint as being in transition, so
3135 * xhci_urb_enqueue() will reject all URBs.
3137 for (i = 0; i < num_eps; i++) {
3138 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3139 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3141 spin_unlock_irqrestore(&xhci->lock, flags);
3143 /* Setup internal data structures and allocate HW data structures for
3144 * streams (but don't install the HW structures in the input context
3145 * until we're sure all memory allocation succeeded).
3147 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3148 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3149 num_stream_ctxs, num_streams);
3151 for (i = 0; i < num_eps; i++) {
3152 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3153 max_packet = usb_endpoint_maxp(&eps[i]->desc);
3154 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3157 max_packet, mem_flags);
3158 if (!vdev->eps[ep_index].stream_info)
3160 /* Set maxPstreams in endpoint context and update deq ptr to
3161 * point to stream context array. FIXME
3165 /* Set up the input context for a configure endpoint command. */
3166 for (i = 0; i < num_eps; i++) {
3167 struct xhci_ep_ctx *ep_ctx;
3169 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3170 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3172 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3173 vdev->out_ctx, ep_index);
3174 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3175 vdev->eps[ep_index].stream_info);
3177 /* Tell the HW to drop its old copy of the endpoint context info
3178 * and add the updated copy from the input context.
3180 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3181 vdev->out_ctx, ctrl_ctx,
3182 changed_ep_bitmask, changed_ep_bitmask);
3184 /* Issue and wait for the configure endpoint command */
3185 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3188 /* xHC rejected the configure endpoint command for some reason, so we
3189 * leave the old ring intact and free our internal streams data
3195 spin_lock_irqsave(&xhci->lock, flags);
3196 for (i = 0; i < num_eps; i++) {
3197 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3198 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3199 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3200 udev->slot_id, ep_index);
3201 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3203 xhci_free_command(xhci, config_cmd);
3204 spin_unlock_irqrestore(&xhci->lock, flags);
3206 /* Subtract 1 for stream 0, which drivers can't use */
3207 return num_streams - 1;
3210 /* If it didn't work, free the streams! */
3211 for (i = 0; i < num_eps; i++) {
3212 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3213 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3214 vdev->eps[ep_index].stream_info = NULL;
3215 /* FIXME Unset maxPstreams in endpoint context and
3216 * update deq ptr to point to normal string ring.
3218 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3219 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3220 xhci_endpoint_zero(xhci, vdev, eps[i]);
3222 xhci_free_command(xhci, config_cmd);
3226 /* Transition the endpoint from using streams to being a "normal" endpoint
3229 * Modify the endpoint context state, submit a configure endpoint command,
3230 * and free all endpoint rings for streams if that completes successfully.
3232 static int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3233 struct usb_host_endpoint **eps, unsigned int num_eps,
3237 struct xhci_hcd *xhci;
3238 struct xhci_virt_device *vdev;
3239 struct xhci_command *command;
3240 struct xhci_input_control_ctx *ctrl_ctx;
3241 unsigned int ep_index;
3242 unsigned long flags;
3243 u32 changed_ep_bitmask;
3245 xhci = hcd_to_xhci(hcd);
3246 vdev = xhci->devs[udev->slot_id];
3248 /* Set up a configure endpoint command to remove the streams rings */
3249 spin_lock_irqsave(&xhci->lock, flags);
3250 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3251 udev, eps, num_eps);
3252 if (changed_ep_bitmask == 0) {
3253 spin_unlock_irqrestore(&xhci->lock, flags);
3257 /* Use the xhci_command structure from the first endpoint. We may have
3258 * allocated too many, but the driver may call xhci_free_streams() for
3259 * each endpoint it grouped into one call to xhci_alloc_streams().
3261 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3262 command = vdev->eps[ep_index].stream_info->free_streams_command;
3263 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3265 spin_unlock_irqrestore(&xhci->lock, flags);
3266 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3271 for (i = 0; i < num_eps; i++) {
3272 struct xhci_ep_ctx *ep_ctx;
3274 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3275 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3276 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3277 EP_GETTING_NO_STREAMS;
3279 xhci_endpoint_copy(xhci, command->in_ctx,
3280 vdev->out_ctx, ep_index);
3281 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3282 &vdev->eps[ep_index]);
3284 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3285 vdev->out_ctx, ctrl_ctx,
3286 changed_ep_bitmask, changed_ep_bitmask);
3287 spin_unlock_irqrestore(&xhci->lock, flags);
3289 /* Issue and wait for the configure endpoint command,
3290 * which must succeed.
3292 ret = xhci_configure_endpoint(xhci, udev, command,
3295 /* xHC rejected the configure endpoint command for some reason, so we
3296 * leave the streams rings intact.
3301 spin_lock_irqsave(&xhci->lock, flags);
3302 for (i = 0; i < num_eps; i++) {
3303 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3304 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3305 vdev->eps[ep_index].stream_info = NULL;
3306 /* FIXME Unset maxPstreams in endpoint context and
3307 * update deq ptr to point to normal string ring.
3309 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3310 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3312 spin_unlock_irqrestore(&xhci->lock, flags);
3318 * Deletes endpoint resources for endpoints that were active before a Reset
3319 * Device command, or a Disable Slot command. The Reset Device command leaves
3320 * the control endpoint intact, whereas the Disable Slot command deletes it.
3322 * Must be called with xhci->lock held.
3324 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3325 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3328 unsigned int num_dropped_eps = 0;
3329 unsigned int drop_flags = 0;
3331 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3332 if (virt_dev->eps[i].ring) {
3333 drop_flags |= 1 << i;
3337 xhci->num_active_eps -= num_dropped_eps;
3338 if (num_dropped_eps)
3339 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3340 "Dropped %u ep ctxs, flags = 0x%x, "
3342 num_dropped_eps, drop_flags,
3343 xhci->num_active_eps);
3347 * This submits a Reset Device Command, which will set the device state to 0,
3348 * set the device address to 0, and disable all the endpoints except the default
3349 * control endpoint. The USB core should come back and call
3350 * xhci_address_device(), and then re-set up the configuration. If this is
3351 * called because of a usb_reset_and_verify_device(), then the old alternate
3352 * settings will be re-installed through the normal bandwidth allocation
3355 * Wait for the Reset Device command to finish. Remove all structures
3356 * associated with the endpoints that were disabled. Clear the input device
3357 * structure? Reset the control endpoint 0 max packet size?
3359 * If the virt_dev to be reset does not exist or does not match the udev,
3360 * it means the device is lost, possibly due to the xHC restore error and
3361 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3362 * re-allocate the device.
3364 static int xhci_discover_or_reset_device(struct usb_hcd *hcd,
3365 struct usb_device *udev)
3368 unsigned long flags;
3369 struct xhci_hcd *xhci;
3370 unsigned int slot_id;
3371 struct xhci_virt_device *virt_dev;
3372 struct xhci_command *reset_device_cmd;
3373 int last_freed_endpoint;
3374 struct xhci_slot_ctx *slot_ctx;
3375 int old_active_eps = 0;
3377 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3380 xhci = hcd_to_xhci(hcd);
3381 slot_id = udev->slot_id;
3382 virt_dev = xhci->devs[slot_id];
3384 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3385 "not exist. Re-allocate the device\n", slot_id);
3386 ret = xhci_alloc_dev(hcd, udev);
3393 if (virt_dev->tt_info)
3394 old_active_eps = virt_dev->tt_info->active_eps;
3396 if (virt_dev->udev != udev) {
3397 /* If the virt_dev and the udev does not match, this virt_dev
3398 * may belong to another udev.
3399 * Re-allocate the device.
3401 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3402 "not match the udev. Re-allocate the device\n",
3404 ret = xhci_alloc_dev(hcd, udev);
3411 /* If device is not setup, there is no point in resetting it */
3412 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3413 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3414 SLOT_STATE_DISABLED)
3417 trace_xhci_discover_or_reset_device(slot_ctx);
3419 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3420 /* Allocate the command structure that holds the struct completion.
3421 * Assume we're in process context, since the normal device reset
3422 * process has to wait for the device anyway. Storage devices are
3423 * reset as part of error handling, so use GFP_NOIO instead of
3426 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3427 if (!reset_device_cmd) {
3428 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3432 /* Attempt to submit the Reset Device command to the command ring */
3433 spin_lock_irqsave(&xhci->lock, flags);
3435 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3437 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3438 spin_unlock_irqrestore(&xhci->lock, flags);
3439 goto command_cleanup;
3441 xhci_ring_cmd_db(xhci);
3442 spin_unlock_irqrestore(&xhci->lock, flags);
3444 /* Wait for the Reset Device command to finish */
3445 wait_for_completion(reset_device_cmd->completion);
3447 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3448 * unless we tried to reset a slot ID that wasn't enabled,
3449 * or the device wasn't in the addressed or configured state.
3451 ret = reset_device_cmd->status;
3453 case COMP_COMMAND_ABORTED:
3454 case COMP_COMMAND_RING_STOPPED:
3455 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3457 goto command_cleanup;
3458 case COMP_SLOT_NOT_ENABLED_ERROR: /* 0.95 completion for bad slot ID */
3459 case COMP_CONTEXT_STATE_ERROR: /* 0.96 completion code for same thing */
3460 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3462 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3463 xhci_dbg(xhci, "Not freeing device rings.\n");
3464 /* Don't treat this as an error. May change my mind later. */
3466 goto command_cleanup;
3468 xhci_dbg(xhci, "Successful reset device command.\n");
3471 if (xhci_is_vendor_info_code(xhci, ret))
3473 xhci_warn(xhci, "Unknown completion code %u for "
3474 "reset device command.\n", ret);
3476 goto command_cleanup;
3479 /* Free up host controller endpoint resources */
3480 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3481 spin_lock_irqsave(&xhci->lock, flags);
3482 /* Don't delete the default control endpoint resources */
3483 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3484 spin_unlock_irqrestore(&xhci->lock, flags);
3487 /* Everything but endpoint 0 is disabled, so free the rings. */
3488 last_freed_endpoint = 1;
3489 for (i = 1; i < 31; i++) {
3490 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3492 if (ep->ep_state & EP_HAS_STREAMS) {
3493 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3494 xhci_get_endpoint_address(i));
3495 xhci_free_stream_info(xhci, ep->stream_info);
3496 ep->stream_info = NULL;
3497 ep->ep_state &= ~EP_HAS_STREAMS;
3501 xhci_debugfs_remove_endpoint(xhci, virt_dev, i);
3502 xhci_free_endpoint_ring(xhci, virt_dev, i);
3503 last_freed_endpoint = i;
3505 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3506 xhci_drop_ep_from_interval_table(xhci,
3507 &virt_dev->eps[i].bw_info,
3512 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3514 /* If necessary, update the number of active TTs on this root port */
3515 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3519 xhci_free_command(xhci, reset_device_cmd);
3524 * At this point, the struct usb_device is about to go away, the device has
3525 * disconnected, and all traffic has been stopped and the endpoints have been
3526 * disabled. Free any HC data structures associated with that device.
3528 static void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3531 struct xhci_virt_device *virt_dev;
3532 struct xhci_slot_ctx *slot_ctx;
3534 struct xhci_command *command;
3536 xhci_debugfs_remove_slot(xhci, udev->slot_id);
3538 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3542 #ifndef CONFIG_USB_DEFAULT_PERSIST
3544 * We called pm_runtime_get_noresume when the device was attached.
3545 * Decrement the counter here to allow controller to runtime suspend
3546 * if no devices remain.
3548 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3549 pm_runtime_put_noidle(hcd->self.controller);
3552 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3553 /* If the host is halted due to driver unload, we still need to free the
3556 if (ret <= 0 && ret != -ENODEV) {
3561 virt_dev = xhci->devs[udev->slot_id];
3562 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3563 trace_xhci_free_dev(slot_ctx);
3565 /* Stop any wayward timer functions (which may grab the lock) */
3566 for (i = 0; i < 31; i++) {
3567 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING;
3568 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3571 xhci_disable_slot(xhci, command, udev->slot_id);
3573 * Event command completion handler will free any data structures
3574 * associated with the slot. XXX Can free sleep?
3578 int xhci_disable_slot(struct xhci_hcd *xhci, struct xhci_command *command,
3581 unsigned long flags;
3584 struct xhci_virt_device *virt_dev;
3586 virt_dev = xhci->devs[slot_id];
3590 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3594 spin_lock_irqsave(&xhci->lock, flags);
3595 /* Don't disable the slot if the host controller is dead. */
3596 state = readl(&xhci->op_regs->status);
3597 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3598 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3599 xhci_free_virt_device(xhci, slot_id);
3600 spin_unlock_irqrestore(&xhci->lock, flags);
3605 ret = xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3608 spin_unlock_irqrestore(&xhci->lock, flags);
3609 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3612 xhci_ring_cmd_db(xhci);
3613 spin_unlock_irqrestore(&xhci->lock, flags);
3618 * Checks if we have enough host controller resources for the default control
3621 * Must be called with xhci->lock held.
3623 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3625 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3626 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3627 "Not enough ep ctxs: "
3628 "%u active, need to add 1, limit is %u.",
3629 xhci->num_active_eps, xhci->limit_active_eps);
3632 xhci->num_active_eps += 1;
3633 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3634 "Adding 1 ep ctx, %u now active.",
3635 xhci->num_active_eps);
3641 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3642 * timed out, or allocating memory failed. Returns 1 on success.
3644 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3646 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3647 struct xhci_virt_device *vdev;
3648 struct xhci_slot_ctx *slot_ctx;
3649 unsigned long flags;
3651 struct xhci_command *command;
3653 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3657 /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3658 mutex_lock(&xhci->mutex);
3659 spin_lock_irqsave(&xhci->lock, flags);
3660 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3662 spin_unlock_irqrestore(&xhci->lock, flags);
3663 mutex_unlock(&xhci->mutex);
3664 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3665 xhci_free_command(xhci, command);
3668 xhci_ring_cmd_db(xhci);
3669 spin_unlock_irqrestore(&xhci->lock, flags);
3671 wait_for_completion(command->completion);
3672 slot_id = command->slot_id;
3673 mutex_unlock(&xhci->mutex);
3675 if (!slot_id || command->status != COMP_SUCCESS) {
3676 xhci_err(xhci, "Error while assigning device slot ID\n");
3677 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3679 readl(&xhci->cap_regs->hcs_params1)));
3680 xhci_free_command(xhci, command);
3684 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3685 spin_lock_irqsave(&xhci->lock, flags);
3686 ret = xhci_reserve_host_control_ep_resources(xhci);
3688 spin_unlock_irqrestore(&xhci->lock, flags);
3689 xhci_warn(xhci, "Not enough host resources, "
3690 "active endpoint contexts = %u\n",
3691 xhci->num_active_eps);
3694 spin_unlock_irqrestore(&xhci->lock, flags);
3696 /* Use GFP_NOIO, since this function can be called from
3697 * xhci_discover_or_reset_device(), which may be called as part of
3698 * mass storage driver error handling.
3700 if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3701 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3704 vdev = xhci->devs[slot_id];
3705 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx);
3706 trace_xhci_alloc_dev(slot_ctx);
3708 udev->slot_id = slot_id;
3710 xhci_debugfs_create_slot(xhci, slot_id);
3712 #ifndef CONFIG_USB_DEFAULT_PERSIST
3714 * If resetting upon resume, we can't put the controller into runtime
3715 * suspend if there is a device attached.
3717 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3718 pm_runtime_get_noresume(hcd->self.controller);
3722 xhci_free_command(xhci, command);
3723 /* Is this a LS or FS device under a HS hub? */
3724 /* Hub or peripherial? */
3728 /* Disable slot, if we can do it without mem alloc */
3729 kfree(command->completion);
3730 command->completion = NULL;
3731 command->status = 0;
3732 return xhci_disable_slot(xhci, command, udev->slot_id);
3736 * Issue an Address Device command and optionally send a corresponding
3737 * SetAddress request to the device.
3739 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3740 enum xhci_setup_dev setup)
3742 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3743 unsigned long flags;
3744 struct xhci_virt_device *virt_dev;
3746 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3747 struct xhci_slot_ctx *slot_ctx;
3748 struct xhci_input_control_ctx *ctrl_ctx;
3750 struct xhci_command *command = NULL;
3752 mutex_lock(&xhci->mutex);
3754 if (xhci->xhc_state) { /* dying, removing or halted */
3759 if (!udev->slot_id) {
3760 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3761 "Bad Slot ID %d", udev->slot_id);
3766 virt_dev = xhci->devs[udev->slot_id];
3768 if (WARN_ON(!virt_dev)) {
3770 * In plug/unplug torture test with an NEC controller,
3771 * a zero-dereference was observed once due to virt_dev = 0.
3772 * Print useful debug rather than crash if it is observed again!
3774 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3779 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3780 trace_xhci_setup_device_slot(slot_ctx);
3782 if (setup == SETUP_CONTEXT_ONLY) {
3783 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3784 SLOT_STATE_DEFAULT) {
3785 xhci_dbg(xhci, "Slot already in default state\n");
3790 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
3796 command->in_ctx = virt_dev->in_ctx;
3798 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3799 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3801 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3807 * If this is the first Set Address since device plug-in or
3808 * virt_device realloaction after a resume with an xHCI power loss,
3809 * then set up the slot context.
3811 if (!slot_ctx->dev_info)
3812 xhci_setup_addressable_virt_dev(xhci, udev);
3813 /* Otherwise, update the control endpoint ring enqueue pointer. */
3815 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3816 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3817 ctrl_ctx->drop_flags = 0;
3819 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3820 le32_to_cpu(slot_ctx->dev_info) >> 27);
3822 spin_lock_irqsave(&xhci->lock, flags);
3823 trace_xhci_setup_device(virt_dev);
3824 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3825 udev->slot_id, setup);
3827 spin_unlock_irqrestore(&xhci->lock, flags);
3828 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3829 "FIXME: allocate a command ring segment");
3832 xhci_ring_cmd_db(xhci);
3833 spin_unlock_irqrestore(&xhci->lock, flags);
3835 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3836 wait_for_completion(command->completion);
3838 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3839 * the SetAddress() "recovery interval" required by USB and aborting the
3840 * command on a timeout.
3842 switch (command->status) {
3843 case COMP_COMMAND_ABORTED:
3844 case COMP_COMMAND_RING_STOPPED:
3845 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3848 case COMP_CONTEXT_STATE_ERROR:
3849 case COMP_SLOT_NOT_ENABLED_ERROR:
3850 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3851 act, udev->slot_id);
3854 case COMP_USB_TRANSACTION_ERROR:
3855 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3858 case COMP_INCOMPATIBLE_DEVICE_ERROR:
3859 dev_warn(&udev->dev,
3860 "ERROR: Incompatible device for setup %s command\n", act);
3864 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3865 "Successful setup %s command", act);
3869 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3870 act, command->status);
3871 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3877 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3878 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3879 "Op regs DCBAA ptr = %#016llx", temp_64);
3880 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3881 "Slot ID %d dcbaa entry @%p = %#016llx",
3883 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3884 (unsigned long long)
3885 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3886 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3887 "Output Context DMA address = %#08llx",
3888 (unsigned long long)virt_dev->out_ctx->dma);
3889 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3890 le32_to_cpu(slot_ctx->dev_info) >> 27);
3892 * USB core uses address 1 for the roothubs, so we add one to the
3893 * address given back to us by the HC.
3895 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3896 le32_to_cpu(slot_ctx->dev_info) >> 27);
3897 /* Zero the input context control for later use */
3898 ctrl_ctx->add_flags = 0;
3899 ctrl_ctx->drop_flags = 0;
3901 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3902 "Internal device address = %d",
3903 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3905 mutex_unlock(&xhci->mutex);
3907 kfree(command->completion);
3913 static int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3915 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3918 static int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3920 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3924 * Transfer the port index into real index in the HW port status
3925 * registers. Caculate offset between the port's PORTSC register
3926 * and port status base. Divide the number of per port register
3927 * to get the real index. The raw port number bases 1.
3929 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3931 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3932 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3933 __le32 __iomem *addr;
3936 if (hcd->speed < HCD_USB3)
3937 addr = xhci->usb2_ports[port1 - 1];
3939 addr = xhci->usb3_ports[port1 - 1];
3941 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3946 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3947 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3949 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3950 struct usb_device *udev, u16 max_exit_latency)
3952 struct xhci_virt_device *virt_dev;
3953 struct xhci_command *command;
3954 struct xhci_input_control_ctx *ctrl_ctx;
3955 struct xhci_slot_ctx *slot_ctx;
3956 unsigned long flags;
3959 spin_lock_irqsave(&xhci->lock, flags);
3961 virt_dev = xhci->devs[udev->slot_id];
3964 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3965 * xHC was re-initialized. Exit latency will be set later after
3966 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3969 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3970 spin_unlock_irqrestore(&xhci->lock, flags);
3974 /* Attempt to issue an Evaluate Context command to change the MEL. */
3975 command = xhci->lpm_command;
3976 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3978 spin_unlock_irqrestore(&xhci->lock, flags);
3979 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3984 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3985 spin_unlock_irqrestore(&xhci->lock, flags);
3987 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3988 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3989 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3990 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3991 slot_ctx->dev_state = 0;
3993 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3994 "Set up evaluate context for LPM MEL change.");
3996 /* Issue and wait for the evaluate context command. */
3997 ret = xhci_configure_endpoint(xhci, udev, command,
4001 spin_lock_irqsave(&xhci->lock, flags);
4002 virt_dev->current_mel = max_exit_latency;
4003 spin_unlock_irqrestore(&xhci->lock, flags);
4010 /* BESL to HIRD Encoding array for USB2 LPM */
4011 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4012 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4014 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4015 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4016 struct usb_device *udev)
4018 int u2del, besl, besl_host;
4019 int besl_device = 0;
4022 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4023 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4025 if (field & USB_BESL_SUPPORT) {
4026 for (besl_host = 0; besl_host < 16; besl_host++) {
4027 if (xhci_besl_encoding[besl_host] >= u2del)
4030 /* Use baseline BESL value as default */
4031 if (field & USB_BESL_BASELINE_VALID)
4032 besl_device = USB_GET_BESL_BASELINE(field);
4033 else if (field & USB_BESL_DEEP_VALID)
4034 besl_device = USB_GET_BESL_DEEP(field);
4039 besl_host = (u2del - 51) / 75 + 1;
4042 besl = besl_host + besl_device;
4049 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4050 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4057 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4059 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4060 l1 = udev->l1_params.timeout / 256;
4062 /* device has preferred BESLD */
4063 if (field & USB_BESL_DEEP_VALID) {
4064 besld = USB_GET_BESL_DEEP(field);
4068 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4071 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4072 struct usb_device *udev, int enable)
4074 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4075 __le32 __iomem **port_array;
4076 __le32 __iomem *pm_addr, *hlpm_addr;
4077 u32 pm_val, hlpm_val, field;
4078 unsigned int port_num;
4079 unsigned long flags;
4080 int hird, exit_latency;
4083 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4087 if (!udev->parent || udev->parent->parent ||
4088 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4091 if (udev->usb2_hw_lpm_capable != 1)
4094 spin_lock_irqsave(&xhci->lock, flags);
4096 port_array = xhci->usb2_ports;
4097 port_num = udev->portnum - 1;
4098 pm_addr = port_array[port_num] + PORTPMSC;
4099 pm_val = readl(pm_addr);
4100 hlpm_addr = port_array[port_num] + PORTHLPMC;
4101 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4103 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4104 enable ? "enable" : "disable", port_num + 1);
4106 if (enable && !(xhci->quirks & XHCI_HW_LPM_DISABLE)) {
4107 /* Host supports BESL timeout instead of HIRD */
4108 if (udev->usb2_hw_lpm_besl_capable) {
4109 /* if device doesn't have a preferred BESL value use a
4110 * default one which works with mixed HIRD and BESL
4111 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4113 if ((field & USB_BESL_SUPPORT) &&
4114 (field & USB_BESL_BASELINE_VALID))
4115 hird = USB_GET_BESL_BASELINE(field);
4117 hird = udev->l1_params.besl;
4119 exit_latency = xhci_besl_encoding[hird];
4120 spin_unlock_irqrestore(&xhci->lock, flags);
4122 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4123 * input context for link powermanagement evaluate
4124 * context commands. It is protected by hcd->bandwidth
4125 * mutex and is shared by all devices. We need to set
4126 * the max ext latency in USB 2 BESL LPM as well, so
4127 * use the same mutex and xhci_change_max_exit_latency()
4129 mutex_lock(hcd->bandwidth_mutex);
4130 ret = xhci_change_max_exit_latency(xhci, udev,
4132 mutex_unlock(hcd->bandwidth_mutex);
4136 spin_lock_irqsave(&xhci->lock, flags);
4138 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4139 writel(hlpm_val, hlpm_addr);
4143 hird = xhci_calculate_hird_besl(xhci, udev);
4146 pm_val &= ~PORT_HIRD_MASK;
4147 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4148 writel(pm_val, pm_addr);
4149 pm_val = readl(pm_addr);
4151 writel(pm_val, pm_addr);
4155 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4156 writel(pm_val, pm_addr);
4159 if (udev->usb2_hw_lpm_besl_capable) {
4160 spin_unlock_irqrestore(&xhci->lock, flags);
4161 mutex_lock(hcd->bandwidth_mutex);
4162 xhci_change_max_exit_latency(xhci, udev, 0);
4163 mutex_unlock(hcd->bandwidth_mutex);
4168 spin_unlock_irqrestore(&xhci->lock, flags);
4172 /* check if a usb2 port supports a given extened capability protocol
4173 * only USB2 ports extended protocol capability values are cached.
4174 * Return 1 if capability is supported
4176 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4177 unsigned capability)
4179 u32 port_offset, port_count;
4182 for (i = 0; i < xhci->num_ext_caps; i++) {
4183 if (xhci->ext_caps[i] & capability) {
4184 /* port offsets starts at 1 */
4185 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4186 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4187 if (port >= port_offset &&
4188 port < port_offset + port_count)
4195 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4197 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4198 int portnum = udev->portnum - 1;
4200 if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4204 /* we only support lpm for non-hub device connected to root hub yet */
4205 if (!udev->parent || udev->parent->parent ||
4206 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4209 if (xhci->hw_lpm_support == 1 &&
4210 xhci_check_usb2_port_capability(
4211 xhci, portnum, XHCI_HLC)) {
4212 udev->usb2_hw_lpm_capable = 1;
4213 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4214 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4215 if (xhci_check_usb2_port_capability(xhci, portnum,
4217 udev->usb2_hw_lpm_besl_capable = 1;
4223 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4225 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4226 static unsigned long long xhci_service_interval_to_ns(
4227 struct usb_endpoint_descriptor *desc)
4229 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4232 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4233 enum usb3_link_state state)
4235 unsigned long long sel;
4236 unsigned long long pel;
4237 unsigned int max_sel_pel;
4242 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4243 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4244 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4245 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4249 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4250 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4251 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4255 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4257 return USB3_LPM_DISABLED;
4260 if (sel <= max_sel_pel && pel <= max_sel_pel)
4261 return USB3_LPM_DEVICE_INITIATED;
4263 if (sel > max_sel_pel)
4264 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4265 "due to long SEL %llu ms\n",
4268 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4269 "due to long PEL %llu ms\n",
4271 return USB3_LPM_DISABLED;
4274 /* The U1 timeout should be the maximum of the following values:
4275 * - For control endpoints, U1 system exit latency (SEL) * 3
4276 * - For bulk endpoints, U1 SEL * 5
4277 * - For interrupt endpoints:
4278 * - Notification EPs, U1 SEL * 3
4279 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4280 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4282 static unsigned long long xhci_calculate_intel_u1_timeout(
4283 struct usb_device *udev,
4284 struct usb_endpoint_descriptor *desc)
4286 unsigned long long timeout_ns;
4290 ep_type = usb_endpoint_type(desc);
4292 case USB_ENDPOINT_XFER_CONTROL:
4293 timeout_ns = udev->u1_params.sel * 3;
4295 case USB_ENDPOINT_XFER_BULK:
4296 timeout_ns = udev->u1_params.sel * 5;
4298 case USB_ENDPOINT_XFER_INT:
4299 intr_type = usb_endpoint_interrupt_type(desc);
4300 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4301 timeout_ns = udev->u1_params.sel * 3;
4304 /* Otherwise the calculation is the same as isoc eps */
4305 case USB_ENDPOINT_XFER_ISOC:
4306 timeout_ns = xhci_service_interval_to_ns(desc);
4307 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4308 if (timeout_ns < udev->u1_params.sel * 2)
4309 timeout_ns = udev->u1_params.sel * 2;
4318 /* Returns the hub-encoded U1 timeout value. */
4319 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4320 struct usb_device *udev,
4321 struct usb_endpoint_descriptor *desc)
4323 unsigned long long timeout_ns;
4325 if (xhci->quirks & XHCI_INTEL_HOST)
4326 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4328 timeout_ns = udev->u1_params.sel;
4330 /* The U1 timeout is encoded in 1us intervals.
4331 * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4333 if (timeout_ns == USB3_LPM_DISABLED)
4336 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4338 /* If the necessary timeout value is bigger than what we can set in the
4339 * USB 3.0 hub, we have to disable hub-initiated U1.
4341 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4343 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4344 "due to long timeout %llu ms\n", timeout_ns);
4345 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4348 /* The U2 timeout should be the maximum of:
4349 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4350 * - largest bInterval of any active periodic endpoint (to avoid going
4351 * into lower power link states between intervals).
4352 * - the U2 Exit Latency of the device
4354 static unsigned long long xhci_calculate_intel_u2_timeout(
4355 struct usb_device *udev,
4356 struct usb_endpoint_descriptor *desc)
4358 unsigned long long timeout_ns;
4359 unsigned long long u2_del_ns;
4361 timeout_ns = 10 * 1000 * 1000;
4363 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4364 (xhci_service_interval_to_ns(desc) > timeout_ns))
4365 timeout_ns = xhci_service_interval_to_ns(desc);
4367 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4368 if (u2_del_ns > timeout_ns)
4369 timeout_ns = u2_del_ns;
4374 /* Returns the hub-encoded U2 timeout value. */
4375 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4376 struct usb_device *udev,
4377 struct usb_endpoint_descriptor *desc)
4379 unsigned long long timeout_ns;
4381 if (xhci->quirks & XHCI_INTEL_HOST)
4382 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4384 timeout_ns = udev->u2_params.sel;
4386 /* The U2 timeout is encoded in 256us intervals */
4387 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4388 /* If the necessary timeout value is bigger than what we can set in the
4389 * USB 3.0 hub, we have to disable hub-initiated U2.
4391 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4393 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4394 "due to long timeout %llu ms\n", timeout_ns);
4395 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4398 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4399 struct usb_device *udev,
4400 struct usb_endpoint_descriptor *desc,
4401 enum usb3_link_state state,
4404 if (state == USB3_LPM_U1)
4405 return xhci_calculate_u1_timeout(xhci, udev, desc);
4406 else if (state == USB3_LPM_U2)
4407 return xhci_calculate_u2_timeout(xhci, udev, desc);
4409 return USB3_LPM_DISABLED;
4412 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4413 struct usb_device *udev,
4414 struct usb_endpoint_descriptor *desc,
4415 enum usb3_link_state state,
4420 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4421 desc, state, timeout);
4423 /* If we found we can't enable hub-initiated LPM, or
4424 * the U1 or U2 exit latency was too high to allow
4425 * device-initiated LPM as well, just stop searching.
4427 if (alt_timeout == USB3_LPM_DISABLED ||
4428 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4429 *timeout = alt_timeout;
4432 if (alt_timeout > *timeout)
4433 *timeout = alt_timeout;
4437 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4438 struct usb_device *udev,
4439 struct usb_host_interface *alt,
4440 enum usb3_link_state state,
4445 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4446 if (xhci_update_timeout_for_endpoint(xhci, udev,
4447 &alt->endpoint[j].desc, state, timeout))
4454 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4455 enum usb3_link_state state)
4457 struct usb_device *parent;
4458 unsigned int num_hubs;
4460 if (state == USB3_LPM_U2)
4463 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4464 for (parent = udev->parent, num_hubs = 0; parent->parent;
4465 parent = parent->parent)
4471 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4472 " below second-tier hub.\n");
4473 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4474 "to decrease power consumption.\n");
4478 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4479 struct usb_device *udev,
4480 enum usb3_link_state state)
4482 if (xhci->quirks & XHCI_INTEL_HOST)
4483 return xhci_check_intel_tier_policy(udev, state);
4488 /* Returns the U1 or U2 timeout that should be enabled.
4489 * If the tier check or timeout setting functions return with a non-zero exit
4490 * code, that means the timeout value has been finalized and we shouldn't look
4491 * at any more endpoints.
4493 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4494 struct usb_device *udev, enum usb3_link_state state)
4496 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4497 struct usb_host_config *config;
4500 u16 timeout = USB3_LPM_DISABLED;
4502 if (state == USB3_LPM_U1)
4504 else if (state == USB3_LPM_U2)
4507 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4512 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4515 /* Gather some information about the currently installed configuration
4516 * and alternate interface settings.
4518 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4522 config = udev->actconfig;
4526 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4527 struct usb_driver *driver;
4528 struct usb_interface *intf = config->interface[i];
4533 /* Check if any currently bound drivers want hub-initiated LPM
4536 if (intf->dev.driver) {
4537 driver = to_usb_driver(intf->dev.driver);
4538 if (driver && driver->disable_hub_initiated_lpm) {
4539 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4540 "at request of driver %s\n",
4541 state_name, driver->name);
4542 return xhci_get_timeout_no_hub_lpm(udev, state);
4546 /* Not sure how this could happen... */
4547 if (!intf->cur_altsetting)
4550 if (xhci_update_timeout_for_interface(xhci, udev,
4551 intf->cur_altsetting,
4558 static int calculate_max_exit_latency(struct usb_device *udev,
4559 enum usb3_link_state state_changed,
4560 u16 hub_encoded_timeout)
4562 unsigned long long u1_mel_us = 0;
4563 unsigned long long u2_mel_us = 0;
4564 unsigned long long mel_us = 0;
4570 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4571 hub_encoded_timeout == USB3_LPM_DISABLED);
4572 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4573 hub_encoded_timeout == USB3_LPM_DISABLED);
4575 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4576 hub_encoded_timeout != USB3_LPM_DISABLED);
4577 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4578 hub_encoded_timeout != USB3_LPM_DISABLED);
4580 /* If U1 was already enabled and we're not disabling it,
4581 * or we're going to enable U1, account for the U1 max exit latency.
4583 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4585 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4586 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4588 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4590 if (u1_mel_us > u2_mel_us)
4594 /* xHCI host controller max exit latency field is only 16 bits wide. */
4595 if (mel_us > MAX_EXIT) {
4596 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4597 "is too big.\n", mel_us);
4603 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4604 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4605 struct usb_device *udev, enum usb3_link_state state)
4607 struct xhci_hcd *xhci;
4608 u16 hub_encoded_timeout;
4612 xhci = hcd_to_xhci(hcd);
4613 /* The LPM timeout values are pretty host-controller specific, so don't
4614 * enable hub-initiated timeouts unless the vendor has provided
4615 * information about their timeout algorithm.
4617 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4618 !xhci->devs[udev->slot_id])
4619 return USB3_LPM_DISABLED;
4621 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4622 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4624 /* Max Exit Latency is too big, disable LPM. */
4625 hub_encoded_timeout = USB3_LPM_DISABLED;
4629 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4632 return hub_encoded_timeout;
4635 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4636 struct usb_device *udev, enum usb3_link_state state)
4638 struct xhci_hcd *xhci;
4641 xhci = hcd_to_xhci(hcd);
4642 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4643 !xhci->devs[udev->slot_id])
4646 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4647 return xhci_change_max_exit_latency(xhci, udev, mel);
4649 #else /* CONFIG_PM */
4651 static int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4652 struct usb_device *udev, int enable)
4657 static int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4662 static int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4663 struct usb_device *udev, enum usb3_link_state state)
4665 return USB3_LPM_DISABLED;
4668 static int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4669 struct usb_device *udev, enum usb3_link_state state)
4673 #endif /* CONFIG_PM */
4675 /*-------------------------------------------------------------------------*/
4677 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4678 * internal data structures for the device.
4680 static int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4681 struct usb_tt *tt, gfp_t mem_flags)
4683 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4684 struct xhci_virt_device *vdev;
4685 struct xhci_command *config_cmd;
4686 struct xhci_input_control_ctx *ctrl_ctx;
4687 struct xhci_slot_ctx *slot_ctx;
4688 unsigned long flags;
4689 unsigned think_time;
4692 /* Ignore root hubs */
4696 vdev = xhci->devs[hdev->slot_id];
4698 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4702 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4706 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4708 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4710 xhci_free_command(xhci, config_cmd);
4714 spin_lock_irqsave(&xhci->lock, flags);
4715 if (hdev->speed == USB_SPEED_HIGH &&
4716 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4717 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4718 xhci_free_command(xhci, config_cmd);
4719 spin_unlock_irqrestore(&xhci->lock, flags);
4723 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4724 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4725 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4726 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4728 * refer to section 6.2.2: MTT should be 0 for full speed hub,
4729 * but it may be already set to 1 when setup an xHCI virtual
4730 * device, so clear it anyway.
4733 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4734 else if (hdev->speed == USB_SPEED_FULL)
4735 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4737 if (xhci->hci_version > 0x95) {
4738 xhci_dbg(xhci, "xHCI version %x needs hub "
4739 "TT think time and number of ports\n",
4740 (unsigned int) xhci->hci_version);
4741 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4742 /* Set TT think time - convert from ns to FS bit times.
4743 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4744 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4746 * xHCI 1.0: this field shall be 0 if the device is not a
4749 think_time = tt->think_time;
4750 if (think_time != 0)
4751 think_time = (think_time / 666) - 1;
4752 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4753 slot_ctx->tt_info |=
4754 cpu_to_le32(TT_THINK_TIME(think_time));
4756 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4757 "TT think time or number of ports\n",
4758 (unsigned int) xhci->hci_version);
4760 slot_ctx->dev_state = 0;
4761 spin_unlock_irqrestore(&xhci->lock, flags);
4763 xhci_dbg(xhci, "Set up %s for hub device.\n",
4764 (xhci->hci_version > 0x95) ?
4765 "configure endpoint" : "evaluate context");
4767 /* Issue and wait for the configure endpoint or
4768 * evaluate context command.
4770 if (xhci->hci_version > 0x95)
4771 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4774 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4777 xhci_free_command(xhci, config_cmd);
4781 static int xhci_get_frame(struct usb_hcd *hcd)
4783 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4784 /* EHCI mods by the periodic size. Why? */
4785 return readl(&xhci->run_regs->microframe_index) >> 3;
4788 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4790 struct xhci_hcd *xhci;
4792 * TODO: Check with DWC3 clients for sysdev according to
4795 struct device *dev = hcd->self.sysdev;
4798 /* Accept arbitrarily long scatter-gather lists */
4799 hcd->self.sg_tablesize = ~0;
4801 /* support to build packet from discontinuous buffers */
4802 hcd->self.no_sg_constraint = 1;
4804 /* XHCI controllers don't stop the ep queue on short packets :| */
4805 hcd->self.no_stop_on_short = 1;
4807 xhci = hcd_to_xhci(hcd);
4809 if (usb_hcd_is_primary_hcd(hcd)) {
4810 xhci->main_hcd = hcd;
4811 /* Mark the first roothub as being USB 2.0.
4812 * The xHCI driver will register the USB 3.0 roothub.
4814 hcd->speed = HCD_USB2;
4815 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4817 * USB 2.0 roothub under xHCI has an integrated TT,
4818 * (rate matching hub) as opposed to having an OHCI/UHCI
4819 * companion controller.
4823 if (xhci->sbrn == 0x31) {
4824 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4825 hcd->speed = HCD_USB31;
4826 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
4828 /* xHCI private pointer was set in xhci_pci_probe for the second
4829 * registered roothub.
4834 mutex_init(&xhci->mutex);
4835 xhci->cap_regs = hcd->regs;
4836 xhci->op_regs = hcd->regs +
4837 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4838 xhci->run_regs = hcd->regs +
4839 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4840 /* Cache read-only capability registers */
4841 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4842 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4843 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4844 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4845 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4846 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4847 if (xhci->hci_version > 0x100)
4848 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4849 xhci_print_registers(xhci);
4851 xhci->quirks |= quirks;
4853 get_quirks(dev, xhci);
4855 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4856 * success event after a short transfer. This quirk will ignore such
4859 if (xhci->hci_version > 0x96)
4860 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4862 /* Make sure the HC is halted. */
4863 retval = xhci_halt(xhci);
4867 xhci_dbg(xhci, "Resetting HCD\n");
4868 /* Reset the internal HC memory state and registers. */
4869 retval = xhci_reset(xhci);
4872 xhci_dbg(xhci, "Reset complete\n");
4875 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0)
4876 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit
4877 * address memory pointers actually. So, this driver clears the AC64
4878 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev,
4879 * DMA_BIT_MASK(32)) in this xhci_gen_setup().
4881 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT)
4882 xhci->hcc_params &= ~BIT(0);
4884 /* Set dma_mask and coherent_dma_mask to 64-bits,
4885 * if xHC supports 64-bit addressing */
4886 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4887 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4888 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4889 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4892 * This is to avoid error in cases where a 32-bit USB
4893 * controller is used on a 64-bit capable system.
4895 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4898 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4899 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4902 xhci_dbg(xhci, "Calling HCD init\n");
4903 /* Initialize HCD and host controller data structures. */
4904 retval = xhci_init(hcd);
4907 xhci_dbg(xhci, "Called HCD init\n");
4909 xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4910 xhci->hcc_params, xhci->hci_version, xhci->quirks);
4914 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4916 static const struct hc_driver xhci_hc_driver = {
4917 .description = "xhci-hcd",
4918 .product_desc = "xHCI Host Controller",
4919 .hcd_priv_size = sizeof(struct xhci_hcd),
4922 * generic hardware linkage
4925 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4928 * basic lifecycle operations
4930 .reset = NULL, /* set in xhci_init_driver() */
4933 .shutdown = xhci_shutdown,
4936 * managing i/o requests and associated device resources
4938 .urb_enqueue = xhci_urb_enqueue,
4939 .urb_dequeue = xhci_urb_dequeue,
4940 .alloc_dev = xhci_alloc_dev,
4941 .free_dev = xhci_free_dev,
4942 .alloc_streams = xhci_alloc_streams,
4943 .free_streams = xhci_free_streams,
4944 .add_endpoint = xhci_add_endpoint,
4945 .drop_endpoint = xhci_drop_endpoint,
4946 .endpoint_reset = xhci_endpoint_reset,
4947 .check_bandwidth = xhci_check_bandwidth,
4948 .reset_bandwidth = xhci_reset_bandwidth,
4949 .address_device = xhci_address_device,
4950 .enable_device = xhci_enable_device,
4951 .update_hub_device = xhci_update_hub_device,
4952 .reset_device = xhci_discover_or_reset_device,
4955 * scheduling support
4957 .get_frame_number = xhci_get_frame,
4962 .hub_control = xhci_hub_control,
4963 .hub_status_data = xhci_hub_status_data,
4964 .bus_suspend = xhci_bus_suspend,
4965 .bus_resume = xhci_bus_resume,
4968 * call back when device connected and addressed
4970 .update_device = xhci_update_device,
4971 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4972 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4973 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4974 .find_raw_port_number = xhci_find_raw_port_number,
4977 void xhci_init_driver(struct hc_driver *drv,
4978 const struct xhci_driver_overrides *over)
4982 /* Copy the generic table to drv then apply the overrides */
4983 *drv = xhci_hc_driver;
4986 drv->hcd_priv_size += over->extra_priv_size;
4988 drv->reset = over->reset;
4990 drv->start = over->start;
4993 EXPORT_SYMBOL_GPL(xhci_init_driver);
4995 MODULE_DESCRIPTION(DRIVER_DESC);
4996 MODULE_AUTHOR(DRIVER_AUTHOR);
4997 MODULE_LICENSE("GPL");
4999 static int __init xhci_hcd_init(void)
5002 * Check the compiler generated sizes of structures that must be laid
5003 * out in specific ways for hardware access.
5005 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5006 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5007 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5008 /* xhci_device_control has eight fields, and also
5009 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5011 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5012 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5013 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5014 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5015 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5016 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5017 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5022 xhci_debugfs_create_root();
5028 * If an init function is provided, an exit function must also be provided
5029 * to allow module unload.
5031 static void __exit xhci_hcd_fini(void)
5033 xhci_debugfs_remove_root();
5036 module_init(xhci_hcd_init);
5037 module_exit(xhci_hcd_fini);