xhci: trivial: Remove assigned but unused ep_ctx.
[linux-2.6-microblaze.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30
31 #include "xhci.h"
32
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 /*
43  * handshake - spin reading hc until handshake completes or fails
44  * @ptr: address of hc register to be read
45  * @mask: bits to look at in result of read
46  * @done: value of those bits when handshake succeeds
47  * @usec: timeout in microseconds
48  *
49  * Returns negative errno, or zero on success
50  *
51  * Success happens when the "mask" bits have the specified value (hardware
52  * handshake done).  There are two failure modes:  "usec" have passed (major
53  * hardware flakeout), or the register reads as all-ones (hardware removed).
54  */
55 int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56                       u32 mask, u32 done, int usec)
57 {
58         u32     result;
59
60         do {
61                 result = xhci_readl(xhci, ptr);
62                 if (result == ~(u32)0)          /* card removed */
63                         return -ENODEV;
64                 result &= mask;
65                 if (result == done)
66                         return 0;
67                 udelay(1);
68                 usec--;
69         } while (usec > 0);
70         return -ETIMEDOUT;
71 }
72
73 /*
74  * Disable interrupts and begin the xHCI halting process.
75  */
76 void xhci_quiesce(struct xhci_hcd *xhci)
77 {
78         u32 halted;
79         u32 cmd;
80         u32 mask;
81
82         mask = ~(XHCI_IRQS);
83         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
84         if (!halted)
85                 mask &= ~CMD_RUN;
86
87         cmd = xhci_readl(xhci, &xhci->op_regs->command);
88         cmd &= mask;
89         xhci_writel(xhci, cmd, &xhci->op_regs->command);
90 }
91
92 /*
93  * Force HC into halt state.
94  *
95  * Disable any IRQs and clear the run/stop bit.
96  * HC will complete any current and actively pipelined transactions, and
97  * should halt within 16 ms of the run/stop bit being cleared.
98  * Read HC Halted bit in the status register to see when the HC is finished.
99  */
100 int xhci_halt(struct xhci_hcd *xhci)
101 {
102         int ret;
103         xhci_dbg(xhci, "// Halt the HC\n");
104         xhci_quiesce(xhci);
105
106         ret = handshake(xhci, &xhci->op_regs->status,
107                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
108         if (!ret) {
109                 xhci->xhc_state |= XHCI_STATE_HALTED;
110                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
111         } else
112                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
113                                 XHCI_MAX_HALT_USEC);
114         return ret;
115 }
116
117 /*
118  * Set the run bit and wait for the host to be running.
119  */
120 static int xhci_start(struct xhci_hcd *xhci)
121 {
122         u32 temp;
123         int ret;
124
125         temp = xhci_readl(xhci, &xhci->op_regs->command);
126         temp |= (CMD_RUN);
127         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
128                         temp);
129         xhci_writel(xhci, temp, &xhci->op_regs->command);
130
131         /*
132          * Wait for the HCHalted Status bit to be 0 to indicate the host is
133          * running.
134          */
135         ret = handshake(xhci, &xhci->op_regs->status,
136                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
137         if (ret == -ETIMEDOUT)
138                 xhci_err(xhci, "Host took too long to start, "
139                                 "waited %u microseconds.\n",
140                                 XHCI_MAX_HALT_USEC);
141         if (!ret)
142                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
143         return ret;
144 }
145
146 /*
147  * Reset a halted HC.
148  *
149  * This resets pipelines, timers, counters, state machines, etc.
150  * Transactions will be terminated immediately, and operational registers
151  * will be set to their defaults.
152  */
153 int xhci_reset(struct xhci_hcd *xhci)
154 {
155         u32 command;
156         u32 state;
157         int ret, i;
158
159         state = xhci_readl(xhci, &xhci->op_regs->status);
160         if ((state & STS_HALT) == 0) {
161                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
162                 return 0;
163         }
164
165         xhci_dbg(xhci, "// Reset the HC\n");
166         command = xhci_readl(xhci, &xhci->op_regs->command);
167         command |= CMD_RESET;
168         xhci_writel(xhci, command, &xhci->op_regs->command);
169
170         ret = handshake(xhci, &xhci->op_regs->command,
171                         CMD_RESET, 0, 10 * 1000 * 1000);
172         if (ret)
173                 return ret;
174
175         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
176         /*
177          * xHCI cannot write to any doorbells or operational registers other
178          * than status until the "Controller Not Ready" flag is cleared.
179          */
180         ret = handshake(xhci, &xhci->op_regs->status,
181                         STS_CNR, 0, 10 * 1000 * 1000);
182
183         for (i = 0; i < 2; ++i) {
184                 xhci->bus_state[i].port_c_suspend = 0;
185                 xhci->bus_state[i].suspended_ports = 0;
186                 xhci->bus_state[i].resuming_ports = 0;
187         }
188
189         return ret;
190 }
191
192 #ifdef CONFIG_PCI
193 static int xhci_free_msi(struct xhci_hcd *xhci)
194 {
195         int i;
196
197         if (!xhci->msix_entries)
198                 return -EINVAL;
199
200         for (i = 0; i < xhci->msix_count; i++)
201                 if (xhci->msix_entries[i].vector)
202                         free_irq(xhci->msix_entries[i].vector,
203                                         xhci_to_hcd(xhci));
204         return 0;
205 }
206
207 /*
208  * Set up MSI
209  */
210 static int xhci_setup_msi(struct xhci_hcd *xhci)
211 {
212         int ret;
213         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
214
215         ret = pci_enable_msi(pdev);
216         if (ret) {
217                 xhci_dbg(xhci, "failed to allocate MSI entry\n");
218                 return ret;
219         }
220
221         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
222                                 0, "xhci_hcd", xhci_to_hcd(xhci));
223         if (ret) {
224                 xhci_dbg(xhci, "disable MSI interrupt\n");
225                 pci_disable_msi(pdev);
226         }
227
228         return ret;
229 }
230
231 /*
232  * Free IRQs
233  * free all IRQs request
234  */
235 static void xhci_free_irq(struct xhci_hcd *xhci)
236 {
237         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
238         int ret;
239
240         /* return if using legacy interrupt */
241         if (xhci_to_hcd(xhci)->irq > 0)
242                 return;
243
244         ret = xhci_free_msi(xhci);
245         if (!ret)
246                 return;
247         if (pdev->irq > 0)
248                 free_irq(pdev->irq, xhci_to_hcd(xhci));
249
250         return;
251 }
252
253 /*
254  * Set up MSI-X
255  */
256 static int xhci_setup_msix(struct xhci_hcd *xhci)
257 {
258         int i, ret = 0;
259         struct usb_hcd *hcd = xhci_to_hcd(xhci);
260         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
261
262         /*
263          * calculate number of msi-x vectors supported.
264          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265          *   with max number of interrupters based on the xhci HCSPARAMS1.
266          * - num_online_cpus: maximum msi-x vectors per CPUs core.
267          *   Add additional 1 vector to ensure always available interrupt.
268          */
269         xhci->msix_count = min(num_online_cpus() + 1,
270                                 HCS_MAX_INTRS(xhci->hcs_params1));
271
272         xhci->msix_entries =
273                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
274                                 GFP_KERNEL);
275         if (!xhci->msix_entries) {
276                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
277                 return -ENOMEM;
278         }
279
280         for (i = 0; i < xhci->msix_count; i++) {
281                 xhci->msix_entries[i].entry = i;
282                 xhci->msix_entries[i].vector = 0;
283         }
284
285         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
286         if (ret) {
287                 xhci_dbg(xhci, "Failed to enable MSI-X\n");
288                 goto free_entries;
289         }
290
291         for (i = 0; i < xhci->msix_count; i++) {
292                 ret = request_irq(xhci->msix_entries[i].vector,
293                                 (irq_handler_t)xhci_msi_irq,
294                                 0, "xhci_hcd", xhci_to_hcd(xhci));
295                 if (ret)
296                         goto disable_msix;
297         }
298
299         hcd->msix_enabled = 1;
300         return ret;
301
302 disable_msix:
303         xhci_dbg(xhci, "disable MSI-X interrupt\n");
304         xhci_free_irq(xhci);
305         pci_disable_msix(pdev);
306 free_entries:
307         kfree(xhci->msix_entries);
308         xhci->msix_entries = NULL;
309         return ret;
310 }
311
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
314 {
315         struct usb_hcd *hcd = xhci_to_hcd(xhci);
316         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
317
318         xhci_free_irq(xhci);
319
320         if (xhci->msix_entries) {
321                 pci_disable_msix(pdev);
322                 kfree(xhci->msix_entries);
323                 xhci->msix_entries = NULL;
324         } else {
325                 pci_disable_msi(pdev);
326         }
327
328         hcd->msix_enabled = 0;
329         return;
330 }
331
332 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
333 {
334         int i;
335
336         if (xhci->msix_entries) {
337                 for (i = 0; i < xhci->msix_count; i++)
338                         synchronize_irq(xhci->msix_entries[i].vector);
339         }
340 }
341
342 static int xhci_try_enable_msi(struct usb_hcd *hcd)
343 {
344         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
345         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
346         int ret;
347
348         /*
349          * Some Fresco Logic host controllers advertise MSI, but fail to
350          * generate interrupts.  Don't even try to enable MSI.
351          */
352         if (xhci->quirks & XHCI_BROKEN_MSI)
353                 return 0;
354
355         /* unregister the legacy interrupt */
356         if (hcd->irq)
357                 free_irq(hcd->irq, hcd);
358         hcd->irq = 0;
359
360         ret = xhci_setup_msix(xhci);
361         if (ret)
362                 /* fall back to msi*/
363                 ret = xhci_setup_msi(xhci);
364
365         if (!ret)
366                 /* hcd->irq is 0, we have MSI */
367                 return 0;
368
369         if (!pdev->irq) {
370                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
371                 return -EINVAL;
372         }
373
374         /* fall back to legacy interrupt*/
375         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
376                         hcd->irq_descr, hcd);
377         if (ret) {
378                 xhci_err(xhci, "request interrupt %d failed\n",
379                                 pdev->irq);
380                 return ret;
381         }
382         hcd->irq = pdev->irq;
383         return 0;
384 }
385
386 #else
387
388 static int xhci_try_enable_msi(struct usb_hcd *hcd)
389 {
390         return 0;
391 }
392
393 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
394 {
395 }
396
397 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
398 {
399 }
400
401 #endif
402
403 static void compliance_mode_recovery(unsigned long arg)
404 {
405         struct xhci_hcd *xhci;
406         struct usb_hcd *hcd;
407         u32 temp;
408         int i;
409
410         xhci = (struct xhci_hcd *)arg;
411
412         for (i = 0; i < xhci->num_usb3_ports; i++) {
413                 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
414                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
415                         /*
416                          * Compliance Mode Detected. Letting USB Core
417                          * handle the Warm Reset
418                          */
419                         xhci_dbg(xhci, "Compliance Mode Detected->Port %d!\n",
420                                         i + 1);
421                         xhci_dbg(xhci, "Attempting Recovery routine!\n");
422                         hcd = xhci->shared_hcd;
423
424                         if (hcd->state == HC_STATE_SUSPENDED)
425                                 usb_hcd_resume_root_hub(hcd);
426
427                         usb_hcd_poll_rh_status(hcd);
428                 }
429         }
430
431         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
432                 mod_timer(&xhci->comp_mode_recovery_timer,
433                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
434 }
435
436 /*
437  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
438  * that causes ports behind that hardware to enter compliance mode sometimes.
439  * The quirk creates a timer that polls every 2 seconds the link state of
440  * each host controller's port and recovers it by issuing a Warm reset
441  * if Compliance mode is detected, otherwise the port will become "dead" (no
442  * device connections or disconnections will be detected anymore). Becasue no
443  * status event is generated when entering compliance mode (per xhci spec),
444  * this quirk is needed on systems that have the failing hardware installed.
445  */
446 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
447 {
448         xhci->port_status_u0 = 0;
449         init_timer(&xhci->comp_mode_recovery_timer);
450
451         xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
452         xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
453         xhci->comp_mode_recovery_timer.expires = jiffies +
454                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
455
456         set_timer_slack(&xhci->comp_mode_recovery_timer,
457                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
458         add_timer(&xhci->comp_mode_recovery_timer);
459         xhci_dbg(xhci, "Compliance Mode Recovery Timer Initialized.\n");
460 }
461
462 /*
463  * This function identifies the systems that have installed the SN65LVPE502CP
464  * USB3.0 re-driver and that need the Compliance Mode Quirk.
465  * Systems:
466  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
467  */
468 static bool compliance_mode_recovery_timer_quirk_check(void)
469 {
470         const char *dmi_product_name, *dmi_sys_vendor;
471
472         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
473         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
474         if (!dmi_product_name || !dmi_sys_vendor)
475                 return false;
476
477         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
478                 return false;
479
480         if (strstr(dmi_product_name, "Z420") ||
481                         strstr(dmi_product_name, "Z620") ||
482                         strstr(dmi_product_name, "Z820") ||
483                         strstr(dmi_product_name, "Z1"))
484                 return true;
485
486         return false;
487 }
488
489 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
490 {
491         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
492 }
493
494
495 /*
496  * Initialize memory for HCD and xHC (one-time init).
497  *
498  * Program the PAGESIZE register, initialize the device context array, create
499  * device contexts (?), set up a command ring segment (or two?), create event
500  * ring (one for now).
501  */
502 int xhci_init(struct usb_hcd *hcd)
503 {
504         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
505         int retval = 0;
506
507         xhci_dbg(xhci, "xhci_init\n");
508         spin_lock_init(&xhci->lock);
509         if (xhci->hci_version == 0x95 && link_quirk) {
510                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
511                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
512         } else {
513                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
514         }
515         retval = xhci_mem_init(xhci, GFP_KERNEL);
516         xhci_dbg(xhci, "Finished xhci_init\n");
517
518         /* Initializing Compliance Mode Recovery Data If Needed */
519         if (compliance_mode_recovery_timer_quirk_check()) {
520                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
521                 compliance_mode_recovery_timer_init(xhci);
522         }
523
524         return retval;
525 }
526
527 /*-------------------------------------------------------------------------*/
528
529
530 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
531 static void xhci_event_ring_work(unsigned long arg)
532 {
533         unsigned long flags;
534         int temp;
535         u64 temp_64;
536         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
537         int i, j;
538
539         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
540
541         spin_lock_irqsave(&xhci->lock, flags);
542         temp = xhci_readl(xhci, &xhci->op_regs->status);
543         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
544         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
545                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
546                 xhci_dbg(xhci, "HW died, polling stopped.\n");
547                 spin_unlock_irqrestore(&xhci->lock, flags);
548                 return;
549         }
550
551         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
552         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
553         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
554         xhci->error_bitmask = 0;
555         xhci_dbg(xhci, "Event ring:\n");
556         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
557         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
558         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
559         temp_64 &= ~ERST_PTR_MASK;
560         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
561         xhci_dbg(xhci, "Command ring:\n");
562         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
563         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
564         xhci_dbg_cmd_ptrs(xhci);
565         for (i = 0; i < MAX_HC_SLOTS; ++i) {
566                 if (!xhci->devs[i])
567                         continue;
568                 for (j = 0; j < 31; ++j) {
569                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
570                 }
571         }
572         spin_unlock_irqrestore(&xhci->lock, flags);
573
574         if (!xhci->zombie)
575                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
576         else
577                 xhci_dbg(xhci, "Quit polling the event ring.\n");
578 }
579 #endif
580
581 static int xhci_run_finished(struct xhci_hcd *xhci)
582 {
583         if (xhci_start(xhci)) {
584                 xhci_halt(xhci);
585                 return -ENODEV;
586         }
587         xhci->shared_hcd->state = HC_STATE_RUNNING;
588         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
589
590         if (xhci->quirks & XHCI_NEC_HOST)
591                 xhci_ring_cmd_db(xhci);
592
593         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
594         return 0;
595 }
596
597 /*
598  * Start the HC after it was halted.
599  *
600  * This function is called by the USB core when the HC driver is added.
601  * Its opposite is xhci_stop().
602  *
603  * xhci_init() must be called once before this function can be called.
604  * Reset the HC, enable device slot contexts, program DCBAAP, and
605  * set command ring pointer and event ring pointer.
606  *
607  * Setup MSI-X vectors and enable interrupts.
608  */
609 int xhci_run(struct usb_hcd *hcd)
610 {
611         u32 temp;
612         u64 temp_64;
613         int ret;
614         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
615
616         /* Start the xHCI host controller running only after the USB 2.0 roothub
617          * is setup.
618          */
619
620         hcd->uses_new_polling = 1;
621         if (!usb_hcd_is_primary_hcd(hcd))
622                 return xhci_run_finished(xhci);
623
624         xhci_dbg(xhci, "xhci_run\n");
625
626         ret = xhci_try_enable_msi(hcd);
627         if (ret)
628                 return ret;
629
630 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
631         init_timer(&xhci->event_ring_timer);
632         xhci->event_ring_timer.data = (unsigned long) xhci;
633         xhci->event_ring_timer.function = xhci_event_ring_work;
634         /* Poll the event ring */
635         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
636         xhci->zombie = 0;
637         xhci_dbg(xhci, "Setting event ring polling timer\n");
638         add_timer(&xhci->event_ring_timer);
639 #endif
640
641         xhci_dbg(xhci, "Command ring memory map follows:\n");
642         xhci_debug_ring(xhci, xhci->cmd_ring);
643         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
644         xhci_dbg_cmd_ptrs(xhci);
645
646         xhci_dbg(xhci, "ERST memory map follows:\n");
647         xhci_dbg_erst(xhci, &xhci->erst);
648         xhci_dbg(xhci, "Event ring:\n");
649         xhci_debug_ring(xhci, xhci->event_ring);
650         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
651         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
652         temp_64 &= ~ERST_PTR_MASK;
653         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
654
655         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
656         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
657         temp &= ~ER_IRQ_INTERVAL_MASK;
658         temp |= (u32) 160;
659         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
660
661         /* Set the HCD state before we enable the irqs */
662         temp = xhci_readl(xhci, &xhci->op_regs->command);
663         temp |= (CMD_EIE);
664         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
665                         temp);
666         xhci_writel(xhci, temp, &xhci->op_regs->command);
667
668         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
669         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
670                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
671         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
672                         &xhci->ir_set->irq_pending);
673         xhci_print_ir_set(xhci, 0);
674
675         if (xhci->quirks & XHCI_NEC_HOST)
676                 xhci_queue_vendor_command(xhci, 0, 0, 0,
677                                 TRB_TYPE(TRB_NEC_GET_FW));
678
679         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
680         return 0;
681 }
682
683 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
684 {
685         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
686
687         spin_lock_irq(&xhci->lock);
688         xhci_halt(xhci);
689
690         /* The shared_hcd is going to be deallocated shortly (the USB core only
691          * calls this function when allocation fails in usb_add_hcd(), or
692          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
693          */
694         xhci->shared_hcd = NULL;
695         spin_unlock_irq(&xhci->lock);
696 }
697
698 /*
699  * Stop xHCI driver.
700  *
701  * This function is called by the USB core when the HC driver is removed.
702  * Its opposite is xhci_run().
703  *
704  * Disable device contexts, disable IRQs, and quiesce the HC.
705  * Reset the HC, finish any completed transactions, and cleanup memory.
706  */
707 void xhci_stop(struct usb_hcd *hcd)
708 {
709         u32 temp;
710         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
711
712         if (!usb_hcd_is_primary_hcd(hcd)) {
713                 xhci_only_stop_hcd(xhci->shared_hcd);
714                 return;
715         }
716
717         spin_lock_irq(&xhci->lock);
718         /* Make sure the xHC is halted for a USB3 roothub
719          * (xhci_stop() could be called as part of failed init).
720          */
721         xhci_halt(xhci);
722         xhci_reset(xhci);
723         spin_unlock_irq(&xhci->lock);
724
725         xhci_cleanup_msix(xhci);
726
727 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
728         /* Tell the event ring poll function not to reschedule */
729         xhci->zombie = 1;
730         del_timer_sync(&xhci->event_ring_timer);
731 #endif
732
733         /* Deleting Compliance Mode Recovery Timer */
734         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
735                         (!(xhci_all_ports_seen_u0(xhci))))
736                 del_timer_sync(&xhci->comp_mode_recovery_timer);
737
738         if (xhci->quirks & XHCI_AMD_PLL_FIX)
739                 usb_amd_dev_put();
740
741         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
742         temp = xhci_readl(xhci, &xhci->op_regs->status);
743         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
744         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
745         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
746                         &xhci->ir_set->irq_pending);
747         xhci_print_ir_set(xhci, 0);
748
749         xhci_dbg(xhci, "cleaning up memory\n");
750         xhci_mem_cleanup(xhci);
751         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
752                     xhci_readl(xhci, &xhci->op_regs->status));
753 }
754
755 /*
756  * Shutdown HC (not bus-specific)
757  *
758  * This is called when the machine is rebooting or halting.  We assume that the
759  * machine will be powered off, and the HC's internal state will be reset.
760  * Don't bother to free memory.
761  *
762  * This will only ever be called with the main usb_hcd (the USB3 roothub).
763  */
764 void xhci_shutdown(struct usb_hcd *hcd)
765 {
766         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
767
768         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
769                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
770
771         spin_lock_irq(&xhci->lock);
772         xhci_halt(xhci);
773         spin_unlock_irq(&xhci->lock);
774
775         xhci_cleanup_msix(xhci);
776
777         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
778                     xhci_readl(xhci, &xhci->op_regs->status));
779 }
780
781 #ifdef CONFIG_PM
782 static void xhci_save_registers(struct xhci_hcd *xhci)
783 {
784         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
785         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
786         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
787         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
788         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
789         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
790         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
791         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
792         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
793 }
794
795 static void xhci_restore_registers(struct xhci_hcd *xhci)
796 {
797         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
798         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
799         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
800         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
801         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
802         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
803         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
804         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
805         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
806 }
807
808 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
809 {
810         u64     val_64;
811
812         /* step 2: initialize command ring buffer */
813         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
814         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
815                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
816                                       xhci->cmd_ring->dequeue) &
817                  (u64) ~CMD_RING_RSVD_BITS) |
818                 xhci->cmd_ring->cycle_state;
819         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
820                         (long unsigned long) val_64);
821         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
822 }
823
824 /*
825  * The whole command ring must be cleared to zero when we suspend the host.
826  *
827  * The host doesn't save the command ring pointer in the suspend well, so we
828  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
829  * aligned, because of the reserved bits in the command ring dequeue pointer
830  * register.  Therefore, we can't just set the dequeue pointer back in the
831  * middle of the ring (TRBs are 16-byte aligned).
832  */
833 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
834 {
835         struct xhci_ring *ring;
836         struct xhci_segment *seg;
837
838         ring = xhci->cmd_ring;
839         seg = ring->deq_seg;
840         do {
841                 memset(seg->trbs, 0,
842                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
843                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
844                         cpu_to_le32(~TRB_CYCLE);
845                 seg = seg->next;
846         } while (seg != ring->deq_seg);
847
848         /* Reset the software enqueue and dequeue pointers */
849         ring->deq_seg = ring->first_seg;
850         ring->dequeue = ring->first_seg->trbs;
851         ring->enq_seg = ring->deq_seg;
852         ring->enqueue = ring->dequeue;
853
854         ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
855         /*
856          * Ring is now zeroed, so the HW should look for change of ownership
857          * when the cycle bit is set to 1.
858          */
859         ring->cycle_state = 1;
860
861         /*
862          * Reset the hardware dequeue pointer.
863          * Yes, this will need to be re-written after resume, but we're paranoid
864          * and want to make sure the hardware doesn't access bogus memory
865          * because, say, the BIOS or an SMI started the host without changing
866          * the command ring pointers.
867          */
868         xhci_set_cmd_ring_deq(xhci);
869 }
870
871 /*
872  * Stop HC (not bus-specific)
873  *
874  * This is called when the machine transition into S3/S4 mode.
875  *
876  */
877 int xhci_suspend(struct xhci_hcd *xhci)
878 {
879         int                     rc = 0;
880         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
881         u32                     command;
882
883         spin_lock_irq(&xhci->lock);
884         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
885         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
886         /* step 1: stop endpoint */
887         /* skipped assuming that port suspend has done */
888
889         /* step 2: clear Run/Stop bit */
890         command = xhci_readl(xhci, &xhci->op_regs->command);
891         command &= ~CMD_RUN;
892         xhci_writel(xhci, command, &xhci->op_regs->command);
893         if (handshake(xhci, &xhci->op_regs->status,
894                       STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
895                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
896                 spin_unlock_irq(&xhci->lock);
897                 return -ETIMEDOUT;
898         }
899         xhci_clear_command_ring(xhci);
900
901         /* step 3: save registers */
902         xhci_save_registers(xhci);
903
904         /* step 4: set CSS flag */
905         command = xhci_readl(xhci, &xhci->op_regs->command);
906         command |= CMD_CSS;
907         xhci_writel(xhci, command, &xhci->op_regs->command);
908         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10 * 1000)) {
909                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
910                 spin_unlock_irq(&xhci->lock);
911                 return -ETIMEDOUT;
912         }
913         spin_unlock_irq(&xhci->lock);
914
915         /*
916          * Deleting Compliance Mode Recovery Timer because the xHCI Host
917          * is about to be suspended.
918          */
919         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
920                         (!(xhci_all_ports_seen_u0(xhci)))) {
921                 del_timer_sync(&xhci->comp_mode_recovery_timer);
922                 xhci_dbg(xhci, "Compliance Mode Recovery Timer Deleted!\n");
923         }
924
925         /* step 5: remove core well power */
926         /* synchronize irq when using MSI-X */
927         xhci_msix_sync_irqs(xhci);
928
929         return rc;
930 }
931
932 /*
933  * start xHC (not bus-specific)
934  *
935  * This is called when the machine transition from S3/S4 mode.
936  *
937  */
938 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
939 {
940         u32                     command, temp = 0;
941         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
942         struct usb_hcd          *secondary_hcd;
943         int                     retval = 0;
944
945         /* Wait a bit if either of the roothubs need to settle from the
946          * transition into bus suspend.
947          */
948         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
949                         time_before(jiffies,
950                                 xhci->bus_state[1].next_statechange))
951                 msleep(100);
952
953         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
954         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
955
956         spin_lock_irq(&xhci->lock);
957         if (xhci->quirks & XHCI_RESET_ON_RESUME)
958                 hibernated = true;
959
960         if (!hibernated) {
961                 /* step 1: restore register */
962                 xhci_restore_registers(xhci);
963                 /* step 2: initialize command ring buffer */
964                 xhci_set_cmd_ring_deq(xhci);
965                 /* step 3: restore state and start state*/
966                 /* step 3: set CRS flag */
967                 command = xhci_readl(xhci, &xhci->op_regs->command);
968                 command |= CMD_CRS;
969                 xhci_writel(xhci, command, &xhci->op_regs->command);
970                 if (handshake(xhci, &xhci->op_regs->status,
971                               STS_RESTORE, 0, 10 * 1000)) {
972                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
973                         spin_unlock_irq(&xhci->lock);
974                         return -ETIMEDOUT;
975                 }
976                 temp = xhci_readl(xhci, &xhci->op_regs->status);
977         }
978
979         /* If restore operation fails, re-initialize the HC during resume */
980         if ((temp & STS_SRE) || hibernated) {
981                 /* Let the USB core know _both_ roothubs lost power. */
982                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
983                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
984
985                 xhci_dbg(xhci, "Stop HCD\n");
986                 xhci_halt(xhci);
987                 xhci_reset(xhci);
988                 spin_unlock_irq(&xhci->lock);
989                 xhci_cleanup_msix(xhci);
990
991 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
992                 /* Tell the event ring poll function not to reschedule */
993                 xhci->zombie = 1;
994                 del_timer_sync(&xhci->event_ring_timer);
995 #endif
996
997                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
998                 temp = xhci_readl(xhci, &xhci->op_regs->status);
999                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1000                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1001                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1002                                 &xhci->ir_set->irq_pending);
1003                 xhci_print_ir_set(xhci, 0);
1004
1005                 xhci_dbg(xhci, "cleaning up memory\n");
1006                 xhci_mem_cleanup(xhci);
1007                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1008                             xhci_readl(xhci, &xhci->op_regs->status));
1009
1010                 /* USB core calls the PCI reinit and start functions twice:
1011                  * first with the primary HCD, and then with the secondary HCD.
1012                  * If we don't do the same, the host will never be started.
1013                  */
1014                 if (!usb_hcd_is_primary_hcd(hcd))
1015                         secondary_hcd = hcd;
1016                 else
1017                         secondary_hcd = xhci->shared_hcd;
1018
1019                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1020                 retval = xhci_init(hcd->primary_hcd);
1021                 if (retval)
1022                         return retval;
1023                 xhci_dbg(xhci, "Start the primary HCD\n");
1024                 retval = xhci_run(hcd->primary_hcd);
1025                 if (!retval) {
1026                         xhci_dbg(xhci, "Start the secondary HCD\n");
1027                         retval = xhci_run(secondary_hcd);
1028                 }
1029                 hcd->state = HC_STATE_SUSPENDED;
1030                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1031                 goto done;
1032         }
1033
1034         /* step 4: set Run/Stop bit */
1035         command = xhci_readl(xhci, &xhci->op_regs->command);
1036         command |= CMD_RUN;
1037         xhci_writel(xhci, command, &xhci->op_regs->command);
1038         handshake(xhci, &xhci->op_regs->status, STS_HALT,
1039                   0, 250 * 1000);
1040
1041         /* step 5: walk topology and initialize portsc,
1042          * portpmsc and portli
1043          */
1044         /* this is done in bus_resume */
1045
1046         /* step 6: restart each of the previously
1047          * Running endpoints by ringing their doorbells
1048          */
1049
1050         spin_unlock_irq(&xhci->lock);
1051
1052  done:
1053         if (retval == 0) {
1054                 usb_hcd_resume_root_hub(hcd);
1055                 usb_hcd_resume_root_hub(xhci->shared_hcd);
1056         }
1057
1058         /*
1059          * If system is subject to the Quirk, Compliance Mode Timer needs to
1060          * be re-initialized Always after a system resume. Ports are subject
1061          * to suffer the Compliance Mode issue again. It doesn't matter if
1062          * ports have entered previously to U0 before system's suspension.
1063          */
1064         if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
1065                 compliance_mode_recovery_timer_init(xhci);
1066
1067         return retval;
1068 }
1069 #endif  /* CONFIG_PM */
1070
1071 /*-------------------------------------------------------------------------*/
1072
1073 /**
1074  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1075  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1076  * value to right shift 1 for the bitmask.
1077  *
1078  * Index  = (epnum * 2) + direction - 1,
1079  * where direction = 0 for OUT, 1 for IN.
1080  * For control endpoints, the IN index is used (OUT index is unused), so
1081  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1082  */
1083 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1084 {
1085         unsigned int index;
1086         if (usb_endpoint_xfer_control(desc))
1087                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1088         else
1089                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1090                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1091         return index;
1092 }
1093
1094 /* Find the flag for this endpoint (for use in the control context).  Use the
1095  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1096  * bit 1, etc.
1097  */
1098 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1099 {
1100         return 1 << (xhci_get_endpoint_index(desc) + 1);
1101 }
1102
1103 /* Find the flag for this endpoint (for use in the control context).  Use the
1104  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1105  * bit 1, etc.
1106  */
1107 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1108 {
1109         return 1 << (ep_index + 1);
1110 }
1111
1112 /* Compute the last valid endpoint context index.  Basically, this is the
1113  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1114  * we find the most significant bit set in the added contexts flags.
1115  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1116  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1117  */
1118 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1119 {
1120         return fls(added_ctxs) - 1;
1121 }
1122
1123 /* Returns 1 if the arguments are OK;
1124  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1125  */
1126 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1127                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1128                 const char *func) {
1129         struct xhci_hcd *xhci;
1130         struct xhci_virt_device *virt_dev;
1131
1132         if (!hcd || (check_ep && !ep) || !udev) {
1133                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1134                                 func);
1135                 return -EINVAL;
1136         }
1137         if (!udev->parent) {
1138                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1139                                 func);
1140                 return 0;
1141         }
1142
1143         xhci = hcd_to_xhci(hcd);
1144         if (xhci->xhc_state & XHCI_STATE_HALTED)
1145                 return -ENODEV;
1146
1147         if (check_virt_dev) {
1148                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1149                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
1150                                                 "device\n", func);
1151                         return -EINVAL;
1152                 }
1153
1154                 virt_dev = xhci->devs[udev->slot_id];
1155                 if (virt_dev->udev != udev) {
1156                         printk(KERN_DEBUG "xHCI %s called with udev and "
1157                                           "virt_dev does not match\n", func);
1158                         return -EINVAL;
1159                 }
1160         }
1161
1162         return 1;
1163 }
1164
1165 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1166                 struct usb_device *udev, struct xhci_command *command,
1167                 bool ctx_change, bool must_succeed);
1168
1169 /*
1170  * Full speed devices may have a max packet size greater than 8 bytes, but the
1171  * USB core doesn't know that until it reads the first 8 bytes of the
1172  * descriptor.  If the usb_device's max packet size changes after that point,
1173  * we need to issue an evaluate context command and wait on it.
1174  */
1175 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1176                 unsigned int ep_index, struct urb *urb)
1177 {
1178         struct xhci_container_ctx *in_ctx;
1179         struct xhci_container_ctx *out_ctx;
1180         struct xhci_input_control_ctx *ctrl_ctx;
1181         struct xhci_ep_ctx *ep_ctx;
1182         int max_packet_size;
1183         int hw_max_packet_size;
1184         int ret = 0;
1185
1186         out_ctx = xhci->devs[slot_id]->out_ctx;
1187         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1188         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1189         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1190         if (hw_max_packet_size != max_packet_size) {
1191                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1192                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1193                                 max_packet_size);
1194                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1195                                 hw_max_packet_size);
1196                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1197
1198                 /* Set up the modified control endpoint 0 */
1199                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1200                                 xhci->devs[slot_id]->out_ctx, ep_index);
1201                 in_ctx = xhci->devs[slot_id]->in_ctx;
1202                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1203                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1204                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1205
1206                 /* Set up the input context flags for the command */
1207                 /* FIXME: This won't work if a non-default control endpoint
1208                  * changes max packet sizes.
1209                  */
1210                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1211                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1212                 ctrl_ctx->drop_flags = 0;
1213
1214                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1215                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1216                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1217                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1218
1219                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1220                                 true, false);
1221
1222                 /* Clean up the input context for later use by bandwidth
1223                  * functions.
1224                  */
1225                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1226         }
1227         return ret;
1228 }
1229
1230 /*
1231  * non-error returns are a promise to giveback() the urb later
1232  * we drop ownership so next owner (or urb unlink) can get it
1233  */
1234 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1235 {
1236         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1237         struct xhci_td *buffer;
1238         unsigned long flags;
1239         int ret = 0;
1240         unsigned int slot_id, ep_index;
1241         struct urb_priv *urb_priv;
1242         int size, i;
1243
1244         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1245                                         true, true, __func__) <= 0)
1246                 return -EINVAL;
1247
1248         slot_id = urb->dev->slot_id;
1249         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1250
1251         if (!HCD_HW_ACCESSIBLE(hcd)) {
1252                 if (!in_interrupt())
1253                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1254                 ret = -ESHUTDOWN;
1255                 goto exit;
1256         }
1257
1258         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1259                 size = urb->number_of_packets;
1260         else
1261                 size = 1;
1262
1263         urb_priv = kzalloc(sizeof(struct urb_priv) +
1264                                   size * sizeof(struct xhci_td *), mem_flags);
1265         if (!urb_priv)
1266                 return -ENOMEM;
1267
1268         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1269         if (!buffer) {
1270                 kfree(urb_priv);
1271                 return -ENOMEM;
1272         }
1273
1274         for (i = 0; i < size; i++) {
1275                 urb_priv->td[i] = buffer;
1276                 buffer++;
1277         }
1278
1279         urb_priv->length = size;
1280         urb_priv->td_cnt = 0;
1281         urb->hcpriv = urb_priv;
1282
1283         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1284                 /* Check to see if the max packet size for the default control
1285                  * endpoint changed during FS device enumeration
1286                  */
1287                 if (urb->dev->speed == USB_SPEED_FULL) {
1288                         ret = xhci_check_maxpacket(xhci, slot_id,
1289                                         ep_index, urb);
1290                         if (ret < 0) {
1291                                 xhci_urb_free_priv(xhci, urb_priv);
1292                                 urb->hcpriv = NULL;
1293                                 return ret;
1294                         }
1295                 }
1296
1297                 /* We have a spinlock and interrupts disabled, so we must pass
1298                  * atomic context to this function, which may allocate memory.
1299                  */
1300                 spin_lock_irqsave(&xhci->lock, flags);
1301                 if (xhci->xhc_state & XHCI_STATE_DYING)
1302                         goto dying;
1303                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1304                                 slot_id, ep_index);
1305                 if (ret)
1306                         goto free_priv;
1307                 spin_unlock_irqrestore(&xhci->lock, flags);
1308         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1309                 spin_lock_irqsave(&xhci->lock, flags);
1310                 if (xhci->xhc_state & XHCI_STATE_DYING)
1311                         goto dying;
1312                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1313                                 EP_GETTING_STREAMS) {
1314                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1315                                         "is transitioning to using streams.\n");
1316                         ret = -EINVAL;
1317                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1318                                 EP_GETTING_NO_STREAMS) {
1319                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1320                                         "is transitioning to "
1321                                         "not having streams.\n");
1322                         ret = -EINVAL;
1323                 } else {
1324                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1325                                         slot_id, ep_index);
1326                 }
1327                 if (ret)
1328                         goto free_priv;
1329                 spin_unlock_irqrestore(&xhci->lock, flags);
1330         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1331                 spin_lock_irqsave(&xhci->lock, flags);
1332                 if (xhci->xhc_state & XHCI_STATE_DYING)
1333                         goto dying;
1334                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1335                                 slot_id, ep_index);
1336                 if (ret)
1337                         goto free_priv;
1338                 spin_unlock_irqrestore(&xhci->lock, flags);
1339         } else {
1340                 spin_lock_irqsave(&xhci->lock, flags);
1341                 if (xhci->xhc_state & XHCI_STATE_DYING)
1342                         goto dying;
1343                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1344                                 slot_id, ep_index);
1345                 if (ret)
1346                         goto free_priv;
1347                 spin_unlock_irqrestore(&xhci->lock, flags);
1348         }
1349 exit:
1350         return ret;
1351 dying:
1352         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1353                         "non-responsive xHCI host.\n",
1354                         urb->ep->desc.bEndpointAddress, urb);
1355         ret = -ESHUTDOWN;
1356 free_priv:
1357         xhci_urb_free_priv(xhci, urb_priv);
1358         urb->hcpriv = NULL;
1359         spin_unlock_irqrestore(&xhci->lock, flags);
1360         return ret;
1361 }
1362
1363 /* Get the right ring for the given URB.
1364  * If the endpoint supports streams, boundary check the URB's stream ID.
1365  * If the endpoint doesn't support streams, return the singular endpoint ring.
1366  */
1367 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1368                 struct urb *urb)
1369 {
1370         unsigned int slot_id;
1371         unsigned int ep_index;
1372         unsigned int stream_id;
1373         struct xhci_virt_ep *ep;
1374
1375         slot_id = urb->dev->slot_id;
1376         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1377         stream_id = urb->stream_id;
1378         ep = &xhci->devs[slot_id]->eps[ep_index];
1379         /* Common case: no streams */
1380         if (!(ep->ep_state & EP_HAS_STREAMS))
1381                 return ep->ring;
1382
1383         if (stream_id == 0) {
1384                 xhci_warn(xhci,
1385                                 "WARN: Slot ID %u, ep index %u has streams, "
1386                                 "but URB has no stream ID.\n",
1387                                 slot_id, ep_index);
1388                 return NULL;
1389         }
1390
1391         if (stream_id < ep->stream_info->num_streams)
1392                 return ep->stream_info->stream_rings[stream_id];
1393
1394         xhci_warn(xhci,
1395                         "WARN: Slot ID %u, ep index %u has "
1396                         "stream IDs 1 to %u allocated, "
1397                         "but stream ID %u is requested.\n",
1398                         slot_id, ep_index,
1399                         ep->stream_info->num_streams - 1,
1400                         stream_id);
1401         return NULL;
1402 }
1403
1404 /*
1405  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1406  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1407  * should pick up where it left off in the TD, unless a Set Transfer Ring
1408  * Dequeue Pointer is issued.
1409  *
1410  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1411  * the ring.  Since the ring is a contiguous structure, they can't be physically
1412  * removed.  Instead, there are two options:
1413  *
1414  *  1) If the HC is in the middle of processing the URB to be canceled, we
1415  *     simply move the ring's dequeue pointer past those TRBs using the Set
1416  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1417  *     when drivers timeout on the last submitted URB and attempt to cancel.
1418  *
1419  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1420  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1421  *     HC will need to invalidate the any TRBs it has cached after the stop
1422  *     endpoint command, as noted in the xHCI 0.95 errata.
1423  *
1424  *  3) The TD may have completed by the time the Stop Endpoint Command
1425  *     completes, so software needs to handle that case too.
1426  *
1427  * This function should protect against the TD enqueueing code ringing the
1428  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1429  * It also needs to account for multiple cancellations on happening at the same
1430  * time for the same endpoint.
1431  *
1432  * Note that this function can be called in any context, or so says
1433  * usb_hcd_unlink_urb()
1434  */
1435 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1436 {
1437         unsigned long flags;
1438         int ret, i;
1439         u32 temp;
1440         struct xhci_hcd *xhci;
1441         struct urb_priv *urb_priv;
1442         struct xhci_td *td;
1443         unsigned int ep_index;
1444         struct xhci_ring *ep_ring;
1445         struct xhci_virt_ep *ep;
1446
1447         xhci = hcd_to_xhci(hcd);
1448         spin_lock_irqsave(&xhci->lock, flags);
1449         /* Make sure the URB hasn't completed or been unlinked already */
1450         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1451         if (ret || !urb->hcpriv)
1452                 goto done;
1453         temp = xhci_readl(xhci, &xhci->op_regs->status);
1454         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1455                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1456                 urb_priv = urb->hcpriv;
1457                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1458                         td = urb_priv->td[i];
1459                         if (!list_empty(&td->td_list))
1460                                 list_del_init(&td->td_list);
1461                         if (!list_empty(&td->cancelled_td_list))
1462                                 list_del_init(&td->cancelled_td_list);
1463                 }
1464
1465                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1466                 spin_unlock_irqrestore(&xhci->lock, flags);
1467                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1468                 xhci_urb_free_priv(xhci, urb_priv);
1469                 return ret;
1470         }
1471         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1472                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1473                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1474                                 "non-responsive xHCI host.\n",
1475                                 urb->ep->desc.bEndpointAddress, urb);
1476                 /* Let the stop endpoint command watchdog timer (which set this
1477                  * state) finish cleaning up the endpoint TD lists.  We must
1478                  * have caught it in the middle of dropping a lock and giving
1479                  * back an URB.
1480                  */
1481                 goto done;
1482         }
1483
1484         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1485         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1486         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1487         if (!ep_ring) {
1488                 ret = -EINVAL;
1489                 goto done;
1490         }
1491
1492         urb_priv = urb->hcpriv;
1493         i = urb_priv->td_cnt;
1494         if (i < urb_priv->length)
1495                 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1496                                 "starting at offset 0x%llx\n",
1497                                 urb, urb->dev->devpath,
1498                                 urb->ep->desc.bEndpointAddress,
1499                                 (unsigned long long) xhci_trb_virt_to_dma(
1500                                         urb_priv->td[i]->start_seg,
1501                                         urb_priv->td[i]->first_trb));
1502
1503         for (; i < urb_priv->length; i++) {
1504                 td = urb_priv->td[i];
1505                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1506         }
1507
1508         /* Queue a stop endpoint command, but only if this is
1509          * the first cancellation to be handled.
1510          */
1511         if (!(ep->ep_state & EP_HALT_PENDING)) {
1512                 ep->ep_state |= EP_HALT_PENDING;
1513                 ep->stop_cmds_pending++;
1514                 ep->stop_cmd_timer.expires = jiffies +
1515                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1516                 add_timer(&ep->stop_cmd_timer);
1517                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1518                 xhci_ring_cmd_db(xhci);
1519         }
1520 done:
1521         spin_unlock_irqrestore(&xhci->lock, flags);
1522         return ret;
1523 }
1524
1525 /* Drop an endpoint from a new bandwidth configuration for this device.
1526  * Only one call to this function is allowed per endpoint before
1527  * check_bandwidth() or reset_bandwidth() must be called.
1528  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1529  * add the endpoint to the schedule with possibly new parameters denoted by a
1530  * different endpoint descriptor in usb_host_endpoint.
1531  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1532  * not allowed.
1533  *
1534  * The USB core will not allow URBs to be queued to an endpoint that is being
1535  * disabled, so there's no need for mutual exclusion to protect
1536  * the xhci->devs[slot_id] structure.
1537  */
1538 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1539                 struct usb_host_endpoint *ep)
1540 {
1541         struct xhci_hcd *xhci;
1542         struct xhci_container_ctx *in_ctx, *out_ctx;
1543         struct xhci_input_control_ctx *ctrl_ctx;
1544         struct xhci_slot_ctx *slot_ctx;
1545         unsigned int last_ctx;
1546         unsigned int ep_index;
1547         struct xhci_ep_ctx *ep_ctx;
1548         u32 drop_flag;
1549         u32 new_add_flags, new_drop_flags, new_slot_info;
1550         int ret;
1551
1552         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1553         if (ret <= 0)
1554                 return ret;
1555         xhci = hcd_to_xhci(hcd);
1556         if (xhci->xhc_state & XHCI_STATE_DYING)
1557                 return -ENODEV;
1558
1559         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1560         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1561         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1562                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1563                                 __func__, drop_flag);
1564                 return 0;
1565         }
1566
1567         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1568         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1569         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1570         ep_index = xhci_get_endpoint_index(&ep->desc);
1571         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1572         /* If the HC already knows the endpoint is disabled,
1573          * or the HCD has noted it is disabled, ignore this request
1574          */
1575         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1576              cpu_to_le32(EP_STATE_DISABLED)) ||
1577             le32_to_cpu(ctrl_ctx->drop_flags) &
1578             xhci_get_endpoint_flag(&ep->desc)) {
1579                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1580                                 __func__, ep);
1581                 return 0;
1582         }
1583
1584         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1585         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1586
1587         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1588         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1589
1590         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1591         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1592         /* Update the last valid endpoint context, if we deleted the last one */
1593         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1594             LAST_CTX(last_ctx)) {
1595                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1596                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1597         }
1598         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1599
1600         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1601
1602         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1603                         (unsigned int) ep->desc.bEndpointAddress,
1604                         udev->slot_id,
1605                         (unsigned int) new_drop_flags,
1606                         (unsigned int) new_add_flags,
1607                         (unsigned int) new_slot_info);
1608         return 0;
1609 }
1610
1611 /* Add an endpoint to a new possible bandwidth configuration for this device.
1612  * Only one call to this function is allowed per endpoint before
1613  * check_bandwidth() or reset_bandwidth() must be called.
1614  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1615  * add the endpoint to the schedule with possibly new parameters denoted by a
1616  * different endpoint descriptor in usb_host_endpoint.
1617  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1618  * not allowed.
1619  *
1620  * The USB core will not allow URBs to be queued to an endpoint until the
1621  * configuration or alt setting is installed in the device, so there's no need
1622  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1623  */
1624 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1625                 struct usb_host_endpoint *ep)
1626 {
1627         struct xhci_hcd *xhci;
1628         struct xhci_container_ctx *in_ctx, *out_ctx;
1629         unsigned int ep_index;
1630         struct xhci_slot_ctx *slot_ctx;
1631         struct xhci_input_control_ctx *ctrl_ctx;
1632         u32 added_ctxs;
1633         unsigned int last_ctx;
1634         u32 new_add_flags, new_drop_flags, new_slot_info;
1635         struct xhci_virt_device *virt_dev;
1636         int ret = 0;
1637
1638         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1639         if (ret <= 0) {
1640                 /* So we won't queue a reset ep command for a root hub */
1641                 ep->hcpriv = NULL;
1642                 return ret;
1643         }
1644         xhci = hcd_to_xhci(hcd);
1645         if (xhci->xhc_state & XHCI_STATE_DYING)
1646                 return -ENODEV;
1647
1648         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1649         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1650         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1651                 /* FIXME when we have to issue an evaluate endpoint command to
1652                  * deal with ep0 max packet size changing once we get the
1653                  * descriptors
1654                  */
1655                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1656                                 __func__, added_ctxs);
1657                 return 0;
1658         }
1659
1660         virt_dev = xhci->devs[udev->slot_id];
1661         in_ctx = virt_dev->in_ctx;
1662         out_ctx = virt_dev->out_ctx;
1663         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1664         ep_index = xhci_get_endpoint_index(&ep->desc);
1665
1666         /* If this endpoint is already in use, and the upper layers are trying
1667          * to add it again without dropping it, reject the addition.
1668          */
1669         if (virt_dev->eps[ep_index].ring &&
1670                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1671                                 xhci_get_endpoint_flag(&ep->desc))) {
1672                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1673                                 "without dropping it.\n",
1674                                 (unsigned int) ep->desc.bEndpointAddress);
1675                 return -EINVAL;
1676         }
1677
1678         /* If the HCD has already noted the endpoint is enabled,
1679          * ignore this request.
1680          */
1681         if (le32_to_cpu(ctrl_ctx->add_flags) &
1682             xhci_get_endpoint_flag(&ep->desc)) {
1683                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1684                                 __func__, ep);
1685                 return 0;
1686         }
1687
1688         /*
1689          * Configuration and alternate setting changes must be done in
1690          * process context, not interrupt context (or so documenation
1691          * for usb_set_interface() and usb_set_configuration() claim).
1692          */
1693         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1694                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1695                                 __func__, ep->desc.bEndpointAddress);
1696                 return -ENOMEM;
1697         }
1698
1699         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1700         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1701
1702         /* If xhci_endpoint_disable() was called for this endpoint, but the
1703          * xHC hasn't been notified yet through the check_bandwidth() call,
1704          * this re-adds a new state for the endpoint from the new endpoint
1705          * descriptors.  We must drop and re-add this endpoint, so we leave the
1706          * drop flags alone.
1707          */
1708         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1709
1710         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1711         /* Update the last valid endpoint context, if we just added one past */
1712         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1713             LAST_CTX(last_ctx)) {
1714                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1715                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1716         }
1717         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1718
1719         /* Store the usb_device pointer for later use */
1720         ep->hcpriv = udev;
1721
1722         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1723                         (unsigned int) ep->desc.bEndpointAddress,
1724                         udev->slot_id,
1725                         (unsigned int) new_drop_flags,
1726                         (unsigned int) new_add_flags,
1727                         (unsigned int) new_slot_info);
1728         return 0;
1729 }
1730
1731 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1732 {
1733         struct xhci_input_control_ctx *ctrl_ctx;
1734         struct xhci_ep_ctx *ep_ctx;
1735         struct xhci_slot_ctx *slot_ctx;
1736         int i;
1737
1738         /* When a device's add flag and drop flag are zero, any subsequent
1739          * configure endpoint command will leave that endpoint's state
1740          * untouched.  Make sure we don't leave any old state in the input
1741          * endpoint contexts.
1742          */
1743         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1744         ctrl_ctx->drop_flags = 0;
1745         ctrl_ctx->add_flags = 0;
1746         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1747         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1748         /* Endpoint 0 is always valid */
1749         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1750         for (i = 1; i < 31; ++i) {
1751                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1752                 ep_ctx->ep_info = 0;
1753                 ep_ctx->ep_info2 = 0;
1754                 ep_ctx->deq = 0;
1755                 ep_ctx->tx_info = 0;
1756         }
1757 }
1758
1759 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1760                 struct usb_device *udev, u32 *cmd_status)
1761 {
1762         int ret;
1763
1764         switch (*cmd_status) {
1765         case COMP_ENOMEM:
1766                 dev_warn(&udev->dev, "Not enough host controller resources "
1767                                 "for new device state.\n");
1768                 ret = -ENOMEM;
1769                 /* FIXME: can we allocate more resources for the HC? */
1770                 break;
1771         case COMP_BW_ERR:
1772         case COMP_2ND_BW_ERR:
1773                 dev_warn(&udev->dev, "Not enough bandwidth "
1774                                 "for new device state.\n");
1775                 ret = -ENOSPC;
1776                 /* FIXME: can we go back to the old state? */
1777                 break;
1778         case COMP_TRB_ERR:
1779                 /* the HCD set up something wrong */
1780                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1781                                 "add flag = 1, "
1782                                 "and endpoint is not disabled.\n");
1783                 ret = -EINVAL;
1784                 break;
1785         case COMP_DEV_ERR:
1786                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1787                                 "configure command.\n");
1788                 ret = -ENODEV;
1789                 break;
1790         case COMP_SUCCESS:
1791                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1792                 ret = 0;
1793                 break;
1794         default:
1795                 xhci_err(xhci, "ERROR: unexpected command completion "
1796                                 "code 0x%x.\n", *cmd_status);
1797                 ret = -EINVAL;
1798                 break;
1799         }
1800         return ret;
1801 }
1802
1803 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1804                 struct usb_device *udev, u32 *cmd_status)
1805 {
1806         int ret;
1807         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1808
1809         switch (*cmd_status) {
1810         case COMP_EINVAL:
1811                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1812                                 "context command.\n");
1813                 ret = -EINVAL;
1814                 break;
1815         case COMP_EBADSLT:
1816                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1817                                 "evaluate context command.\n");
1818                 ret = -EINVAL;
1819                 break;
1820         case COMP_CTX_STATE:
1821                 dev_warn(&udev->dev, "WARN: invalid context state for "
1822                                 "evaluate context command.\n");
1823                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1824                 ret = -EINVAL;
1825                 break;
1826         case COMP_DEV_ERR:
1827                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1828                                 "context command.\n");
1829                 ret = -ENODEV;
1830                 break;
1831         case COMP_MEL_ERR:
1832                 /* Max Exit Latency too large error */
1833                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1834                 ret = -EINVAL;
1835                 break;
1836         case COMP_SUCCESS:
1837                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1838                 ret = 0;
1839                 break;
1840         default:
1841                 xhci_err(xhci, "ERROR: unexpected command completion "
1842                                 "code 0x%x.\n", *cmd_status);
1843                 ret = -EINVAL;
1844                 break;
1845         }
1846         return ret;
1847 }
1848
1849 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1850                 struct xhci_container_ctx *in_ctx)
1851 {
1852         struct xhci_input_control_ctx *ctrl_ctx;
1853         u32 valid_add_flags;
1854         u32 valid_drop_flags;
1855
1856         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1857         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1858          * (bit 1).  The default control endpoint is added during the Address
1859          * Device command and is never removed until the slot is disabled.
1860          */
1861         valid_add_flags = ctrl_ctx->add_flags >> 2;
1862         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1863
1864         /* Use hweight32 to count the number of ones in the add flags, or
1865          * number of endpoints added.  Don't count endpoints that are changed
1866          * (both added and dropped).
1867          */
1868         return hweight32(valid_add_flags) -
1869                 hweight32(valid_add_flags & valid_drop_flags);
1870 }
1871
1872 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1873                 struct xhci_container_ctx *in_ctx)
1874 {
1875         struct xhci_input_control_ctx *ctrl_ctx;
1876         u32 valid_add_flags;
1877         u32 valid_drop_flags;
1878
1879         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1880         valid_add_flags = ctrl_ctx->add_flags >> 2;
1881         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1882
1883         return hweight32(valid_drop_flags) -
1884                 hweight32(valid_add_flags & valid_drop_flags);
1885 }
1886
1887 /*
1888  * We need to reserve the new number of endpoints before the configure endpoint
1889  * command completes.  We can't subtract the dropped endpoints from the number
1890  * of active endpoints until the command completes because we can oversubscribe
1891  * the host in this case:
1892  *
1893  *  - the first configure endpoint command drops more endpoints than it adds
1894  *  - a second configure endpoint command that adds more endpoints is queued
1895  *  - the first configure endpoint command fails, so the config is unchanged
1896  *  - the second command may succeed, even though there isn't enough resources
1897  *
1898  * Must be called with xhci->lock held.
1899  */
1900 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1901                 struct xhci_container_ctx *in_ctx)
1902 {
1903         u32 added_eps;
1904
1905         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1906         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1907                 xhci_dbg(xhci, "Not enough ep ctxs: "
1908                                 "%u active, need to add %u, limit is %u.\n",
1909                                 xhci->num_active_eps, added_eps,
1910                                 xhci->limit_active_eps);
1911                 return -ENOMEM;
1912         }
1913         xhci->num_active_eps += added_eps;
1914         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1915                         xhci->num_active_eps);
1916         return 0;
1917 }
1918
1919 /*
1920  * The configure endpoint was failed by the xHC for some other reason, so we
1921  * need to revert the resources that failed configuration would have used.
1922  *
1923  * Must be called with xhci->lock held.
1924  */
1925 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1926                 struct xhci_container_ctx *in_ctx)
1927 {
1928         u32 num_failed_eps;
1929
1930         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1931         xhci->num_active_eps -= num_failed_eps;
1932         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1933                         num_failed_eps,
1934                         xhci->num_active_eps);
1935 }
1936
1937 /*
1938  * Now that the command has completed, clean up the active endpoint count by
1939  * subtracting out the endpoints that were dropped (but not changed).
1940  *
1941  * Must be called with xhci->lock held.
1942  */
1943 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1944                 struct xhci_container_ctx *in_ctx)
1945 {
1946         u32 num_dropped_eps;
1947
1948         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1949         xhci->num_active_eps -= num_dropped_eps;
1950         if (num_dropped_eps)
1951                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1952                                 num_dropped_eps,
1953                                 xhci->num_active_eps);
1954 }
1955
1956 static unsigned int xhci_get_block_size(struct usb_device *udev)
1957 {
1958         switch (udev->speed) {
1959         case USB_SPEED_LOW:
1960         case USB_SPEED_FULL:
1961                 return FS_BLOCK;
1962         case USB_SPEED_HIGH:
1963                 return HS_BLOCK;
1964         case USB_SPEED_SUPER:
1965                 return SS_BLOCK;
1966         case USB_SPEED_UNKNOWN:
1967         case USB_SPEED_WIRELESS:
1968         default:
1969                 /* Should never happen */
1970                 return 1;
1971         }
1972 }
1973
1974 static unsigned int
1975 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
1976 {
1977         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
1978                 return LS_OVERHEAD;
1979         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
1980                 return FS_OVERHEAD;
1981         return HS_OVERHEAD;
1982 }
1983
1984 /* If we are changing a LS/FS device under a HS hub,
1985  * make sure (if we are activating a new TT) that the HS bus has enough
1986  * bandwidth for this new TT.
1987  */
1988 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
1989                 struct xhci_virt_device *virt_dev,
1990                 int old_active_eps)
1991 {
1992         struct xhci_interval_bw_table *bw_table;
1993         struct xhci_tt_bw_info *tt_info;
1994
1995         /* Find the bandwidth table for the root port this TT is attached to. */
1996         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
1997         tt_info = virt_dev->tt_info;
1998         /* If this TT already had active endpoints, the bandwidth for this TT
1999          * has already been added.  Removing all periodic endpoints (and thus
2000          * making the TT enactive) will only decrease the bandwidth used.
2001          */
2002         if (old_active_eps)
2003                 return 0;
2004         if (old_active_eps == 0 && tt_info->active_eps != 0) {
2005                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2006                         return -ENOMEM;
2007                 return 0;
2008         }
2009         /* Not sure why we would have no new active endpoints...
2010          *
2011          * Maybe because of an Evaluate Context change for a hub update or a
2012          * control endpoint 0 max packet size change?
2013          * FIXME: skip the bandwidth calculation in that case.
2014          */
2015         return 0;
2016 }
2017
2018 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2019                 struct xhci_virt_device *virt_dev)
2020 {
2021         unsigned int bw_reserved;
2022
2023         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2024         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2025                 return -ENOMEM;
2026
2027         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2028         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2029                 return -ENOMEM;
2030
2031         return 0;
2032 }
2033
2034 /*
2035  * This algorithm is a very conservative estimate of the worst-case scheduling
2036  * scenario for any one interval.  The hardware dynamically schedules the
2037  * packets, so we can't tell which microframe could be the limiting factor in
2038  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2039  *
2040  * Obviously, we can't solve an NP complete problem to find the minimum worst
2041  * case scenario.  Instead, we come up with an estimate that is no less than
2042  * the worst case bandwidth used for any one microframe, but may be an
2043  * over-estimate.
2044  *
2045  * We walk the requirements for each endpoint by interval, starting with the
2046  * smallest interval, and place packets in the schedule where there is only one
2047  * possible way to schedule packets for that interval.  In order to simplify
2048  * this algorithm, we record the largest max packet size for each interval, and
2049  * assume all packets will be that size.
2050  *
2051  * For interval 0, we obviously must schedule all packets for each interval.
2052  * The bandwidth for interval 0 is just the amount of data to be transmitted
2053  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2054  * the number of packets).
2055  *
2056  * For interval 1, we have two possible microframes to schedule those packets
2057  * in.  For this algorithm, if we can schedule the same number of packets for
2058  * each possible scheduling opportunity (each microframe), we will do so.  The
2059  * remaining number of packets will be saved to be transmitted in the gaps in
2060  * the next interval's scheduling sequence.
2061  *
2062  * As we move those remaining packets to be scheduled with interval 2 packets,
2063  * we have to double the number of remaining packets to transmit.  This is
2064  * because the intervals are actually powers of 2, and we would be transmitting
2065  * the previous interval's packets twice in this interval.  We also have to be
2066  * sure that when we look at the largest max packet size for this interval, we
2067  * also look at the largest max packet size for the remaining packets and take
2068  * the greater of the two.
2069  *
2070  * The algorithm continues to evenly distribute packets in each scheduling
2071  * opportunity, and push the remaining packets out, until we get to the last
2072  * interval.  Then those packets and their associated overhead are just added
2073  * to the bandwidth used.
2074  */
2075 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2076                 struct xhci_virt_device *virt_dev,
2077                 int old_active_eps)
2078 {
2079         unsigned int bw_reserved;
2080         unsigned int max_bandwidth;
2081         unsigned int bw_used;
2082         unsigned int block_size;
2083         struct xhci_interval_bw_table *bw_table;
2084         unsigned int packet_size = 0;
2085         unsigned int overhead = 0;
2086         unsigned int packets_transmitted = 0;
2087         unsigned int packets_remaining = 0;
2088         unsigned int i;
2089
2090         if (virt_dev->udev->speed == USB_SPEED_SUPER)
2091                 return xhci_check_ss_bw(xhci, virt_dev);
2092
2093         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2094                 max_bandwidth = HS_BW_LIMIT;
2095                 /* Convert percent of bus BW reserved to blocks reserved */
2096                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2097         } else {
2098                 max_bandwidth = FS_BW_LIMIT;
2099                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2100         }
2101
2102         bw_table = virt_dev->bw_table;
2103         /* We need to translate the max packet size and max ESIT payloads into
2104          * the units the hardware uses.
2105          */
2106         block_size = xhci_get_block_size(virt_dev->udev);
2107
2108         /* If we are manipulating a LS/FS device under a HS hub, double check
2109          * that the HS bus has enough bandwidth if we are activing a new TT.
2110          */
2111         if (virt_dev->tt_info) {
2112                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2113                                 virt_dev->real_port);
2114                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2115                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2116                                         "newly activated TT.\n");
2117                         return -ENOMEM;
2118                 }
2119                 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2120                                 virt_dev->tt_info->slot_id,
2121                                 virt_dev->tt_info->ttport);
2122         } else {
2123                 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2124                                 virt_dev->real_port);
2125         }
2126
2127         /* Add in how much bandwidth will be used for interval zero, or the
2128          * rounded max ESIT payload + number of packets * largest overhead.
2129          */
2130         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2131                 bw_table->interval_bw[0].num_packets *
2132                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2133
2134         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2135                 unsigned int bw_added;
2136                 unsigned int largest_mps;
2137                 unsigned int interval_overhead;
2138
2139                 /*
2140                  * How many packets could we transmit in this interval?
2141                  * If packets didn't fit in the previous interval, we will need
2142                  * to transmit that many packets twice within this interval.
2143                  */
2144                 packets_remaining = 2 * packets_remaining +
2145                         bw_table->interval_bw[i].num_packets;
2146
2147                 /* Find the largest max packet size of this or the previous
2148                  * interval.
2149                  */
2150                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2151                         largest_mps = 0;
2152                 else {
2153                         struct xhci_virt_ep *virt_ep;
2154                         struct list_head *ep_entry;
2155
2156                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2157                         virt_ep = list_entry(ep_entry,
2158                                         struct xhci_virt_ep, bw_endpoint_list);
2159                         /* Convert to blocks, rounding up */
2160                         largest_mps = DIV_ROUND_UP(
2161                                         virt_ep->bw_info.max_packet_size,
2162                                         block_size);
2163                 }
2164                 if (largest_mps > packet_size)
2165                         packet_size = largest_mps;
2166
2167                 /* Use the larger overhead of this or the previous interval. */
2168                 interval_overhead = xhci_get_largest_overhead(
2169                                 &bw_table->interval_bw[i]);
2170                 if (interval_overhead > overhead)
2171                         overhead = interval_overhead;
2172
2173                 /* How many packets can we evenly distribute across
2174                  * (1 << (i + 1)) possible scheduling opportunities?
2175                  */
2176                 packets_transmitted = packets_remaining >> (i + 1);
2177
2178                 /* Add in the bandwidth used for those scheduled packets */
2179                 bw_added = packets_transmitted * (overhead + packet_size);
2180
2181                 /* How many packets do we have remaining to transmit? */
2182                 packets_remaining = packets_remaining % (1 << (i + 1));
2183
2184                 /* What largest max packet size should those packets have? */
2185                 /* If we've transmitted all packets, don't carry over the
2186                  * largest packet size.
2187                  */
2188                 if (packets_remaining == 0) {
2189                         packet_size = 0;
2190                         overhead = 0;
2191                 } else if (packets_transmitted > 0) {
2192                         /* Otherwise if we do have remaining packets, and we've
2193                          * scheduled some packets in this interval, take the
2194                          * largest max packet size from endpoints with this
2195                          * interval.
2196                          */
2197                         packet_size = largest_mps;
2198                         overhead = interval_overhead;
2199                 }
2200                 /* Otherwise carry over packet_size and overhead from the last
2201                  * time we had a remainder.
2202                  */
2203                 bw_used += bw_added;
2204                 if (bw_used > max_bandwidth) {
2205                         xhci_warn(xhci, "Not enough bandwidth. "
2206                                         "Proposed: %u, Max: %u\n",
2207                                 bw_used, max_bandwidth);
2208                         return -ENOMEM;
2209                 }
2210         }
2211         /*
2212          * Ok, we know we have some packets left over after even-handedly
2213          * scheduling interval 15.  We don't know which microframes they will
2214          * fit into, so we over-schedule and say they will be scheduled every
2215          * microframe.
2216          */
2217         if (packets_remaining > 0)
2218                 bw_used += overhead + packet_size;
2219
2220         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2221                 unsigned int port_index = virt_dev->real_port - 1;
2222
2223                 /* OK, we're manipulating a HS device attached to a
2224                  * root port bandwidth domain.  Include the number of active TTs
2225                  * in the bandwidth used.
2226                  */
2227                 bw_used += TT_HS_OVERHEAD *
2228                         xhci->rh_bw[port_index].num_active_tts;
2229         }
2230
2231         xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2232                 "Available: %u " "percent\n",
2233                 bw_used, max_bandwidth, bw_reserved,
2234                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2235                 max_bandwidth);
2236
2237         bw_used += bw_reserved;
2238         if (bw_used > max_bandwidth) {
2239                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2240                                 bw_used, max_bandwidth);
2241                 return -ENOMEM;
2242         }
2243
2244         bw_table->bw_used = bw_used;
2245         return 0;
2246 }
2247
2248 static bool xhci_is_async_ep(unsigned int ep_type)
2249 {
2250         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2251                                         ep_type != ISOC_IN_EP &&
2252                                         ep_type != INT_IN_EP);
2253 }
2254
2255 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2256 {
2257         return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP);
2258 }
2259
2260 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2261 {
2262         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2263
2264         if (ep_bw->ep_interval == 0)
2265                 return SS_OVERHEAD_BURST +
2266                         (ep_bw->mult * ep_bw->num_packets *
2267                                         (SS_OVERHEAD + mps));
2268         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2269                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2270                                 1 << ep_bw->ep_interval);
2271
2272 }
2273
2274 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2275                 struct xhci_bw_info *ep_bw,
2276                 struct xhci_interval_bw_table *bw_table,
2277                 struct usb_device *udev,
2278                 struct xhci_virt_ep *virt_ep,
2279                 struct xhci_tt_bw_info *tt_info)
2280 {
2281         struct xhci_interval_bw *interval_bw;
2282         int normalized_interval;
2283
2284         if (xhci_is_async_ep(ep_bw->type))
2285                 return;
2286
2287         if (udev->speed == USB_SPEED_SUPER) {
2288                 if (xhci_is_sync_in_ep(ep_bw->type))
2289                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2290                                 xhci_get_ss_bw_consumed(ep_bw);
2291                 else
2292                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2293                                 xhci_get_ss_bw_consumed(ep_bw);
2294                 return;
2295         }
2296
2297         /* SuperSpeed endpoints never get added to intervals in the table, so
2298          * this check is only valid for HS/FS/LS devices.
2299          */
2300         if (list_empty(&virt_ep->bw_endpoint_list))
2301                 return;
2302         /* For LS/FS devices, we need to translate the interval expressed in
2303          * microframes to frames.
2304          */
2305         if (udev->speed == USB_SPEED_HIGH)
2306                 normalized_interval = ep_bw->ep_interval;
2307         else
2308                 normalized_interval = ep_bw->ep_interval - 3;
2309
2310         if (normalized_interval == 0)
2311                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2312         interval_bw = &bw_table->interval_bw[normalized_interval];
2313         interval_bw->num_packets -= ep_bw->num_packets;
2314         switch (udev->speed) {
2315         case USB_SPEED_LOW:
2316                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2317                 break;
2318         case USB_SPEED_FULL:
2319                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2320                 break;
2321         case USB_SPEED_HIGH:
2322                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2323                 break;
2324         case USB_SPEED_SUPER:
2325         case USB_SPEED_UNKNOWN:
2326         case USB_SPEED_WIRELESS:
2327                 /* Should never happen because only LS/FS/HS endpoints will get
2328                  * added to the endpoint list.
2329                  */
2330                 return;
2331         }
2332         if (tt_info)
2333                 tt_info->active_eps -= 1;
2334         list_del_init(&virt_ep->bw_endpoint_list);
2335 }
2336
2337 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2338                 struct xhci_bw_info *ep_bw,
2339                 struct xhci_interval_bw_table *bw_table,
2340                 struct usb_device *udev,
2341                 struct xhci_virt_ep *virt_ep,
2342                 struct xhci_tt_bw_info *tt_info)
2343 {
2344         struct xhci_interval_bw *interval_bw;
2345         struct xhci_virt_ep *smaller_ep;
2346         int normalized_interval;
2347
2348         if (xhci_is_async_ep(ep_bw->type))
2349                 return;
2350
2351         if (udev->speed == USB_SPEED_SUPER) {
2352                 if (xhci_is_sync_in_ep(ep_bw->type))
2353                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2354                                 xhci_get_ss_bw_consumed(ep_bw);
2355                 else
2356                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2357                                 xhci_get_ss_bw_consumed(ep_bw);
2358                 return;
2359         }
2360
2361         /* For LS/FS devices, we need to translate the interval expressed in
2362          * microframes to frames.
2363          */
2364         if (udev->speed == USB_SPEED_HIGH)
2365                 normalized_interval = ep_bw->ep_interval;
2366         else
2367                 normalized_interval = ep_bw->ep_interval - 3;
2368
2369         if (normalized_interval == 0)
2370                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2371         interval_bw = &bw_table->interval_bw[normalized_interval];
2372         interval_bw->num_packets += ep_bw->num_packets;
2373         switch (udev->speed) {
2374         case USB_SPEED_LOW:
2375                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2376                 break;
2377         case USB_SPEED_FULL:
2378                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2379                 break;
2380         case USB_SPEED_HIGH:
2381                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2382                 break;
2383         case USB_SPEED_SUPER:
2384         case USB_SPEED_UNKNOWN:
2385         case USB_SPEED_WIRELESS:
2386                 /* Should never happen because only LS/FS/HS endpoints will get
2387                  * added to the endpoint list.
2388                  */
2389                 return;
2390         }
2391
2392         if (tt_info)
2393                 tt_info->active_eps += 1;
2394         /* Insert the endpoint into the list, largest max packet size first. */
2395         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2396                         bw_endpoint_list) {
2397                 if (ep_bw->max_packet_size >=
2398                                 smaller_ep->bw_info.max_packet_size) {
2399                         /* Add the new ep before the smaller endpoint */
2400                         list_add_tail(&virt_ep->bw_endpoint_list,
2401                                         &smaller_ep->bw_endpoint_list);
2402                         return;
2403                 }
2404         }
2405         /* Add the new endpoint at the end of the list. */
2406         list_add_tail(&virt_ep->bw_endpoint_list,
2407                         &interval_bw->endpoints);
2408 }
2409
2410 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2411                 struct xhci_virt_device *virt_dev,
2412                 int old_active_eps)
2413 {
2414         struct xhci_root_port_bw_info *rh_bw_info;
2415         if (!virt_dev->tt_info)
2416                 return;
2417
2418         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2419         if (old_active_eps == 0 &&
2420                                 virt_dev->tt_info->active_eps != 0) {
2421                 rh_bw_info->num_active_tts += 1;
2422                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2423         } else if (old_active_eps != 0 &&
2424                                 virt_dev->tt_info->active_eps == 0) {
2425                 rh_bw_info->num_active_tts -= 1;
2426                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2427         }
2428 }
2429
2430 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2431                 struct xhci_virt_device *virt_dev,
2432                 struct xhci_container_ctx *in_ctx)
2433 {
2434         struct xhci_bw_info ep_bw_info[31];
2435         int i;
2436         struct xhci_input_control_ctx *ctrl_ctx;
2437         int old_active_eps = 0;
2438
2439         if (virt_dev->tt_info)
2440                 old_active_eps = virt_dev->tt_info->active_eps;
2441
2442         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2443
2444         for (i = 0; i < 31; i++) {
2445                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2446                         continue;
2447
2448                 /* Make a copy of the BW info in case we need to revert this */
2449                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2450                                 sizeof(ep_bw_info[i]));
2451                 /* Drop the endpoint from the interval table if the endpoint is
2452                  * being dropped or changed.
2453                  */
2454                 if (EP_IS_DROPPED(ctrl_ctx, i))
2455                         xhci_drop_ep_from_interval_table(xhci,
2456                                         &virt_dev->eps[i].bw_info,
2457                                         virt_dev->bw_table,
2458                                         virt_dev->udev,
2459                                         &virt_dev->eps[i],
2460                                         virt_dev->tt_info);
2461         }
2462         /* Overwrite the information stored in the endpoints' bw_info */
2463         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2464         for (i = 0; i < 31; i++) {
2465                 /* Add any changed or added endpoints to the interval table */
2466                 if (EP_IS_ADDED(ctrl_ctx, i))
2467                         xhci_add_ep_to_interval_table(xhci,
2468                                         &virt_dev->eps[i].bw_info,
2469                                         virt_dev->bw_table,
2470                                         virt_dev->udev,
2471                                         &virt_dev->eps[i],
2472                                         virt_dev->tt_info);
2473         }
2474
2475         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2476                 /* Ok, this fits in the bandwidth we have.
2477                  * Update the number of active TTs.
2478                  */
2479                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2480                 return 0;
2481         }
2482
2483         /* We don't have enough bandwidth for this, revert the stored info. */
2484         for (i = 0; i < 31; i++) {
2485                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2486                         continue;
2487
2488                 /* Drop the new copies of any added or changed endpoints from
2489                  * the interval table.
2490                  */
2491                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2492                         xhci_drop_ep_from_interval_table(xhci,
2493                                         &virt_dev->eps[i].bw_info,
2494                                         virt_dev->bw_table,
2495                                         virt_dev->udev,
2496                                         &virt_dev->eps[i],
2497                                         virt_dev->tt_info);
2498                 }
2499                 /* Revert the endpoint back to its old information */
2500                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2501                                 sizeof(ep_bw_info[i]));
2502                 /* Add any changed or dropped endpoints back into the table */
2503                 if (EP_IS_DROPPED(ctrl_ctx, i))
2504                         xhci_add_ep_to_interval_table(xhci,
2505                                         &virt_dev->eps[i].bw_info,
2506                                         virt_dev->bw_table,
2507                                         virt_dev->udev,
2508                                         &virt_dev->eps[i],
2509                                         virt_dev->tt_info);
2510         }
2511         return -ENOMEM;
2512 }
2513
2514
2515 /* Issue a configure endpoint command or evaluate context command
2516  * and wait for it to finish.
2517  */
2518 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2519                 struct usb_device *udev,
2520                 struct xhci_command *command,
2521                 bool ctx_change, bool must_succeed)
2522 {
2523         int ret;
2524         int timeleft;
2525         unsigned long flags;
2526         struct xhci_container_ctx *in_ctx;
2527         struct completion *cmd_completion;
2528         u32 *cmd_status;
2529         struct xhci_virt_device *virt_dev;
2530         union xhci_trb *cmd_trb;
2531
2532         spin_lock_irqsave(&xhci->lock, flags);
2533         virt_dev = xhci->devs[udev->slot_id];
2534
2535         if (command)
2536                 in_ctx = command->in_ctx;
2537         else
2538                 in_ctx = virt_dev->in_ctx;
2539
2540         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2541                         xhci_reserve_host_resources(xhci, in_ctx)) {
2542                 spin_unlock_irqrestore(&xhci->lock, flags);
2543                 xhci_warn(xhci, "Not enough host resources, "
2544                                 "active endpoint contexts = %u\n",
2545                                 xhci->num_active_eps);
2546                 return -ENOMEM;
2547         }
2548         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2549                         xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2550                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2551                         xhci_free_host_resources(xhci, in_ctx);
2552                 spin_unlock_irqrestore(&xhci->lock, flags);
2553                 xhci_warn(xhci, "Not enough bandwidth\n");
2554                 return -ENOMEM;
2555         }
2556
2557         if (command) {
2558                 cmd_completion = command->completion;
2559                 cmd_status = &command->status;
2560                 command->command_trb = xhci->cmd_ring->enqueue;
2561
2562                 /* Enqueue pointer can be left pointing to the link TRB,
2563                  * we must handle that
2564                  */
2565                 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2566                         command->command_trb =
2567                                 xhci->cmd_ring->enq_seg->next->trbs;
2568
2569                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2570         } else {
2571                 cmd_completion = &virt_dev->cmd_completion;
2572                 cmd_status = &virt_dev->cmd_status;
2573         }
2574         init_completion(cmd_completion);
2575
2576         cmd_trb = xhci->cmd_ring->dequeue;
2577         if (!ctx_change)
2578                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2579                                 udev->slot_id, must_succeed);
2580         else
2581                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2582                                 udev->slot_id, must_succeed);
2583         if (ret < 0) {
2584                 if (command)
2585                         list_del(&command->cmd_list);
2586                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2587                         xhci_free_host_resources(xhci, in_ctx);
2588                 spin_unlock_irqrestore(&xhci->lock, flags);
2589                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2590                 return -ENOMEM;
2591         }
2592         xhci_ring_cmd_db(xhci);
2593         spin_unlock_irqrestore(&xhci->lock, flags);
2594
2595         /* Wait for the configure endpoint command to complete */
2596         timeleft = wait_for_completion_interruptible_timeout(
2597                         cmd_completion,
2598                         XHCI_CMD_DEFAULT_TIMEOUT);
2599         if (timeleft <= 0) {
2600                 xhci_warn(xhci, "%s while waiting for %s command\n",
2601                                 timeleft == 0 ? "Timeout" : "Signal",
2602                                 ctx_change == 0 ?
2603                                         "configure endpoint" :
2604                                         "evaluate context");
2605                 /* cancel the configure endpoint command */
2606                 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2607                 if (ret < 0)
2608                         return ret;
2609                 return -ETIME;
2610         }
2611
2612         if (!ctx_change)
2613                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2614         else
2615                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2616
2617         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2618                 spin_lock_irqsave(&xhci->lock, flags);
2619                 /* If the command failed, remove the reserved resources.
2620                  * Otherwise, clean up the estimate to include dropped eps.
2621                  */
2622                 if (ret)
2623                         xhci_free_host_resources(xhci, in_ctx);
2624                 else
2625                         xhci_finish_resource_reservation(xhci, in_ctx);
2626                 spin_unlock_irqrestore(&xhci->lock, flags);
2627         }
2628         return ret;
2629 }
2630
2631 /* Called after one or more calls to xhci_add_endpoint() or
2632  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2633  * to call xhci_reset_bandwidth().
2634  *
2635  * Since we are in the middle of changing either configuration or
2636  * installing a new alt setting, the USB core won't allow URBs to be
2637  * enqueued for any endpoint on the old config or interface.  Nothing
2638  * else should be touching the xhci->devs[slot_id] structure, so we
2639  * don't need to take the xhci->lock for manipulating that.
2640  */
2641 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2642 {
2643         int i;
2644         int ret = 0;
2645         struct xhci_hcd *xhci;
2646         struct xhci_virt_device *virt_dev;
2647         struct xhci_input_control_ctx *ctrl_ctx;
2648         struct xhci_slot_ctx *slot_ctx;
2649
2650         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2651         if (ret <= 0)
2652                 return ret;
2653         xhci = hcd_to_xhci(hcd);
2654         if (xhci->xhc_state & XHCI_STATE_DYING)
2655                 return -ENODEV;
2656
2657         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2658         virt_dev = xhci->devs[udev->slot_id];
2659
2660         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2661         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2662         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2663         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2664         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2665
2666         /* Don't issue the command if there's no endpoints to update. */
2667         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2668                         ctrl_ctx->drop_flags == 0)
2669                 return 0;
2670
2671         xhci_dbg(xhci, "New Input Control Context:\n");
2672         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2673         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2674                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2675
2676         ret = xhci_configure_endpoint(xhci, udev, NULL,
2677                         false, false);
2678         if (ret) {
2679                 /* Callee should call reset_bandwidth() */
2680                 return ret;
2681         }
2682
2683         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2684         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2685                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2686
2687         /* Free any rings that were dropped, but not changed. */
2688         for (i = 1; i < 31; ++i) {
2689                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2690                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2691                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2692         }
2693         xhci_zero_in_ctx(xhci, virt_dev);
2694         /*
2695          * Install any rings for completely new endpoints or changed endpoints,
2696          * and free or cache any old rings from changed endpoints.
2697          */
2698         for (i = 1; i < 31; ++i) {
2699                 if (!virt_dev->eps[i].new_ring)
2700                         continue;
2701                 /* Only cache or free the old ring if it exists.
2702                  * It may not if this is the first add of an endpoint.
2703                  */
2704                 if (virt_dev->eps[i].ring) {
2705                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2706                 }
2707                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2708                 virt_dev->eps[i].new_ring = NULL;
2709         }
2710
2711         return ret;
2712 }
2713
2714 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2715 {
2716         struct xhci_hcd *xhci;
2717         struct xhci_virt_device *virt_dev;
2718         int i, ret;
2719
2720         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2721         if (ret <= 0)
2722                 return;
2723         xhci = hcd_to_xhci(hcd);
2724
2725         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2726         virt_dev = xhci->devs[udev->slot_id];
2727         /* Free any rings allocated for added endpoints */
2728         for (i = 0; i < 31; ++i) {
2729                 if (virt_dev->eps[i].new_ring) {
2730                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2731                         virt_dev->eps[i].new_ring = NULL;
2732                 }
2733         }
2734         xhci_zero_in_ctx(xhci, virt_dev);
2735 }
2736
2737 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2738                 struct xhci_container_ctx *in_ctx,
2739                 struct xhci_container_ctx *out_ctx,
2740                 u32 add_flags, u32 drop_flags)
2741 {
2742         struct xhci_input_control_ctx *ctrl_ctx;
2743         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2744         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2745         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2746         xhci_slot_copy(xhci, in_ctx, out_ctx);
2747         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2748
2749         xhci_dbg(xhci, "Input Context:\n");
2750         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2751 }
2752
2753 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2754                 unsigned int slot_id, unsigned int ep_index,
2755                 struct xhci_dequeue_state *deq_state)
2756 {
2757         struct xhci_container_ctx *in_ctx;
2758         struct xhci_ep_ctx *ep_ctx;
2759         u32 added_ctxs;
2760         dma_addr_t addr;
2761
2762         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2763                         xhci->devs[slot_id]->out_ctx, ep_index);
2764         in_ctx = xhci->devs[slot_id]->in_ctx;
2765         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2766         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2767                         deq_state->new_deq_ptr);
2768         if (addr == 0) {
2769                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2770                                 "reset ep command\n");
2771                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2772                                 deq_state->new_deq_seg,
2773                                 deq_state->new_deq_ptr);
2774                 return;
2775         }
2776         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2777
2778         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2779         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2780                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2781 }
2782
2783 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2784                 struct usb_device *udev, unsigned int ep_index)
2785 {
2786         struct xhci_dequeue_state deq_state;
2787         struct xhci_virt_ep *ep;
2788
2789         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2790         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2791         /* We need to move the HW's dequeue pointer past this TD,
2792          * or it will attempt to resend it on the next doorbell ring.
2793          */
2794         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2795                         ep_index, ep->stopped_stream, ep->stopped_td,
2796                         &deq_state);
2797
2798         /* HW with the reset endpoint quirk will use the saved dequeue state to
2799          * issue a configure endpoint command later.
2800          */
2801         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2802                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2803                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2804                                 ep_index, ep->stopped_stream, &deq_state);
2805         } else {
2806                 /* Better hope no one uses the input context between now and the
2807                  * reset endpoint completion!
2808                  * XXX: No idea how this hardware will react when stream rings
2809                  * are enabled.
2810                  */
2811                 xhci_dbg(xhci, "Setting up input context for "
2812                                 "configure endpoint command\n");
2813                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2814                                 ep_index, &deq_state);
2815         }
2816 }
2817
2818 /* Deal with stalled endpoints.  The core should have sent the control message
2819  * to clear the halt condition.  However, we need to make the xHCI hardware
2820  * reset its sequence number, since a device will expect a sequence number of
2821  * zero after the halt condition is cleared.
2822  * Context: in_interrupt
2823  */
2824 void xhci_endpoint_reset(struct usb_hcd *hcd,
2825                 struct usb_host_endpoint *ep)
2826 {
2827         struct xhci_hcd *xhci;
2828         struct usb_device *udev;
2829         unsigned int ep_index;
2830         unsigned long flags;
2831         int ret;
2832         struct xhci_virt_ep *virt_ep;
2833
2834         xhci = hcd_to_xhci(hcd);
2835         udev = (struct usb_device *) ep->hcpriv;
2836         /* Called with a root hub endpoint (or an endpoint that wasn't added
2837          * with xhci_add_endpoint()
2838          */
2839         if (!ep->hcpriv)
2840                 return;
2841         ep_index = xhci_get_endpoint_index(&ep->desc);
2842         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2843         if (!virt_ep->stopped_td) {
2844                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2845                                 ep->desc.bEndpointAddress);
2846                 return;
2847         }
2848         if (usb_endpoint_xfer_control(&ep->desc)) {
2849                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2850                 return;
2851         }
2852
2853         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2854         spin_lock_irqsave(&xhci->lock, flags);
2855         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2856         /*
2857          * Can't change the ring dequeue pointer until it's transitioned to the
2858          * stopped state, which is only upon a successful reset endpoint
2859          * command.  Better hope that last command worked!
2860          */
2861         if (!ret) {
2862                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2863                 kfree(virt_ep->stopped_td);
2864                 xhci_ring_cmd_db(xhci);
2865         }
2866         virt_ep->stopped_td = NULL;
2867         virt_ep->stopped_trb = NULL;
2868         virt_ep->stopped_stream = 0;
2869         spin_unlock_irqrestore(&xhci->lock, flags);
2870
2871         if (ret)
2872                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2873 }
2874
2875 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2876                 struct usb_device *udev, struct usb_host_endpoint *ep,
2877                 unsigned int slot_id)
2878 {
2879         int ret;
2880         unsigned int ep_index;
2881         unsigned int ep_state;
2882
2883         if (!ep)
2884                 return -EINVAL;
2885         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2886         if (ret <= 0)
2887                 return -EINVAL;
2888         if (ep->ss_ep_comp.bmAttributes == 0) {
2889                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2890                                 " descriptor for ep 0x%x does not support streams\n",
2891                                 ep->desc.bEndpointAddress);
2892                 return -EINVAL;
2893         }
2894
2895         ep_index = xhci_get_endpoint_index(&ep->desc);
2896         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2897         if (ep_state & EP_HAS_STREAMS ||
2898                         ep_state & EP_GETTING_STREAMS) {
2899                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2900                                 "already has streams set up.\n",
2901                                 ep->desc.bEndpointAddress);
2902                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2903                                 "dynamic stream context array reallocation.\n");
2904                 return -EINVAL;
2905         }
2906         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2907                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2908                                 "endpoint 0x%x; URBs are pending.\n",
2909                                 ep->desc.bEndpointAddress);
2910                 return -EINVAL;
2911         }
2912         return 0;
2913 }
2914
2915 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2916                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2917 {
2918         unsigned int max_streams;
2919
2920         /* The stream context array size must be a power of two */
2921         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2922         /*
2923          * Find out how many primary stream array entries the host controller
2924          * supports.  Later we may use secondary stream arrays (similar to 2nd
2925          * level page entries), but that's an optional feature for xHCI host
2926          * controllers. xHCs must support at least 4 stream IDs.
2927          */
2928         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2929         if (*num_stream_ctxs > max_streams) {
2930                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2931                                 max_streams);
2932                 *num_stream_ctxs = max_streams;
2933                 *num_streams = max_streams;
2934         }
2935 }
2936
2937 /* Returns an error code if one of the endpoint already has streams.
2938  * This does not change any data structures, it only checks and gathers
2939  * information.
2940  */
2941 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2942                 struct usb_device *udev,
2943                 struct usb_host_endpoint **eps, unsigned int num_eps,
2944                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2945 {
2946         unsigned int max_streams;
2947         unsigned int endpoint_flag;
2948         int i;
2949         int ret;
2950
2951         for (i = 0; i < num_eps; i++) {
2952                 ret = xhci_check_streams_endpoint(xhci, udev,
2953                                 eps[i], udev->slot_id);
2954                 if (ret < 0)
2955                         return ret;
2956
2957                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
2958                 if (max_streams < (*num_streams - 1)) {
2959                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2960                                         eps[i]->desc.bEndpointAddress,
2961                                         max_streams);
2962                         *num_streams = max_streams+1;
2963                 }
2964
2965                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2966                 if (*changed_ep_bitmask & endpoint_flag)
2967                         return -EINVAL;
2968                 *changed_ep_bitmask |= endpoint_flag;
2969         }
2970         return 0;
2971 }
2972
2973 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2974                 struct usb_device *udev,
2975                 struct usb_host_endpoint **eps, unsigned int num_eps)
2976 {
2977         u32 changed_ep_bitmask = 0;
2978         unsigned int slot_id;
2979         unsigned int ep_index;
2980         unsigned int ep_state;
2981         int i;
2982
2983         slot_id = udev->slot_id;
2984         if (!xhci->devs[slot_id])
2985                 return 0;
2986
2987         for (i = 0; i < num_eps; i++) {
2988                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2989                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2990                 /* Are streams already being freed for the endpoint? */
2991                 if (ep_state & EP_GETTING_NO_STREAMS) {
2992                         xhci_warn(xhci, "WARN Can't disable streams for "
2993                                         "endpoint 0x%x\n, "
2994                                         "streams are being disabled already.",
2995                                         eps[i]->desc.bEndpointAddress);
2996                         return 0;
2997                 }
2998                 /* Are there actually any streams to free? */
2999                 if (!(ep_state & EP_HAS_STREAMS) &&
3000                                 !(ep_state & EP_GETTING_STREAMS)) {
3001                         xhci_warn(xhci, "WARN Can't disable streams for "
3002                                         "endpoint 0x%x\n, "
3003                                         "streams are already disabled!",
3004                                         eps[i]->desc.bEndpointAddress);
3005                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3006                                         "with non-streams endpoint\n");
3007                         return 0;
3008                 }
3009                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3010         }
3011         return changed_ep_bitmask;
3012 }
3013
3014 /*
3015  * The USB device drivers use this function (though the HCD interface in USB
3016  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3017  * coordinate mass storage command queueing across multiple endpoints (basically
3018  * a stream ID == a task ID).
3019  *
3020  * Setting up streams involves allocating the same size stream context array
3021  * for each endpoint and issuing a configure endpoint command for all endpoints.
3022  *
3023  * Don't allow the call to succeed if one endpoint only supports one stream
3024  * (which means it doesn't support streams at all).
3025  *
3026  * Drivers may get less stream IDs than they asked for, if the host controller
3027  * hardware or endpoints claim they can't support the number of requested
3028  * stream IDs.
3029  */
3030 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3031                 struct usb_host_endpoint **eps, unsigned int num_eps,
3032                 unsigned int num_streams, gfp_t mem_flags)
3033 {
3034         int i, ret;
3035         struct xhci_hcd *xhci;
3036         struct xhci_virt_device *vdev;
3037         struct xhci_command *config_cmd;
3038         unsigned int ep_index;
3039         unsigned int num_stream_ctxs;
3040         unsigned long flags;
3041         u32 changed_ep_bitmask = 0;
3042
3043         if (!eps)
3044                 return -EINVAL;
3045
3046         /* Add one to the number of streams requested to account for
3047          * stream 0 that is reserved for xHCI usage.
3048          */
3049         num_streams += 1;
3050         xhci = hcd_to_xhci(hcd);
3051         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3052                         num_streams);
3053
3054         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3055         if (!config_cmd) {
3056                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3057                 return -ENOMEM;
3058         }
3059
3060         /* Check to make sure all endpoints are not already configured for
3061          * streams.  While we're at it, find the maximum number of streams that
3062          * all the endpoints will support and check for duplicate endpoints.
3063          */
3064         spin_lock_irqsave(&xhci->lock, flags);
3065         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3066                         num_eps, &num_streams, &changed_ep_bitmask);
3067         if (ret < 0) {
3068                 xhci_free_command(xhci, config_cmd);
3069                 spin_unlock_irqrestore(&xhci->lock, flags);
3070                 return ret;
3071         }
3072         if (num_streams <= 1) {
3073                 xhci_warn(xhci, "WARN: endpoints can't handle "
3074                                 "more than one stream.\n");
3075                 xhci_free_command(xhci, config_cmd);
3076                 spin_unlock_irqrestore(&xhci->lock, flags);
3077                 return -EINVAL;
3078         }
3079         vdev = xhci->devs[udev->slot_id];
3080         /* Mark each endpoint as being in transition, so
3081          * xhci_urb_enqueue() will reject all URBs.
3082          */
3083         for (i = 0; i < num_eps; i++) {
3084                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3085                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3086         }
3087         spin_unlock_irqrestore(&xhci->lock, flags);
3088
3089         /* Setup internal data structures and allocate HW data structures for
3090          * streams (but don't install the HW structures in the input context
3091          * until we're sure all memory allocation succeeded).
3092          */
3093         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3094         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3095                         num_stream_ctxs, num_streams);
3096
3097         for (i = 0; i < num_eps; i++) {
3098                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3099                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3100                                 num_stream_ctxs,
3101                                 num_streams, mem_flags);
3102                 if (!vdev->eps[ep_index].stream_info)
3103                         goto cleanup;
3104                 /* Set maxPstreams in endpoint context and update deq ptr to
3105                  * point to stream context array. FIXME
3106                  */
3107         }
3108
3109         /* Set up the input context for a configure endpoint command. */
3110         for (i = 0; i < num_eps; i++) {
3111                 struct xhci_ep_ctx *ep_ctx;
3112
3113                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3114                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3115
3116                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3117                                 vdev->out_ctx, ep_index);
3118                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3119                                 vdev->eps[ep_index].stream_info);
3120         }
3121         /* Tell the HW to drop its old copy of the endpoint context info
3122          * and add the updated copy from the input context.
3123          */
3124         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3125                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3126
3127         /* Issue and wait for the configure endpoint command */
3128         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3129                         false, false);
3130
3131         /* xHC rejected the configure endpoint command for some reason, so we
3132          * leave the old ring intact and free our internal streams data
3133          * structure.
3134          */
3135         if (ret < 0)
3136                 goto cleanup;
3137
3138         spin_lock_irqsave(&xhci->lock, flags);
3139         for (i = 0; i < num_eps; i++) {
3140                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3141                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3142                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3143                          udev->slot_id, ep_index);
3144                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3145         }
3146         xhci_free_command(xhci, config_cmd);
3147         spin_unlock_irqrestore(&xhci->lock, flags);
3148
3149         /* Subtract 1 for stream 0, which drivers can't use */
3150         return num_streams - 1;
3151
3152 cleanup:
3153         /* If it didn't work, free the streams! */
3154         for (i = 0; i < num_eps; i++) {
3155                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3156                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3157                 vdev->eps[ep_index].stream_info = NULL;
3158                 /* FIXME Unset maxPstreams in endpoint context and
3159                  * update deq ptr to point to normal string ring.
3160                  */
3161                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3162                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3163                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3164         }
3165         xhci_free_command(xhci, config_cmd);
3166         return -ENOMEM;
3167 }
3168
3169 /* Transition the endpoint from using streams to being a "normal" endpoint
3170  * without streams.
3171  *
3172  * Modify the endpoint context state, submit a configure endpoint command,
3173  * and free all endpoint rings for streams if that completes successfully.
3174  */
3175 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3176                 struct usb_host_endpoint **eps, unsigned int num_eps,
3177                 gfp_t mem_flags)
3178 {
3179         int i, ret;
3180         struct xhci_hcd *xhci;
3181         struct xhci_virt_device *vdev;
3182         struct xhci_command *command;
3183         unsigned int ep_index;
3184         unsigned long flags;
3185         u32 changed_ep_bitmask;
3186
3187         xhci = hcd_to_xhci(hcd);
3188         vdev = xhci->devs[udev->slot_id];
3189
3190         /* Set up a configure endpoint command to remove the streams rings */
3191         spin_lock_irqsave(&xhci->lock, flags);
3192         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3193                         udev, eps, num_eps);
3194         if (changed_ep_bitmask == 0) {
3195                 spin_unlock_irqrestore(&xhci->lock, flags);
3196                 return -EINVAL;
3197         }
3198
3199         /* Use the xhci_command structure from the first endpoint.  We may have
3200          * allocated too many, but the driver may call xhci_free_streams() for
3201          * each endpoint it grouped into one call to xhci_alloc_streams().
3202          */
3203         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3204         command = vdev->eps[ep_index].stream_info->free_streams_command;
3205         for (i = 0; i < num_eps; i++) {
3206                 struct xhci_ep_ctx *ep_ctx;
3207
3208                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3209                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3210                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3211                         EP_GETTING_NO_STREAMS;
3212
3213                 xhci_endpoint_copy(xhci, command->in_ctx,
3214                                 vdev->out_ctx, ep_index);
3215                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3216                                 &vdev->eps[ep_index]);
3217         }
3218         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3219                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
3220         spin_unlock_irqrestore(&xhci->lock, flags);
3221
3222         /* Issue and wait for the configure endpoint command,
3223          * which must succeed.
3224          */
3225         ret = xhci_configure_endpoint(xhci, udev, command,
3226                         false, true);
3227
3228         /* xHC rejected the configure endpoint command for some reason, so we
3229          * leave the streams rings intact.
3230          */
3231         if (ret < 0)
3232                 return ret;
3233
3234         spin_lock_irqsave(&xhci->lock, flags);
3235         for (i = 0; i < num_eps; i++) {
3236                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3237                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3238                 vdev->eps[ep_index].stream_info = NULL;
3239                 /* FIXME Unset maxPstreams in endpoint context and
3240                  * update deq ptr to point to normal string ring.
3241                  */
3242                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3243                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3244         }
3245         spin_unlock_irqrestore(&xhci->lock, flags);
3246
3247         return 0;
3248 }
3249
3250 /*
3251  * Deletes endpoint resources for endpoints that were active before a Reset
3252  * Device command, or a Disable Slot command.  The Reset Device command leaves
3253  * the control endpoint intact, whereas the Disable Slot command deletes it.
3254  *
3255  * Must be called with xhci->lock held.
3256  */
3257 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3258         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3259 {
3260         int i;
3261         unsigned int num_dropped_eps = 0;
3262         unsigned int drop_flags = 0;
3263
3264         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3265                 if (virt_dev->eps[i].ring) {
3266                         drop_flags |= 1 << i;
3267                         num_dropped_eps++;
3268                 }
3269         }
3270         xhci->num_active_eps -= num_dropped_eps;
3271         if (num_dropped_eps)
3272                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3273                                 "%u now active.\n",
3274                                 num_dropped_eps, drop_flags,
3275                                 xhci->num_active_eps);
3276 }
3277
3278 /*
3279  * This submits a Reset Device Command, which will set the device state to 0,
3280  * set the device address to 0, and disable all the endpoints except the default
3281  * control endpoint.  The USB core should come back and call
3282  * xhci_address_device(), and then re-set up the configuration.  If this is
3283  * called because of a usb_reset_and_verify_device(), then the old alternate
3284  * settings will be re-installed through the normal bandwidth allocation
3285  * functions.
3286  *
3287  * Wait for the Reset Device command to finish.  Remove all structures
3288  * associated with the endpoints that were disabled.  Clear the input device
3289  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3290  *
3291  * If the virt_dev to be reset does not exist or does not match the udev,
3292  * it means the device is lost, possibly due to the xHC restore error and
3293  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3294  * re-allocate the device.
3295  */
3296 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3297 {
3298         int ret, i;
3299         unsigned long flags;
3300         struct xhci_hcd *xhci;
3301         unsigned int slot_id;
3302         struct xhci_virt_device *virt_dev;
3303         struct xhci_command *reset_device_cmd;
3304         int timeleft;
3305         int last_freed_endpoint;
3306         struct xhci_slot_ctx *slot_ctx;
3307         int old_active_eps = 0;
3308
3309         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3310         if (ret <= 0)
3311                 return ret;
3312         xhci = hcd_to_xhci(hcd);
3313         slot_id = udev->slot_id;
3314         virt_dev = xhci->devs[slot_id];
3315         if (!virt_dev) {
3316                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3317                                 "not exist. Re-allocate the device\n", slot_id);
3318                 ret = xhci_alloc_dev(hcd, udev);
3319                 if (ret == 1)
3320                         return 0;
3321                 else
3322                         return -EINVAL;
3323         }
3324
3325         if (virt_dev->udev != udev) {
3326                 /* If the virt_dev and the udev does not match, this virt_dev
3327                  * may belong to another udev.
3328                  * Re-allocate the device.
3329                  */
3330                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3331                                 "not match the udev. Re-allocate the device\n",
3332                                 slot_id);
3333                 ret = xhci_alloc_dev(hcd, udev);
3334                 if (ret == 1)
3335                         return 0;
3336                 else
3337                         return -EINVAL;
3338         }
3339
3340         /* If device is not setup, there is no point in resetting it */
3341         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3342         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3343                                                 SLOT_STATE_DISABLED)
3344                 return 0;
3345
3346         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3347         /* Allocate the command structure that holds the struct completion.
3348          * Assume we're in process context, since the normal device reset
3349          * process has to wait for the device anyway.  Storage devices are
3350          * reset as part of error handling, so use GFP_NOIO instead of
3351          * GFP_KERNEL.
3352          */
3353         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3354         if (!reset_device_cmd) {
3355                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3356                 return -ENOMEM;
3357         }
3358
3359         /* Attempt to submit the Reset Device command to the command ring */
3360         spin_lock_irqsave(&xhci->lock, flags);
3361         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3362
3363         /* Enqueue pointer can be left pointing to the link TRB,
3364          * we must handle that
3365          */
3366         if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3367                 reset_device_cmd->command_trb =
3368                         xhci->cmd_ring->enq_seg->next->trbs;
3369
3370         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3371         ret = xhci_queue_reset_device(xhci, slot_id);
3372         if (ret) {
3373                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3374                 list_del(&reset_device_cmd->cmd_list);
3375                 spin_unlock_irqrestore(&xhci->lock, flags);
3376                 goto command_cleanup;
3377         }
3378         xhci_ring_cmd_db(xhci);
3379         spin_unlock_irqrestore(&xhci->lock, flags);
3380
3381         /* Wait for the Reset Device command to finish */
3382         timeleft = wait_for_completion_interruptible_timeout(
3383                         reset_device_cmd->completion,
3384                         USB_CTRL_SET_TIMEOUT);
3385         if (timeleft <= 0) {
3386                 xhci_warn(xhci, "%s while waiting for reset device command\n",
3387                                 timeleft == 0 ? "Timeout" : "Signal");
3388                 spin_lock_irqsave(&xhci->lock, flags);
3389                 /* The timeout might have raced with the event ring handler, so
3390                  * only delete from the list if the item isn't poisoned.
3391                  */
3392                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3393                         list_del(&reset_device_cmd->cmd_list);
3394                 spin_unlock_irqrestore(&xhci->lock, flags);
3395                 ret = -ETIME;
3396                 goto command_cleanup;
3397         }
3398
3399         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3400          * unless we tried to reset a slot ID that wasn't enabled,
3401          * or the device wasn't in the addressed or configured state.
3402          */
3403         ret = reset_device_cmd->status;
3404         switch (ret) {
3405         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3406         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3407                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3408                                 slot_id,
3409                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3410                 xhci_info(xhci, "Not freeing device rings.\n");
3411                 /* Don't treat this as an error.  May change my mind later. */
3412                 ret = 0;
3413                 goto command_cleanup;
3414         case COMP_SUCCESS:
3415                 xhci_dbg(xhci, "Successful reset device command.\n");
3416                 break;
3417         default:
3418                 if (xhci_is_vendor_info_code(xhci, ret))
3419                         break;
3420                 xhci_warn(xhci, "Unknown completion code %u for "
3421                                 "reset device command.\n", ret);
3422                 ret = -EINVAL;
3423                 goto command_cleanup;
3424         }
3425
3426         /* Free up host controller endpoint resources */
3427         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3428                 spin_lock_irqsave(&xhci->lock, flags);
3429                 /* Don't delete the default control endpoint resources */
3430                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3431                 spin_unlock_irqrestore(&xhci->lock, flags);
3432         }
3433
3434         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3435         last_freed_endpoint = 1;
3436         for (i = 1; i < 31; ++i) {
3437                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3438
3439                 if (ep->ep_state & EP_HAS_STREAMS) {
3440                         xhci_free_stream_info(xhci, ep->stream_info);
3441                         ep->stream_info = NULL;
3442                         ep->ep_state &= ~EP_HAS_STREAMS;
3443                 }
3444
3445                 if (ep->ring) {
3446                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3447                         last_freed_endpoint = i;
3448                 }
3449                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3450                         xhci_drop_ep_from_interval_table(xhci,
3451                                         &virt_dev->eps[i].bw_info,
3452                                         virt_dev->bw_table,
3453                                         udev,
3454                                         &virt_dev->eps[i],
3455                                         virt_dev->tt_info);
3456                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3457         }
3458         /* If necessary, update the number of active TTs on this root port */
3459         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3460
3461         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3462         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3463         ret = 0;
3464
3465 command_cleanup:
3466         xhci_free_command(xhci, reset_device_cmd);
3467         return ret;
3468 }
3469
3470 /*
3471  * At this point, the struct usb_device is about to go away, the device has
3472  * disconnected, and all traffic has been stopped and the endpoints have been
3473  * disabled.  Free any HC data structures associated with that device.
3474  */
3475 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3476 {
3477         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3478         struct xhci_virt_device *virt_dev;
3479         unsigned long flags;
3480         u32 state;
3481         int i, ret;
3482
3483         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3484         /* If the host is halted due to driver unload, we still need to free the
3485          * device.
3486          */
3487         if (ret <= 0 && ret != -ENODEV)
3488                 return;
3489
3490         virt_dev = xhci->devs[udev->slot_id];
3491
3492         /* Stop any wayward timer functions (which may grab the lock) */
3493         for (i = 0; i < 31; ++i) {
3494                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3495                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3496         }
3497
3498         if (udev->usb2_hw_lpm_enabled) {
3499                 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3500                 udev->usb2_hw_lpm_enabled = 0;
3501         }
3502
3503         spin_lock_irqsave(&xhci->lock, flags);
3504         /* Don't disable the slot if the host controller is dead. */
3505         state = xhci_readl(xhci, &xhci->op_regs->status);
3506         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3507                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3508                 xhci_free_virt_device(xhci, udev->slot_id);
3509                 spin_unlock_irqrestore(&xhci->lock, flags);
3510                 return;
3511         }
3512
3513         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3514                 spin_unlock_irqrestore(&xhci->lock, flags);
3515                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3516                 return;
3517         }
3518         xhci_ring_cmd_db(xhci);
3519         spin_unlock_irqrestore(&xhci->lock, flags);
3520         /*
3521          * Event command completion handler will free any data structures
3522          * associated with the slot.  XXX Can free sleep?
3523          */
3524 }
3525
3526 /*
3527  * Checks if we have enough host controller resources for the default control
3528  * endpoint.
3529  *
3530  * Must be called with xhci->lock held.
3531  */
3532 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3533 {
3534         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3535                 xhci_dbg(xhci, "Not enough ep ctxs: "
3536                                 "%u active, need to add 1, limit is %u.\n",
3537                                 xhci->num_active_eps, xhci->limit_active_eps);
3538                 return -ENOMEM;
3539         }
3540         xhci->num_active_eps += 1;
3541         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3542                         xhci->num_active_eps);
3543         return 0;
3544 }
3545
3546
3547 /*
3548  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3549  * timed out, or allocating memory failed.  Returns 1 on success.
3550  */
3551 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3552 {
3553         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3554         unsigned long flags;
3555         int timeleft;
3556         int ret;
3557         union xhci_trb *cmd_trb;
3558
3559         spin_lock_irqsave(&xhci->lock, flags);
3560         cmd_trb = xhci->cmd_ring->dequeue;
3561         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3562         if (ret) {
3563                 spin_unlock_irqrestore(&xhci->lock, flags);
3564                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3565                 return 0;
3566         }
3567         xhci_ring_cmd_db(xhci);
3568         spin_unlock_irqrestore(&xhci->lock, flags);
3569
3570         /* XXX: how much time for xHC slot assignment? */
3571         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3572                         XHCI_CMD_DEFAULT_TIMEOUT);
3573         if (timeleft <= 0) {
3574                 xhci_warn(xhci, "%s while waiting for a slot\n",
3575                                 timeleft == 0 ? "Timeout" : "Signal");
3576                 /* cancel the enable slot request */
3577                 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3578         }
3579
3580         if (!xhci->slot_id) {
3581                 xhci_err(xhci, "Error while assigning device slot ID\n");
3582                 return 0;
3583         }
3584
3585         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3586                 spin_lock_irqsave(&xhci->lock, flags);
3587                 ret = xhci_reserve_host_control_ep_resources(xhci);
3588                 if (ret) {
3589                         spin_unlock_irqrestore(&xhci->lock, flags);
3590                         xhci_warn(xhci, "Not enough host resources, "
3591                                         "active endpoint contexts = %u\n",
3592                                         xhci->num_active_eps);
3593                         goto disable_slot;
3594                 }
3595                 spin_unlock_irqrestore(&xhci->lock, flags);
3596         }
3597         /* Use GFP_NOIO, since this function can be called from
3598          * xhci_discover_or_reset_device(), which may be called as part of
3599          * mass storage driver error handling.
3600          */
3601         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3602                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3603                 goto disable_slot;
3604         }
3605         udev->slot_id = xhci->slot_id;
3606         /* Is this a LS or FS device under a HS hub? */
3607         /* Hub or peripherial? */
3608         return 1;
3609
3610 disable_slot:
3611         /* Disable slot, if we can do it without mem alloc */
3612         spin_lock_irqsave(&xhci->lock, flags);
3613         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3614                 xhci_ring_cmd_db(xhci);
3615         spin_unlock_irqrestore(&xhci->lock, flags);
3616         return 0;
3617 }
3618
3619 /*
3620  * Issue an Address Device command (which will issue a SetAddress request to
3621  * the device).
3622  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3623  * we should only issue and wait on one address command at the same time.
3624  *
3625  * We add one to the device address issued by the hardware because the USB core
3626  * uses address 1 for the root hubs (even though they're not really devices).
3627  */
3628 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3629 {
3630         unsigned long flags;
3631         int timeleft;
3632         struct xhci_virt_device *virt_dev;
3633         int ret = 0;
3634         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3635         struct xhci_slot_ctx *slot_ctx;
3636         struct xhci_input_control_ctx *ctrl_ctx;
3637         u64 temp_64;
3638         union xhci_trb *cmd_trb;
3639
3640         if (!udev->slot_id) {
3641                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3642                 return -EINVAL;
3643         }
3644
3645         virt_dev = xhci->devs[udev->slot_id];
3646
3647         if (WARN_ON(!virt_dev)) {
3648                 /*
3649                  * In plug/unplug torture test with an NEC controller,
3650                  * a zero-dereference was observed once due to virt_dev = 0.
3651                  * Print useful debug rather than crash if it is observed again!
3652                  */
3653                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3654                         udev->slot_id);
3655                 return -EINVAL;
3656         }
3657
3658         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3659         /*
3660          * If this is the first Set Address since device plug-in or
3661          * virt_device realloaction after a resume with an xHCI power loss,
3662          * then set up the slot context.
3663          */
3664         if (!slot_ctx->dev_info)
3665                 xhci_setup_addressable_virt_dev(xhci, udev);
3666         /* Otherwise, update the control endpoint ring enqueue pointer. */
3667         else
3668                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3669         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3670         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3671         ctrl_ctx->drop_flags = 0;
3672
3673         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3674         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3675
3676         spin_lock_irqsave(&xhci->lock, flags);
3677         cmd_trb = xhci->cmd_ring->dequeue;
3678         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3679                                         udev->slot_id);
3680         if (ret) {
3681                 spin_unlock_irqrestore(&xhci->lock, flags);
3682                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3683                 return ret;
3684         }
3685         xhci_ring_cmd_db(xhci);
3686         spin_unlock_irqrestore(&xhci->lock, flags);
3687
3688         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3689         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3690                         XHCI_CMD_DEFAULT_TIMEOUT);
3691         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3692          * the SetAddress() "recovery interval" required by USB and aborting the
3693          * command on a timeout.
3694          */
3695         if (timeleft <= 0) {
3696                 xhci_warn(xhci, "%s while waiting for address device command\n",
3697                                 timeleft == 0 ? "Timeout" : "Signal");
3698                 /* cancel the address device command */
3699                 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3700                 if (ret < 0)
3701                         return ret;
3702                 return -ETIME;
3703         }
3704
3705         switch (virt_dev->cmd_status) {
3706         case COMP_CTX_STATE:
3707         case COMP_EBADSLT:
3708                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3709                                 udev->slot_id);
3710                 ret = -EINVAL;
3711                 break;
3712         case COMP_TX_ERR:
3713                 dev_warn(&udev->dev, "Device not responding to set address.\n");
3714                 ret = -EPROTO;
3715                 break;
3716         case COMP_DEV_ERR:
3717                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3718                                 "device command.\n");
3719                 ret = -ENODEV;
3720                 break;
3721         case COMP_SUCCESS:
3722                 xhci_dbg(xhci, "Successful Address Device command\n");
3723                 break;
3724         default:
3725                 xhci_err(xhci, "ERROR: unexpected command completion "
3726                                 "code 0x%x.\n", virt_dev->cmd_status);
3727                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3728                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3729                 ret = -EINVAL;
3730                 break;
3731         }
3732         if (ret) {
3733                 return ret;
3734         }
3735         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3736         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3737         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3738                  udev->slot_id,
3739                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3740                  (unsigned long long)
3741                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3742         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3743                         (unsigned long long)virt_dev->out_ctx->dma);
3744         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3745         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3746         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3747         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3748         /*
3749          * USB core uses address 1 for the roothubs, so we add one to the
3750          * address given back to us by the HC.
3751          */
3752         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3753         /* Use kernel assigned address for devices; store xHC assigned
3754          * address locally. */
3755         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3756                 + 1;
3757         /* Zero the input context control for later use */
3758         ctrl_ctx->add_flags = 0;
3759         ctrl_ctx->drop_flags = 0;
3760
3761         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3762
3763         return 0;
3764 }
3765
3766 #ifdef CONFIG_USB_SUSPEND
3767
3768 /* BESL to HIRD Encoding array for USB2 LPM */
3769 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3770         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3771
3772 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3773 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3774                                         struct usb_device *udev)
3775 {
3776         int u2del, besl, besl_host;
3777         int besl_device = 0;
3778         u32 field;
3779
3780         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3781         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3782
3783         if (field & USB_BESL_SUPPORT) {
3784                 for (besl_host = 0; besl_host < 16; besl_host++) {
3785                         if (xhci_besl_encoding[besl_host] >= u2del)
3786                                 break;
3787                 }
3788                 /* Use baseline BESL value as default */
3789                 if (field & USB_BESL_BASELINE_VALID)
3790                         besl_device = USB_GET_BESL_BASELINE(field);
3791                 else if (field & USB_BESL_DEEP_VALID)
3792                         besl_device = USB_GET_BESL_DEEP(field);
3793         } else {
3794                 if (u2del <= 50)
3795                         besl_host = 0;
3796                 else
3797                         besl_host = (u2del - 51) / 75 + 1;
3798         }
3799
3800         besl = besl_host + besl_device;
3801         if (besl > 15)
3802                 besl = 15;
3803
3804         return besl;
3805 }
3806
3807 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
3808                                         struct usb_device *udev)
3809 {
3810         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3811         struct dev_info *dev_info;
3812         __le32 __iomem  **port_array;
3813         __le32 __iomem  *addr, *pm_addr;
3814         u32             temp, dev_id;
3815         unsigned int    port_num;
3816         unsigned long   flags;
3817         int             hird;
3818         int             ret;
3819
3820         if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
3821                         !udev->lpm_capable)
3822                 return -EINVAL;
3823
3824         /* we only support lpm for non-hub device connected to root hub yet */
3825         if (!udev->parent || udev->parent->parent ||
3826                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3827                 return -EINVAL;
3828
3829         spin_lock_irqsave(&xhci->lock, flags);
3830
3831         /* Look for devices in lpm_failed_devs list */
3832         dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
3833                         le16_to_cpu(udev->descriptor.idProduct);
3834         list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
3835                 if (dev_info->dev_id == dev_id) {
3836                         ret = -EINVAL;
3837                         goto finish;
3838                 }
3839         }
3840
3841         port_array = xhci->usb2_ports;
3842         port_num = udev->portnum - 1;
3843
3844         if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
3845                 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
3846                 ret = -EINVAL;
3847                 goto finish;
3848         }
3849
3850         /*
3851          * Test USB 2.0 software LPM.
3852          * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3853          * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3854          * in the June 2011 errata release.
3855          */
3856         xhci_dbg(xhci, "test port %d software LPM\n", port_num);
3857         /*
3858          * Set L1 Device Slot and HIRD/BESL.
3859          * Check device's USB 2.0 extension descriptor to determine whether
3860          * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3861          */
3862         pm_addr = port_array[port_num] + 1;
3863         hird = xhci_calculate_hird_besl(xhci, udev);
3864         temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
3865         xhci_writel(xhci, temp, pm_addr);
3866
3867         /* Set port link state to U2(L1) */
3868         addr = port_array[port_num];
3869         xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
3870
3871         /* wait for ACK */
3872         spin_unlock_irqrestore(&xhci->lock, flags);
3873         msleep(10);
3874         spin_lock_irqsave(&xhci->lock, flags);
3875
3876         /* Check L1 Status */
3877         ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
3878         if (ret != -ETIMEDOUT) {
3879                 /* enter L1 successfully */
3880                 temp = xhci_readl(xhci, addr);
3881                 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
3882                                 port_num, temp);
3883                 ret = 0;
3884         } else {
3885                 temp = xhci_readl(xhci, pm_addr);
3886                 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
3887                                 port_num, temp & PORT_L1S_MASK);
3888                 ret = -EINVAL;
3889         }
3890
3891         /* Resume the port */
3892         xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
3893
3894         spin_unlock_irqrestore(&xhci->lock, flags);
3895         msleep(10);
3896         spin_lock_irqsave(&xhci->lock, flags);
3897
3898         /* Clear PLC */
3899         xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
3900
3901         /* Check PORTSC to make sure the device is in the right state */
3902         if (!ret) {
3903                 temp = xhci_readl(xhci, addr);
3904                 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
3905                 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
3906                                 (temp & PORT_PLS_MASK) != XDEV_U0) {
3907                         xhci_dbg(xhci, "port L1 resume fail\n");
3908                         ret = -EINVAL;
3909                 }
3910         }
3911
3912         if (ret) {
3913                 /* Insert dev to lpm_failed_devs list */
3914                 xhci_warn(xhci, "device LPM test failed, may disconnect and "
3915                                 "re-enumerate\n");
3916                 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
3917                 if (!dev_info) {
3918                         ret = -ENOMEM;
3919                         goto finish;
3920                 }
3921                 dev_info->dev_id = dev_id;
3922                 INIT_LIST_HEAD(&dev_info->list);
3923                 list_add(&dev_info->list, &xhci->lpm_failed_devs);
3924         } else {
3925                 xhci_ring_device(xhci, udev->slot_id);
3926         }
3927
3928 finish:
3929         spin_unlock_irqrestore(&xhci->lock, flags);
3930         return ret;
3931 }
3932
3933 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
3934                         struct usb_device *udev, int enable)
3935 {
3936         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3937         __le32 __iomem  **port_array;
3938         __le32 __iomem  *pm_addr;
3939         u32             temp;
3940         unsigned int    port_num;
3941         unsigned long   flags;
3942         int             hird;
3943
3944         if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
3945                         !udev->lpm_capable)
3946                 return -EPERM;
3947
3948         if (!udev->parent || udev->parent->parent ||
3949                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
3950                 return -EPERM;
3951
3952         if (udev->usb2_hw_lpm_capable != 1)
3953                 return -EPERM;
3954
3955         spin_lock_irqsave(&xhci->lock, flags);
3956
3957         port_array = xhci->usb2_ports;
3958         port_num = udev->portnum - 1;
3959         pm_addr = port_array[port_num] + 1;
3960         temp = xhci_readl(xhci, pm_addr);
3961
3962         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
3963                         enable ? "enable" : "disable", port_num);
3964
3965         hird = xhci_calculate_hird_besl(xhci, udev);
3966
3967         if (enable) {
3968                 temp &= ~PORT_HIRD_MASK;
3969                 temp |= PORT_HIRD(hird) | PORT_RWE;
3970                 xhci_writel(xhci, temp, pm_addr);
3971                 temp = xhci_readl(xhci, pm_addr);
3972                 temp |= PORT_HLE;
3973                 xhci_writel(xhci, temp, pm_addr);
3974         } else {
3975                 temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
3976                 xhci_writel(xhci, temp, pm_addr);
3977         }
3978
3979         spin_unlock_irqrestore(&xhci->lock, flags);
3980         return 0;
3981 }
3982
3983 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
3984 {
3985         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3986         int             ret;
3987
3988         ret = xhci_usb2_software_lpm_test(hcd, udev);
3989         if (!ret) {
3990                 xhci_dbg(xhci, "software LPM test succeed\n");
3991                 if (xhci->hw_lpm_support == 1) {
3992                         udev->usb2_hw_lpm_capable = 1;
3993                         ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
3994                         if (!ret)
3995                                 udev->usb2_hw_lpm_enabled = 1;
3996                 }
3997         }
3998
3999         return 0;
4000 }
4001
4002 #else
4003
4004 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4005                                 struct usb_device *udev, int enable)
4006 {
4007         return 0;
4008 }
4009
4010 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4011 {
4012         return 0;
4013 }
4014
4015 #endif /* CONFIG_USB_SUSPEND */
4016
4017 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4018
4019 #ifdef CONFIG_PM
4020 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4021 static unsigned long long xhci_service_interval_to_ns(
4022                 struct usb_endpoint_descriptor *desc)
4023 {
4024         return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4025 }
4026
4027 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4028                 enum usb3_link_state state)
4029 {
4030         unsigned long long sel;
4031         unsigned long long pel;
4032         unsigned int max_sel_pel;
4033         char *state_name;
4034
4035         switch (state) {
4036         case USB3_LPM_U1:
4037                 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4038                 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4039                 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4040                 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4041                 state_name = "U1";
4042                 break;
4043         case USB3_LPM_U2:
4044                 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4045                 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4046                 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4047                 state_name = "U2";
4048                 break;
4049         default:
4050                 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4051                                 __func__);
4052                 return USB3_LPM_DISABLED;
4053         }
4054
4055         if (sel <= max_sel_pel && pel <= max_sel_pel)
4056                 return USB3_LPM_DEVICE_INITIATED;
4057
4058         if (sel > max_sel_pel)
4059                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4060                                 "due to long SEL %llu ms\n",
4061                                 state_name, sel);
4062         else
4063                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4064                                 "due to long PEL %llu\n ms",
4065                                 state_name, pel);
4066         return USB3_LPM_DISABLED;
4067 }
4068
4069 /* Returns the hub-encoded U1 timeout value.
4070  * The U1 timeout should be the maximum of the following values:
4071  *  - For control endpoints, U1 system exit latency (SEL) * 3
4072  *  - For bulk endpoints, U1 SEL * 5
4073  *  - For interrupt endpoints:
4074  *    - Notification EPs, U1 SEL * 3
4075  *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4076  *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4077  */
4078 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4079                 struct usb_endpoint_descriptor *desc)
4080 {
4081         unsigned long long timeout_ns;
4082         int ep_type;
4083         int intr_type;
4084
4085         ep_type = usb_endpoint_type(desc);
4086         switch (ep_type) {
4087         case USB_ENDPOINT_XFER_CONTROL:
4088                 timeout_ns = udev->u1_params.sel * 3;
4089                 break;
4090         case USB_ENDPOINT_XFER_BULK:
4091                 timeout_ns = udev->u1_params.sel * 5;
4092                 break;
4093         case USB_ENDPOINT_XFER_INT:
4094                 intr_type = usb_endpoint_interrupt_type(desc);
4095                 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4096                         timeout_ns = udev->u1_params.sel * 3;
4097                         break;
4098                 }
4099                 /* Otherwise the calculation is the same as isoc eps */
4100         case USB_ENDPOINT_XFER_ISOC:
4101                 timeout_ns = xhci_service_interval_to_ns(desc);
4102                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4103                 if (timeout_ns < udev->u1_params.sel * 2)
4104                         timeout_ns = udev->u1_params.sel * 2;
4105                 break;
4106         default:
4107                 return 0;
4108         }
4109
4110         /* The U1 timeout is encoded in 1us intervals. */
4111         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4112         /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4113         if (timeout_ns == USB3_LPM_DISABLED)
4114                 timeout_ns++;
4115
4116         /* If the necessary timeout value is bigger than what we can set in the
4117          * USB 3.0 hub, we have to disable hub-initiated U1.
4118          */
4119         if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4120                 return timeout_ns;
4121         dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4122                         "due to long timeout %llu ms\n", timeout_ns);
4123         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4124 }
4125
4126 /* Returns the hub-encoded U2 timeout value.
4127  * The U2 timeout should be the maximum of:
4128  *  - 10 ms (to avoid the bandwidth impact on the scheduler)
4129  *  - largest bInterval of any active periodic endpoint (to avoid going
4130  *    into lower power link states between intervals).
4131  *  - the U2 Exit Latency of the device
4132  */
4133 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4134                 struct usb_endpoint_descriptor *desc)
4135 {
4136         unsigned long long timeout_ns;
4137         unsigned long long u2_del_ns;
4138
4139         timeout_ns = 10 * 1000 * 1000;
4140
4141         if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4142                         (xhci_service_interval_to_ns(desc) > timeout_ns))
4143                 timeout_ns = xhci_service_interval_to_ns(desc);
4144
4145         u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4146         if (u2_del_ns > timeout_ns)
4147                 timeout_ns = u2_del_ns;
4148
4149         /* The U2 timeout is encoded in 256us intervals */
4150         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4151         /* If the necessary timeout value is bigger than what we can set in the
4152          * USB 3.0 hub, we have to disable hub-initiated U2.
4153          */
4154         if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4155                 return timeout_ns;
4156         dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4157                         "due to long timeout %llu ms\n", timeout_ns);
4158         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4159 }
4160
4161 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4162                 struct usb_device *udev,
4163                 struct usb_endpoint_descriptor *desc,
4164                 enum usb3_link_state state,
4165                 u16 *timeout)
4166 {
4167         if (state == USB3_LPM_U1) {
4168                 if (xhci->quirks & XHCI_INTEL_HOST)
4169                         return xhci_calculate_intel_u1_timeout(udev, desc);
4170         } else {
4171                 if (xhci->quirks & XHCI_INTEL_HOST)
4172                         return xhci_calculate_intel_u2_timeout(udev, desc);
4173         }
4174
4175         return USB3_LPM_DISABLED;
4176 }
4177
4178 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4179                 struct usb_device *udev,
4180                 struct usb_endpoint_descriptor *desc,
4181                 enum usb3_link_state state,
4182                 u16 *timeout)
4183 {
4184         u16 alt_timeout;
4185
4186         alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4187                 desc, state, timeout);
4188
4189         /* If we found we can't enable hub-initiated LPM, or
4190          * the U1 or U2 exit latency was too high to allow
4191          * device-initiated LPM as well, just stop searching.
4192          */
4193         if (alt_timeout == USB3_LPM_DISABLED ||
4194                         alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4195                 *timeout = alt_timeout;
4196                 return -E2BIG;
4197         }
4198         if (alt_timeout > *timeout)
4199                 *timeout = alt_timeout;
4200         return 0;
4201 }
4202
4203 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4204                 struct usb_device *udev,
4205                 struct usb_host_interface *alt,
4206                 enum usb3_link_state state,
4207                 u16 *timeout)
4208 {
4209         int j;
4210
4211         for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4212                 if (xhci_update_timeout_for_endpoint(xhci, udev,
4213                                         &alt->endpoint[j].desc, state, timeout))
4214                         return -E2BIG;
4215                 continue;
4216         }
4217         return 0;
4218 }
4219
4220 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4221                 enum usb3_link_state state)
4222 {
4223         struct usb_device *parent;
4224         unsigned int num_hubs;
4225
4226         if (state == USB3_LPM_U2)
4227                 return 0;
4228
4229         /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4230         for (parent = udev->parent, num_hubs = 0; parent->parent;
4231                         parent = parent->parent)
4232                 num_hubs++;
4233
4234         if (num_hubs < 2)
4235                 return 0;
4236
4237         dev_dbg(&udev->dev, "Disabling U1 link state for device"
4238                         " below second-tier hub.\n");
4239         dev_dbg(&udev->dev, "Plug device into first-tier hub "
4240                         "to decrease power consumption.\n");
4241         return -E2BIG;
4242 }
4243
4244 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4245                 struct usb_device *udev,
4246                 enum usb3_link_state state)
4247 {
4248         if (xhci->quirks & XHCI_INTEL_HOST)
4249                 return xhci_check_intel_tier_policy(udev, state);
4250         return -EINVAL;
4251 }
4252
4253 /* Returns the U1 or U2 timeout that should be enabled.
4254  * If the tier check or timeout setting functions return with a non-zero exit
4255  * code, that means the timeout value has been finalized and we shouldn't look
4256  * at any more endpoints.
4257  */
4258 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4259                         struct usb_device *udev, enum usb3_link_state state)
4260 {
4261         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4262         struct usb_host_config *config;
4263         char *state_name;
4264         int i;
4265         u16 timeout = USB3_LPM_DISABLED;
4266
4267         if (state == USB3_LPM_U1)
4268                 state_name = "U1";
4269         else if (state == USB3_LPM_U2)
4270                 state_name = "U2";
4271         else {
4272                 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4273                                 state);
4274                 return timeout;
4275         }
4276
4277         if (xhci_check_tier_policy(xhci, udev, state) < 0)
4278                 return timeout;
4279
4280         /* Gather some information about the currently installed configuration
4281          * and alternate interface settings.
4282          */
4283         if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4284                         state, &timeout))
4285                 return timeout;
4286
4287         config = udev->actconfig;
4288         if (!config)
4289                 return timeout;
4290
4291         for (i = 0; i < USB_MAXINTERFACES; i++) {
4292                 struct usb_driver *driver;
4293                 struct usb_interface *intf = config->interface[i];
4294
4295                 if (!intf)
4296                         continue;
4297
4298                 /* Check if any currently bound drivers want hub-initiated LPM
4299                  * disabled.
4300                  */
4301                 if (intf->dev.driver) {
4302                         driver = to_usb_driver(intf->dev.driver);
4303                         if (driver && driver->disable_hub_initiated_lpm) {
4304                                 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4305                                                 "at request of driver %s\n",
4306                                                 state_name, driver->name);
4307                                 return xhci_get_timeout_no_hub_lpm(udev, state);
4308                         }
4309                 }
4310
4311                 /* Not sure how this could happen... */
4312                 if (!intf->cur_altsetting)
4313                         continue;
4314
4315                 if (xhci_update_timeout_for_interface(xhci, udev,
4316                                         intf->cur_altsetting,
4317                                         state, &timeout))
4318                         return timeout;
4319         }
4320         return timeout;
4321 }
4322
4323 /*
4324  * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4325  * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
4326  */
4327 static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4328                         struct usb_device *udev, u16 max_exit_latency)
4329 {
4330         struct xhci_virt_device *virt_dev;
4331         struct xhci_command *command;
4332         struct xhci_input_control_ctx *ctrl_ctx;
4333         struct xhci_slot_ctx *slot_ctx;
4334         unsigned long flags;
4335         int ret;
4336
4337         spin_lock_irqsave(&xhci->lock, flags);
4338         if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
4339                 spin_unlock_irqrestore(&xhci->lock, flags);
4340                 return 0;
4341         }
4342
4343         /* Attempt to issue an Evaluate Context command to change the MEL. */
4344         virt_dev = xhci->devs[udev->slot_id];
4345         command = xhci->lpm_command;
4346         xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4347         spin_unlock_irqrestore(&xhci->lock, flags);
4348
4349         ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
4350         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4351         slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4352         slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4353         slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4354
4355         xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
4356         xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4357         xhci_dbg_ctx(xhci, command->in_ctx, 0);
4358
4359         /* Issue and wait for the evaluate context command. */
4360         ret = xhci_configure_endpoint(xhci, udev, command,
4361                         true, true);
4362         xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4363         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4364
4365         if (!ret) {
4366                 spin_lock_irqsave(&xhci->lock, flags);
4367                 virt_dev->current_mel = max_exit_latency;
4368                 spin_unlock_irqrestore(&xhci->lock, flags);
4369         }
4370         return ret;
4371 }
4372
4373 static int calculate_max_exit_latency(struct usb_device *udev,
4374                 enum usb3_link_state state_changed,
4375                 u16 hub_encoded_timeout)
4376 {
4377         unsigned long long u1_mel_us = 0;
4378         unsigned long long u2_mel_us = 0;
4379         unsigned long long mel_us = 0;
4380         bool disabling_u1;
4381         bool disabling_u2;
4382         bool enabling_u1;
4383         bool enabling_u2;
4384
4385         disabling_u1 = (state_changed == USB3_LPM_U1 &&
4386                         hub_encoded_timeout == USB3_LPM_DISABLED);
4387         disabling_u2 = (state_changed == USB3_LPM_U2 &&
4388                         hub_encoded_timeout == USB3_LPM_DISABLED);
4389
4390         enabling_u1 = (state_changed == USB3_LPM_U1 &&
4391                         hub_encoded_timeout != USB3_LPM_DISABLED);
4392         enabling_u2 = (state_changed == USB3_LPM_U2 &&
4393                         hub_encoded_timeout != USB3_LPM_DISABLED);
4394
4395         /* If U1 was already enabled and we're not disabling it,
4396          * or we're going to enable U1, account for the U1 max exit latency.
4397          */
4398         if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4399                         enabling_u1)
4400                 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4401         if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4402                         enabling_u2)
4403                 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4404
4405         if (u1_mel_us > u2_mel_us)
4406                 mel_us = u1_mel_us;
4407         else
4408                 mel_us = u2_mel_us;
4409         /* xHCI host controller max exit latency field is only 16 bits wide. */
4410         if (mel_us > MAX_EXIT) {
4411                 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4412                                 "is too big.\n", mel_us);
4413                 return -E2BIG;
4414         }
4415         return mel_us;
4416 }
4417
4418 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4419 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4420                         struct usb_device *udev, enum usb3_link_state state)
4421 {
4422         struct xhci_hcd *xhci;
4423         u16 hub_encoded_timeout;
4424         int mel;
4425         int ret;
4426
4427         xhci = hcd_to_xhci(hcd);
4428         /* The LPM timeout values are pretty host-controller specific, so don't
4429          * enable hub-initiated timeouts unless the vendor has provided
4430          * information about their timeout algorithm.
4431          */
4432         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4433                         !xhci->devs[udev->slot_id])
4434                 return USB3_LPM_DISABLED;
4435
4436         hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4437         mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4438         if (mel < 0) {
4439                 /* Max Exit Latency is too big, disable LPM. */
4440                 hub_encoded_timeout = USB3_LPM_DISABLED;
4441                 mel = 0;
4442         }
4443
4444         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4445         if (ret)
4446                 return ret;
4447         return hub_encoded_timeout;
4448 }
4449
4450 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4451                         struct usb_device *udev, enum usb3_link_state state)
4452 {
4453         struct xhci_hcd *xhci;
4454         u16 mel;
4455         int ret;
4456
4457         xhci = hcd_to_xhci(hcd);
4458         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4459                         !xhci->devs[udev->slot_id])
4460                 return 0;
4461
4462         mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4463         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4464         if (ret)
4465                 return ret;
4466         return 0;
4467 }
4468 #else /* CONFIG_PM */
4469
4470 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4471                         struct usb_device *udev, enum usb3_link_state state)
4472 {
4473         return USB3_LPM_DISABLED;
4474 }
4475
4476 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4477                         struct usb_device *udev, enum usb3_link_state state)
4478 {
4479         return 0;
4480 }
4481 #endif  /* CONFIG_PM */
4482
4483 /*-------------------------------------------------------------------------*/
4484
4485 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4486  * internal data structures for the device.
4487  */
4488 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4489                         struct usb_tt *tt, gfp_t mem_flags)
4490 {
4491         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4492         struct xhci_virt_device *vdev;
4493         struct xhci_command *config_cmd;
4494         struct xhci_input_control_ctx *ctrl_ctx;
4495         struct xhci_slot_ctx *slot_ctx;
4496         unsigned long flags;
4497         unsigned think_time;
4498         int ret;
4499
4500         /* Ignore root hubs */
4501         if (!hdev->parent)
4502                 return 0;
4503
4504         vdev = xhci->devs[hdev->slot_id];
4505         if (!vdev) {
4506                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4507                 return -EINVAL;
4508         }
4509         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4510         if (!config_cmd) {
4511                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4512                 return -ENOMEM;
4513         }
4514
4515         spin_lock_irqsave(&xhci->lock, flags);
4516         if (hdev->speed == USB_SPEED_HIGH &&
4517                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4518                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4519                 xhci_free_command(xhci, config_cmd);
4520                 spin_unlock_irqrestore(&xhci->lock, flags);
4521                 return -ENOMEM;
4522         }
4523
4524         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4525         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4526         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4527         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4528         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4529         if (tt->multi)
4530                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4531         if (xhci->hci_version > 0x95) {
4532                 xhci_dbg(xhci, "xHCI version %x needs hub "
4533                                 "TT think time and number of ports\n",
4534                                 (unsigned int) xhci->hci_version);
4535                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4536                 /* Set TT think time - convert from ns to FS bit times.
4537                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
4538                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
4539                  *
4540                  * xHCI 1.0: this field shall be 0 if the device is not a
4541                  * High-spped hub.
4542                  */
4543                 think_time = tt->think_time;
4544                 if (think_time != 0)
4545                         think_time = (think_time / 666) - 1;
4546                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4547                         slot_ctx->tt_info |=
4548                                 cpu_to_le32(TT_THINK_TIME(think_time));
4549         } else {
4550                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4551                                 "TT think time or number of ports\n",
4552                                 (unsigned int) xhci->hci_version);
4553         }
4554         slot_ctx->dev_state = 0;
4555         spin_unlock_irqrestore(&xhci->lock, flags);
4556
4557         xhci_dbg(xhci, "Set up %s for hub device.\n",
4558                         (xhci->hci_version > 0x95) ?
4559                         "configure endpoint" : "evaluate context");
4560         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4561         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4562
4563         /* Issue and wait for the configure endpoint or
4564          * evaluate context command.
4565          */
4566         if (xhci->hci_version > 0x95)
4567                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4568                                 false, false);
4569         else
4570                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4571                                 true, false);
4572
4573         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4574         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4575
4576         xhci_free_command(xhci, config_cmd);
4577         return ret;
4578 }
4579
4580 int xhci_get_frame(struct usb_hcd *hcd)
4581 {
4582         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4583         /* EHCI mods by the periodic size.  Why? */
4584         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4585 }
4586
4587 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4588 {
4589         struct xhci_hcd         *xhci;
4590         struct device           *dev = hcd->self.controller;
4591         int                     retval;
4592         u32                     temp;
4593
4594         /* Accept arbitrarily long scatter-gather lists */
4595         hcd->self.sg_tablesize = ~0;
4596         /* XHCI controllers don't stop the ep queue on short packets :| */
4597         hcd->self.no_stop_on_short = 1;
4598
4599         if (usb_hcd_is_primary_hcd(hcd)) {
4600                 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4601                 if (!xhci)
4602                         return -ENOMEM;
4603                 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4604                 xhci->main_hcd = hcd;
4605                 /* Mark the first roothub as being USB 2.0.
4606                  * The xHCI driver will register the USB 3.0 roothub.
4607                  */
4608                 hcd->speed = HCD_USB2;
4609                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4610                 /*
4611                  * USB 2.0 roothub under xHCI has an integrated TT,
4612                  * (rate matching hub) as opposed to having an OHCI/UHCI
4613                  * companion controller.
4614                  */
4615                 hcd->has_tt = 1;
4616         } else {
4617                 /* xHCI private pointer was set in xhci_pci_probe for the second
4618                  * registered roothub.
4619                  */
4620                 xhci = hcd_to_xhci(hcd);
4621                 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4622                 if (HCC_64BIT_ADDR(temp)) {
4623                         xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4624                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4625                 } else {
4626                         dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4627                 }
4628                 return 0;
4629         }
4630
4631         xhci->cap_regs = hcd->regs;
4632         xhci->op_regs = hcd->regs +
4633                 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4634         xhci->run_regs = hcd->regs +
4635                 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4636         /* Cache read-only capability registers */
4637         xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4638         xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4639         xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4640         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4641         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4642         xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4643         xhci_print_registers(xhci);
4644
4645         get_quirks(dev, xhci);
4646
4647         /* Make sure the HC is halted. */
4648         retval = xhci_halt(xhci);
4649         if (retval)
4650                 goto error;
4651
4652         xhci_dbg(xhci, "Resetting HCD\n");
4653         /* Reset the internal HC memory state and registers. */
4654         retval = xhci_reset(xhci);
4655         if (retval)
4656                 goto error;
4657         xhci_dbg(xhci, "Reset complete\n");
4658
4659         temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4660         if (HCC_64BIT_ADDR(temp)) {
4661                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4662                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4663         } else {
4664                 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4665         }
4666
4667         xhci_dbg(xhci, "Calling HCD init\n");
4668         /* Initialize HCD and host controller data structures. */
4669         retval = xhci_init(hcd);
4670         if (retval)
4671                 goto error;
4672         xhci_dbg(xhci, "Called HCD init\n");
4673         return 0;
4674 error:
4675         kfree(xhci);
4676         return retval;
4677 }
4678
4679 MODULE_DESCRIPTION(DRIVER_DESC);
4680 MODULE_AUTHOR(DRIVER_AUTHOR);
4681 MODULE_LICENSE("GPL");
4682
4683 static int __init xhci_hcd_init(void)
4684 {
4685         int retval;
4686
4687         retval = xhci_register_pci();
4688         if (retval < 0) {
4689                 printk(KERN_DEBUG "Problem registering PCI driver.");
4690                 return retval;
4691         }
4692         retval = xhci_register_plat();
4693         if (retval < 0) {
4694                 printk(KERN_DEBUG "Problem registering platform driver.");
4695                 goto unreg_pci;
4696         }
4697         /*
4698          * Check the compiler generated sizes of structures that must be laid
4699          * out in specific ways for hardware access.
4700          */
4701         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4702         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4703         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4704         /* xhci_device_control has eight fields, and also
4705          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4706          */
4707         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4708         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4709         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4710         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4711         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4712         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4713         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4714         return 0;
4715 unreg_pci:
4716         xhci_unregister_pci();
4717         return retval;
4718 }
4719 module_init(xhci_hcd_init);
4720
4721 static void __exit xhci_hcd_cleanup(void)
4722 {
4723         xhci_unregister_pci();
4724         xhci_unregister_plat();
4725 }
4726 module_exit(xhci_hcd_cleanup);