1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver PCI Bus Glue.
5 * Copyright (C) 2008 Intel Corp.
8 * Some code borrowed from the Linux EHCI driver.
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/module.h>
14 #include <linux/acpi.h>
17 #include "xhci-trace.h"
20 #define SSIC_PORT_NUM 2
21 #define SSIC_PORT_CFG2 0x880c
22 #define SSIC_PORT_CFG2_OFFSET 0x30
23 #define PROG_DONE (1 << 30)
24 #define SSIC_PORT_UNUSED (1 << 31)
26 /* Device for a quirk */
27 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
28 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
29 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009 0x1009
30 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
32 #define PCI_VENDOR_ID_ETRON 0x1b6f
33 #define PCI_DEVICE_ID_EJ168 0x7023
35 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
36 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
37 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI 0x9cb1
38 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
39 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
40 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
41 #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8
42 #define PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI 0x1aa8
43 #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8
44 #define PCI_DEVICE_ID_INTEL_DNV_XHCI 0x19d0
45 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI 0x15b5
46 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI 0x15b6
47 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI 0x15db
48 #define PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI 0x15d4
49 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI 0x15e9
50 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI 0x15ec
51 #define PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI 0x15f0
52 #define PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI 0x8a13
53 #define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
54 #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
56 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
57 #define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
58 #define PCI_DEVICE_ID_AMD_PROMONTORYA_2 0x43bb
59 #define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc
60 #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
62 static const char hcd_name[] = "xhci_hcd";
64 static struct hc_driver __read_mostly xhci_pci_hc_driver;
66 static int xhci_pci_setup(struct usb_hcd *hcd);
68 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
69 .reset = xhci_pci_setup,
72 /* called after powerup, by probe or system-pm "wakeup" */
73 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
76 * TODO: Implement finding debug ports later.
77 * TODO: see if there are any quirks that need to be added to handle
78 * new extended capabilities.
81 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
82 if (!pci_set_mwi(pdev))
83 xhci_dbg(xhci, "MWI active\n");
85 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
89 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
91 struct pci_dev *pdev = to_pci_dev(dev);
92 struct xhci_driver_data *driver_data;
93 const struct pci_device_id *id;
95 id = pci_match_id(pdev->driver->id_table, pdev);
97 if (id && id->driver_data) {
98 driver_data = (struct xhci_driver_data *)id->driver_data;
99 xhci->quirks |= driver_data->quirks;
102 /* Look for vendor-specific quirks */
103 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
104 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
105 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
106 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
107 pdev->revision == 0x0) {
108 xhci->quirks |= XHCI_RESET_EP_QUIRK;
109 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
110 "QUIRK: Fresco Logic xHC needs configure"
111 " endpoint cmd after reset endpoint");
113 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
114 pdev->revision == 0x4) {
115 xhci->quirks |= XHCI_SLOW_SUSPEND;
116 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
117 "QUIRK: Fresco Logic xHC revision %u"
118 "must be suspended extra slowly",
121 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
122 xhci->quirks |= XHCI_BROKEN_STREAMS;
123 /* Fresco Logic confirms: all revisions of this chip do not
124 * support MSI, even though some of them claim to in their PCI
127 xhci->quirks |= XHCI_BROKEN_MSI;
128 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
129 "QUIRK: Fresco Logic revision %u "
130 "has broken MSI implementation",
132 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
135 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
136 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
137 xhci->quirks |= XHCI_BROKEN_STREAMS;
139 if (pdev->vendor == PCI_VENDOR_ID_NEC)
140 xhci->quirks |= XHCI_NEC_HOST;
142 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
143 xhci->quirks |= XHCI_AMD_0x96_HOST;
146 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_quirk_pll_check())
147 xhci->quirks |= XHCI_AMD_PLL_FIX;
149 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
150 (pdev->device == 0x145c ||
151 pdev->device == 0x15e0 ||
152 pdev->device == 0x15e1 ||
153 pdev->device == 0x43bb))
154 xhci->quirks |= XHCI_SUSPEND_DELAY;
156 if (pdev->vendor == PCI_VENDOR_ID_AMD &&
157 (pdev->device == 0x15e0 || pdev->device == 0x15e1))
158 xhci->quirks |= XHCI_SNPS_BROKEN_SUSPEND;
160 if (pdev->vendor == PCI_VENDOR_ID_AMD)
161 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
163 if ((pdev->vendor == PCI_VENDOR_ID_AMD) &&
164 ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) ||
165 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_3) ||
166 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_2) ||
167 (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_1)))
168 xhci->quirks |= XHCI_U2_DISABLE_WAKE;
170 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
171 xhci->quirks |= XHCI_LPM_SUPPORT;
172 xhci->quirks |= XHCI_INTEL_HOST;
173 xhci->quirks |= XHCI_AVOID_BEI;
175 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
176 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
177 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
178 xhci->limit_active_eps = 64;
179 xhci->quirks |= XHCI_SW_BW_CHECKING;
181 * PPT desktop boards DH77EB and DH77DF will power back on after
182 * a few seconds of being shutdown. The fix for this is to
183 * switch the ports from xHCI to EHCI on shutdown. We can't use
184 * DMI information to find those particular boards (since each
185 * vendor will change the board name), so we have to key off all
188 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
190 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
191 (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI ||
192 pdev->device == PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_XHCI)) {
193 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
194 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
196 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
197 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
198 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
199 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
200 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI ||
201 pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_B_XHCI ||
202 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
203 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI ||
204 pdev->device == PCI_DEVICE_ID_INTEL_CML_XHCI)) {
205 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
207 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
208 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)
209 xhci->quirks |= XHCI_SSIC_PORT_UNUSED;
210 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
211 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
212 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
213 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI))
214 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW;
215 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
216 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI ||
217 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
218 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
219 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI ||
220 pdev->device == PCI_DEVICE_ID_INTEL_DNV_XHCI))
221 xhci->quirks |= XHCI_MISSING_CAS;
223 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
224 (pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI ||
225 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI ||
226 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_XHCI ||
227 pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_XHCI ||
228 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_XHCI ||
229 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_XHCI ||
230 pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
231 pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
232 pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI))
233 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
235 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
236 pdev->device == PCI_DEVICE_ID_EJ168) {
237 xhci->quirks |= XHCI_RESET_ON_RESUME;
238 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
239 xhci->quirks |= XHCI_BROKEN_STREAMS;
241 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
242 pdev->device == 0x0014) {
243 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
244 xhci->quirks |= XHCI_ZERO_64B_REGS;
246 if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
247 pdev->device == 0x0015) {
248 xhci->quirks |= XHCI_RESET_ON_RESUME;
249 xhci->quirks |= XHCI_ZERO_64B_REGS;
251 if (pdev->vendor == PCI_VENDOR_ID_VIA)
252 xhci->quirks |= XHCI_RESET_ON_RESUME;
254 /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
255 if (pdev->vendor == PCI_VENDOR_ID_VIA &&
256 pdev->device == 0x3432)
257 xhci->quirks |= XHCI_BROKEN_STREAMS;
259 if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483)
260 xhci->quirks |= XHCI_LPM_SUPPORT;
262 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
263 pdev->device == 0x1042)
264 xhci->quirks |= XHCI_BROKEN_STREAMS;
265 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
266 pdev->device == 0x1142)
267 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
269 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
270 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI)
271 xhci->quirks |= XHCI_ASMEDIA_MODIFY_FLOWCONTROL;
273 if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)
274 xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;
276 if ((pdev->vendor == PCI_VENDOR_ID_BROADCOM ||
277 pdev->vendor == PCI_VENDOR_ID_CAVIUM) &&
278 pdev->device == 0x9026)
279 xhci->quirks |= XHCI_RESET_PLL_ON_DISCONNECT;
281 if (xhci->quirks & XHCI_RESET_ON_RESUME)
282 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
283 "QUIRK: Resetting on resume");
287 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
289 static const guid_t intel_dsm_guid =
290 GUID_INIT(0xac340cb7, 0xe901, 0x45bf,
291 0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23);
292 union acpi_object *obj;
294 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), &intel_dsm_guid, 3, 1,
299 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
300 #endif /* CONFIG_ACPI */
302 /* called during probe() after chip reset completes */
303 static int xhci_pci_setup(struct usb_hcd *hcd)
305 struct xhci_hcd *xhci;
306 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
309 xhci = hcd_to_xhci(hcd);
311 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
313 /* imod_interval is the interrupt moderation value in nanoseconds. */
314 xhci->imod_interval = 40000;
316 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
320 if (!usb_hcd_is_primary_hcd(hcd))
323 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
324 xhci_pme_acpi_rtd3_enable(pdev);
326 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
328 /* Find any debug ports */
329 return xhci_pci_reinit(xhci, pdev);
333 * We need to register our own PCI probe function (instead of the USB core's
334 * function) in order to create a second roothub under xHCI.
336 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
339 struct xhci_hcd *xhci;
341 struct xhci_driver_data *driver_data;
343 driver_data = (struct xhci_driver_data *)id->driver_data;
344 if (driver_data && driver_data->quirks & XHCI_RENESAS_FW_QUIRK) {
345 retval = renesas_xhci_check_request_fw(dev, id);
350 /* Prevent runtime suspending between USB-2 and USB-3 initialization */
351 pm_runtime_get_noresume(&dev->dev);
353 /* Register the USB 2.0 roothub.
354 * FIXME: USB core must know to register the USB 2.0 roothub first.
355 * This is sort of silly, because we could just set the HCD driver flags
356 * to say USB 2.0, but I'm not sure what the implications would be in
357 * the other parts of the HCD code.
359 retval = usb_hcd_pci_probe(dev, id, &xhci_pci_hc_driver);
364 /* USB 2.0 roothub is stored in the PCI device now. */
365 hcd = dev_get_drvdata(&dev->dev);
366 xhci = hcd_to_xhci(hcd);
367 xhci->shared_hcd = usb_create_shared_hcd(&xhci_pci_hc_driver, &dev->dev,
369 if (!xhci->shared_hcd) {
371 goto dealloc_usb2_hcd;
374 retval = xhci_ext_cap_init(xhci);
378 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
382 /* Roothub already marked as USB 3.0 speed */
384 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
385 HCC_MAX_PSA(xhci->hcc_params) >= 4)
386 xhci->shared_hcd->can_do_streams = 1;
388 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
389 pm_runtime_put_noidle(&dev->dev);
391 if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
392 pm_runtime_allow(&dev->dev);
397 usb_put_hcd(xhci->shared_hcd);
399 usb_hcd_pci_remove(dev);
401 pm_runtime_put_noidle(&dev->dev);
405 static void xhci_pci_remove(struct pci_dev *dev)
407 struct xhci_hcd *xhci;
409 xhci = hcd_to_xhci(pci_get_drvdata(dev));
410 if (xhci->quirks & XHCI_RENESAS_FW_QUIRK)
411 renesas_xhci_pci_exit(dev);
413 xhci->xhc_state |= XHCI_STATE_REMOVING;
415 if (xhci->quirks & XHCI_DEFAULT_PM_RUNTIME_ALLOW)
416 pm_runtime_forbid(&dev->dev);
418 if (xhci->shared_hcd) {
419 usb_remove_hcd(xhci->shared_hcd);
420 usb_put_hcd(xhci->shared_hcd);
421 xhci->shared_hcd = NULL;
424 /* Workaround for spurious wakeups at shutdown with HSW */
425 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
426 pci_set_power_state(dev, PCI_D3hot);
428 usb_hcd_pci_remove(dev);
433 * In some Intel xHCI controllers, in order to get D3 working,
434 * through a vendor specific SSIC CONFIG register at offset 0x883c,
435 * SSIC PORT need to be marked as "unused" before putting xHCI
436 * into D3. After D3 exit, the SSIC port need to be marked as "used".
437 * Without this change, xHCI might not enter D3 state.
439 static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend)
441 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
446 for (i = 0; i < SSIC_PORT_NUM; i++) {
447 reg = (void __iomem *) xhci->cap_regs +
449 i * SSIC_PORT_CFG2_OFFSET;
451 /* Notify SSIC that SSIC profile programming is not done. */
452 val = readl(reg) & ~PROG_DONE;
455 /* Mark SSIC port as unused(suspend) or used(resume) */
458 val |= SSIC_PORT_UNUSED;
460 val &= ~SSIC_PORT_UNUSED;
463 /* Notify SSIC that SSIC profile programming is done */
464 val = readl(reg) | PROG_DONE;
471 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
472 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
474 static void xhci_pme_quirk(struct usb_hcd *hcd)
476 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
480 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
482 writel(val | BIT(28), reg);
486 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
488 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
489 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
493 * Systems with the TI redriver that loses port status change events
494 * need to have the registers polled during D3, so avoid D3cold.
496 if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
497 pci_d3cold_disable(pdev);
499 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
502 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
503 xhci_ssic_port_unused_quirk(hcd, true);
505 ret = xhci_suspend(xhci, do_wakeup);
506 if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED))
507 xhci_ssic_port_unused_quirk(hcd, false);
512 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
514 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
515 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
518 /* The BIOS on systems with the Intel Panther Point chipset may or may
519 * not support xHCI natively. That means that during system resume, it
520 * may switch the ports back to EHCI so that users can use their
521 * keyboard to select a kernel from GRUB after resume from hibernate.
523 * The BIOS is supposed to remember whether the OS had xHCI ports
524 * enabled before resume, and switch the ports back to xHCI when the
525 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
528 * Unconditionally switch the ports back to xHCI after a system resume.
529 * It should not matter whether the EHCI or xHCI controller is
530 * resumed first. It's enough to do the switchover in xHCI because
531 * USB core won't notice anything as the hub driver doesn't start
532 * running again until after all the devices (including both EHCI and
533 * xHCI host controllers) have been resumed.
536 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
537 usb_enable_intel_xhci_ports(pdev);
539 if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
540 xhci_ssic_port_unused_quirk(hcd, false);
542 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
545 retval = xhci_resume(xhci, hibernated);
549 static void xhci_pci_shutdown(struct usb_hcd *hcd)
551 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
552 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
556 /* Yet another workaround for spurious wakeups at shutdown with HSW */
557 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
558 pci_set_power_state(pdev, PCI_D3hot);
560 #endif /* CONFIG_PM */
562 /*-------------------------------------------------------------------------*/
564 static const struct xhci_driver_data reneses_data = {
565 .quirks = XHCI_RENESAS_FW_QUIRK,
566 .firmware = "renesas_usb_fw.mem",
569 /* PCI driver selection metadata; PCI hotplugging uses this */
570 static const struct pci_device_id pci_ids[] = {
571 { PCI_DEVICE(0x1912, 0x0014),
572 .driver_data = (unsigned long)&reneses_data,
574 { PCI_DEVICE(0x1912, 0x0015),
575 .driver_data = (unsigned long)&reneses_data,
577 /* handle any USB 3.0 xHCI controller */
578 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
580 { /* end: all zeroes */ }
582 MODULE_DEVICE_TABLE(pci, pci_ids);
583 MODULE_FIRMWARE("renesas_usb_fw.mem");
585 /* pci driver glue; this is a "new style" PCI driver module */
586 static struct pci_driver xhci_pci_driver = {
590 .probe = xhci_pci_probe,
591 .remove = xhci_pci_remove,
592 /* suspend and resume implemented later */
594 .shutdown = usb_hcd_pci_shutdown,
597 .pm = &usb_hcd_pci_pm_ops
602 static int __init xhci_pci_init(void)
604 xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
606 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
607 xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
608 xhci_pci_hc_driver.shutdown = xhci_pci_shutdown;
610 return pci_register_driver(&xhci_pci_driver);
612 module_init(xhci_pci_init);
614 static void __exit xhci_pci_exit(void)
616 pci_unregister_driver(&xhci_pci_driver);
618 module_exit(xhci_pci_exit);
620 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
621 MODULE_LICENSE("GPL");