drivers/usb/host/ohci-hcd.c

   1 // SPDX-License-Identifier: GPL-1.0+
   2 /*
   3  * Open Host Controller Interface (OHCI) driver for USB.
   4  *
   5  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6  *
   7  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   8  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   9  *
  10  * [ Initialisation is based on Linus'  ]
  11  * [ uhci code and gregs ohci fragments ]
  12  * [ (C) Copyright 1999 Linus Torvalds  ]
  13  * [ (C) Copyright 1999 Gregory P. Smith]
  14  *
  15  *
  16  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  17  * interfaces (though some non-x86 Intel chips use it).  It supports
  18  * smarter hardware than UHCI.  A download link for the spec available
  19  * through the http://www.usb.org website.
  20  *
  21  * This file is licenced under the GPL.
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/moduleparam.h>
  26 #include <linux/pci.h>
  27 #include <linux/kernel.h>
  28 #include <linux/delay.h>
  29 #include <linux/ioport.h>
  30 #include <linux/sched.h>
  31 #include <linux/slab.h>
  32 #include <linux/errno.h>
  33 #include <linux/init.h>
  34 #include <linux/timer.h>
  35 #include <linux/list.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/otg.h>
  38 #include <linux/usb/hcd.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/dmapool.h>
  41 #include <linux/workqueue.h>
  42 #include <linux/debugfs.h>
  43
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47 #include <asm/byteorder.h>
  48
  49
  50 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  51 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  52
  53 /*-------------------------------------------------------------------------*/
  54
  55 /* For initializing controller (mask in an HCFS mode too) */
  56 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  57 #define OHCI_INTR_INIT \
  58                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  59                 | OHCI_INTR_RD | OHCI_INTR_WDH)
  60
  61 #ifdef __hppa__
  62 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  63 #define IR_DISABLE
  64 #endif
  65
  66 #ifdef CONFIG_ARCH_OMAP
  67 /* OMAP doesn't support IR (no SMM; not needed) */
  68 #define IR_DISABLE
  69 #endif
  70
  71 /*-------------------------------------------------------------------------*/
  72
  73 static const char       hcd_name [] = "ohci_hcd";
  74
  75 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  76 #define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  77 #define IO_WATCHDOG_OFF         0xffffff00
  78
  79 #include "ohci.h"
  80 #include "pci-quirks.h"
  81
  82 static void ohci_dump(struct ohci_hcd *ohci);
  83 static void ohci_stop(struct usb_hcd *hcd);
  84 static void io_watchdog_func(struct timer_list *t);
  85
  86 #include "ohci-hub.c"
  87 #include "ohci-dbg.c"
  88 #include "ohci-mem.c"
  89 #include "ohci-q.c"
  90
  91
  92 /*
  93  * On architectures with edge-triggered interrupts we must never return
  94  * IRQ_NONE.
  95  */
  96 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  97 #define IRQ_NOTMINE     IRQ_HANDLED
  98 #else
  99 #define IRQ_NOTMINE     IRQ_NONE
 100 #endif
 101
 102
 103 /* Some boards misreport power switching/overcurrent */
 104 static bool distrust_firmware = true;
 105 module_param (distrust_firmware, bool, 0);
 106 MODULE_PARM_DESC (distrust_firmware,
 107         "true to distrust firmware power/overcurrent setup");
 108
 109 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 110 static bool no_handshake;
 111 module_param (no_handshake, bool, 0);
 112 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 113
 114 /*-------------------------------------------------------------------------*/
 115
 116 static int number_of_tds(struct urb *urb)
 117 {
 118         int                     len, i, num, this_sg_len;
 119         struct scatterlist      *sg;
 120
 121         len = urb->transfer_buffer_length;
 122         i = urb->num_mapped_sgs;
 123
 124         if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 125                 num = 0;
 126                 sg = urb->sg;
 127                 for (;;) {
 128                         this_sg_len = min_t(int, sg_dma_len(sg), len);
 129                         num += DIV_ROUND_UP(this_sg_len, 4096);
 130                         len -= this_sg_len;
 131                         if (--i <= 0 || len <= 0)
 132                                 break;
 133                         sg = sg_next(sg);
 134                 }
 135
 136         } else {                        /* Non-SG transfer */
 137                 /* one TD for every 4096 Bytes (could be up to 8K) */
 138                 num = DIV_ROUND_UP(len, 4096);
 139         }
 140         return num;
 141 }
 142
 143 /*
 144  * queue up an urb for anything except the root hub
 145  */
 146 static int ohci_urb_enqueue (
 147         struct usb_hcd  *hcd,
 148         struct urb      *urb,
 149         gfp_t           mem_flags
 150 ) {
 151         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 152         struct ed       *ed;
 153         urb_priv_t      *urb_priv;
 154         unsigned int    pipe = urb->pipe;
 155         int             i, size = 0;
 156         unsigned long   flags;
 157         int             retval = 0;
 158
 159         /* every endpoint has a ed, locate and maybe (re)initialize it */
 160         ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 161         if (! ed)
 162                 return -ENOMEM;
 163
 164         /* for the private part of the URB we need the number of TDs (size) */
 165         switch (ed->type) {
 166                 case PIPE_CONTROL:
 167                         /* td_submit_urb() doesn't yet handle these */
 168                         if (urb->transfer_buffer_length > 4096)
 169                                 return -EMSGSIZE;
 170
 171                         /* 1 TD for setup, 1 for ACK, plus ... */
 172                         size = 2;
 173                         /* FALLTHROUGH */
 174                 // case PIPE_INTERRUPT:
 175                 // case PIPE_BULK:
 176                 default:
 177                         size += number_of_tds(urb);
 178                         /* maybe a zero-length packet to wrap it up */
 179                         if (size == 0)
 180                                 size++;
 181                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 182                                 && (urb->transfer_buffer_length
 183                                         % usb_maxpacket (urb->dev, pipe,
 184                                                 usb_pipeout (pipe))) == 0)
 185                                 size++;
 186                         break;
 187                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 188                         size = urb->number_of_packets;
 189                         break;
 190         }
 191
 192         /* allocate the private part of the URB */
 193         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 194                         mem_flags);
 195         if (!urb_priv)
 196                 return -ENOMEM;
 197         INIT_LIST_HEAD (&urb_priv->pending);
 198         urb_priv->length = size;
 199         urb_priv->ed = ed;
 200
 201         /* allocate the TDs (deferring hash chain updates) */
 202         for (i = 0; i < size; i++) {
 203                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 204                 if (!urb_priv->td [i]) {
 205                         urb_priv->length = i;
 206                         urb_free_priv (ohci, urb_priv);
 207                         return -ENOMEM;
 208                 }
 209         }
 210
 211         spin_lock_irqsave (&ohci->lock, flags);
 212
 213         /* don't submit to a dead HC */
 214         if (!HCD_HW_ACCESSIBLE(hcd)) {
 215                 retval = -ENODEV;
 216                 goto fail;
 217         }
 218         if (ohci->rh_state != OHCI_RH_RUNNING) {
 219                 retval = -ENODEV;
 220                 goto fail;
 221         }
 222         retval = usb_hcd_link_urb_to_ep(hcd, urb);
 223         if (retval)
 224                 goto fail;
 225
 226         /* schedule the ed if needed */
 227         if (ed->state == ED_IDLE) {
 228                 retval = ed_schedule (ohci, ed);
 229                 if (retval < 0) {
 230                         usb_hcd_unlink_urb_from_ep(hcd, urb);
 231                         goto fail;
 232                 }
 233
 234                 /* Start up the I/O watchdog timer, if it's not running */
 235                 if (ohci->prev_frame_no == IO_WATCHDOG_OFF &&
 236                                 list_empty(&ohci->eds_in_use) &&
 237                                 !(ohci->flags & OHCI_QUIRK_QEMU)) {
 238                         ohci->prev_frame_no = ohci_frame_no(ohci);
 239                         mod_timer(&ohci->io_watchdog,
 240                                         jiffies + IO_WATCHDOG_DELAY);
 241                 }
 242                 list_add(&ed->in_use_list, &ohci->eds_in_use);
 243
 244                 if (ed->type == PIPE_ISOCHRONOUS) {
 245                         u16     frame = ohci_frame_no(ohci);
 246
 247                         /* delay a few frames before the first TD */
 248                         frame += max_t (u16, 8, ed->interval);
 249                         frame &= ~(ed->interval - 1);
 250                         frame |= ed->branch;
 251                         urb->start_frame = frame;
 252                         ed->last_iso = frame + ed->interval * (size - 1);
 253                 }
 254         } else if (ed->type == PIPE_ISOCHRONOUS) {
 255                 u16     next = ohci_frame_no(ohci) + 1;
 256                 u16     frame = ed->last_iso + ed->interval;
 257                 u16     length = ed->interval * (size - 1);
 258
 259                 /* Behind the scheduling threshold? */
 260                 if (unlikely(tick_before(frame, next))) {
 261
 262                         /* URB_ISO_ASAP: Round up to the first available slot */
 263                         if (urb->transfer_flags & URB_ISO_ASAP) {
 264                                 frame += (next - frame + ed->interval - 1) &
 265                                                 -ed->interval;
 266
 267                         /*
 268                          * Not ASAP: Use the next slot in the stream,
 269                          * no matter what.
 270                          */
 271                         } else {
 272                                 /*
 273                                  * Some OHCI hardware doesn't handle late TDs
 274                                  * correctly.  After retiring them it proceeds
 275                                  * to the next ED instead of the next TD.
 276                                  * Therefore we have to omit the late TDs
 277                                  * entirely.
 278                                  */
 279                                 urb_priv->td_cnt = DIV_ROUND_UP(
 280                                                 (u16) (next - frame),
 281                                                 ed->interval);
 282                                 if (urb_priv->td_cnt >= urb_priv->length) {
 283                                         ++urb_priv->td_cnt;     /* Mark it */
 284                                         ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 285                                                         urb, frame, length,
 286                                                         next);
 287                                 }
 288                         }
 289                 }
 290                 urb->start_frame = frame;
 291                 ed->last_iso = frame + length;
 292         }
 293
 294         /* fill the TDs and link them to the ed; and
 295          * enable that part of the schedule, if needed
 296          * and update count of queued periodic urbs
 297          */
 298         urb->hcpriv = urb_priv;
 299         td_submit_urb (ohci, urb);
 300
 301 fail:
 302         if (retval)
 303                 urb_free_priv (ohci, urb_priv);
 304         spin_unlock_irqrestore (&ohci->lock, flags);
 305         return retval;
 306 }
 307
 308 /*
 309  * decouple the URB from the HC queues (TDs, urb_priv).
 310  * reporting is always done
 311  * asynchronously, and we might be dealing with an urb that's
 312  * partially transferred, or an ED with other urbs being unlinked.
 313  */
 314 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 315 {
 316         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 317         unsigned long           flags;
 318         int                     rc;
 319         urb_priv_t              *urb_priv;
 320
 321         spin_lock_irqsave (&ohci->lock, flags);
 322         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 323         if (rc == 0) {
 324
 325                 /* Unless an IRQ completed the unlink while it was being
 326                  * handed to us, flag it for unlink and giveback, and force
 327                  * some upcoming INTR_SF to call finish_unlinks()
 328                  */
 329                 urb_priv = urb->hcpriv;
 330                 if (urb_priv->ed->state == ED_OPER)
 331                         start_ed_unlink(ohci, urb_priv->ed);
 332
 333                 if (ohci->rh_state != OHCI_RH_RUNNING) {
 334                         /* With HC dead, we can clean up right away */
 335                         ohci_work(ohci);
 336                 }
 337         }
 338         spin_unlock_irqrestore (&ohci->lock, flags);
 339         return rc;
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 /* frees config/altsetting state for endpoints,
 345  * including ED memory, dummy TD, and bulk/intr data toggle
 346  */
 347
 348 static void
 349 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 350 {
 351         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 352         unsigned long           flags;
 353         struct ed               *ed = ep->hcpriv;
 354         unsigned                limit = 1000;
 355
 356         /* ASSERT:  any requests/urbs are being unlinked */
 357         /* ASSERT:  nobody can be submitting urbs for this any more */
 358
 359         if (!ed)
 360                 return;
 361
 362 rescan:
 363         spin_lock_irqsave (&ohci->lock, flags);
 364
 365         if (ohci->rh_state != OHCI_RH_RUNNING) {
 366 sanitize:
 367                 ed->state = ED_IDLE;
 368                 ohci_work(ohci);
 369         }
 370
 371         switch (ed->state) {
 372         case ED_UNLINK:         /* wait for hw to finish? */
 373                 /* major IRQ delivery trouble loses INTR_SF too... */
 374                 if (limit-- == 0) {
 375                         ohci_warn(ohci, "ED unlink timeout\n");
 376                         goto sanitize;
 377                 }
 378                 spin_unlock_irqrestore (&ohci->lock, flags);
 379                 schedule_timeout_uninterruptible(1);
 380                 goto rescan;
 381         case ED_IDLE:           /* fully unlinked */
 382                 if (list_empty (&ed->td_list)) {
 383                         td_free (ohci, ed->dummy);
 384                         ed_free (ohci, ed);
 385                         break;
 386                 }
 387                 /* fall through */
 388         default:
 389                 /* caller was supposed to have unlinked any requests;
 390                  * that's not our job.  can't recover; must leak ed.
 391                  */
 392                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 393                         ed, ep->desc.bEndpointAddress, ed->state,
 394                         list_empty (&ed->td_list) ? "" : " (has tds)");
 395                 td_free (ohci, ed->dummy);
 396                 break;
 397         }
 398         ep->hcpriv = NULL;
 399         spin_unlock_irqrestore (&ohci->lock, flags);
 400 }
 401
 402 static int ohci_get_frame (struct usb_hcd *hcd)
 403 {
 404         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 405
 406         return ohci_frame_no(ohci);
 407 }
 408
 409 static void ohci_usb_reset (struct ohci_hcd *ohci)
 410 {
 411         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 412         ohci->hc_control &= OHCI_CTRL_RWC;
 413         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 414         ohci->rh_state = OHCI_RH_HALTED;
 415 }
 416
 417 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 418  * other cases where the next software may expect clean state from the
 419  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 420  */
 421 static void
 422 ohci_shutdown (struct usb_hcd *hcd)
 423 {
 424         struct ohci_hcd *ohci;
 425
 426         ohci = hcd_to_ohci (hcd);
 427         ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 428
 429         /* Software reset, after which the controller goes into SUSPEND */
 430         ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 431         ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 432         udelay(10);
 433
 434         ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 435         ohci->rh_state = OHCI_RH_HALTED;
 436 }
 437
 438 /*-------------------------------------------------------------------------*
 439  * HC functions
 440  *-------------------------------------------------------------------------*/
 441
 442 /* init memory, and kick BIOS/SMM off */
 443
 444 static int ohci_init (struct ohci_hcd *ohci)
 445 {
 446         int ret;
 447         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 448
 449         /* Accept arbitrarily long scatter-gather lists */
 450         hcd->self.sg_tablesize = ~0;
 451
 452         if (distrust_firmware)
 453                 ohci->flags |= OHCI_QUIRK_HUB_POWER;
 454
 455         ohci->rh_state = OHCI_RH_HALTED;
 456         ohci->regs = hcd->regs;
 457
 458         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 459          * was never needed for most non-PCI systems ... remove the code?
 460          */
 461
 462 #ifndef IR_DISABLE
 463         /* SMM owns the HC?  not for long! */
 464         if (!no_handshake && ohci_readl (ohci,
 465                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 466                 u32 temp;
 467
 468                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 469
 470                 /* this timeout is arbitrary.  we make it long, so systems
 471                  * depending on usb keyboards may be usable even if the
 472                  * BIOS/SMM code seems pretty broken.
 473                  */
 474                 temp = 500;     /* arbitrary: five seconds */
 475
 476                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 477                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 478                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 479                         msleep (10);
 480                         if (--temp == 0) {
 481                                 ohci_err (ohci, "USB HC takeover failed!"
 482                                         "  (BIOS/SMM bug)\n");
 483                                 return -EBUSY;
 484                         }
 485                 }
 486                 ohci_usb_reset (ohci);
 487         }
 488 #endif
 489
 490         /* Disable HC interrupts */
 491         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 492
 493         /* flush the writes, and save key bits like RWC */
 494         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 495                 ohci->hc_control |= OHCI_CTRL_RWC;
 496
 497         /* Read the number of ports unless overridden */
 498         if (ohci->num_ports == 0)
 499                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 500
 501         if (ohci->hcca)
 502                 return 0;
 503
 504         timer_setup(&ohci->io_watchdog, io_watchdog_func, 0);
 505         ohci->prev_frame_no = IO_WATCHDOG_OFF;
 506
 507         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 508                         sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 509         if (!ohci->hcca)
 510                 return -ENOMEM;
 511
 512         if ((ret = ohci_mem_init (ohci)) < 0)
 513                 ohci_stop (hcd);
 514         else {
 515                 create_debug_files (ohci);
 516         }
 517
 518         return ret;
 519 }
 520
 521 /*-------------------------------------------------------------------------*/
 522
 523 /* Start an OHCI controller, set the BUS operational
 524  * resets USB and controller
 525  * enable interrupts
 526  */
 527 static int ohci_run (struct ohci_hcd *ohci)
 528 {
 529         u32                     mask, val;
 530         int                     first = ohci->fminterval == 0;
 531         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 532
 533         ohci->rh_state = OHCI_RH_HALTED;
 534
 535         /* boot firmware should have set this up (5.1.1.3.1) */
 536         if (first) {
 537
 538                 val = ohci_readl (ohci, &ohci->regs->fminterval);
 539                 ohci->fminterval = val & 0x3fff;
 540                 if (ohci->fminterval != FI)
 541                         ohci_dbg (ohci, "fminterval delta %d\n",
 542                                 ohci->fminterval - FI);
 543                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 544                 /* also: power/overcurrent flags in roothub.a */
 545         }
 546
 547         /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 548          * to be checked in case boot firmware (BIOS/SMM/...) has set up
 549          * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 550          * If the bus glue detected wakeup capability then it should
 551          * already be enabled; if so we'll just enable it again.
 552          */
 553         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 554                 device_set_wakeup_capable(hcd->self.controller, 1);
 555
 556         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 557         case OHCI_USB_OPER:
 558                 val = 0;
 559                 break;
 560         case OHCI_USB_SUSPEND:
 561         case OHCI_USB_RESUME:
 562                 ohci->hc_control &= OHCI_CTRL_RWC;
 563                 ohci->hc_control |= OHCI_USB_RESUME;
 564                 val = 10 /* msec wait */;
 565                 break;
 566         // case OHCI_USB_RESET:
 567         default:
 568                 ohci->hc_control &= OHCI_CTRL_RWC;
 569                 ohci->hc_control |= OHCI_USB_RESET;
 570                 val = 50 /* msec wait */;
 571                 break;
 572         }
 573         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 574         // flush the writes
 575         (void) ohci_readl (ohci, &ohci->regs->control);
 576         msleep(val);
 577
 578         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 579
 580         /* 2msec timelimit here means no irqs/preempt */
 581         spin_lock_irq (&ohci->lock);
 582
 583 retry:
 584         /* HC Reset requires max 10 us delay */
 585         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 586         val = 30;       /* ... allow extra time */
 587         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 588                 if (--val == 0) {
 589                         spin_unlock_irq (&ohci->lock);
 590                         ohci_err (ohci, "USB HC reset timed out!\n");
 591                         return -1;
 592                 }
 593                 udelay (1);
 594         }
 595
 596         /* now we're in the SUSPEND state ... must go OPERATIONAL
 597          * within 2msec else HC enters RESUME
 598          *
 599          * ... but some hardware won't init fmInterval "by the book"
 600          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 601          * this if we write fmInterval after we're OPERATIONAL.
 602          * Unclear about ALi, ServerWorks, and others ... this could
 603          * easily be a longstanding bug in chip init on Linux.
 604          */
 605         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 606                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 607                 // flush those writes
 608                 (void) ohci_readl (ohci, &ohci->regs->control);
 609         }
 610
 611         /* Tell the controller where the control and bulk lists are
 612          * The lists are empty now. */
 613         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 614         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 615
 616         /* a reset clears this */
 617         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 618
 619         periodic_reinit (ohci);
 620
 621         /* some OHCI implementations are finicky about how they init.
 622          * bogus values here mean not even enumeration could work.
 623          */
 624         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 625                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 626                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 627                         ohci->flags |= OHCI_QUIRK_INITRESET;
 628                         ohci_dbg (ohci, "enabling initreset quirk\n");
 629                         goto retry;
 630                 }
 631                 spin_unlock_irq (&ohci->lock);
 632                 ohci_err (ohci, "init err (%08x %04x)\n",
 633                         ohci_readl (ohci, &ohci->regs->fminterval),
 634                         ohci_readl (ohci, &ohci->regs->periodicstart));
 635                 return -EOVERFLOW;
 636         }
 637
 638         /* use rhsc irqs after hub_wq is allocated */
 639         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 640         hcd->uses_new_polling = 1;
 641
 642         /* start controller operations */
 643         ohci->hc_control &= OHCI_CTRL_RWC;
 644         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 645         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 646         ohci->rh_state = OHCI_RH_RUNNING;
 647
 648         /* wake on ConnectStatusChange, matching external hubs */
 649         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 650
 651         /* Choose the interrupts we care about now, others later on demand */
 652         mask = OHCI_INTR_INIT;
 653         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 654         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 655
 656         /* handle root hub init quirks ... */
 657         val = roothub_a (ohci);
 658         val &= ~(RH_A_PSM | RH_A_OCPM);
 659         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 660                 /* NSC 87560 and maybe others */
 661                 val |= RH_A_NOCP;
 662                 val &= ~(RH_A_POTPGT | RH_A_NPS);
 663                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 664         } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 665                         (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 666                 /* hub power always on; required for AMD-756 and some
 667                  * Mac platforms.  ganged overcurrent reporting, if any.
 668                  */
 669                 val |= RH_A_NPS;
 670                 ohci_writel (ohci, val, &ohci->regs->roothub.a);
 671         }
 672         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 673         ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 674                                                 &ohci->regs->roothub.b);
 675         // flush those writes
 676         (void) ohci_readl (ohci, &ohci->regs->control);
 677
 678         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 679         spin_unlock_irq (&ohci->lock);
 680
 681         // POTPGT delay is bits 24-31, in 2 ms units.
 682         mdelay ((val >> 23) & 0x1fe);
 683
 684         ohci_dump(ohci);
 685
 686         return 0;
 687 }
 688
 689 /* ohci_setup routine for generic controller initialization */
 690
 691 int ohci_setup(struct usb_hcd *hcd)
 692 {
 693         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 694
 695         ohci_hcd_init(ohci);
 696
 697         return ohci_init(ohci);
 698 }
 699 EXPORT_SYMBOL_GPL(ohci_setup);
 700
 701 /* ohci_start routine for generic controller start of all OHCI bus glue */
 702 static int ohci_start(struct usb_hcd *hcd)
 703 {
 704         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 705         int     ret;
 706
 707         ret = ohci_run(ohci);
 708         if (ret < 0) {
 709                 ohci_err(ohci, "can't start\n");
 710                 ohci_stop(hcd);
 711         }
 712         return ret;
 713 }
 714
 715 /*-------------------------------------------------------------------------*/
 716
 717 /*
 718  * Some OHCI controllers are known to lose track of completed TDs.  They
 719  * don't add the TDs to the hardware done queue, which means we never see
 720  * them as being completed.
 721  *
 722  * This watchdog routine checks for such problems.  Without some way to
 723  * tell when those TDs have completed, we would never take their EDs off
 724  * the unlink list.  As a result, URBs could never be dequeued and
 725  * endpoints could never be released.
 726  */
 727 static void io_watchdog_func(struct timer_list *t)
 728 {
 729         struct ohci_hcd *ohci = from_timer(ohci, t, io_watchdog);
 730         bool            takeback_all_pending = false;
 731         u32             status;
 732         u32             head;
 733         struct ed       *ed;
 734         struct td       *td, *td_start, *td_next;
 735         unsigned        frame_no, prev_frame_no = IO_WATCHDOG_OFF;
 736         unsigned long   flags;
 737
 738         spin_lock_irqsave(&ohci->lock, flags);
 739
 740         /*
 741          * One way to lose track of completed TDs is if the controller
 742          * never writes back the done queue head.  If it hasn't been
 743          * written back since the last time this function ran and if it
 744          * was non-empty at that time, something is badly wrong with the
 745          * hardware.
 746          */
 747         status = ohci_readl(ohci, &ohci->regs->intrstatus);
 748         if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 749                 if (ohci->prev_donehead) {
 750                         ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 751  died:
 752                         usb_hc_died(ohci_to_hcd(ohci));
 753                         ohci_dump(ohci);
 754                         ohci_shutdown(ohci_to_hcd(ohci));
 755                         goto done;
 756                 } else {
 757                         /* No write back because the done queue was empty */
 758                         takeback_all_pending = true;
 759                 }
 760         }
 761
 762         /* Check every ED which might have pending TDs */
 763         list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 764                 if (ed->pending_td) {
 765                         if (takeback_all_pending ||
 766                                         OKAY_TO_TAKEBACK(ohci, ed)) {
 767                                 unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 768
 769                                 ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 770                                                 0x007f & tmp,
 771                                                 (0x000f & (tmp >> 7)) +
 772                                                         ((tmp & ED_IN) >> 5));
 773                                 add_to_done_list(ohci, ed->pending_td);
 774                         }
 775                 }
 776
 777                 /* Starting from the latest pending TD, */
 778                 td = ed->pending_td;
 779
 780                 /* or the last TD on the done list, */
 781                 if (!td) {
 782                         list_for_each_entry(td_next, &ed->td_list, td_list) {
 783                                 if (!td_next->next_dl_td)
 784                                         break;
 785                                 td = td_next;
 786                         }
 787                 }
 788
 789                 /* find the last TD processed by the controller. */
 790                 head = hc32_to_cpu(ohci, READ_ONCE(ed->hwHeadP)) & TD_MASK;
 791                 td_start = td;
 792                 td_next = list_prepare_entry(td, &ed->td_list, td_list);
 793                 list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 794                         if (head == (u32) td_next->td_dma)
 795                                 break;
 796                         td = td_next;   /* head pointer has passed this TD */
 797                 }
 798                 if (td != td_start) {
 799                         /*
 800                          * In case a WDH cycle is in progress, we will wait
 801                          * for the next two cycles to complete before assuming
 802                          * this TD will never get on the done queue.
 803                          */
 804                         ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 805                         ed->pending_td = td;
 806                 }
 807         }
 808
 809         ohci_work(ohci);
 810
 811         if (ohci->rh_state == OHCI_RH_RUNNING) {
 812
 813                 /*
 814                  * Sometimes a controller just stops working.  We can tell
 815                  * by checking that the frame counter has advanced since
 816                  * the last time we ran.
 817                  *
 818                  * But be careful: Some controllers violate the spec by
 819                  * stopping their frame counter when no ports are active.
 820                  */
 821                 frame_no = ohci_frame_no(ohci);
 822                 if (frame_no == ohci->prev_frame_no) {
 823                         int             active_cnt = 0;
 824                         int             i;
 825                         unsigned        tmp;
 826
 827                         for (i = 0; i < ohci->num_ports; ++i) {
 828                                 tmp = roothub_portstatus(ohci, i);
 829                                 /* Enabled and not suspended? */
 830                                 if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 831                                         ++active_cnt;
 832                         }
 833
 834                         if (active_cnt > 0) {
 835                                 ohci_err(ohci, "frame counter not updating; disabled\n");
 836                                 goto died;
 837                         }
 838                 }
 839                 if (!list_empty(&ohci->eds_in_use)) {
 840                         prev_frame_no = frame_no;
 841                         ohci->prev_wdh_cnt = ohci->wdh_cnt;
 842                         ohci->prev_donehead = ohci_readl(ohci,
 843                                         &ohci->regs->donehead);
 844                         mod_timer(&ohci->io_watchdog,
 845                                         jiffies + IO_WATCHDOG_DELAY);
 846                 }
 847         }
 848
 849  done:
 850         ohci->prev_frame_no = prev_frame_no;
 851         spin_unlock_irqrestore(&ohci->lock, flags);
 852 }
 853
 854 /* an interrupt happens */
 855
 856 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 857 {
 858         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 859         struct ohci_regs __iomem *regs = ohci->regs;
 860         int                     ints;
 861
 862         /* Read interrupt status (and flush pending writes).  We ignore the
 863          * optimization of checking the LSB of hcca->done_head; it doesn't
 864          * work on all systems (edge triggering for OHCI can be a factor).
 865          */
 866         ints = ohci_readl(ohci, &regs->intrstatus);
 867
 868         /* Check for an all 1's result which is a typical consequence
 869          * of dead, unclocked, or unplugged (CardBus...) devices
 870          */
 871         if (ints == ~(u32)0) {
 872                 ohci->rh_state = OHCI_RH_HALTED;
 873                 ohci_dbg (ohci, "device removed!\n");
 874                 usb_hc_died(hcd);
 875                 return IRQ_HANDLED;
 876         }
 877
 878         /* We only care about interrupts that are enabled */
 879         ints &= ohci_readl(ohci, &regs->intrenable);
 880
 881         /* interrupt for some other device? */
 882         if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 883                 return IRQ_NOTMINE;
 884
 885         if (ints & OHCI_INTR_UE) {
 886                 // e.g. due to PCI Master/Target Abort
 887                 if (quirk_nec(ohci)) {
 888                         /* Workaround for a silicon bug in some NEC chips used
 889                          * in Apple's PowerBooks. Adapted from Darwin code.
 890                          */
 891                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 892
 893                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 894
 895                         schedule_work (&ohci->nec_work);
 896                 } else {
 897                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 898                         ohci->rh_state = OHCI_RH_HALTED;
 899                         usb_hc_died(hcd);
 900                 }
 901
 902                 ohci_dump(ohci);
 903                 ohci_usb_reset (ohci);
 904         }
 905
 906         if (ints & OHCI_INTR_RHSC) {
 907                 ohci_dbg(ohci, "rhsc\n");
 908                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 909                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 910                                 &regs->intrstatus);
 911
 912                 /* NOTE: Vendors didn't always make the same implementation
 913                  * choices for RHSC.  Many followed the spec; RHSC triggers
 914                  * on an edge, like setting and maybe clearing a port status
 915                  * change bit.  With others it's level-triggered, active
 916                  * until hub_wq clears all the port status change bits.  We'll
 917                  * always disable it here and rely on polling until hub_wq
 918                  * re-enables it.
 919                  */
 920                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 921                 usb_hcd_poll_rh_status(hcd);
 922         }
 923
 924         /* For connect and disconnect events, we expect the controller
 925          * to turn on RHSC along with RD.  But for remote wakeup events
 926          * this might not happen.
 927          */
 928         else if (ints & OHCI_INTR_RD) {
 929                 ohci_dbg(ohci, "resume detect\n");
 930                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 931                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 932                 if (ohci->autostop) {
 933                         spin_lock (&ohci->lock);
 934                         ohci_rh_resume (ohci);
 935                         spin_unlock (&ohci->lock);
 936                 } else
 937                         usb_hcd_resume_root_hub(hcd);
 938         }
 939
 940         spin_lock(&ohci->lock);
 941         if (ints & OHCI_INTR_WDH)
 942                 update_done_list(ohci);
 943
 944         /* could track INTR_SO to reduce available PCI/... bandwidth */
 945
 946         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 947          * when there's still unlinking to be done (next frame).
 948          */
 949         ohci_work(ohci);
 950         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 951                         && ohci->rh_state == OHCI_RH_RUNNING)
 952                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 953
 954         if (ohci->rh_state == OHCI_RH_RUNNING) {
 955                 ohci_writel (ohci, ints, &regs->intrstatus);
 956                 if (ints & OHCI_INTR_WDH)
 957                         ++ohci->wdh_cnt;
 958
 959                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 960                 // flush those writes
 961                 (void) ohci_readl (ohci, &ohci->regs->control);
 962         }
 963         spin_unlock(&ohci->lock);
 964
 965         return IRQ_HANDLED;
 966 }
 967
 968 /*-------------------------------------------------------------------------*/
 969
 970 static void ohci_stop (struct usb_hcd *hcd)
 971 {
 972         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 973
 974         ohci_dump(ohci);
 975
 976         if (quirk_nec(ohci))
 977                 flush_work(&ohci->nec_work);
 978         del_timer_sync(&ohci->io_watchdog);
 979         ohci->prev_frame_no = IO_WATCHDOG_OFF;
 980
 981         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 982         ohci_usb_reset(ohci);
 983         free_irq(hcd->irq, hcd);
 984         hcd->irq = 0;
 985
 986         if (quirk_amdiso(ohci))
 987                 usb_amd_dev_put();
 988
 989         remove_debug_files (ohci);
 990         ohci_mem_cleanup (ohci);
 991         if (ohci->hcca) {
 992                 dma_free_coherent (hcd->self.controller,
 993                                 sizeof *ohci->hcca,
 994                                 ohci->hcca, ohci->hcca_dma);
 995                 ohci->hcca = NULL;
 996                 ohci->hcca_dma = 0;
 997         }
 998 }
 999
1000 /*-------------------------------------------------------------------------*/
1001
1002 #if defined(CONFIG_PM) || defined(CONFIG_USB_PCI)
1003
1004 /* must not be called from interrupt context */
1005 int ohci_restart(struct ohci_hcd *ohci)
1006 {
1007         int temp;
1008         int i;
1009         struct urb_priv *priv;
1010
1011         ohci_init(ohci);
1012         spin_lock_irq(&ohci->lock);
1013         ohci->rh_state = OHCI_RH_HALTED;
1014
1015         /* Recycle any "live" eds/tds (and urbs). */
1016         if (!list_empty (&ohci->pending))
1017                 ohci_dbg(ohci, "abort schedule...\n");
1018         list_for_each_entry (priv, &ohci->pending, pending) {
1019                 struct urb      *urb = priv->td[0]->urb;
1020                 struct ed       *ed = priv->ed;
1021
1022                 switch (ed->state) {
1023                 case ED_OPER:
1024                         ed->state = ED_UNLINK;
1025                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1026                         ed_deschedule (ohci, ed);
1027
1028                         ed->ed_next = ohci->ed_rm_list;
1029                         ed->ed_prev = NULL;
1030                         ohci->ed_rm_list = ed;
1031                         /* FALLTHROUGH */
1032                 case ED_UNLINK:
1033                         break;
1034                 default:
1035                         ohci_dbg(ohci, "bogus ed %p state %d\n",
1036                                         ed, ed->state);
1037                 }
1038
1039                 if (!urb->unlinked)
1040                         urb->unlinked = -ESHUTDOWN;
1041         }
1042         ohci_work(ohci);
1043         spin_unlock_irq(&ohci->lock);
1044
1045         /* paranoia, in case that didn't work: */
1046
1047         /* empty the interrupt branches */
1048         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1049         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1050
1051         /* no EDs to remove */
1052         ohci->ed_rm_list = NULL;
1053
1054         /* empty control and bulk lists */
1055         ohci->ed_controltail = NULL;
1056         ohci->ed_bulktail    = NULL;
1057
1058         if ((temp = ohci_run (ohci)) < 0) {
1059                 ohci_err (ohci, "can't restart, %d\n", temp);
1060                 return temp;
1061         }
1062         ohci_dbg(ohci, "restart complete\n");
1063         return 0;
1064 }
1065 EXPORT_SYMBOL_GPL(ohci_restart);
1066
1067 #endif
1068
1069 #ifdef CONFIG_PM
1070
1071 int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1072 {
1073         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1074         unsigned long   flags;
1075         int             rc = 0;
1076
1077         /* Disable irq emission and mark HW unaccessible. Use
1078          * the spinlock to properly synchronize with possible pending
1079          * RH suspend or resume activity.
1080          */
1081         spin_lock_irqsave (&ohci->lock, flags);
1082         ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1083         (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1084
1085         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1086         spin_unlock_irqrestore (&ohci->lock, flags);
1087
1088         synchronize_irq(hcd->irq);
1089
1090         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1091                 ohci_resume(hcd, false);
1092                 rc = -EBUSY;
1093         }
1094         return rc;
1095 }
1096 EXPORT_SYMBOL_GPL(ohci_suspend);
1097
1098
1099 int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1100 {
1101         struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1102         int                     port;
1103         bool                    need_reinit = false;
1104
1105         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1106
1107         /* Make sure resume from hibernation re-enumerates everything */
1108         if (hibernated)
1109                 ohci_usb_reset(ohci);
1110
1111         /* See if the controller is already running or has been reset */
1112         ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1113         if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1114                 need_reinit = true;
1115         } else {
1116                 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1117                 case OHCI_USB_OPER:
1118                 case OHCI_USB_RESET:
1119                         need_reinit = true;
1120                 }
1121         }
1122
1123         /* If needed, reinitialize and suspend the root hub */
1124         if (need_reinit) {
1125                 spin_lock_irq(&ohci->lock);
1126                 ohci_rh_resume(ohci);
1127                 ohci_rh_suspend(ohci, 0);
1128                 spin_unlock_irq(&ohci->lock);
1129         }
1130
1131         /* Normally just turn on port power and enable interrupts */
1132         else {
1133                 ohci_dbg(ohci, "powerup ports\n");
1134                 for (port = 0; port < ohci->num_ports; port++)
1135                         ohci_writel(ohci, RH_PS_PPS,
1136                                         &ohci->regs->roothub.portstatus[port]);
1137
1138                 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1139                 ohci_readl(ohci, &ohci->regs->intrenable);
1140                 msleep(20);
1141         }
1142
1143         usb_hcd_resume_root_hub(hcd);
1144
1145         return 0;
1146 }
1147 EXPORT_SYMBOL_GPL(ohci_resume);
1148
1149 #endif
1150
1151 /*-------------------------------------------------------------------------*/
1152
1153 /*
1154  * Generic structure: This gets copied for platform drivers so that
1155  * individual entries can be overridden as needed.
1156  */
1157
1158 static const struct hc_driver ohci_hc_driver = {
1159         .description =          hcd_name,
1160         .product_desc =         "OHCI Host Controller",
1161         .hcd_priv_size =        sizeof(struct ohci_hcd),
1162
1163         /*
1164          * generic hardware linkage
1165         */
1166         .irq =                  ohci_irq,
1167         .flags =                HCD_MEMORY | HCD_USB11,
1168
1169         /*
1170         * basic lifecycle operations
1171         */
1172         .reset =                ohci_setup,
1173         .start =                ohci_start,
1174         .stop =                 ohci_stop,
1175         .shutdown =             ohci_shutdown,
1176
1177         /*
1178          * managing i/o requests and associated device resources
1179         */
1180         .urb_enqueue =          ohci_urb_enqueue,
1181         .urb_dequeue =          ohci_urb_dequeue,
1182         .endpoint_disable =     ohci_endpoint_disable,
1183
1184         /*
1185         * scheduling support
1186         */
1187         .get_frame_number =     ohci_get_frame,
1188
1189         /*
1190         * root hub support
1191         */
1192         .hub_status_data =      ohci_hub_status_data,
1193         .hub_control =          ohci_hub_control,
1194 #ifdef CONFIG_PM
1195         .bus_suspend =          ohci_bus_suspend,
1196         .bus_resume =           ohci_bus_resume,
1197 #endif
1198         .start_port_reset =     ohci_start_port_reset,
1199 };
1200
1201 void ohci_init_driver(struct hc_driver *drv,
1202                 const struct ohci_driver_overrides *over)
1203 {
1204         /* Copy the generic table to drv and then apply the overrides */
1205         *drv = ohci_hc_driver;
1206
1207         if (over) {
1208                 drv->product_desc = over->product_desc;
1209                 drv->hcd_priv_size += over->extra_priv_size;
1210                 if (over->reset)
1211                         drv->reset = over->reset;
1212         }
1213 }
1214 EXPORT_SYMBOL_GPL(ohci_init_driver);
1215
1216 /*-------------------------------------------------------------------------*/
1217
1218 MODULE_AUTHOR (DRIVER_AUTHOR);
1219 MODULE_DESCRIPTION(DRIVER_DESC);
1220 MODULE_LICENSE ("GPL");
1221
1222 #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1223 #include "ohci-sa1111.c"
1224 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
1225 #endif
1226
1227 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1228 #include "ohci-ppc-of.c"
1229 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1230 #endif
1231
1232 #ifdef CONFIG_PPC_PS3
1233 #include "ohci-ps3.c"
1234 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1235 #endif
1236
1237 #ifdef CONFIG_MFD_SM501
1238 #include "ohci-sm501.c"
1239 #define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1240 #endif
1241
1242 #ifdef CONFIG_MFD_TC6393XB
1243 #include "ohci-tmio.c"
1244 #define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1245 #endif
1246
1247 #ifdef CONFIG_TILE_USB
1248 #include "ohci-tilegx.c"
1249 #define PLATFORM_DRIVER         ohci_hcd_tilegx_driver
1250 #endif
1251
1252 static int __init ohci_hcd_mod_init(void)
1253 {
1254         int retval = 0;
1255
1256         if (usb_disabled())
1257                 return -ENODEV;
1258
1259         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1260         pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1261                 sizeof (struct ed), sizeof (struct td));
1262         set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1263
1264         ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1265         if (!ohci_debug_root) {
1266                 retval = -ENOENT;
1267                 goto error_debug;
1268         }
1269
1270 #ifdef PS3_SYSTEM_BUS_DRIVER
1271         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1272         if (retval < 0)
1273                 goto error_ps3;
1274 #endif
1275
1276 #ifdef PLATFORM_DRIVER
1277         retval = platform_driver_register(&PLATFORM_DRIVER);
1278         if (retval < 0)
1279                 goto error_platform;
1280 #endif
1281
1282 #ifdef OF_PLATFORM_DRIVER
1283         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1284         if (retval < 0)
1285                 goto error_of_platform;
1286 #endif
1287
1288 #ifdef SA1111_DRIVER
1289         retval = sa1111_driver_register(&SA1111_DRIVER);
1290         if (retval < 0)
1291                 goto error_sa1111;
1292 #endif
1293
1294 #ifdef SM501_OHCI_DRIVER
1295         retval = platform_driver_register(&SM501_OHCI_DRIVER);
1296         if (retval < 0)
1297                 goto error_sm501;
1298 #endif
1299
1300 #ifdef TMIO_OHCI_DRIVER
1301         retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1302         if (retval < 0)
1303                 goto error_tmio;
1304 #endif
1305
1306         return retval;
1307
1308         /* Error path */
1309 #ifdef TMIO_OHCI_DRIVER
1310         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1311  error_tmio:
1312 #endif
1313 #ifdef SM501_OHCI_DRIVER
1314         platform_driver_unregister(&SM501_OHCI_DRIVER);
1315  error_sm501:
1316 #endif
1317 #ifdef SA1111_DRIVER
1318         sa1111_driver_unregister(&SA1111_DRIVER);
1319  error_sa1111:
1320 #endif
1321 #ifdef OF_PLATFORM_DRIVER
1322         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1323  error_of_platform:
1324 #endif
1325 #ifdef PLATFORM_DRIVER
1326         platform_driver_unregister(&PLATFORM_DRIVER);
1327  error_platform:
1328 #endif
1329 #ifdef PS3_SYSTEM_BUS_DRIVER
1330         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1331  error_ps3:
1332 #endif
1333         debugfs_remove(ohci_debug_root);
1334         ohci_debug_root = NULL;
1335  error_debug:
1336
1337         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1338         return retval;
1339 }
1340 module_init(ohci_hcd_mod_init);
1341
1342 static void __exit ohci_hcd_mod_exit(void)
1343 {
1344 #ifdef TMIO_OHCI_DRIVER
1345         platform_driver_unregister(&TMIO_OHCI_DRIVER);
1346 #endif
1347 #ifdef SM501_OHCI_DRIVER
1348         platform_driver_unregister(&SM501_OHCI_DRIVER);
1349 #endif
1350 #ifdef SA1111_DRIVER
1351         sa1111_driver_unregister(&SA1111_DRIVER);
1352 #endif
1353 #ifdef OF_PLATFORM_DRIVER
1354         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1355 #endif
1356 #ifdef PLATFORM_DRIVER
1357         platform_driver_unregister(&PLATFORM_DRIVER);
1358 #endif
1359 #ifdef PS3_SYSTEM_BUS_DRIVER
1360         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1361 #endif
1362         debugfs_remove(ohci_debug_root);
1363         clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1364 }
1365 module_exit(ohci_hcd_mod_exit);
1366