2 * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2009 - 2013 NVIDIA Corporation
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/clk.h>
20 #include <linux/clk/tegra.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/err.h>
23 #include <linux/gpio.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
28 #include <linux/of_gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/platform_data/tegra_usb.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/slab.h>
33 #include <linux/usb/ehci_def.h>
34 #include <linux/usb/tegra_usb_phy.h>
35 #include <linux/usb.h>
36 #include <linux/usb/hcd.h>
37 #include <linux/usb/otg.h>
41 #define TEGRA_USB_BASE 0xC5000000
42 #define TEGRA_USB2_BASE 0xC5004000
43 #define TEGRA_USB3_BASE 0xC5008000
45 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
47 #define TEGRA_USB_DMA_ALIGN 32
49 #define DRIVER_DESC "Tegra EHCI driver"
50 #define DRV_NAME "tegra-ehci"
52 static struct hc_driver __read_mostly tegra_ehci_hc_driver;
54 static int (*orig_hub_control)(struct usb_hcd *hcd,
55 u16 typeReq, u16 wValue, u16 wIndex,
56 char *buf, u16 wLength);
58 struct tegra_ehci_hcd {
59 struct ehci_hcd *ehci;
60 struct tegra_usb_phy *phy;
62 struct usb_phy *transceiver;
64 bool needs_double_reset;
65 enum tegra_usb_phy_port_speed port_speed;
68 static int tegra_ehci_internal_port_reset(
69 struct ehci_hcd *ehci,
70 u32 __iomem *portsc_reg
79 spin_lock_irqsave(&ehci->lock, flags);
80 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
81 /* disable USB interrupt */
82 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
83 spin_unlock_irqrestore(&ehci->lock, flags);
86 * Here we have to do Port Reset at most twice for
87 * Port Enable bit to be set.
89 for (i = 0; i < 2; i++) {
90 temp = ehci_readl(ehci, portsc_reg);
92 ehci_writel(ehci, temp, portsc_reg);
95 ehci_writel(ehci, temp, portsc_reg);
101 * Up to this point, Port Enable bit is
102 * expected to be set after 2 ms waiting.
103 * USB1 usually takes extra 45 ms, for safety,
104 * we take 100 ms as timeout.
106 temp = ehci_readl(ehci, portsc_reg);
107 } while (!(temp & PORT_PE) && tries--);
115 * Clear Connect Status Change bit if it's set.
116 * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
119 ehci_writel(ehci, PORT_CSC, portsc_reg);
122 * Write to clear any interrupt status bits that might be set
125 temp = ehci_readl(ehci, &ehci->regs->status);
126 ehci_writel(ehci, temp, &ehci->regs->status);
128 /* restore original interrupt enable bits */
129 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
133 static int tegra_ehci_hub_control(
142 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
143 struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
144 u32 __iomem *status_reg;
149 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
151 spin_lock_irqsave(&ehci->lock, flags);
153 if (typeReq == GetPortStatus) {
154 temp = ehci_readl(ehci, status_reg);
155 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
156 /* Resume completed, re-enable disconnect detection */
157 tegra->port_resuming = 0;
158 tegra_usb_phy_postresume(hcd->phy);
162 else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
163 temp = ehci_readl(ehci, status_reg);
164 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
169 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
170 temp |= PORT_WKDISC_E | PORT_WKOC_E;
171 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
174 * If a transaction is in progress, there may be a delay in
175 * suspending the port. Poll until the port is suspended.
177 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
179 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
181 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
185 /* For USB1 port we need to issue Port Reset twice internally */
186 if (tegra->needs_double_reset &&
187 (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
188 spin_unlock_irqrestore(&ehci->lock, flags);
189 return tegra_ehci_internal_port_reset(ehci, status_reg);
193 * Tegra host controller will time the resume operation to clear the bit
194 * when the port control state switches to HS or FS Idle. This behavior
195 * is different from EHCI where the host controller driver is required
196 * to set this bit to a zero after the resume duration is timed in the
199 else if (typeReq == ClearPortFeature &&
200 wValue == USB_PORT_FEAT_SUSPEND) {
201 temp = ehci_readl(ehci, status_reg);
202 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
207 if (!(temp & PORT_SUSPEND))
210 /* Disable disconnect detection during port resume */
211 tegra_usb_phy_preresume(hcd->phy);
213 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
215 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
216 /* start resume signalling */
217 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
218 set_bit(wIndex-1, &ehci->resuming_ports);
220 spin_unlock_irqrestore(&ehci->lock, flags);
222 spin_lock_irqsave(&ehci->lock, flags);
224 /* Poll until the controller clears RESUME and SUSPEND */
225 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
226 pr_err("%s: timeout waiting for RESUME\n", __func__);
227 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
228 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
230 ehci->reset_done[wIndex-1] = 0;
231 clear_bit(wIndex-1, &ehci->resuming_ports);
233 tegra->port_resuming = 1;
237 spin_unlock_irqrestore(&ehci->lock, flags);
239 /* Handle the hub control events here */
240 return orig_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
243 spin_unlock_irqrestore(&ehci->lock, flags);
247 struct dma_aligned_buffer {
249 void *old_xfer_buffer;
253 static void free_dma_aligned_buffer(struct urb *urb)
255 struct dma_aligned_buffer *temp;
257 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
260 temp = container_of(urb->transfer_buffer,
261 struct dma_aligned_buffer, data);
263 if (usb_urb_dir_in(urb))
264 memcpy(temp->old_xfer_buffer, temp->data,
265 urb->transfer_buffer_length);
266 urb->transfer_buffer = temp->old_xfer_buffer;
267 kfree(temp->kmalloc_ptr);
269 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
272 static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
274 struct dma_aligned_buffer *temp, *kmalloc_ptr;
277 if (urb->num_sgs || urb->sg ||
278 urb->transfer_buffer_length == 0 ||
279 !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
282 /* Allocate a buffer with enough padding for alignment */
283 kmalloc_size = urb->transfer_buffer_length +
284 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
286 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
290 /* Position our struct dma_aligned_buffer such that data is aligned */
291 temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
292 temp->kmalloc_ptr = kmalloc_ptr;
293 temp->old_xfer_buffer = urb->transfer_buffer;
294 if (usb_urb_dir_out(urb))
295 memcpy(temp->data, urb->transfer_buffer,
296 urb->transfer_buffer_length);
297 urb->transfer_buffer = temp->data;
299 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
304 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
309 ret = alloc_dma_aligned_buffer(urb, mem_flags);
313 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
315 free_dma_aligned_buffer(urb);
320 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
322 usb_hcd_unmap_urb_for_dma(hcd, urb);
323 free_dma_aligned_buffer(urb);
326 static int setup_vbus_gpio(struct platform_device *pdev,
327 struct tegra_ehci_platform_data *pdata)
332 gpio = pdata->vbus_gpio;
333 if (!gpio_is_valid(gpio))
334 gpio = of_get_named_gpio(pdev->dev.of_node,
335 "nvidia,vbus-gpio", 0);
336 if (!gpio_is_valid(gpio))
339 err = gpio_request(gpio, "vbus_gpio");
341 dev_err(&pdev->dev, "can't request vbus gpio %d", gpio);
344 err = gpio_direction_output(gpio, 1);
346 dev_err(&pdev->dev, "can't enable vbus\n");
353 static int tegra_ehci_probe(struct platform_device *pdev)
355 struct resource *res;
357 struct tegra_ehci_hcd *tegra;
358 struct tegra_ehci_platform_data *pdata;
361 struct device_node *np_phy;
362 struct usb_phy *u_phy;
364 pdata = pdev->dev.platform_data;
366 dev_err(&pdev->dev, "Platform data missing\n");
370 /* Right now device-tree probed devices don't get dma_mask set.
371 * Since shared usb code relies on it, set it here for now.
372 * Once we have dma capability bindings this can go away.
374 if (!pdev->dev.dma_mask)
375 pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
376 if (!pdev->dev.coherent_dma_mask)
377 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
379 setup_vbus_gpio(pdev, pdata);
381 tegra = devm_kzalloc(&pdev->dev, sizeof(struct tegra_ehci_hcd),
386 tegra->clk = devm_clk_get(&pdev->dev, NULL);
387 if (IS_ERR(tegra->clk)) {
388 dev_err(&pdev->dev, "Can't get ehci clock\n");
389 return PTR_ERR(tegra->clk);
392 err = clk_prepare_enable(tegra->clk);
396 tegra_periph_reset_assert(tegra->clk);
398 tegra_periph_reset_deassert(tegra->clk);
400 np_phy = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
406 u_phy = tegra_usb_get_phy(np_phy);
408 err = PTR_ERR(u_phy);
412 tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
413 "nvidia,needs-double-reset");
415 hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
416 dev_name(&pdev->dev));
418 dev_err(&pdev->dev, "Unable to create HCD\n");
422 tegra->ehci = hcd_to_ehci(hcd);
427 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
429 dev_err(&pdev->dev, "Failed to get I/O memory\n");
431 goto cleanup_hcd_create;
433 hcd->rsrc_start = res->start;
434 hcd->rsrc_len = resource_size(res);
435 hcd->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
437 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
439 goto cleanup_hcd_create;
441 tegra->ehci->caps = hcd->regs + 0x100;
443 err = usb_phy_init(hcd->phy);
445 dev_err(&pdev->dev, "Failed to initialize phy\n");
446 goto cleanup_hcd_create;
449 u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
452 dev_err(&pdev->dev, "Failed to alloc memory for otg\n");
456 u_phy->otg->host = hcd_to_bus(hcd);
458 err = usb_phy_set_suspend(hcd->phy, 0);
460 dev_err(&pdev->dev, "Failed to power on the phy\n");
464 irq = platform_get_irq(pdev, 0);
466 dev_err(&pdev->dev, "Failed to get IRQ\n");
471 if (pdata->operating_mode == TEGRA_USB_OTG) {
473 devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
474 if (!IS_ERR(tegra->transceiver))
475 otg_set_host(tegra->transceiver->otg, &hcd->self);
477 tegra->transceiver = ERR_PTR(-ENODEV);
480 platform_set_drvdata(pdev, tegra);
482 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
484 dev_err(&pdev->dev, "Failed to add USB HCD\n");
491 if (!IS_ERR(tegra->transceiver))
492 otg_set_host(tegra->transceiver->otg, NULL);
494 usb_phy_shutdown(hcd->phy);
498 clk_disable_unprepare(tegra->clk);
502 static int tegra_ehci_remove(struct platform_device *pdev)
504 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
505 struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
507 if (!IS_ERR(tegra->transceiver))
508 otg_set_host(tegra->transceiver->otg, NULL);
510 usb_phy_shutdown(hcd->phy);
514 clk_disable_unprepare(tegra->clk);
519 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
521 struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
522 struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
524 if (hcd->driver->shutdown)
525 hcd->driver->shutdown(hcd);
528 static struct of_device_id tegra_ehci_of_match[] = {
529 { .compatible = "nvidia,tegra20-ehci", },
533 static struct platform_driver tegra_ehci_driver = {
534 .probe = tegra_ehci_probe,
535 .remove = tegra_ehci_remove,
536 .shutdown = tegra_ehci_hcd_shutdown,
539 .of_match_table = tegra_ehci_of_match,
543 static const struct ehci_driver_overrides tegra_overrides __initconst = {
544 .extra_priv_size = sizeof(struct tegra_ehci_hcd),
547 static int __init ehci_tegra_init(void)
552 pr_info(DRV_NAME ": " DRIVER_DESC "\n");
554 ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
557 * The Tegra HW has some unusual quirks, which require Tegra-specific
558 * workarounds. We override certain hc_driver functions here to
559 * achieve that. We explicitly do not enhance ehci_driver_overrides to
560 * allow this more easily, since this is an unusual case, and we don't
561 * want to encourage others to override these functions by making it
565 orig_hub_control = tegra_ehci_hc_driver.hub_control;
567 tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
568 tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
569 tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
571 return platform_driver_register(&tegra_ehci_driver);
573 module_init(ehci_tegra_init);
575 static void __exit ehci_tegra_cleanup(void)
577 platform_driver_unregister(&tegra_ehci_driver);
579 module_exit(ehci_tegra_cleanup);
581 MODULE_DESCRIPTION(DRIVER_DESC);
582 MODULE_LICENSE("GPL");
583 MODULE_ALIAS("platform:" DRV_NAME);
584 MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);