1 // SPDX-License-Identifier: GPL-2.0+
3 * Enhanced Host Controller Interface (EHCI) driver for USB.
5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
7 * Copyright (c) 2000-2004 by David Brownell
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/dmapool.h>
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/ioport.h>
16 #include <linux/sched.h>
17 #include <linux/vmalloc.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/hrtimer.h>
21 #include <linux/list.h>
22 #include <linux/interrupt.h>
23 #include <linux/usb.h>
24 #include <linux/usb/hcd.h>
25 #include <linux/usb/otg.h>
26 #include <linux/moduleparam.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/debugfs.h>
29 #include <linux/slab.h>
31 #include <asm/byteorder.h>
34 #include <asm/unaligned.h>
36 #if defined(CONFIG_PPC_PS3)
37 #include <asm/firmware.h>
40 /*-------------------------------------------------------------------------*/
43 * EHCI hc_driver implementation ... experimental, incomplete.
44 * Based on the final 1.0 register interface specification.
46 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
47 * First was PCMCIA, like ISA; then CardBus, which is PCI.
48 * Next comes "CardBay", using USB 2.0 signals.
50 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
51 * Special thanks to Intel and VIA for providing host controllers to
52 * test this driver on, and Cypress (including In-System Design) for
53 * providing early devices for those host controllers to talk to!
56 #define DRIVER_AUTHOR "David Brownell"
57 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
59 static const char hcd_name [] = "ehci_hcd";
64 /* magic numbers that can affect system performance */
65 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
66 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
67 #define EHCI_TUNE_RL_TT 0
68 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
69 #define EHCI_TUNE_MULT_TT 1
71 * Some drivers think it's safe to schedule isochronous transfers more than
72 * 256 ms into the future (partly as a result of an old bug in the scheduling
73 * code). In an attempt to avoid trouble, we will use a minimum scheduling
74 * length of 512 frames instead of 256.
76 #define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
78 /* Initial IRQ latency: faster than hw default */
79 static int log2_irq_thresh; // 0 to 6
80 module_param (log2_irq_thresh, int, S_IRUGO);
81 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
83 /* initial park setting: slower than hw default */
85 module_param (park, uint, S_IRUGO);
86 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
88 /* for flakey hardware, ignore overcurrent indicators */
89 static bool ignore_oc;
90 module_param (ignore_oc, bool, S_IRUGO);
91 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
93 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
95 /*-------------------------------------------------------------------------*/
98 #include "pci-quirks.h"
100 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
104 * The MosChip MCS9990 controller updates its microframe counter
105 * a little before the frame counter, and occasionally we will read
106 * the invalid intermediate value. Avoid problems by checking the
107 * microframe number (the low-order 3 bits); if they are 0 then
108 * re-read the register to get the correct value.
110 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
114 uf = ehci_readl(ehci, &ehci->regs->frame_index);
115 if (unlikely((uf & 7) == 0))
116 uf = ehci_readl(ehci, &ehci->regs->frame_index);
120 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
122 if (ehci->frame_index_bug)
123 return ehci_moschip_read_frame_index(ehci);
124 return ehci_readl(ehci, &ehci->regs->frame_index);
127 #include "ehci-dbg.c"
129 /*-------------------------------------------------------------------------*/
132 * ehci_handshake - spin reading hc until handshake completes or fails
133 * @ptr: address of hc register to be read
134 * @mask: bits to look at in result of read
135 * @done: value of those bits when handshake succeeds
136 * @usec: timeout in microseconds
138 * Returns negative errno, or zero on success
140 * Success happens when the "mask" bits have the specified value (hardware
141 * handshake done). There are two failure modes: "usec" have passed (major
142 * hardware flakeout), or the register reads as all-ones (hardware removed).
144 * That last failure should_only happen in cases like physical cardbus eject
145 * before driver shutdown. But it also seems to be caused by bugs in cardbus
146 * bridge shutdown: shutting down the bridge before the devices using it.
148 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
149 u32 mask, u32 done, int usec)
154 result = ehci_readl(ehci, ptr);
155 if (result == ~(u32)0) /* card removed */
165 EXPORT_SYMBOL_GPL(ehci_handshake);
167 /* check TDI/ARC silicon is in host mode */
168 static int tdi_in_host_mode (struct ehci_hcd *ehci)
172 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
173 return (tmp & 3) == USBMODE_CM_HC;
177 * Force HC to halt state from unknown (EHCI spec section 2.3).
178 * Must be called with interrupts enabled and the lock not held.
180 static int ehci_halt (struct ehci_hcd *ehci)
184 spin_lock_irq(&ehci->lock);
186 /* disable any irqs left enabled by previous code */
187 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
189 if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
190 spin_unlock_irq(&ehci->lock);
195 * This routine gets called during probe before ehci->command
196 * has been initialized, so we can't rely on its value.
198 ehci->command &= ~CMD_RUN;
199 temp = ehci_readl(ehci, &ehci->regs->command);
200 temp &= ~(CMD_RUN | CMD_IAAD);
201 ehci_writel(ehci, temp, &ehci->regs->command);
203 spin_unlock_irq(&ehci->lock);
204 synchronize_irq(ehci_to_hcd(ehci)->irq);
206 return ehci_handshake(ehci, &ehci->regs->status,
207 STS_HALT, STS_HALT, 16 * 125);
210 /* put TDI/ARC silicon into EHCI mode */
211 static void tdi_reset (struct ehci_hcd *ehci)
215 tmp = ehci_readl(ehci, &ehci->regs->usbmode);
216 tmp |= USBMODE_CM_HC;
217 /* The default byte access to MMR space is LE after
218 * controller reset. Set the required endian mode
219 * for transfer buffers to match the host microprocessor
221 if (ehci_big_endian_mmio(ehci))
223 ehci_writel(ehci, tmp, &ehci->regs->usbmode);
227 * Reset a non-running (STS_HALT == 1) controller.
228 * Must be called with interrupts enabled and the lock not held.
230 int ehci_reset(struct ehci_hcd *ehci)
233 u32 command = ehci_readl(ehci, &ehci->regs->command);
235 /* If the EHCI debug controller is active, special care must be
236 * taken before and after a host controller reset */
237 if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
240 command |= CMD_RESET;
241 dbg_cmd (ehci, "reset", command);
242 ehci_writel(ehci, command, &ehci->regs->command);
243 ehci->rh_state = EHCI_RH_HALTED;
244 ehci->next_statechange = jiffies;
245 retval = ehci_handshake(ehci, &ehci->regs->command,
246 CMD_RESET, 0, 250 * 1000);
248 if (ehci->has_hostpc) {
249 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
250 &ehci->regs->usbmode_ex);
251 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
256 if (ehci_is_TDI(ehci))
260 dbgp_external_startup(ehci_to_hcd(ehci));
262 ehci->port_c_suspend = ehci->suspended_ports =
263 ehci->resuming_ports = 0;
266 EXPORT_SYMBOL_GPL(ehci_reset);
269 * Idle the controller (turn off the schedules).
270 * Must be called with interrupts enabled and the lock not held.
272 static void ehci_quiesce (struct ehci_hcd *ehci)
276 if (ehci->rh_state != EHCI_RH_RUNNING)
279 /* wait for any schedule enables/disables to take effect */
280 temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
281 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
284 /* then disable anything that's still active */
285 spin_lock_irq(&ehci->lock);
286 ehci->command &= ~(CMD_ASE | CMD_PSE);
287 ehci_writel(ehci, ehci->command, &ehci->regs->command);
288 spin_unlock_irq(&ehci->lock);
290 /* hardware can take 16 microframes to turn off ... */
291 ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
295 /*-------------------------------------------------------------------------*/
297 static void end_iaa_cycle(struct ehci_hcd *ehci);
298 static void end_unlink_async(struct ehci_hcd *ehci);
299 static void unlink_empty_async(struct ehci_hcd *ehci);
300 static void ehci_work(struct ehci_hcd *ehci);
301 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
302 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
303 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
305 #include "ehci-timer.c"
306 #include "ehci-hub.c"
307 #include "ehci-mem.c"
309 #include "ehci-sched.c"
310 #include "ehci-sysfs.c"
312 /*-------------------------------------------------------------------------*/
314 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
315 * The firmware seems to think that powering off is a wakeup event!
316 * This routine turns off remote wakeup and everything else, on all ports.
318 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
320 int port = HCS_N_PORTS(ehci->hcs_params);
323 spin_unlock_irq(&ehci->lock);
324 ehci_port_power(ehci, port, false);
325 spin_lock_irq(&ehci->lock);
326 ehci_writel(ehci, PORT_RWC_BITS,
327 &ehci->regs->port_status[port]);
332 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
333 * Must be called with interrupts enabled and the lock not held.
335 static void ehci_silence_controller(struct ehci_hcd *ehci)
339 spin_lock_irq(&ehci->lock);
340 ehci->rh_state = EHCI_RH_HALTED;
341 ehci_turn_off_all_ports(ehci);
343 /* make BIOS/etc use companion controller during reboot */
344 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
346 /* unblock posted writes */
347 ehci_readl(ehci, &ehci->regs->configured_flag);
348 spin_unlock_irq(&ehci->lock);
351 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
352 * This forcibly disables dma and IRQs, helping kexec and other cases
353 * where the next system software may expect clean state.
355 static void ehci_shutdown(struct usb_hcd *hcd)
357 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
360 * Protect the system from crashing at system shutdown in cases where
361 * usb host is not added yet from OTG controller driver.
362 * As ehci_setup() not done yet, so stop accessing registers or
363 * variables initialized in ehci_setup()
368 spin_lock_irq(&ehci->lock);
369 ehci->shutdown = true;
370 ehci->rh_state = EHCI_RH_STOPPING;
371 ehci->enabled_hrtimer_events = 0;
372 spin_unlock_irq(&ehci->lock);
374 ehci_silence_controller(ehci);
376 hrtimer_cancel(&ehci->hrtimer);
379 /*-------------------------------------------------------------------------*/
382 * ehci_work is called from some interrupts, timers, and so on.
383 * it calls driver completion functions, after dropping ehci->lock.
385 static void ehci_work (struct ehci_hcd *ehci)
387 /* another CPU may drop ehci->lock during a schedule scan while
388 * it reports urb completions. this flag guards against bogus
389 * attempts at re-entrant schedule scanning.
391 if (ehci->scanning) {
392 ehci->need_rescan = true;
395 ehci->scanning = true;
398 ehci->need_rescan = false;
399 if (ehci->async_count)
401 if (ehci->intr_count > 0)
403 if (ehci->isoc_count > 0)
405 if (ehci->need_rescan)
407 ehci->scanning = false;
409 /* the IO watchdog guards against hardware or driver bugs that
410 * misplace IRQs, and should let us run completely without IRQs.
411 * such lossage has been observed on both VT6202 and VT8235.
413 turn_on_io_watchdog(ehci);
417 * Called when the ehci_hcd module is removed.
419 static void ehci_stop (struct usb_hcd *hcd)
421 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
423 ehci_dbg (ehci, "stop\n");
425 /* no more interrupts ... */
427 spin_lock_irq(&ehci->lock);
428 ehci->enabled_hrtimer_events = 0;
429 spin_unlock_irq(&ehci->lock);
432 ehci_silence_controller(ehci);
435 hrtimer_cancel(&ehci->hrtimer);
436 remove_sysfs_files(ehci);
437 remove_debug_files (ehci);
439 /* root hub is shut down separately (first, when possible) */
440 spin_lock_irq (&ehci->lock);
442 spin_unlock_irq (&ehci->lock);
443 ehci_mem_cleanup (ehci);
445 if (ehci->amd_pll_fix == 1)
448 dbg_status (ehci, "ehci_stop completed",
449 ehci_readl(ehci, &ehci->regs->status));
452 /* one-time init, only for memory state */
453 static int ehci_init(struct usb_hcd *hcd)
455 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
459 struct ehci_qh_hw *hw;
461 spin_lock_init(&ehci->lock);
464 * keep io watchdog by default, those good HCDs could turn off it later
466 ehci->need_io_watchdog = 1;
468 hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
469 ehci->hrtimer.function = ehci_hrtimer_func;
470 ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
472 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
475 * by default set standard 80% (== 100 usec/uframe) max periodic
476 * bandwidth as required by USB 2.0
478 ehci->uframe_periodic_max = 100;
481 * hw default: 1K periodic list heads, one per frame.
482 * periodic_size can shrink by USBCMD update if hcc_params allows.
484 ehci->periodic_size = DEFAULT_I_TDPS;
485 INIT_LIST_HEAD(&ehci->async_unlink);
486 INIT_LIST_HEAD(&ehci->async_idle);
487 INIT_LIST_HEAD(&ehci->intr_unlink_wait);
488 INIT_LIST_HEAD(&ehci->intr_unlink);
489 INIT_LIST_HEAD(&ehci->intr_qh_list);
490 INIT_LIST_HEAD(&ehci->cached_itd_list);
491 INIT_LIST_HEAD(&ehci->cached_sitd_list);
492 INIT_LIST_HEAD(&ehci->tt_list);
494 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
495 /* periodic schedule size can be smaller than default */
496 switch (EHCI_TUNE_FLS) {
497 case 0: ehci->periodic_size = 1024; break;
498 case 1: ehci->periodic_size = 512; break;
499 case 2: ehci->periodic_size = 256; break;
503 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
506 /* controllers may cache some of the periodic schedule ... */
507 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
509 else // N microframes cached
510 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
513 * dedicate a qh for the async ring head, since we couldn't unlink
514 * a 'real' qh without stopping the async schedule [4.8]. use it
515 * as the 'reclamation list head' too.
516 * its dummy is used in hw_alt_next of many tds, to prevent the qh
517 * from automatically advancing to the next td after short reads.
519 ehci->async->qh_next.qh = NULL;
520 hw = ehci->async->hw;
521 hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
522 hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
523 #if defined(CONFIG_PPC_PS3)
524 hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
526 hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
527 hw->hw_qtd_next = EHCI_LIST_END(ehci);
528 ehci->async->qh_state = QH_STATE_LINKED;
529 hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
531 /* clear interrupt enables, set irq latency */
532 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
534 temp = 1 << (16 + log2_irq_thresh);
535 if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
537 ehci_dbg(ehci, "enable per-port change event\n");
540 if (HCC_CANPARK(hcc_params)) {
541 /* HW default park == 3, on hardware that supports it (like
542 * NVidia and ALI silicon), maximizes throughput on the async
543 * schedule by avoiding QH fetches between transfers.
545 * With fast usb storage devices and NForce2, "park" seems to
546 * make problems: throughput reduction (!), data errors...
549 park = min(park, (unsigned) 3);
553 ehci_dbg(ehci, "park %d\n", park);
555 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
556 /* periodic schedule size can be smaller than default */
558 temp |= (EHCI_TUNE_FLS << 2);
560 ehci->command = temp;
562 /* Accept arbitrarily long scatter-gather lists */
563 if (!hcd->localmem_pool)
564 hcd->self.sg_tablesize = ~0;
566 /* Prepare for unlinking active QHs */
567 ehci->old_current = ~0;
571 /* start HC running; it's halted, ehci_init() has been run (once) */
572 static int ehci_run (struct usb_hcd *hcd)
574 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
579 hcd->uses_new_polling = 1;
581 /* EHCI spec section 4.1 */
583 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
584 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
587 * hcc_params controls whether ehci->regs->segment must (!!!)
588 * be used; it constrains QH/ITD/SITD and QTD locations.
589 * dma_pool consistent memory always uses segment zero.
590 * streaming mappings for I/O buffers, like pci_map_single(),
591 * can return segments above 4GB, if the device allows.
593 * NOTE: the dma mask is visible through dev->dma_mask, so
594 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
595 * Scsi_Host.highmem_io, and so forth. It's readonly to all
596 * host side drivers though.
598 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
599 if (HCC_64BIT_ADDR(hcc_params)) {
600 ehci_writel(ehci, 0, &ehci->regs->segment);
602 // this is deeply broken on almost all architectures
603 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
604 ehci_info(ehci, "enabled 64bit DMA\n");
609 // Philips, Intel, and maybe others need CMD_RUN before the
610 // root hub will detect new devices (why?); NEC doesn't
611 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
612 ehci->command |= CMD_RUN;
613 ehci_writel(ehci, ehci->command, &ehci->regs->command);
614 dbg_cmd (ehci, "init", ehci->command);
617 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
618 * are explicitly handed to companion controller(s), so no TT is
619 * involved with the root hub. (Except where one is integrated,
620 * and there's no companion controller unless maybe for USB OTG.)
622 * Turning on the CF flag will transfer ownership of all ports
623 * from the companions to the EHCI controller. If any of the
624 * companions are in the middle of a port reset at the time, it
625 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
626 * guarantees that no resets are in progress. After we set CF,
627 * a short delay lets the hardware catch up; new resets shouldn't
628 * be started before the port switching actions could complete.
630 down_write(&ehci_cf_port_reset_rwsem);
631 ehci->rh_state = EHCI_RH_RUNNING;
632 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
634 /* Wait until HC become operational */
635 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
637 rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT, 0, 100 * 1000);
639 up_write(&ehci_cf_port_reset_rwsem);
642 ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
643 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
647 ehci->last_periodic_enable = ktime_get_real();
649 temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
651 "USB %x.%x started, EHCI %x.%02x%s\n",
652 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
653 temp >> 8, temp & 0xff,
654 (ignore_oc || ehci->spurious_oc) ? ", overcurrent ignored" : "");
656 ehci_writel(ehci, INTR_MASK,
657 &ehci->regs->intr_enable); /* Turn On Interrupts */
659 /* GRR this is run-once init(), being done every time the HC starts.
660 * So long as they're part of class devices, we can't do it init()
661 * since the class device isn't created that early.
663 create_debug_files(ehci);
664 create_sysfs_files(ehci);
669 int ehci_setup(struct usb_hcd *hcd)
671 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
674 ehci->regs = (void __iomem *)ehci->caps +
675 HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
676 dbg_hcs_params(ehci, "reset");
677 dbg_hcc_params(ehci, "reset");
679 /* cache this readonly data; minimize chip reads */
680 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
682 ehci->sbrn = HCD_USB2;
684 /* data structure init */
685 retval = ehci_init(hcd);
689 retval = ehci_halt(ehci);
691 ehci_mem_cleanup(ehci);
699 EXPORT_SYMBOL_GPL(ehci_setup);
701 /*-------------------------------------------------------------------------*/
703 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
705 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
706 u32 status, masked_status, pcd_status = 0, cmd;
709 spin_lock(&ehci->lock);
711 status = ehci_readl(ehci, &ehci->regs->status);
713 /* e.g. cardbus physical eject */
714 if (status == ~(u32) 0) {
715 ehci_dbg (ehci, "device removed\n");
720 * We don't use STS_FLR, but some controllers don't like it to
721 * remain on, so mask it out along with the other status bits.
723 masked_status = status & (INTR_MASK | STS_FLR);
726 if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
727 spin_unlock(&ehci->lock);
731 /* clear (just) interrupts */
732 ehci_writel(ehci, masked_status, &ehci->regs->status);
733 cmd = ehci_readl(ehci, &ehci->regs->command);
736 /* normal [4.15.1.2] or error [4.15.1.1] completion */
737 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
738 if (likely ((status & STS_ERR) == 0))
739 INCR(ehci->stats.normal);
741 INCR(ehci->stats.error);
745 /* complete the unlinking of some qh [4.15.2.3] */
746 if (status & STS_IAA) {
748 /* Turn off the IAA watchdog */
749 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
752 * Mild optimization: Allow another IAAD to reset the
753 * hrtimer, if one occurs before the next expiration.
754 * In theory we could always cancel the hrtimer, but
755 * tests show that about half the time it will be reset
756 * for some other event anyway.
758 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
759 ++ehci->next_hrtimer_event;
761 /* guard against (alleged) silicon errata */
763 ehci_dbg(ehci, "IAA with IAAD still set?\n");
764 if (ehci->iaa_in_progress)
765 INCR(ehci->stats.iaa);
769 /* remote wakeup [4.3.1] */
770 if (status & STS_PCD) {
771 unsigned i = HCS_N_PORTS (ehci->hcs_params);
774 /* kick root hub later */
777 /* resume root hub? */
778 if (ehci->rh_state == EHCI_RH_SUSPENDED)
779 usb_hcd_resume_root_hub(hcd);
781 /* get per-port change detect bits */
788 /* leverage per-port change bits feature */
789 if (!(ppcd & (1 << i)))
791 pstatus = ehci_readl(ehci,
792 &ehci->regs->port_status[i]);
794 if (pstatus & PORT_OWNER)
796 if (!(test_bit(i, &ehci->suspended_ports) &&
797 ((pstatus & PORT_RESUME) ||
798 !(pstatus & PORT_SUSPEND)) &&
799 (pstatus & PORT_PE) &&
800 ehci->reset_done[i] == 0))
803 /* start USB_RESUME_TIMEOUT msec resume signaling from
804 * this port, and make hub_wq collect
805 * PORT_STAT_C_SUSPEND to stop that signaling.
807 ehci->reset_done[i] = jiffies +
808 msecs_to_jiffies(USB_RESUME_TIMEOUT);
809 set_bit(i, &ehci->resuming_ports);
810 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
811 usb_hcd_start_port_resume(&hcd->self, i);
812 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
816 /* PCI errors [4.15.2.4] */
817 if (unlikely ((status & STS_FATAL) != 0)) {
818 ehci_err(ehci, "fatal error\n");
819 dbg_cmd(ehci, "fatal", cmd);
820 dbg_status(ehci, "fatal", status);
824 /* Don't let the controller do anything more */
825 ehci->shutdown = true;
826 ehci->rh_state = EHCI_RH_STOPPING;
827 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
828 ehci_writel(ehci, ehci->command, &ehci->regs->command);
829 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
830 ehci_handle_controller_death(ehci);
832 /* Handle completions when the controller stops */
838 spin_unlock(&ehci->lock);
840 usb_hcd_poll_rh_status(hcd);
844 /*-------------------------------------------------------------------------*/
847 * non-error returns are a promise to giveback() the urb later
848 * we drop ownership so next owner (or urb unlink) can get it
850 * urb + dev is in hcd.self.controller.urb_list
851 * we're queueing TDs onto software and hardware lists
853 * hcd-specific init for hcpriv hasn't been done yet
855 * NOTE: control, bulk, and interrupt share the same code to append TDs
856 * to a (possibly active) QH, and the same QH scanning code.
858 static int ehci_urb_enqueue (
863 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
864 struct list_head qtd_list;
866 INIT_LIST_HEAD (&qtd_list);
868 switch (usb_pipetype (urb->pipe)) {
870 /* qh_completions() code doesn't handle all the fault cases
871 * in multi-TD control transfers. Even 1KB is rare anyway.
873 if (urb->transfer_buffer_length > (16 * 1024))
876 /* case PIPE_BULK: */
878 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
880 return submit_async(ehci, urb, &qtd_list, mem_flags);
883 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
885 return intr_submit(ehci, urb, &qtd_list, mem_flags);
887 case PIPE_ISOCHRONOUS:
888 if (urb->dev->speed == USB_SPEED_HIGH)
889 return itd_submit (ehci, urb, mem_flags);
891 return sitd_submit (ehci, urb, mem_flags);
895 /* remove from hardware lists
896 * completions normally happen asynchronously
899 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
901 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
906 spin_lock_irqsave (&ehci->lock, flags);
907 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
911 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
913 * We don't expedite dequeue for isochronous URBs.
914 * Just wait until they complete normally or their
918 qh = (struct ehci_qh *) urb->hcpriv;
919 qh->unlink_reason |= QH_UNLINK_REQUESTED;
920 switch (qh->qh_state) {
921 case QH_STATE_LINKED:
922 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
923 start_unlink_intr(ehci, qh);
925 start_unlink_async(ehci, qh);
927 case QH_STATE_COMPLETING:
928 qh->dequeue_during_giveback = 1;
930 case QH_STATE_UNLINK:
931 case QH_STATE_UNLINK_WAIT:
932 /* already started */
935 /* QH might be waiting for a Clear-TT-Buffer */
936 qh_completions(ehci, qh);
941 spin_unlock_irqrestore (&ehci->lock, flags);
945 /*-------------------------------------------------------------------------*/
947 // bulk qh holds the data toggle
950 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
952 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
956 /* ASSERT: any requests/urbs are being unlinked */
957 /* ASSERT: nobody can be submitting urbs for this any more */
960 spin_lock_irqsave (&ehci->lock, flags);
965 /* endpoints can be iso streams. for now, we don't
966 * accelerate iso completions ... so spin a while.
968 if (qh->hw == NULL) {
969 struct ehci_iso_stream *stream = ep->hcpriv;
971 if (!list_empty(&stream->td_list))
974 /* BUG_ON(!list_empty(&stream->free_list)); */
975 reserve_release_iso_bandwidth(ehci, stream, -1);
980 qh->unlink_reason |= QH_UNLINK_REQUESTED;
981 switch (qh->qh_state) {
982 case QH_STATE_LINKED:
983 if (list_empty(&qh->qtd_list))
984 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
987 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
988 start_unlink_async(ehci, qh);
990 start_unlink_intr(ehci, qh);
992 case QH_STATE_COMPLETING: /* already in unlinking */
993 case QH_STATE_UNLINK: /* wait for hw to finish? */
994 case QH_STATE_UNLINK_WAIT:
996 spin_unlock_irqrestore (&ehci->lock, flags);
997 schedule_timeout_uninterruptible(1);
999 case QH_STATE_IDLE: /* fully unlinked */
1000 if (qh->clearing_tt)
1002 if (list_empty (&qh->qtd_list)) {
1003 if (qh->ps.bw_uperiod)
1004 reserve_release_intr_bandwidth(ehci, qh, -1);
1005 qh_destroy(ehci, qh);
1010 /* caller was supposed to have unlinked any requests;
1011 * that's not our job. just leak this memory.
1013 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1014 qh, ep->desc.bEndpointAddress, qh->qh_state,
1015 list_empty (&qh->qtd_list) ? "" : "(has tds)");
1020 spin_unlock_irqrestore (&ehci->lock, flags);
1024 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1026 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1028 int eptype = usb_endpoint_type(&ep->desc);
1029 int epnum = usb_endpoint_num(&ep->desc);
1030 int is_out = usb_endpoint_dir_out(&ep->desc);
1031 unsigned long flags;
1033 if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1036 spin_lock_irqsave(&ehci->lock, flags);
1039 /* For Bulk and Interrupt endpoints we maintain the toggle state
1040 * in the hardware; the toggle bits in udev aren't used at all.
1041 * When an endpoint is reset by usb_clear_halt() we must reset
1042 * the toggle bit in the QH.
1045 if (!list_empty(&qh->qtd_list)) {
1046 WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1048 /* The toggle value in the QH can't be updated
1049 * while the QH is active. Unlink it now;
1050 * re-linking will call qh_refresh().
1052 usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1053 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1054 if (eptype == USB_ENDPOINT_XFER_BULK)
1055 start_unlink_async(ehci, qh);
1057 start_unlink_intr(ehci, qh);
1060 spin_unlock_irqrestore(&ehci->lock, flags);
1063 static int ehci_get_frame (struct usb_hcd *hcd)
1065 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1066 return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1069 /*-------------------------------------------------------------------------*/
1071 /* Device addition and removal */
1073 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1075 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1077 spin_lock_irq(&ehci->lock);
1079 spin_unlock_irq(&ehci->lock);
1082 /*-------------------------------------------------------------------------*/
1086 /* suspend/resume, section 4.3 */
1088 /* These routines handle the generic parts of controller suspend/resume */
1090 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1092 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1094 if (time_before(jiffies, ehci->next_statechange))
1098 * Root hub was already suspended. Disable IRQ emission and
1099 * mark HW unaccessible. The PM and USB cores make sure that
1100 * the root hub is either suspended or stopped.
1102 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1104 spin_lock_irq(&ehci->lock);
1105 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1106 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1108 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1109 spin_unlock_irq(&ehci->lock);
1111 synchronize_irq(hcd->irq);
1113 /* Check for race with a wakeup request */
1114 if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1115 ehci_resume(hcd, false);
1121 EXPORT_SYMBOL_GPL(ehci_suspend);
1123 /* Returns 0 if power was preserved, 1 if power was lost */
1124 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1126 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1128 if (time_before(jiffies, ehci->next_statechange))
1131 /* Mark hardware accessible again as we are back to full power by now */
1132 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1135 return 0; /* Controller is dead */
1138 * If CF is still set and reset isn't forced
1139 * then we maintained suspend power.
1140 * Just undo the effect of ehci_suspend().
1142 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1144 int mask = INTR_MASK;
1146 ehci_prepare_ports_for_controller_resume(ehci);
1148 spin_lock_irq(&ehci->lock);
1152 if (!hcd->self.root_hub->do_remote_wakeup)
1154 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1155 ehci_readl(ehci, &ehci->regs->intr_enable);
1157 spin_unlock_irq(&ehci->lock);
1162 * Else reset, to cope with power loss or resume from hibernation
1163 * having let the firmware kick in during reboot.
1165 usb_root_hub_lost_power(hcd->self.root_hub);
1166 (void) ehci_halt(ehci);
1167 (void) ehci_reset(ehci);
1169 spin_lock_irq(&ehci->lock);
1173 ehci_writel(ehci, ehci->command, &ehci->regs->command);
1174 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1175 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1177 ehci->rh_state = EHCI_RH_SUSPENDED;
1178 spin_unlock_irq(&ehci->lock);
1182 EXPORT_SYMBOL_GPL(ehci_resume);
1186 /*-------------------------------------------------------------------------*/
1189 * Generic structure: This gets copied for platform drivers so that
1190 * individual entries can be overridden as needed.
1193 static const struct hc_driver ehci_hc_driver = {
1194 .description = hcd_name,
1195 .product_desc = "EHCI Host Controller",
1196 .hcd_priv_size = sizeof(struct ehci_hcd),
1199 * generic hardware linkage
1202 .flags = HCD_MEMORY | HCD_DMA | HCD_USB2 | HCD_BH,
1205 * basic lifecycle operations
1207 .reset = ehci_setup,
1210 .shutdown = ehci_shutdown,
1213 * managing i/o requests and associated device resources
1215 .urb_enqueue = ehci_urb_enqueue,
1216 .urb_dequeue = ehci_urb_dequeue,
1217 .endpoint_disable = ehci_endpoint_disable,
1218 .endpoint_reset = ehci_endpoint_reset,
1219 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
1222 * scheduling support
1224 .get_frame_number = ehci_get_frame,
1229 .hub_status_data = ehci_hub_status_data,
1230 .hub_control = ehci_hub_control,
1231 .bus_suspend = ehci_bus_suspend,
1232 .bus_resume = ehci_bus_resume,
1233 .relinquish_port = ehci_relinquish_port,
1234 .port_handed_over = ehci_port_handed_over,
1235 .get_resuming_ports = ehci_get_resuming_ports,
1240 .free_dev = ehci_remove_device,
1241 #ifdef CONFIG_USB_HCD_TEST_MODE
1242 /* EH SINGLE_STEP_SET_FEATURE test support */
1243 .submit_single_step_set_feature = ehci_submit_single_step_set_feature,
1247 void ehci_init_driver(struct hc_driver *drv,
1248 const struct ehci_driver_overrides *over)
1250 /* Copy the generic table to drv and then apply the overrides */
1251 *drv = ehci_hc_driver;
1254 drv->hcd_priv_size += over->extra_priv_size;
1256 drv->reset = over->reset;
1257 if (over->port_power)
1258 drv->port_power = over->port_power;
1261 EXPORT_SYMBOL_GPL(ehci_init_driver);
1263 /*-------------------------------------------------------------------------*/
1265 MODULE_DESCRIPTION(DRIVER_DESC);
1266 MODULE_AUTHOR (DRIVER_AUTHOR);
1267 MODULE_LICENSE ("GPL");
1269 #ifdef CONFIG_USB_EHCI_SH
1270 #include "ehci-sh.c"
1271 #define PLATFORM_DRIVER ehci_hcd_sh_driver
1274 #ifdef CONFIG_PPC_PS3
1275 #include "ehci-ps3.c"
1276 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1279 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1280 #include "ehci-ppc-of.c"
1281 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1284 #ifdef CONFIG_XPS_USB_HCD_XILINX
1285 #include "ehci-xilinx-of.c"
1286 #define XILINX_OF_PLATFORM_DRIVER ehci_hcd_xilinx_of_driver
1289 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1290 #include "ehci-pmcmsp.c"
1291 #define PLATFORM_DRIVER ehci_hcd_msp_driver
1294 #ifdef CONFIG_SPARC_LEON
1295 #include "ehci-grlib.c"
1296 #define PLATFORM_DRIVER ehci_grlib_driver
1299 static int __init ehci_hcd_init(void)
1306 printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1307 set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1308 if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1309 test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1310 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1311 " before uhci_hcd and ohci_hcd, not after\n");
1313 pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1315 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1316 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1318 #ifdef CONFIG_DYNAMIC_DEBUG
1319 ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1322 #ifdef PLATFORM_DRIVER
1323 retval = platform_driver_register(&PLATFORM_DRIVER);
1328 #ifdef PS3_SYSTEM_BUS_DRIVER
1329 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1334 #ifdef OF_PLATFORM_DRIVER
1335 retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1340 #ifdef XILINX_OF_PLATFORM_DRIVER
1341 retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1347 #ifdef XILINX_OF_PLATFORM_DRIVER
1348 /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1351 #ifdef OF_PLATFORM_DRIVER
1352 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1355 #ifdef PS3_SYSTEM_BUS_DRIVER
1356 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1359 #ifdef PLATFORM_DRIVER
1360 platform_driver_unregister(&PLATFORM_DRIVER);
1363 #ifdef CONFIG_DYNAMIC_DEBUG
1364 debugfs_remove(ehci_debug_root);
1365 ehci_debug_root = NULL;
1367 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1370 module_init(ehci_hcd_init);
1372 static void __exit ehci_hcd_cleanup(void)
1374 #ifdef XILINX_OF_PLATFORM_DRIVER
1375 platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1377 #ifdef OF_PLATFORM_DRIVER
1378 platform_driver_unregister(&OF_PLATFORM_DRIVER);
1380 #ifdef PLATFORM_DRIVER
1381 platform_driver_unregister(&PLATFORM_DRIVER);
1383 #ifdef PS3_SYSTEM_BUS_DRIVER
1384 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1386 #ifdef CONFIG_DYNAMIC_DEBUG
1387 debugfs_remove(ehci_debug_root);
1389 clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1391 module_exit(ehci_hcd_cleanup);