1 // SPDX-License-Identifier: GPL-2.0+
3 * Xilinx USB peripheral controller driver
5 * Copyright (C) 2004 by Thomas Rathbone
6 * Copyright (C) 2005 by HP Labs
7 * Copyright (C) 2005 by David Brownell
8 * Copyright (C) 2010 - 2014 Xilinx, Inc.
10 * Some parts of this driver code is based on the driver for at91-series
11 * USB peripheral controller (at91_udc.c).
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_device.h>
23 #include <linux/of_platform.h>
24 #include <linux/of_irq.h>
25 #include <linux/prefetch.h>
26 #include <linux/usb/ch9.h>
27 #include <linux/usb/gadget.h>
29 /* Register offsets for the USB device.*/
30 #define XUSB_EP0_CONFIG_OFFSET 0x0000 /* EP0 Config Reg Offset */
31 #define XUSB_SETUP_PKT_ADDR_OFFSET 0x0080 /* Setup Packet Address */
32 #define XUSB_ADDRESS_OFFSET 0x0100 /* Address Register */
33 #define XUSB_CONTROL_OFFSET 0x0104 /* Control Register */
34 #define XUSB_STATUS_OFFSET 0x0108 /* Status Register */
35 #define XUSB_FRAMENUM_OFFSET 0x010C /* Frame Number Register */
36 #define XUSB_IER_OFFSET 0x0110 /* Interrupt Enable Register */
37 #define XUSB_BUFFREADY_OFFSET 0x0114 /* Buffer Ready Register */
38 #define XUSB_TESTMODE_OFFSET 0x0118 /* Test Mode Register */
39 #define XUSB_DMA_RESET_OFFSET 0x0200 /* DMA Soft Reset Register */
40 #define XUSB_DMA_CONTROL_OFFSET 0x0204 /* DMA Control Register */
41 #define XUSB_DMA_DSAR_ADDR_OFFSET 0x0208 /* DMA source Address Reg */
42 #define XUSB_DMA_DDAR_ADDR_OFFSET 0x020C /* DMA destination Addr Reg */
43 #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */
44 #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */
46 /* Endpoint Configuration Space offsets */
47 #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */
48 #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */
49 #define XUSB_EP_BUF1COUNT_OFFSET 0x0C /* Buffer 1 Count */
51 #define XUSB_CONTROL_USB_READY_MASK 0x80000000 /* USB ready Mask */
52 #define XUSB_CONTROL_USB_RMTWAKE_MASK 0x40000000 /* Remote wake up mask */
54 /* Interrupt register related masks.*/
55 #define XUSB_STATUS_GLOBAL_INTR_MASK 0x80000000 /* Global Intr Enable */
56 #define XUSB_STATUS_DMADONE_MASK 0x04000000 /* DMA done Mask */
57 #define XUSB_STATUS_DMAERR_MASK 0x02000000 /* DMA Error Mask */
58 #define XUSB_STATUS_DMABUSY_MASK 0x80000000 /* DMA Error Mask */
59 #define XUSB_STATUS_RESUME_MASK 0x01000000 /* USB Resume Mask */
60 #define XUSB_STATUS_RESET_MASK 0x00800000 /* USB Reset Mask */
61 #define XUSB_STATUS_SUSPEND_MASK 0x00400000 /* USB Suspend Mask */
62 #define XUSB_STATUS_DISCONNECT_MASK 0x00200000 /* USB Disconnect Mask */
63 #define XUSB_STATUS_FIFO_BUFF_RDY_MASK 0x00100000 /* FIFO Buff Ready Mask */
64 #define XUSB_STATUS_FIFO_BUFF_FREE_MASK 0x00080000 /* FIFO Buff Free Mask */
65 #define XUSB_STATUS_SETUP_PACKET_MASK 0x00040000 /* Setup packet received */
66 #define XUSB_STATUS_EP1_BUFF2_COMP_MASK 0x00000200 /* EP 1 Buff 2 Processed */
67 #define XUSB_STATUS_EP1_BUFF1_COMP_MASK 0x00000002 /* EP 1 Buff 1 Processed */
68 #define XUSB_STATUS_EP0_BUFF2_COMP_MASK 0x00000100 /* EP 0 Buff 2 Processed */
69 #define XUSB_STATUS_EP0_BUFF1_COMP_MASK 0x00000001 /* EP 0 Buff 1 Processed */
70 #define XUSB_STATUS_HIGH_SPEED_MASK 0x00010000 /* USB Speed Mask */
71 /* Suspend,Reset,Suspend and Disconnect Mask */
72 #define XUSB_STATUS_INTR_EVENT_MASK 0x01E00000
73 /* Buffers completion Mask */
74 #define XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK 0x0000FEFF
75 /* Mask for buffer 0 and buffer 1 completion for all Endpoints */
76 #define XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK 0x00000101
77 #define XUSB_STATUS_EP_BUFF2_SHIFT 8 /* EP buffer offset */
79 /* Endpoint Configuration Status Register */
80 #define XUSB_EP_CFG_VALID_MASK 0x80000000 /* Endpoint Valid bit */
81 #define XUSB_EP_CFG_STALL_MASK 0x40000000 /* Endpoint Stall bit */
82 #define XUSB_EP_CFG_DATA_TOGGLE_MASK 0x08000000 /* Endpoint Data toggle */
84 /* USB device specific global configuration constants.*/
85 #define XUSB_MAX_ENDPOINTS 8 /* Maximum End Points */
86 #define XUSB_EP_NUMBER_ZERO 0 /* End point Zero */
87 /* DPRAM is the source address for DMA transfer */
88 #define XUSB_DMA_READ_FROM_DPRAM 0x80000000
89 #define XUSB_DMA_DMASR_BUSY 0x80000000 /* DMA busy */
90 #define XUSB_DMA_DMASR_ERROR 0x40000000 /* DMA Error */
92 * When this bit is set, the DMA buffer ready bit is set by hardware upon
93 * DMA transfer completion.
95 #define XUSB_DMA_BRR_CTRL 0x40000000 /* DMA bufready ctrl bit */
97 #define SETUP_PHASE 0x0000 /* Setup Phase */
98 #define DATA_PHASE 0x0001 /* Data Phase */
99 #define STATUS_PHASE 0x0002 /* Status Phase */
101 #define EP0_MAX_PACKET 64 /* Endpoint 0 maximum packet length */
102 #define STATUSBUFF_SIZE 2 /* Buffer size for GET_STATUS command */
103 #define EPNAME_SIZE 4 /* Buffer size for endpoint name */
105 /* container_of helper macros */
106 #define to_udc(g) container_of((g), struct xusb_udc, gadget)
107 #define to_xusb_ep(ep) container_of((ep), struct xusb_ep, ep_usb)
108 #define to_xusb_req(req) container_of((req), struct xusb_req, usb_req)
111 * struct xusb_req - Xilinx USB device request structure
112 * @usb_req: Linux usb request structure
113 * @queue: usb device request queue
114 * @ep: pointer to xusb_endpoint structure
117 struct usb_request usb_req;
118 struct list_head queue;
123 * struct xusb_ep - USB end point structure.
124 * @ep_usb: usb endpoint instance
125 * @queue: endpoint message queue
126 * @udc: xilinx usb peripheral driver instance pointer
127 * @desc: pointer to the usb endpoint descriptor
128 * @rambase: the endpoint buffer address
129 * @offset: the endpoint register offset value
130 * @name: name of the endpoint
131 * @epnumber: endpoint number
132 * @maxpacket: maximum packet size the endpoint can store
133 * @buffer0count: the size of the packet recieved in the first buffer
134 * @buffer1count: the size of the packet received in the second buffer
135 * @curbufnum: current buffer of endpoint that will be processed next
136 * @buffer0ready: the busy state of first buffer
137 * @buffer1ready: the busy state of second buffer
138 * @is_in: endpoint direction (IN or OUT)
139 * @is_iso: endpoint type(isochronous or non isochronous)
142 struct usb_ep ep_usb;
143 struct list_head queue;
144 struct xusb_udc *udc;
145 const struct usb_endpoint_descriptor *desc;
161 * struct xusb_udc - USB peripheral driver structure
162 * @gadget: USB gadget driver instance
163 * @ep: an array of endpoint structures
164 * @driver: pointer to the usb gadget driver instance
165 * @setup: usb_ctrlrequest structure for control requests
166 * @req: pointer to dummy request for get status command
167 * @dev: pointer to device structure in gadget
168 * @usb_state: device in suspended state or not
169 * @remote_wkp: remote wakeup enabled by host
170 * @setupseqtx: tx status
171 * @setupseqrx: rx status
172 * @addr: the usb device base address
173 * @lock: instance of spinlock
174 * @dma_enabled: flag indicating whether the dma is included in the system
175 * @clk: pointer to struct clk
176 * @read_fn: function pointer to read device registers
177 * @write_fn: function pointer to write to device registers
180 struct usb_gadget gadget;
181 struct xusb_ep ep[8];
182 struct usb_gadget_driver *driver;
183 struct usb_ctrlrequest setup;
184 struct xusb_req *req;
195 unsigned int (*read_fn)(void __iomem *reg);
196 void (*write_fn)(void __iomem *, u32, u32);
199 /* Endpoint buffer start addresses in the core */
200 static u32 rambase[8] = { 0x22, 0x1000, 0x1100, 0x1200, 0x1300, 0x1400, 0x1500,
203 static const char driver_name[] = "xilinx-udc";
204 static const char ep0name[] = "ep0";
206 /* Control endpoint configuration.*/
207 static const struct usb_endpoint_descriptor config_bulk_out_desc = {
208 .bLength = USB_DT_ENDPOINT_SIZE,
209 .bDescriptorType = USB_DT_ENDPOINT,
210 .bEndpointAddress = USB_DIR_OUT,
211 .bmAttributes = USB_ENDPOINT_XFER_BULK,
212 .wMaxPacketSize = cpu_to_le16(EP0_MAX_PACKET),
216 * xudc_write32 - little endian write to device registers
217 * @addr: base addr of device registers
218 * @offset: register offset
219 * @val: data to be written
221 static void xudc_write32(void __iomem *addr, u32 offset, u32 val)
223 iowrite32(val, addr + offset);
227 * xudc_read32 - little endian read from device registers
228 * @addr: addr of device register
229 * Return: value at addr
231 static unsigned int xudc_read32(void __iomem *addr)
233 return ioread32(addr);
237 * xudc_write32_be - big endian write to device registers
238 * @addr: base addr of device registers
239 * @offset: register offset
240 * @val: data to be written
242 static void xudc_write32_be(void __iomem *addr, u32 offset, u32 val)
244 iowrite32be(val, addr + offset);
248 * xudc_read32_be - big endian read from device registers
249 * @addr: addr of device register
250 * Return: value at addr
252 static unsigned int xudc_read32_be(void __iomem *addr)
254 return ioread32be(addr);
258 * xudc_wrstatus - Sets up the usb device status stages.
259 * @udc: pointer to the usb device controller structure.
261 static void xudc_wrstatus(struct xusb_udc *udc)
263 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
266 epcfgreg = udc->read_fn(udc->addr + ep0->offset)|
267 XUSB_EP_CFG_DATA_TOGGLE_MASK;
268 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
269 udc->write_fn(udc->addr, ep0->offset + XUSB_EP_BUF0COUNT_OFFSET, 0);
270 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
274 * xudc_epconfig - Configures the given endpoint.
275 * @ep: pointer to the usb device endpoint structure.
276 * @udc: pointer to the usb peripheral controller structure.
278 * This function configures a specific endpoint with the given configuration
281 static void xudc_epconfig(struct xusb_ep *ep, struct xusb_udc *udc)
286 * Configure the end point direction, type, Max Packet Size and the
287 * EP buffer location.
289 epcfgreg = ((ep->is_in << 29) | (ep->is_iso << 28) |
290 (ep->ep_usb.maxpacket << 15) | (ep->rambase));
291 udc->write_fn(udc->addr, ep->offset, epcfgreg);
293 /* Set the Buffer count and the Buffer ready bits.*/
294 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF0COUNT_OFFSET,
296 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF1COUNT_OFFSET,
298 if (ep->buffer0ready)
299 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
301 if (ep->buffer1ready)
302 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
303 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
307 * xudc_start_dma - Starts DMA transfer.
308 * @ep: pointer to the usb device endpoint structure.
309 * @src: DMA source address.
310 * @dst: DMA destination address.
311 * @length: number of bytes to transfer.
313 * Return: 0 on success, error code on failure
315 * This function starts DMA transfer by writing to DMA source,
316 * destination and lenth registers.
318 static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src,
319 dma_addr_t dst, u32 length)
321 struct xusb_udc *udc = ep->udc;
327 * Set the addresses in the DMA source and
328 * destination registers and then set the length
329 * into the DMA length register.
331 udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src);
332 udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst);
333 udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length);
336 * Wait till DMA transaction is complete and
337 * check whether the DMA transaction was
341 reg = udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET);
342 if (!(reg & XUSB_DMA_DMASR_BUSY))
346 * We can't sleep here, because it's also called from
351 dev_err(udc->dev, "DMA timeout\n");
357 if ((udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET) &
358 XUSB_DMA_DMASR_ERROR) == XUSB_DMA_DMASR_ERROR){
359 dev_err(udc->dev, "DMA Error\n");
367 * xudc_dma_send - Sends IN data using DMA.
368 * @ep: pointer to the usb device endpoint structure.
369 * @req: pointer to the usb request structure.
370 * @buffer: pointer to data to be sent.
371 * @length: number of bytes to send.
373 * Return: 0 on success, -EAGAIN if no buffer is free and error
376 * This function sends data using DMA.
378 static int xudc_dma_send(struct xusb_ep *ep, struct xusb_req *req,
379 u8 *buffer, u32 length)
384 struct xusb_udc *udc = ep->udc;
386 src = req->usb_req.dma + req->usb_req.actual;
387 if (req->usb_req.length)
388 dma_sync_single_for_device(udc->dev, src,
389 length, DMA_TO_DEVICE);
390 if (!ep->curbufnum && !ep->buffer0ready) {
391 /* Get the Buffer address and copy the transmit data.*/
392 eprambase = (u32 __force *)(udc->addr + ep->rambase);
393 dst = virt_to_phys(eprambase);
394 udc->write_fn(udc->addr, ep->offset +
395 XUSB_EP_BUF0COUNT_OFFSET, length);
396 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
397 XUSB_DMA_BRR_CTRL | (1 << ep->epnumber));
398 ep->buffer0ready = 1;
400 } else if (ep->curbufnum && !ep->buffer1ready) {
401 /* Get the Buffer address and copy the transmit data.*/
402 eprambase = (u32 __force *)(udc->addr + ep->rambase +
403 ep->ep_usb.maxpacket);
404 dst = virt_to_phys(eprambase);
405 udc->write_fn(udc->addr, ep->offset +
406 XUSB_EP_BUF1COUNT_OFFSET, length);
407 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
408 XUSB_DMA_BRR_CTRL | (1 << (ep->epnumber +
409 XUSB_STATUS_EP_BUFF2_SHIFT)));
410 ep->buffer1ready = 1;
413 /* None of ping pong buffers are ready currently .*/
417 return xudc_start_dma(ep, src, dst, length);
421 * xudc_dma_receive - Receives OUT data using DMA.
422 * @ep: pointer to the usb device endpoint structure.
423 * @req: pointer to the usb request structure.
424 * @buffer: pointer to storage buffer of received data.
425 * @length: number of bytes to receive.
427 * Return: 0 on success, -EAGAIN if no buffer is free and error
430 * This function receives data using DMA.
432 static int xudc_dma_receive(struct xusb_ep *ep, struct xusb_req *req,
433 u8 *buffer, u32 length)
438 struct xusb_udc *udc = ep->udc;
440 dst = req->usb_req.dma + req->usb_req.actual;
441 if (!ep->curbufnum && !ep->buffer0ready) {
442 /* Get the Buffer address and copy the transmit data */
443 eprambase = (u32 __force *)(udc->addr + ep->rambase);
444 src = virt_to_phys(eprambase);
445 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
446 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
447 (1 << ep->epnumber));
448 ep->buffer0ready = 1;
450 } else if (ep->curbufnum && !ep->buffer1ready) {
451 /* Get the Buffer address and copy the transmit data */
452 eprambase = (u32 __force *)(udc->addr +
453 ep->rambase + ep->ep_usb.maxpacket);
454 src = virt_to_phys(eprambase);
455 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
456 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
457 (1 << (ep->epnumber +
458 XUSB_STATUS_EP_BUFF2_SHIFT)));
459 ep->buffer1ready = 1;
462 /* None of the ping-pong buffers are ready currently */
466 return xudc_start_dma(ep, src, dst, length);
470 * xudc_eptxrx - Transmits or receives data to or from an endpoint.
471 * @ep: pointer to the usb endpoint configuration structure.
472 * @req: pointer to the usb request structure.
473 * @bufferptr: pointer to buffer containing the data to be sent.
474 * @bufferlen: The number of data bytes to be sent.
476 * Return: 0 on success, -EAGAIN if no buffer is free.
478 * This function copies the transmit/receive data to/from the end point buffer
479 * and enables the buffer for transmission/reception.
481 static int xudc_eptxrx(struct xusb_ep *ep, struct xusb_req *req,
482 u8 *bufferptr, u32 bufferlen)
487 struct xusb_udc *udc = ep->udc;
489 bytestosend = bufferlen;
490 if (udc->dma_enabled) {
492 rc = xudc_dma_send(ep, req, bufferptr, bufferlen);
494 rc = xudc_dma_receive(ep, req, bufferptr, bufferlen);
497 /* Put the transmit buffer into the correct ping-pong buffer.*/
498 if (!ep->curbufnum && !ep->buffer0ready) {
499 /* Get the Buffer address and copy the transmit data.*/
500 eprambase = (u32 __force *)(udc->addr + ep->rambase);
502 memcpy(eprambase, bufferptr, bytestosend);
503 udc->write_fn(udc->addr, ep->offset +
504 XUSB_EP_BUF0COUNT_OFFSET, bufferlen);
506 memcpy(bufferptr, eprambase, bytestosend);
509 * Enable the buffer for transmission.
511 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
513 ep->buffer0ready = 1;
515 } else if (ep->curbufnum && !ep->buffer1ready) {
516 /* Get the Buffer address and copy the transmit data.*/
517 eprambase = (u32 __force *)(udc->addr + ep->rambase +
518 ep->ep_usb.maxpacket);
520 memcpy(eprambase, bufferptr, bytestosend);
521 udc->write_fn(udc->addr, ep->offset +
522 XUSB_EP_BUF1COUNT_OFFSET, bufferlen);
524 memcpy(bufferptr, eprambase, bytestosend);
527 * Enable the buffer for transmission.
529 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
530 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
531 ep->buffer1ready = 1;
534 /* None of the ping-pong buffers are ready currently */
541 * xudc_done - Exeutes the endpoint data transfer completion tasks.
542 * @ep: pointer to the usb device endpoint structure.
543 * @req: pointer to the usb request structure.
544 * @status: Status of the data transfer.
546 * Deletes the message from the queue and updates data transfer completion
549 static void xudc_done(struct xusb_ep *ep, struct xusb_req *req, int status)
551 struct xusb_udc *udc = ep->udc;
553 list_del_init(&req->queue);
555 if (req->usb_req.status == -EINPROGRESS)
556 req->usb_req.status = status;
558 status = req->usb_req.status;
560 if (status && status != -ESHUTDOWN)
561 dev_dbg(udc->dev, "%s done %p, status %d\n",
562 ep->ep_usb.name, req, status);
563 /* unmap request if DMA is present*/
564 if (udc->dma_enabled && ep->epnumber && req->usb_req.length)
565 usb_gadget_unmap_request(&udc->gadget, &req->usb_req,
568 if (req->usb_req.complete) {
569 spin_unlock(&udc->lock);
570 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
571 spin_lock(&udc->lock);
576 * xudc_read_fifo - Reads the data from the given endpoint buffer.
577 * @ep: pointer to the usb device endpoint structure.
578 * @req: pointer to the usb request structure.
580 * Return: 0 if request is completed and -EAGAIN if not completed.
582 * Pulls OUT packet data from the endpoint buffer.
584 static int xudc_read_fifo(struct xusb_ep *ep, struct xusb_req *req)
587 u32 is_short, count, bufferspace;
591 int retval = -EAGAIN;
592 struct xusb_udc *udc = ep->udc;
594 if (ep->buffer0ready && ep->buffer1ready) {
595 dev_dbg(udc->dev, "Packet NOT ready!\n");
600 bufoffset = XUSB_EP_BUF1COUNT_OFFSET;
602 bufoffset = XUSB_EP_BUF0COUNT_OFFSET;
604 count = udc->read_fn(udc->addr + ep->offset + bufoffset);
606 if (!ep->buffer0ready && !ep->buffer1ready)
609 buf = req->usb_req.buf + req->usb_req.actual;
611 bufferspace = req->usb_req.length - req->usb_req.actual;
612 is_short = count < ep->ep_usb.maxpacket;
614 if (unlikely(!bufferspace)) {
616 * This happens when the driver's buffer
617 * is smaller than what the host sent.
618 * discard the extra data.
620 if (req->usb_req.status != -EOVERFLOW)
621 dev_dbg(udc->dev, "%s overflow %d\n",
622 ep->ep_usb.name, count);
623 req->usb_req.status = -EOVERFLOW;
624 xudc_done(ep, req, -EOVERFLOW);
628 ret = xudc_eptxrx(ep, req, buf, count);
631 req->usb_req.actual += min(count, bufferspace);
632 dev_dbg(udc->dev, "read %s, %d bytes%s req %p %d/%d\n",
633 ep->ep_usb.name, count, is_short ? "/S" : "", req,
634 req->usb_req.actual, req->usb_req.length);
637 if ((req->usb_req.actual == req->usb_req.length) || is_short) {
638 if (udc->dma_enabled && req->usb_req.length)
639 dma_sync_single_for_cpu(udc->dev,
643 xudc_done(ep, req, 0);
652 dev_dbg(udc->dev, "receive busy\n");
656 /* DMA error, dequeue the request */
657 xudc_done(ep, req, -ECONNRESET);
666 * xudc_write_fifo - Writes data into the given endpoint buffer.
667 * @ep: pointer to the usb device endpoint structure.
668 * @req: pointer to the usb request structure.
670 * Return: 0 if request is completed and -EAGAIN if not completed.
672 * Loads endpoint buffer for an IN packet.
674 static int xudc_write_fifo(struct xusb_ep *ep, struct xusb_req *req)
679 int retval = -EAGAIN;
680 struct xusb_udc *udc = ep->udc;
681 int is_last, is_short = 0;
684 max = le16_to_cpu(ep->desc->wMaxPacketSize);
685 buf = req->usb_req.buf + req->usb_req.actual;
687 length = req->usb_req.length - req->usb_req.actual;
688 length = min(length, max);
690 ret = xudc_eptxrx(ep, req, buf, length);
693 req->usb_req.actual += length;
694 if (unlikely(length != max)) {
695 is_last = is_short = 1;
697 if (likely(req->usb_req.length !=
698 req->usb_req.actual) || req->usb_req.zero)
703 dev_dbg(udc->dev, "%s: wrote %s %d bytes%s%s %d left %p\n",
704 __func__, ep->ep_usb.name, length, is_last ? "/L" : "",
705 is_short ? "/S" : "",
706 req->usb_req.length - req->usb_req.actual, req);
709 xudc_done(ep, req, 0);
714 dev_dbg(udc->dev, "Send busy\n");
718 /* DMA error, dequeue the request */
719 xudc_done(ep, req, -ECONNRESET);
728 * xudc_nuke - Cleans up the data transfer message list.
729 * @ep: pointer to the usb device endpoint structure.
730 * @status: Status of the data transfer.
732 static void xudc_nuke(struct xusb_ep *ep, int status)
734 struct xusb_req *req;
736 while (!list_empty(&ep->queue)) {
737 req = list_first_entry(&ep->queue, struct xusb_req, queue);
738 xudc_done(ep, req, status);
743 * xudc_ep_set_halt - Stalls/unstalls the given endpoint.
744 * @_ep: pointer to the usb device endpoint structure.
745 * @value: value to indicate stall/unstall.
747 * Return: 0 for success and error value on failure
749 static int xudc_ep_set_halt(struct usb_ep *_ep, int value)
751 struct xusb_ep *ep = to_xusb_ep(_ep);
752 struct xusb_udc *udc;
756 if (!_ep || (!ep->desc && ep->epnumber)) {
757 pr_debug("%s: bad ep or descriptor\n", __func__);
762 if (ep->is_in && (!list_empty(&ep->queue)) && value) {
763 dev_dbg(udc->dev, "requests pending can't halt\n");
767 if (ep->buffer0ready || ep->buffer1ready) {
768 dev_dbg(udc->dev, "HW buffers busy can't halt\n");
772 spin_lock_irqsave(&udc->lock, flags);
775 /* Stall the device.*/
776 epcfgreg = udc->read_fn(udc->addr + ep->offset);
777 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
778 udc->write_fn(udc->addr, ep->offset, epcfgreg);
780 /* Unstall the device.*/
781 epcfgreg = udc->read_fn(udc->addr + ep->offset);
782 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
783 udc->write_fn(udc->addr, ep->offset, epcfgreg);
785 /* Reset the toggle bit.*/
786 epcfgreg = udc->read_fn(ep->udc->addr + ep->offset);
787 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
788 udc->write_fn(udc->addr, ep->offset, epcfgreg);
792 spin_unlock_irqrestore(&udc->lock, flags);
797 * __xudc_ep_enable - Enables the given endpoint.
798 * @ep: pointer to the xusb endpoint structure.
799 * @desc: pointer to usb endpoint descriptor.
801 * Return: 0 for success and error value on failure
803 static int __xudc_ep_enable(struct xusb_ep *ep,
804 const struct usb_endpoint_descriptor *desc)
806 struct xusb_udc *udc = ep->udc;
812 ep->is_in = ((desc->bEndpointAddress & USB_DIR_IN) != 0);
813 /* Bit 3...0:endpoint number */
814 ep->epnumber = (desc->bEndpointAddress & 0x0f);
816 ep->ep_usb.desc = desc;
817 tmp = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
818 ep->ep_usb.maxpacket = maxpacket = le16_to_cpu(desc->wMaxPacketSize);
821 case USB_ENDPOINT_XFER_CONTROL:
822 dev_dbg(udc->dev, "only one control endpoint\n");
826 case USB_ENDPOINT_XFER_INT:
829 if (maxpacket > 64) {
830 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
834 case USB_ENDPOINT_XFER_BULK:
837 if (!(is_power_of_2(maxpacket) && maxpacket >= 8 &&
839 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
843 case USB_ENDPOINT_XFER_ISOC:
849 ep->buffer0ready = false;
850 ep->buffer1ready = false;
852 ep->rambase = rambase[ep->epnumber];
853 xudc_epconfig(ep, udc);
855 dev_dbg(udc->dev, "Enable Endpoint %d max pkt is %d\n",
856 ep->epnumber, maxpacket);
858 /* Enable the End point.*/
859 epcfg = udc->read_fn(udc->addr + ep->offset);
860 epcfg |= XUSB_EP_CFG_VALID_MASK;
861 udc->write_fn(udc->addr, ep->offset, epcfg);
865 /* Enable buffer completion interrupts for endpoint */
866 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
867 ier |= (XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK << ep->epnumber);
868 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
870 /* for OUT endpoint set buffers ready to receive */
871 if (ep->epnumber && !ep->is_in) {
872 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
874 ep->buffer0ready = true;
875 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
876 (1 << (ep->epnumber +
877 XUSB_STATUS_EP_BUFF2_SHIFT)));
878 ep->buffer1ready = true;
885 * xudc_ep_enable - Enables the given endpoint.
886 * @_ep: pointer to the usb endpoint structure.
887 * @desc: pointer to usb endpoint descriptor.
889 * Return: 0 for success and error value on failure
891 static int xudc_ep_enable(struct usb_ep *_ep,
892 const struct usb_endpoint_descriptor *desc)
895 struct xusb_udc *udc;
899 if (!_ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
900 pr_debug("%s: bad ep or descriptor\n", __func__);
904 ep = to_xusb_ep(_ep);
907 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
908 dev_dbg(udc->dev, "bogus device state\n");
912 spin_lock_irqsave(&udc->lock, flags);
913 ret = __xudc_ep_enable(ep, desc);
914 spin_unlock_irqrestore(&udc->lock, flags);
920 * xudc_ep_disable - Disables the given endpoint.
921 * @_ep: pointer to the usb endpoint structure.
923 * Return: 0 for success and error value on failure
925 static int xudc_ep_disable(struct usb_ep *_ep)
930 struct xusb_udc *udc;
933 pr_debug("%s: invalid ep\n", __func__);
937 ep = to_xusb_ep(_ep);
940 spin_lock_irqsave(&udc->lock, flags);
942 xudc_nuke(ep, -ESHUTDOWN);
944 /* Restore the endpoint's pristine config */
946 ep->ep_usb.desc = NULL;
948 dev_dbg(udc->dev, "USB Ep %d disable\n ", ep->epnumber);
949 /* Disable the endpoint.*/
950 epcfg = udc->read_fn(udc->addr + ep->offset);
951 epcfg &= ~XUSB_EP_CFG_VALID_MASK;
952 udc->write_fn(udc->addr, ep->offset, epcfg);
954 spin_unlock_irqrestore(&udc->lock, flags);
959 * xudc_ep_alloc_request - Initializes the request queue.
960 * @_ep: pointer to the usb endpoint structure.
961 * @gfp_flags: Flags related to the request call.
963 * Return: pointer to request structure on success and a NULL on failure.
965 static struct usb_request *xudc_ep_alloc_request(struct usb_ep *_ep,
968 struct xusb_ep *ep = to_xusb_ep(_ep);
969 struct xusb_req *req;
971 req = kzalloc(sizeof(*req), gfp_flags);
976 INIT_LIST_HEAD(&req->queue);
977 return &req->usb_req;
981 * xudc_free_request - Releases the request from queue.
982 * @_ep: pointer to the usb device endpoint structure.
983 * @_req: pointer to the usb request structure.
985 static void xudc_free_request(struct usb_ep *_ep, struct usb_request *_req)
987 struct xusb_req *req = to_xusb_req(_req);
993 * __xudc_ep0_queue - Adds the request to endpoint 0 queue.
994 * @ep0: pointer to the xusb endpoint 0 structure.
995 * @req: pointer to the xusb request structure.
997 * Return: 0 for success and error value on failure
999 static int __xudc_ep0_queue(struct xusb_ep *ep0, struct xusb_req *req)
1001 struct xusb_udc *udc = ep0->udc;
1005 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1006 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1009 if (!list_empty(&ep0->queue)) {
1010 dev_dbg(udc->dev, "%s:ep0 busy\n", __func__);
1014 req->usb_req.status = -EINPROGRESS;
1015 req->usb_req.actual = 0;
1017 list_add_tail(&req->queue, &ep0->queue);
1019 if (udc->setup.bRequestType & USB_DIR_IN) {
1020 prefetch(req->usb_req.buf);
1021 length = req->usb_req.length;
1022 corebuf = (void __force *) ((ep0->rambase << 2) +
1024 length = req->usb_req.actual = min_t(u32, length,
1026 memcpy(corebuf, req->usb_req.buf, length);
1027 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, length);
1028 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1030 if (udc->setup.wLength) {
1031 /* Enable EP0 buffer to receive data */
1032 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1033 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1043 * xudc_ep0_queue - Adds the request to endpoint 0 queue.
1044 * @_ep: pointer to the usb endpoint 0 structure.
1045 * @_req: pointer to the usb request structure.
1046 * @gfp_flags: Flags related to the request call.
1048 * Return: 0 for success and error value on failure
1050 static int xudc_ep0_queue(struct usb_ep *_ep, struct usb_request *_req,
1053 struct xusb_req *req = to_xusb_req(_req);
1054 struct xusb_ep *ep0 = to_xusb_ep(_ep);
1055 struct xusb_udc *udc = ep0->udc;
1056 unsigned long flags;
1059 spin_lock_irqsave(&udc->lock, flags);
1060 ret = __xudc_ep0_queue(ep0, req);
1061 spin_unlock_irqrestore(&udc->lock, flags);
1067 * xudc_ep_queue - Adds the request to endpoint queue.
1068 * @_ep: pointer to the usb endpoint structure.
1069 * @_req: pointer to the usb request structure.
1070 * @gfp_flags: Flags related to the request call.
1072 * Return: 0 for success and error value on failure
1074 static int xudc_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1077 struct xusb_req *req = to_xusb_req(_req);
1078 struct xusb_ep *ep = to_xusb_ep(_ep);
1079 struct xusb_udc *udc = ep->udc;
1081 unsigned long flags;
1084 dev_dbg(udc->dev, "%s: queuing request to disabled %s\n",
1085 __func__, ep->name);
1089 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1090 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1094 spin_lock_irqsave(&udc->lock, flags);
1096 _req->status = -EINPROGRESS;
1099 if (udc->dma_enabled) {
1100 ret = usb_gadget_map_request(&udc->gadget, &req->usb_req,
1103 dev_dbg(udc->dev, "gadget_map failed ep%d\n",
1105 spin_unlock_irqrestore(&udc->lock, flags);
1110 if (list_empty(&ep->queue)) {
1112 dev_dbg(udc->dev, "xudc_write_fifo from ep_queue\n");
1113 if (!xudc_write_fifo(ep, req))
1116 dev_dbg(udc->dev, "xudc_read_fifo from ep_queue\n");
1117 if (!xudc_read_fifo(ep, req))
1123 list_add_tail(&req->queue, &ep->queue);
1125 spin_unlock_irqrestore(&udc->lock, flags);
1130 * xudc_ep_dequeue - Removes the request from the queue.
1131 * @_ep: pointer to the usb device endpoint structure.
1132 * @_req: pointer to the usb request structure.
1134 * Return: 0 for success and error value on failure
1136 static int xudc_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1138 struct xusb_ep *ep = to_xusb_ep(_ep);
1139 struct xusb_req *req = NULL;
1140 struct xusb_req *iter;
1141 struct xusb_udc *udc = ep->udc;
1142 unsigned long flags;
1144 spin_lock_irqsave(&udc->lock, flags);
1145 /* Make sure it's actually queued on this endpoint */
1146 list_for_each_entry(iter, &ep->queue, queue) {
1147 if (&iter->usb_req != _req)
1153 spin_unlock_irqrestore(&udc->lock, flags);
1156 xudc_done(ep, req, -ECONNRESET);
1157 spin_unlock_irqrestore(&udc->lock, flags);
1163 * xudc_ep0_enable - Enables the given endpoint.
1164 * @ep: pointer to the usb endpoint structure.
1165 * @desc: pointer to usb endpoint descriptor.
1167 * Return: error always.
1169 * endpoint 0 enable should not be called by gadget layer.
1171 static int xudc_ep0_enable(struct usb_ep *ep,
1172 const struct usb_endpoint_descriptor *desc)
1178 * xudc_ep0_disable - Disables the given endpoint.
1179 * @ep: pointer to the usb endpoint structure.
1181 * Return: error always.
1183 * endpoint 0 disable should not be called by gadget layer.
1185 static int xudc_ep0_disable(struct usb_ep *ep)
1190 static const struct usb_ep_ops xusb_ep0_ops = {
1191 .enable = xudc_ep0_enable,
1192 .disable = xudc_ep0_disable,
1193 .alloc_request = xudc_ep_alloc_request,
1194 .free_request = xudc_free_request,
1195 .queue = xudc_ep0_queue,
1196 .dequeue = xudc_ep_dequeue,
1197 .set_halt = xudc_ep_set_halt,
1200 static const struct usb_ep_ops xusb_ep_ops = {
1201 .enable = xudc_ep_enable,
1202 .disable = xudc_ep_disable,
1203 .alloc_request = xudc_ep_alloc_request,
1204 .free_request = xudc_free_request,
1205 .queue = xudc_ep_queue,
1206 .dequeue = xudc_ep_dequeue,
1207 .set_halt = xudc_ep_set_halt,
1211 * xudc_get_frame - Reads the current usb frame number.
1212 * @gadget: pointer to the usb gadget structure.
1214 * Return: current frame number for success and error value on failure.
1216 static int xudc_get_frame(struct usb_gadget *gadget)
1218 struct xusb_udc *udc;
1224 udc = to_udc(gadget);
1225 frame = udc->read_fn(udc->addr + XUSB_FRAMENUM_OFFSET);
1230 * xudc_wakeup - Send remote wakeup signal to host
1231 * @gadget: pointer to the usb gadget structure.
1233 * Return: 0 on success and error on failure
1235 static int xudc_wakeup(struct usb_gadget *gadget)
1237 struct xusb_udc *udc = to_udc(gadget);
1239 int status = -EINVAL;
1240 unsigned long flags;
1242 spin_lock_irqsave(&udc->lock, flags);
1244 /* Remote wake up not enabled by host */
1245 if (!udc->remote_wkp)
1248 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1249 crtlreg |= XUSB_CONTROL_USB_RMTWAKE_MASK;
1250 /* set remote wake up bit */
1251 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1253 * wait for a while and reset remote wake up bit since this bit
1254 * is not cleared by HW after sending remote wakeup to host.
1258 crtlreg &= ~XUSB_CONTROL_USB_RMTWAKE_MASK;
1259 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1262 spin_unlock_irqrestore(&udc->lock, flags);
1267 * xudc_pullup - start/stop USB traffic
1268 * @gadget: pointer to the usb gadget structure.
1269 * @is_on: flag to start or stop
1273 * This function starts/stops SIE engine of IP based on is_on.
1275 static int xudc_pullup(struct usb_gadget *gadget, int is_on)
1277 struct xusb_udc *udc = to_udc(gadget);
1278 unsigned long flags;
1281 spin_lock_irqsave(&udc->lock, flags);
1283 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1285 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
1287 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
1289 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1291 spin_unlock_irqrestore(&udc->lock, flags);
1297 * xudc_eps_init - initialize endpoints.
1298 * @udc: pointer to the usb device controller structure.
1300 static void xudc_eps_init(struct xusb_udc *udc)
1304 INIT_LIST_HEAD(&udc->gadget.ep_list);
1306 for (ep_number = 0; ep_number < XUSB_MAX_ENDPOINTS; ep_number++) {
1307 struct xusb_ep *ep = &udc->ep[ep_number];
1310 list_add_tail(&ep->ep_usb.ep_list,
1311 &udc->gadget.ep_list);
1312 usb_ep_set_maxpacket_limit(&ep->ep_usb,
1313 (unsigned short) ~0);
1314 snprintf(ep->name, EPNAME_SIZE, "ep%d", ep_number);
1315 ep->ep_usb.name = ep->name;
1316 ep->ep_usb.ops = &xusb_ep_ops;
1318 ep->ep_usb.caps.type_iso = true;
1319 ep->ep_usb.caps.type_bulk = true;
1320 ep->ep_usb.caps.type_int = true;
1322 ep->ep_usb.name = ep0name;
1323 usb_ep_set_maxpacket_limit(&ep->ep_usb, EP0_MAX_PACKET);
1324 ep->ep_usb.ops = &xusb_ep0_ops;
1326 ep->ep_usb.caps.type_control = true;
1329 ep->ep_usb.caps.dir_in = true;
1330 ep->ep_usb.caps.dir_out = true;
1333 ep->epnumber = ep_number;
1336 * The configuration register address offset between
1337 * each endpoint is 0x10.
1339 ep->offset = XUSB_EP0_CONFIG_OFFSET + (ep_number * 0x10);
1343 xudc_epconfig(ep, udc);
1345 /* Initialize one queue per endpoint */
1346 INIT_LIST_HEAD(&ep->queue);
1351 * xudc_stop_activity - Stops any further activity on the device.
1352 * @udc: pointer to the usb device controller structure.
1354 static void xudc_stop_activity(struct xusb_udc *udc)
1359 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1361 xudc_nuke(ep, -ESHUTDOWN);
1366 * xudc_start - Starts the device.
1367 * @gadget: pointer to the usb gadget structure
1368 * @driver: pointer to gadget driver structure
1370 * Return: zero on success and error on failure
1372 static int xudc_start(struct usb_gadget *gadget,
1373 struct usb_gadget_driver *driver)
1375 struct xusb_udc *udc = to_udc(gadget);
1376 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1377 const struct usb_endpoint_descriptor *desc = &config_bulk_out_desc;
1378 unsigned long flags;
1381 spin_lock_irqsave(&udc->lock, flags);
1384 dev_err(udc->dev, "%s is already bound to %s\n",
1385 udc->gadget.name, udc->driver->driver.name);
1390 /* hook up the driver */
1391 udc->driver = driver;
1392 udc->gadget.speed = driver->max_speed;
1394 /* Enable the control endpoint. */
1395 ret = __xudc_ep_enable(ep0, desc);
1397 /* Set device address and remote wakeup to 0 */
1398 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1399 udc->remote_wkp = 0;
1401 spin_unlock_irqrestore(&udc->lock, flags);
1406 * xudc_stop - stops the device.
1407 * @gadget: pointer to the usb gadget structure
1409 * Return: zero always
1411 static int xudc_stop(struct usb_gadget *gadget)
1413 struct xusb_udc *udc = to_udc(gadget);
1414 unsigned long flags;
1416 spin_lock_irqsave(&udc->lock, flags);
1418 udc->gadget.speed = USB_SPEED_UNKNOWN;
1421 /* Set device address and remote wakeup to 0 */
1422 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1423 udc->remote_wkp = 0;
1425 xudc_stop_activity(udc);
1427 spin_unlock_irqrestore(&udc->lock, flags);
1432 static const struct usb_gadget_ops xusb_udc_ops = {
1433 .get_frame = xudc_get_frame,
1434 .wakeup = xudc_wakeup,
1435 .pullup = xudc_pullup,
1436 .udc_start = xudc_start,
1437 .udc_stop = xudc_stop,
1441 * xudc_clear_stall_all_ep - clears stall of every endpoint.
1442 * @udc: pointer to the udc structure.
1444 static void xudc_clear_stall_all_ep(struct xusb_udc *udc)
1450 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1452 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1453 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1454 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1456 /* Reset the toggle bit.*/
1457 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1458 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
1459 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1465 * xudc_startup_handler - The usb device controller interrupt handler.
1466 * @udc: pointer to the udc structure.
1467 * @intrstatus: The mask value containing the interrupt sources.
1469 * This function handles the RESET,SUSPEND,RESUME and DISCONNECT interrupts.
1471 static void xudc_startup_handler(struct xusb_udc *udc, u32 intrstatus)
1475 if (intrstatus & XUSB_STATUS_RESET_MASK) {
1477 dev_dbg(udc->dev, "Reset\n");
1479 if (intrstatus & XUSB_STATUS_HIGH_SPEED_MASK)
1480 udc->gadget.speed = USB_SPEED_HIGH;
1482 udc->gadget.speed = USB_SPEED_FULL;
1484 xudc_stop_activity(udc);
1485 xudc_clear_stall_all_ep(udc);
1486 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
1488 /* Set device address and remote wakeup to 0 */
1489 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1490 udc->remote_wkp = 0;
1492 /* Enable the suspend, resume and disconnect */
1493 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1494 intrreg |= XUSB_STATUS_SUSPEND_MASK | XUSB_STATUS_RESUME_MASK |
1495 XUSB_STATUS_DISCONNECT_MASK;
1496 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1498 if (intrstatus & XUSB_STATUS_SUSPEND_MASK) {
1500 dev_dbg(udc->dev, "Suspend\n");
1502 /* Enable the reset, resume and disconnect */
1503 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1504 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1505 XUSB_STATUS_DISCONNECT_MASK;
1506 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1508 udc->usb_state = USB_STATE_SUSPENDED;
1510 if (udc->driver->suspend) {
1511 spin_unlock(&udc->lock);
1512 udc->driver->suspend(&udc->gadget);
1513 spin_lock(&udc->lock);
1516 if (intrstatus & XUSB_STATUS_RESUME_MASK) {
1517 bool condition = (udc->usb_state != USB_STATE_SUSPENDED);
1519 dev_WARN_ONCE(udc->dev, condition,
1520 "Resume IRQ while not suspended\n");
1522 dev_dbg(udc->dev, "Resume\n");
1524 /* Enable the reset, suspend and disconnect */
1525 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1526 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_SUSPEND_MASK |
1527 XUSB_STATUS_DISCONNECT_MASK;
1528 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1532 if (udc->driver->resume) {
1533 spin_unlock(&udc->lock);
1534 udc->driver->resume(&udc->gadget);
1535 spin_lock(&udc->lock);
1538 if (intrstatus & XUSB_STATUS_DISCONNECT_MASK) {
1540 dev_dbg(udc->dev, "Disconnect\n");
1542 /* Enable the reset, resume and suspend */
1543 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1544 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1545 XUSB_STATUS_SUSPEND_MASK;
1546 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1548 if (udc->driver && udc->driver->disconnect) {
1549 spin_unlock(&udc->lock);
1550 udc->driver->disconnect(&udc->gadget);
1551 spin_lock(&udc->lock);
1557 * xudc_ep0_stall - Stall endpoint zero.
1558 * @udc: pointer to the udc structure.
1560 * This function stalls endpoint zero.
1562 static void xudc_ep0_stall(struct xusb_udc *udc)
1565 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1567 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1568 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1569 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1573 * xudc_setaddress - executes SET_ADDRESS command
1574 * @udc: pointer to the udc structure.
1576 * This function executes USB SET_ADDRESS command
1578 static void xudc_setaddress(struct xusb_udc *udc)
1580 struct xusb_ep *ep0 = &udc->ep[0];
1581 struct xusb_req *req = udc->req;
1584 req->usb_req.length = 0;
1585 ret = __xudc_ep0_queue(ep0, req);
1589 dev_err(udc->dev, "Can't respond to SET ADDRESS request\n");
1590 xudc_ep0_stall(udc);
1594 * xudc_getstatus - executes GET_STATUS command
1595 * @udc: pointer to the udc structure.
1597 * This function executes USB GET_STATUS command
1599 static void xudc_getstatus(struct xusb_udc *udc)
1601 struct xusb_ep *ep0 = &udc->ep[0];
1602 struct xusb_req *req = udc->req;
1603 struct xusb_ep *target_ep;
1610 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
1611 case USB_RECIP_DEVICE:
1612 /* Get device status */
1613 status = 1 << USB_DEVICE_SELF_POWERED;
1614 if (udc->remote_wkp)
1615 status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1617 case USB_RECIP_INTERFACE:
1619 case USB_RECIP_ENDPOINT:
1620 epnum = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1621 if (epnum >= XUSB_MAX_ENDPOINTS)
1623 target_ep = &udc->ep[epnum];
1624 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1625 halt = epcfgreg & XUSB_EP_CFG_STALL_MASK;
1626 if (udc->setup.wIndex & USB_DIR_IN) {
1627 if (!target_ep->is_in)
1630 if (target_ep->is_in)
1634 status = 1 << USB_ENDPOINT_HALT;
1640 req->usb_req.length = 2;
1641 *(u16 *)req->usb_req.buf = cpu_to_le16(status);
1642 ret = __xudc_ep0_queue(ep0, req);
1646 dev_err(udc->dev, "Can't respond to getstatus request\n");
1647 xudc_ep0_stall(udc);
1651 * xudc_set_clear_feature - Executes the set feature and clear feature commands.
1652 * @udc: pointer to the usb device controller structure.
1654 * Processes the SET_FEATURE and CLEAR_FEATURE commands.
1656 static void xudc_set_clear_feature(struct xusb_udc *udc)
1658 struct xusb_ep *ep0 = &udc->ep[0];
1659 struct xusb_req *req = udc->req;
1660 struct xusb_ep *target_ep;
1664 int flag = (udc->setup.bRequest == USB_REQ_SET_FEATURE ? 1 : 0);
1667 switch (udc->setup.bRequestType) {
1668 case USB_RECIP_DEVICE:
1669 switch (udc->setup.wValue) {
1670 case USB_DEVICE_TEST_MODE:
1672 * The Test Mode will be executed
1673 * after the status phase.
1676 case USB_DEVICE_REMOTE_WAKEUP:
1678 udc->remote_wkp = 1;
1680 udc->remote_wkp = 0;
1683 xudc_ep0_stall(udc);
1687 case USB_RECIP_ENDPOINT:
1688 if (!udc->setup.wValue) {
1689 endpoint = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1690 if (endpoint >= XUSB_MAX_ENDPOINTS) {
1691 xudc_ep0_stall(udc);
1694 target_ep = &udc->ep[endpoint];
1695 outinbit = udc->setup.wIndex & USB_ENDPOINT_DIR_MASK;
1696 outinbit = outinbit >> 7;
1698 /* Make sure direction matches.*/
1699 if (outinbit != target_ep->is_in) {
1700 xudc_ep0_stall(udc);
1703 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1705 /* Clear the stall.*/
1706 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1707 udc->write_fn(udc->addr,
1708 target_ep->offset, epcfgreg);
1711 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1712 udc->write_fn(udc->addr,
1716 /* Unstall the endpoint.*/
1717 epcfgreg &= ~(XUSB_EP_CFG_STALL_MASK |
1718 XUSB_EP_CFG_DATA_TOGGLE_MASK);
1719 udc->write_fn(udc->addr,
1727 xudc_ep0_stall(udc);
1731 req->usb_req.length = 0;
1732 ret = __xudc_ep0_queue(ep0, req);
1736 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
1737 xudc_ep0_stall(udc);
1741 * xudc_handle_setup - Processes the setup packet.
1742 * @udc: pointer to the usb device controller structure.
1744 * Process setup packet and delegate to gadget layer.
1746 static void xudc_handle_setup(struct xusb_udc *udc)
1747 __must_hold(&udc->lock)
1749 struct xusb_ep *ep0 = &udc->ep[0];
1750 struct usb_ctrlrequest setup;
1753 /* Load up the chapter 9 command buffer.*/
1754 ep0rambase = (u32 __force *) (udc->addr + XUSB_SETUP_PKT_ADDR_OFFSET);
1755 memcpy(&setup, ep0rambase, 8);
1758 udc->setup.wValue = cpu_to_le16(setup.wValue);
1759 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
1760 udc->setup.wLength = cpu_to_le16(setup.wLength);
1762 /* Clear previous requests */
1763 xudc_nuke(ep0, -ECONNRESET);
1765 if (udc->setup.bRequestType & USB_DIR_IN) {
1766 /* Execute the get command.*/
1767 udc->setupseqrx = STATUS_PHASE;
1768 udc->setupseqtx = DATA_PHASE;
1770 /* Execute the put command.*/
1771 udc->setupseqrx = DATA_PHASE;
1772 udc->setupseqtx = STATUS_PHASE;
1775 switch (udc->setup.bRequest) {
1776 case USB_REQ_GET_STATUS:
1777 /* Data+Status phase form udc */
1778 if ((udc->setup.bRequestType &
1779 (USB_DIR_IN | USB_TYPE_MASK)) !=
1780 (USB_DIR_IN | USB_TYPE_STANDARD))
1782 xudc_getstatus(udc);
1784 case USB_REQ_SET_ADDRESS:
1785 /* Status phase from udc */
1786 if (udc->setup.bRequestType != (USB_DIR_OUT |
1787 USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1789 xudc_setaddress(udc);
1791 case USB_REQ_CLEAR_FEATURE:
1792 case USB_REQ_SET_FEATURE:
1793 /* Requests with no data phase, status phase from udc */
1794 if ((udc->setup.bRequestType & USB_TYPE_MASK)
1795 != USB_TYPE_STANDARD)
1797 xudc_set_clear_feature(udc);
1803 spin_unlock(&udc->lock);
1804 if (udc->driver->setup(&udc->gadget, &setup) < 0)
1805 xudc_ep0_stall(udc);
1806 spin_lock(&udc->lock);
1810 * xudc_ep0_out - Processes the endpoint 0 OUT token.
1811 * @udc: pointer to the usb device controller structure.
1813 static void xudc_ep0_out(struct xusb_udc *udc)
1815 struct xusb_ep *ep0 = &udc->ep[0];
1816 struct xusb_req *req;
1818 unsigned int bytes_to_rx;
1821 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1823 switch (udc->setupseqrx) {
1826 * This resets both state machines for the next
1829 udc->setupseqrx = SETUP_PHASE;
1830 udc->setupseqtx = SETUP_PHASE;
1831 req->usb_req.actual = req->usb_req.length;
1832 xudc_done(ep0, req, 0);
1835 bytes_to_rx = udc->read_fn(udc->addr +
1836 XUSB_EP_BUF0COUNT_OFFSET);
1837 /* Copy the data to be received from the DPRAM. */
1838 ep0rambase = (u8 __force *) (udc->addr +
1839 (ep0->rambase << 2));
1840 buffer = req->usb_req.buf + req->usb_req.actual;
1841 req->usb_req.actual = req->usb_req.actual + bytes_to_rx;
1842 memcpy(buffer, ep0rambase, bytes_to_rx);
1844 if (req->usb_req.length == req->usb_req.actual) {
1845 /* Data transfer completed get ready for Status stage */
1848 /* Enable EP0 buffer to receive data */
1849 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1850 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1859 * xudc_ep0_in - Processes the endpoint 0 IN token.
1860 * @udc: pointer to the usb device controller structure.
1862 static void xudc_ep0_in(struct xusb_udc *udc)
1864 struct xusb_ep *ep0 = &udc->ep[0];
1865 struct xusb_req *req;
1866 unsigned int bytes_to_tx;
1872 u8 test_mode = udc->setup.wIndex >> 8;
1874 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1875 bytes_to_tx = req->usb_req.length - req->usb_req.actual;
1877 switch (udc->setupseqtx) {
1879 switch (udc->setup.bRequest) {
1880 case USB_REQ_SET_ADDRESS:
1881 /* Set the address of the device.*/
1882 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET,
1885 case USB_REQ_SET_FEATURE:
1886 if (udc->setup.bRequestType ==
1888 if (udc->setup.wValue ==
1889 USB_DEVICE_TEST_MODE)
1890 udc->write_fn(udc->addr,
1891 XUSB_TESTMODE_OFFSET,
1896 req->usb_req.actual = req->usb_req.length;
1897 xudc_done(ep0, req, 0);
1902 * We're done with data transfer, next
1903 * will be zero length OUT with data toggle of
1904 * 1. Setup data_toggle.
1906 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1907 epcfgreg |= XUSB_EP_CFG_DATA_TOGGLE_MASK;
1908 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1909 udc->setupseqtx = STATUS_PHASE;
1911 length = count = min_t(u32, bytes_to_tx,
1913 /* Copy the data to be transmitted into the DPRAM. */
1914 ep0rambase = (u8 __force *) (udc->addr +
1915 (ep0->rambase << 2));
1916 buffer = req->usb_req.buf + req->usb_req.actual;
1917 req->usb_req.actual = req->usb_req.actual + length;
1918 memcpy(ep0rambase, buffer, length);
1920 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, count);
1921 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1929 * xudc_ctrl_ep_handler - Endpoint 0 interrupt handler.
1930 * @udc: pointer to the udc structure.
1931 * @intrstatus: It's the mask value for the interrupt sources on endpoint 0.
1933 * Processes the commands received during enumeration phase.
1935 static void xudc_ctrl_ep_handler(struct xusb_udc *udc, u32 intrstatus)
1938 if (intrstatus & XUSB_STATUS_SETUP_PACKET_MASK) {
1939 xudc_handle_setup(udc);
1941 if (intrstatus & XUSB_STATUS_FIFO_BUFF_RDY_MASK)
1943 else if (intrstatus & XUSB_STATUS_FIFO_BUFF_FREE_MASK)
1949 * xudc_nonctrl_ep_handler - Non control endpoint interrupt handler.
1950 * @udc: pointer to the udc structure.
1951 * @epnum: End point number for which the interrupt is to be processed
1952 * @intrstatus: mask value for interrupt sources of endpoints other
1955 * Processes the buffer completion interrupts.
1957 static void xudc_nonctrl_ep_handler(struct xusb_udc *udc, u8 epnum,
1961 struct xusb_req *req;
1964 ep = &udc->ep[epnum];
1965 /* Process the End point interrupts.*/
1966 if (intrstatus & (XUSB_STATUS_EP0_BUFF1_COMP_MASK << epnum))
1967 ep->buffer0ready = 0;
1968 if (intrstatus & (XUSB_STATUS_EP0_BUFF2_COMP_MASK << epnum))
1969 ep->buffer1ready = false;
1971 if (list_empty(&ep->queue))
1974 req = list_first_entry(&ep->queue, struct xusb_req, queue);
1977 xudc_write_fifo(ep, req);
1979 xudc_read_fifo(ep, req);
1983 * xudc_irq - The main interrupt handler.
1984 * @irq: The interrupt number.
1985 * @_udc: pointer to the usb device controller structure.
1987 * Return: IRQ_HANDLED after the interrupt is handled.
1989 static irqreturn_t xudc_irq(int irq, void *_udc)
1991 struct xusb_udc *udc = _udc;
1996 unsigned long flags;
1998 spin_lock_irqsave(&udc->lock, flags);
2001 * Event interrupts are level sensitive hence first disable
2002 * IER, read ISR and figure out active interrupts.
2004 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2005 ier &= ~XUSB_STATUS_INTR_EVENT_MASK;
2006 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2008 /* Read the Interrupt Status Register.*/
2009 intrstatus = udc->read_fn(udc->addr + XUSB_STATUS_OFFSET);
2011 /* Call the handler for the event interrupt.*/
2012 if (intrstatus & XUSB_STATUS_INTR_EVENT_MASK) {
2014 * Check if there is any action to be done for :
2015 * - USB Reset received {XUSB_STATUS_RESET_MASK}
2016 * - USB Suspend received {XUSB_STATUS_SUSPEND_MASK}
2017 * - USB Resume received {XUSB_STATUS_RESUME_MASK}
2018 * - USB Disconnect received {XUSB_STATUS_DISCONNECT_MASK}
2020 xudc_startup_handler(udc, intrstatus);
2023 /* Check the buffer completion interrupts */
2024 if (intrstatus & XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK) {
2025 /* Enable Reset, Suspend, Resume and Disconnect */
2026 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2027 ier |= XUSB_STATUS_INTR_EVENT_MASK;
2028 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2030 if (intrstatus & XUSB_STATUS_EP0_BUFF1_COMP_MASK)
2031 xudc_ctrl_ep_handler(udc, intrstatus);
2033 for (index = 1; index < 8; index++) {
2034 bufintr = ((intrstatus &
2035 (XUSB_STATUS_EP1_BUFF1_COMP_MASK <<
2036 (index - 1))) || (intrstatus &
2037 (XUSB_STATUS_EP1_BUFF2_COMP_MASK <<
2040 xudc_nonctrl_ep_handler(udc, index,
2046 spin_unlock_irqrestore(&udc->lock, flags);
2051 * xudc_probe - The device probe function for driver initialization.
2052 * @pdev: pointer to the platform device structure.
2054 * Return: 0 for success and error value on failure
2056 static int xudc_probe(struct platform_device *pdev)
2058 struct device_node *np = pdev->dev.of_node;
2059 struct resource *res;
2060 struct xusb_udc *udc;
2066 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2070 /* Create a dummy request for GET_STATUS, SET_ADDRESS */
2071 udc->req = devm_kzalloc(&pdev->dev, sizeof(struct xusb_req),
2076 buff = devm_kzalloc(&pdev->dev, STATUSBUFF_SIZE, GFP_KERNEL);
2080 udc->req->usb_req.buf = buff;
2082 /* Map the registers */
2083 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2084 udc->addr = devm_ioremap_resource(&pdev->dev, res);
2085 if (IS_ERR(udc->addr))
2086 return PTR_ERR(udc->addr);
2088 irq = platform_get_irq(pdev, 0);
2091 ret = devm_request_irq(&pdev->dev, irq, xudc_irq, 0,
2092 dev_name(&pdev->dev), udc);
2094 dev_dbg(&pdev->dev, "unable to request irq %d", irq);
2098 udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma");
2100 /* Setup gadget structure */
2101 udc->gadget.ops = &xusb_udc_ops;
2102 udc->gadget.max_speed = USB_SPEED_HIGH;
2103 udc->gadget.speed = USB_SPEED_UNKNOWN;
2104 udc->gadget.ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO].ep_usb;
2105 udc->gadget.name = driver_name;
2107 udc->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
2108 if (IS_ERR(udc->clk)) {
2109 if (PTR_ERR(udc->clk) != -ENOENT) {
2110 ret = PTR_ERR(udc->clk);
2115 * Clock framework support is optional, continue on,
2116 * anyways if we don't find a matching clock
2118 dev_warn(&pdev->dev, "s_axi_aclk clock property is not found\n");
2122 ret = clk_prepare_enable(udc->clk);
2124 dev_err(&pdev->dev, "Unable to enable clock.\n");
2128 spin_lock_init(&udc->lock);
2130 /* Check for IP endianness */
2131 udc->write_fn = xudc_write32_be;
2132 udc->read_fn = xudc_read32_be;
2133 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, USB_TEST_J);
2134 if ((udc->read_fn(udc->addr + XUSB_TESTMODE_OFFSET))
2136 udc->write_fn = xudc_write32;
2137 udc->read_fn = xudc_read32;
2139 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
2143 /* Set device address to 0.*/
2144 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
2146 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2148 goto err_disable_unprepare_clk;
2150 udc->dev = &udc->gadget.dev;
2152 /* Enable the interrupts.*/
2153 ier = XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_INTR_EVENT_MASK |
2154 XUSB_STATUS_FIFO_BUFF_RDY_MASK | XUSB_STATUS_FIFO_BUFF_FREE_MASK |
2155 XUSB_STATUS_SETUP_PACKET_MASK |
2156 XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK;
2158 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2160 platform_set_drvdata(pdev, udc);
2162 dev_vdbg(&pdev->dev, "%s at 0x%08X mapped to %p %s\n",
2163 driver_name, (u32)res->start, udc->addr,
2164 udc->dma_enabled ? "with DMA" : "without DMA");
2168 err_disable_unprepare_clk:
2169 clk_disable_unprepare(udc->clk);
2171 dev_err(&pdev->dev, "probe failed, %d\n", ret);
2176 * xudc_remove - Releases the resources allocated during the initialization.
2177 * @pdev: pointer to the platform device structure.
2181 static void xudc_remove(struct platform_device *pdev)
2183 struct xusb_udc *udc = platform_get_drvdata(pdev);
2185 usb_del_gadget_udc(&udc->gadget);
2186 clk_disable_unprepare(udc->clk);
2189 #ifdef CONFIG_PM_SLEEP
2190 static int xudc_suspend(struct device *dev)
2192 struct xusb_udc *udc;
2194 unsigned long flags;
2196 udc = dev_get_drvdata(dev);
2198 spin_lock_irqsave(&udc->lock, flags);
2200 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2201 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
2203 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2205 spin_unlock_irqrestore(&udc->lock, flags);
2206 if (udc->driver && udc->driver->suspend)
2207 udc->driver->suspend(&udc->gadget);
2209 clk_disable(udc->clk);
2214 static int xudc_resume(struct device *dev)
2216 struct xusb_udc *udc;
2218 unsigned long flags;
2221 udc = dev_get_drvdata(dev);
2223 ret = clk_enable(udc->clk);
2227 spin_lock_irqsave(&udc->lock, flags);
2229 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2230 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
2232 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2234 spin_unlock_irqrestore(&udc->lock, flags);
2238 #endif /* CONFIG_PM_SLEEP */
2240 static const struct dev_pm_ops xudc_pm_ops = {
2241 SET_SYSTEM_SLEEP_PM_OPS(xudc_suspend, xudc_resume)
2244 /* Match table for of_platform binding */
2245 static const struct of_device_id usb_of_match[] = {
2246 { .compatible = "xlnx,usb2-device-4.00.a", },
2247 { /* end of list */ },
2249 MODULE_DEVICE_TABLE(of, usb_of_match);
2251 static struct platform_driver xudc_driver = {
2253 .name = driver_name,
2254 .of_match_table = usb_of_match,
2257 .probe = xudc_probe,
2258 .remove_new = xudc_remove,
2261 module_platform_driver(xudc_driver);
2263 MODULE_DESCRIPTION("Xilinx udc driver");
2264 MODULE_AUTHOR("Xilinx, Inc");
2265 MODULE_LICENSE("GPL");