1 // SPDX-License-Identifier: GPL-2.0+
3 * Xilinx USB peripheral controller driver
5 * Copyright (C) 2004 by Thomas Rathbone
6 * Copyright (C) 2005 by HP Labs
7 * Copyright (C) 2005 by David Brownell
8 * Copyright (C) 2010 - 2014 Xilinx, Inc.
10 * Some parts of this driver code is based on the driver for at91-series
11 * USB peripheral controller (at91_udc.c).
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
20 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/prefetch.h>
24 #include <linux/usb/ch9.h>
25 #include <linux/usb/gadget.h>
27 /* Register offsets for the USB device.*/
28 #define XUSB_EP0_CONFIG_OFFSET 0x0000 /* EP0 Config Reg Offset */
29 #define XUSB_SETUP_PKT_ADDR_OFFSET 0x0080 /* Setup Packet Address */
30 #define XUSB_ADDRESS_OFFSET 0x0100 /* Address Register */
31 #define XUSB_CONTROL_OFFSET 0x0104 /* Control Register */
32 #define XUSB_STATUS_OFFSET 0x0108 /* Status Register */
33 #define XUSB_FRAMENUM_OFFSET 0x010C /* Frame Number Register */
34 #define XUSB_IER_OFFSET 0x0110 /* Interrupt Enable Register */
35 #define XUSB_BUFFREADY_OFFSET 0x0114 /* Buffer Ready Register */
36 #define XUSB_TESTMODE_OFFSET 0x0118 /* Test Mode Register */
37 #define XUSB_DMA_RESET_OFFSET 0x0200 /* DMA Soft Reset Register */
38 #define XUSB_DMA_CONTROL_OFFSET 0x0204 /* DMA Control Register */
39 #define XUSB_DMA_DSAR_ADDR_OFFSET 0x0208 /* DMA source Address Reg */
40 #define XUSB_DMA_DDAR_ADDR_OFFSET 0x020C /* DMA destination Addr Reg */
41 #define XUSB_DMA_LENGTH_OFFSET 0x0210 /* DMA Length Register */
42 #define XUSB_DMA_STATUS_OFFSET 0x0214 /* DMA Status Register */
44 /* Endpoint Configuration Space offsets */
45 #define XUSB_EP_CFGSTATUS_OFFSET 0x00 /* Endpoint Config Status */
46 #define XUSB_EP_BUF0COUNT_OFFSET 0x08 /* Buffer 0 Count */
47 #define XUSB_EP_BUF1COUNT_OFFSET 0x0C /* Buffer 1 Count */
49 #define XUSB_CONTROL_USB_READY_MASK 0x80000000 /* USB ready Mask */
50 #define XUSB_CONTROL_USB_RMTWAKE_MASK 0x40000000 /* Remote wake up mask */
52 /* Interrupt register related masks.*/
53 #define XUSB_STATUS_GLOBAL_INTR_MASK 0x80000000 /* Global Intr Enable */
54 #define XUSB_STATUS_DMADONE_MASK 0x04000000 /* DMA done Mask */
55 #define XUSB_STATUS_DMAERR_MASK 0x02000000 /* DMA Error Mask */
56 #define XUSB_STATUS_DMABUSY_MASK 0x80000000 /* DMA Error Mask */
57 #define XUSB_STATUS_RESUME_MASK 0x01000000 /* USB Resume Mask */
58 #define XUSB_STATUS_RESET_MASK 0x00800000 /* USB Reset Mask */
59 #define XUSB_STATUS_SUSPEND_MASK 0x00400000 /* USB Suspend Mask */
60 #define XUSB_STATUS_DISCONNECT_MASK 0x00200000 /* USB Disconnect Mask */
61 #define XUSB_STATUS_FIFO_BUFF_RDY_MASK 0x00100000 /* FIFO Buff Ready Mask */
62 #define XUSB_STATUS_FIFO_BUFF_FREE_MASK 0x00080000 /* FIFO Buff Free Mask */
63 #define XUSB_STATUS_SETUP_PACKET_MASK 0x00040000 /* Setup packet received */
64 #define XUSB_STATUS_EP1_BUFF2_COMP_MASK 0x00000200 /* EP 1 Buff 2 Processed */
65 #define XUSB_STATUS_EP1_BUFF1_COMP_MASK 0x00000002 /* EP 1 Buff 1 Processed */
66 #define XUSB_STATUS_EP0_BUFF2_COMP_MASK 0x00000100 /* EP 0 Buff 2 Processed */
67 #define XUSB_STATUS_EP0_BUFF1_COMP_MASK 0x00000001 /* EP 0 Buff 1 Processed */
68 #define XUSB_STATUS_HIGH_SPEED_MASK 0x00010000 /* USB Speed Mask */
69 /* Suspend,Reset,Suspend and Disconnect Mask */
70 #define XUSB_STATUS_INTR_EVENT_MASK 0x01E00000
71 /* Buffers completion Mask */
72 #define XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK 0x0000FEFF
73 /* Mask for buffer 0 and buffer 1 completion for all Endpoints */
74 #define XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK 0x00000101
75 #define XUSB_STATUS_EP_BUFF2_SHIFT 8 /* EP buffer offset */
77 /* Endpoint Configuration Status Register */
78 #define XUSB_EP_CFG_VALID_MASK 0x80000000 /* Endpoint Valid bit */
79 #define XUSB_EP_CFG_STALL_MASK 0x40000000 /* Endpoint Stall bit */
80 #define XUSB_EP_CFG_DATA_TOGGLE_MASK 0x08000000 /* Endpoint Data toggle */
82 /* USB device specific global configuration constants.*/
83 #define XUSB_MAX_ENDPOINTS 8 /* Maximum End Points */
84 #define XUSB_EP_NUMBER_ZERO 0 /* End point Zero */
85 /* DPRAM is the source address for DMA transfer */
86 #define XUSB_DMA_READ_FROM_DPRAM 0x80000000
87 #define XUSB_DMA_DMASR_BUSY 0x80000000 /* DMA busy */
88 #define XUSB_DMA_DMASR_ERROR 0x40000000 /* DMA Error */
90 * When this bit is set, the DMA buffer ready bit is set by hardware upon
91 * DMA transfer completion.
93 #define XUSB_DMA_BRR_CTRL 0x40000000 /* DMA bufready ctrl bit */
95 #define SETUP_PHASE 0x0000 /* Setup Phase */
96 #define DATA_PHASE 0x0001 /* Data Phase */
97 #define STATUS_PHASE 0x0002 /* Status Phase */
99 #define EP0_MAX_PACKET 64 /* Endpoint 0 maximum packet length */
100 #define STATUSBUFF_SIZE 2 /* Buffer size for GET_STATUS command */
101 #define EPNAME_SIZE 4 /* Buffer size for endpoint name */
103 /* container_of helper macros */
104 #define to_udc(g) container_of((g), struct xusb_udc, gadget)
105 #define to_xusb_ep(ep) container_of((ep), struct xusb_ep, ep_usb)
106 #define to_xusb_req(req) container_of((req), struct xusb_req, usb_req)
109 * struct xusb_req - Xilinx USB device request structure
110 * @usb_req: Linux usb request structure
111 * @queue: usb device request queue
112 * @ep: pointer to xusb_endpoint structure
115 struct usb_request usb_req;
116 struct list_head queue;
121 * struct xusb_ep - USB end point structure.
122 * @ep_usb: usb endpoint instance
123 * @queue: endpoint message queue
124 * @udc: xilinx usb peripheral driver instance pointer
125 * @desc: pointer to the usb endpoint descriptor
126 * @rambase: the endpoint buffer address
127 * @offset: the endpoint register offset value
128 * @name: name of the endpoint
129 * @epnumber: endpoint number
130 * @maxpacket: maximum packet size the endpoint can store
131 * @buffer0count: the size of the packet recieved in the first buffer
132 * @buffer1count: the size of the packet received in the second buffer
133 * @curbufnum: current buffer of endpoint that will be processed next
134 * @buffer0ready: the busy state of first buffer
135 * @buffer1ready: the busy state of second buffer
136 * @is_in: endpoint direction (IN or OUT)
137 * @is_iso: endpoint type(isochronous or non isochronous)
140 struct usb_ep ep_usb;
141 struct list_head queue;
142 struct xusb_udc *udc;
143 const struct usb_endpoint_descriptor *desc;
159 * struct xusb_udc - USB peripheral driver structure
160 * @gadget: USB gadget driver instance
161 * @ep: an array of endpoint structures
162 * @driver: pointer to the usb gadget driver instance
163 * @setup: usb_ctrlrequest structure for control requests
164 * @req: pointer to dummy request for get status command
165 * @dev: pointer to device structure in gadget
166 * @usb_state: device in suspended state or not
167 * @remote_wkp: remote wakeup enabled by host
168 * @setupseqtx: tx status
169 * @setupseqrx: rx status
170 * @addr: the usb device base address
171 * @lock: instance of spinlock
172 * @dma_enabled: flag indicating whether the dma is included in the system
173 * @clk: pointer to struct clk
174 * @read_fn: function pointer to read device registers
175 * @write_fn: function pointer to write to device registers
178 struct usb_gadget gadget;
179 struct xusb_ep ep[8];
180 struct usb_gadget_driver *driver;
181 struct usb_ctrlrequest setup;
182 struct xusb_req *req;
193 unsigned int (*read_fn)(void __iomem *reg);
194 void (*write_fn)(void __iomem *, u32, u32);
197 /* Endpoint buffer start addresses in the core */
198 static u32 rambase[8] = { 0x22, 0x1000, 0x1100, 0x1200, 0x1300, 0x1400, 0x1500,
201 static const char driver_name[] = "xilinx-udc";
202 static const char ep0name[] = "ep0";
204 /* Control endpoint configuration.*/
205 static const struct usb_endpoint_descriptor config_bulk_out_desc = {
206 .bLength = USB_DT_ENDPOINT_SIZE,
207 .bDescriptorType = USB_DT_ENDPOINT,
208 .bEndpointAddress = USB_DIR_OUT,
209 .bmAttributes = USB_ENDPOINT_XFER_BULK,
210 .wMaxPacketSize = cpu_to_le16(EP0_MAX_PACKET),
214 * xudc_write32 - little endian write to device registers
215 * @addr: base addr of device registers
216 * @offset: register offset
217 * @val: data to be written
219 static void xudc_write32(void __iomem *addr, u32 offset, u32 val)
221 iowrite32(val, addr + offset);
225 * xudc_read32 - little endian read from device registers
226 * @addr: addr of device register
227 * Return: value at addr
229 static unsigned int xudc_read32(void __iomem *addr)
231 return ioread32(addr);
235 * xudc_write32_be - big endian write to device registers
236 * @addr: base addr of device registers
237 * @offset: register offset
238 * @val: data to be written
240 static void xudc_write32_be(void __iomem *addr, u32 offset, u32 val)
242 iowrite32be(val, addr + offset);
246 * xudc_read32_be - big endian read from device registers
247 * @addr: addr of device register
248 * Return: value at addr
250 static unsigned int xudc_read32_be(void __iomem *addr)
252 return ioread32be(addr);
256 * xudc_wrstatus - Sets up the usb device status stages.
257 * @udc: pointer to the usb device controller structure.
259 static void xudc_wrstatus(struct xusb_udc *udc)
261 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
264 epcfgreg = udc->read_fn(udc->addr + ep0->offset)|
265 XUSB_EP_CFG_DATA_TOGGLE_MASK;
266 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
267 udc->write_fn(udc->addr, ep0->offset + XUSB_EP_BUF0COUNT_OFFSET, 0);
268 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
272 * xudc_epconfig - Configures the given endpoint.
273 * @ep: pointer to the usb device endpoint structure.
274 * @udc: pointer to the usb peripheral controller structure.
276 * This function configures a specific endpoint with the given configuration
279 static void xudc_epconfig(struct xusb_ep *ep, struct xusb_udc *udc)
284 * Configure the end point direction, type, Max Packet Size and the
285 * EP buffer location.
287 epcfgreg = ((ep->is_in << 29) | (ep->is_iso << 28) |
288 (ep->ep_usb.maxpacket << 15) | (ep->rambase));
289 udc->write_fn(udc->addr, ep->offset, epcfgreg);
291 /* Set the Buffer count and the Buffer ready bits.*/
292 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF0COUNT_OFFSET,
294 udc->write_fn(udc->addr, ep->offset + XUSB_EP_BUF1COUNT_OFFSET,
296 if (ep->buffer0ready)
297 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
299 if (ep->buffer1ready)
300 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
301 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
305 * xudc_start_dma - Starts DMA transfer.
306 * @ep: pointer to the usb device endpoint structure.
307 * @src: DMA source address.
308 * @dst: DMA destination address.
309 * @length: number of bytes to transfer.
311 * Return: 0 on success, error code on failure
313 * This function starts DMA transfer by writing to DMA source,
314 * destination and lenth registers.
316 static int xudc_start_dma(struct xusb_ep *ep, dma_addr_t src,
317 dma_addr_t dst, u32 length)
319 struct xusb_udc *udc = ep->udc;
325 * Set the addresses in the DMA source and
326 * destination registers and then set the length
327 * into the DMA length register.
329 udc->write_fn(udc->addr, XUSB_DMA_DSAR_ADDR_OFFSET, src);
330 udc->write_fn(udc->addr, XUSB_DMA_DDAR_ADDR_OFFSET, dst);
331 udc->write_fn(udc->addr, XUSB_DMA_LENGTH_OFFSET, length);
334 * Wait till DMA transaction is complete and
335 * check whether the DMA transaction was
339 reg = udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET);
340 if (!(reg & XUSB_DMA_DMASR_BUSY))
344 * We can't sleep here, because it's also called from
349 dev_err(udc->dev, "DMA timeout\n");
355 if ((udc->read_fn(udc->addr + XUSB_DMA_STATUS_OFFSET) &
356 XUSB_DMA_DMASR_ERROR) == XUSB_DMA_DMASR_ERROR){
357 dev_err(udc->dev, "DMA Error\n");
365 * xudc_dma_send - Sends IN data using DMA.
366 * @ep: pointer to the usb device endpoint structure.
367 * @req: pointer to the usb request structure.
368 * @buffer: pointer to data to be sent.
369 * @length: number of bytes to send.
371 * Return: 0 on success, -EAGAIN if no buffer is free and error
374 * This function sends data using DMA.
376 static int xudc_dma_send(struct xusb_ep *ep, struct xusb_req *req,
377 u8 *buffer, u32 length)
382 struct xusb_udc *udc = ep->udc;
384 src = req->usb_req.dma + req->usb_req.actual;
385 if (req->usb_req.length)
386 dma_sync_single_for_device(udc->dev, src,
387 length, DMA_TO_DEVICE);
388 if (!ep->curbufnum && !ep->buffer0ready) {
389 /* Get the Buffer address and copy the transmit data.*/
390 eprambase = (u32 __force *)(udc->addr + ep->rambase);
391 dst = virt_to_phys(eprambase);
392 udc->write_fn(udc->addr, ep->offset +
393 XUSB_EP_BUF0COUNT_OFFSET, length);
394 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
395 XUSB_DMA_BRR_CTRL | (1 << ep->epnumber));
396 ep->buffer0ready = 1;
398 } else if (ep->curbufnum && !ep->buffer1ready) {
399 /* Get the Buffer address and copy the transmit data.*/
400 eprambase = (u32 __force *)(udc->addr + ep->rambase +
401 ep->ep_usb.maxpacket);
402 dst = virt_to_phys(eprambase);
403 udc->write_fn(udc->addr, ep->offset +
404 XUSB_EP_BUF1COUNT_OFFSET, length);
405 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
406 XUSB_DMA_BRR_CTRL | (1 << (ep->epnumber +
407 XUSB_STATUS_EP_BUFF2_SHIFT)));
408 ep->buffer1ready = 1;
411 /* None of ping pong buffers are ready currently .*/
415 return xudc_start_dma(ep, src, dst, length);
419 * xudc_dma_receive - Receives OUT data using DMA.
420 * @ep: pointer to the usb device endpoint structure.
421 * @req: pointer to the usb request structure.
422 * @buffer: pointer to storage buffer of received data.
423 * @length: number of bytes to receive.
425 * Return: 0 on success, -EAGAIN if no buffer is free and error
428 * This function receives data using DMA.
430 static int xudc_dma_receive(struct xusb_ep *ep, struct xusb_req *req,
431 u8 *buffer, u32 length)
436 struct xusb_udc *udc = ep->udc;
438 dst = req->usb_req.dma + req->usb_req.actual;
439 if (!ep->curbufnum && !ep->buffer0ready) {
440 /* Get the Buffer address and copy the transmit data */
441 eprambase = (u32 __force *)(udc->addr + ep->rambase);
442 src = virt_to_phys(eprambase);
443 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
444 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
445 (1 << ep->epnumber));
446 ep->buffer0ready = 1;
448 } else if (ep->curbufnum && !ep->buffer1ready) {
449 /* Get the Buffer address and copy the transmit data */
450 eprambase = (u32 __force *)(udc->addr +
451 ep->rambase + ep->ep_usb.maxpacket);
452 src = virt_to_phys(eprambase);
453 udc->write_fn(udc->addr, XUSB_DMA_CONTROL_OFFSET,
454 XUSB_DMA_BRR_CTRL | XUSB_DMA_READ_FROM_DPRAM |
455 (1 << (ep->epnumber +
456 XUSB_STATUS_EP_BUFF2_SHIFT)));
457 ep->buffer1ready = 1;
460 /* None of the ping-pong buffers are ready currently */
464 return xudc_start_dma(ep, src, dst, length);
468 * xudc_eptxrx - Transmits or receives data to or from an endpoint.
469 * @ep: pointer to the usb endpoint configuration structure.
470 * @req: pointer to the usb request structure.
471 * @bufferptr: pointer to buffer containing the data to be sent.
472 * @bufferlen: The number of data bytes to be sent.
474 * Return: 0 on success, -EAGAIN if no buffer is free.
476 * This function copies the transmit/receive data to/from the end point buffer
477 * and enables the buffer for transmission/reception.
479 static int xudc_eptxrx(struct xusb_ep *ep, struct xusb_req *req,
480 u8 *bufferptr, u32 bufferlen)
485 struct xusb_udc *udc = ep->udc;
487 bytestosend = bufferlen;
488 if (udc->dma_enabled) {
490 rc = xudc_dma_send(ep, req, bufferptr, bufferlen);
492 rc = xudc_dma_receive(ep, req, bufferptr, bufferlen);
495 /* Put the transmit buffer into the correct ping-pong buffer.*/
496 if (!ep->curbufnum && !ep->buffer0ready) {
497 /* Get the Buffer address and copy the transmit data.*/
498 eprambase = (u32 __force *)(udc->addr + ep->rambase);
500 memcpy(eprambase, bufferptr, bytestosend);
501 udc->write_fn(udc->addr, ep->offset +
502 XUSB_EP_BUF0COUNT_OFFSET, bufferlen);
504 memcpy(bufferptr, eprambase, bytestosend);
507 * Enable the buffer for transmission.
509 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
511 ep->buffer0ready = 1;
513 } else if (ep->curbufnum && !ep->buffer1ready) {
514 /* Get the Buffer address and copy the transmit data.*/
515 eprambase = (u32 __force *)(udc->addr + ep->rambase +
516 ep->ep_usb.maxpacket);
518 memcpy(eprambase, bufferptr, bytestosend);
519 udc->write_fn(udc->addr, ep->offset +
520 XUSB_EP_BUF1COUNT_OFFSET, bufferlen);
522 memcpy(bufferptr, eprambase, bytestosend);
525 * Enable the buffer for transmission.
527 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
528 1 << (ep->epnumber + XUSB_STATUS_EP_BUFF2_SHIFT));
529 ep->buffer1ready = 1;
532 /* None of the ping-pong buffers are ready currently */
539 * xudc_done - Exeutes the endpoint data transfer completion tasks.
540 * @ep: pointer to the usb device endpoint structure.
541 * @req: pointer to the usb request structure.
542 * @status: Status of the data transfer.
544 * Deletes the message from the queue and updates data transfer completion
547 static void xudc_done(struct xusb_ep *ep, struct xusb_req *req, int status)
549 struct xusb_udc *udc = ep->udc;
551 list_del_init(&req->queue);
553 if (req->usb_req.status == -EINPROGRESS)
554 req->usb_req.status = status;
556 status = req->usb_req.status;
558 if (status && status != -ESHUTDOWN)
559 dev_dbg(udc->dev, "%s done %p, status %d\n",
560 ep->ep_usb.name, req, status);
561 /* unmap request if DMA is present*/
562 if (udc->dma_enabled && ep->epnumber && req->usb_req.length)
563 usb_gadget_unmap_request(&udc->gadget, &req->usb_req,
566 if (req->usb_req.complete) {
567 spin_unlock(&udc->lock);
568 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
569 spin_lock(&udc->lock);
574 * xudc_read_fifo - Reads the data from the given endpoint buffer.
575 * @ep: pointer to the usb device endpoint structure.
576 * @req: pointer to the usb request structure.
578 * Return: 0 if request is completed and -EAGAIN if not completed.
580 * Pulls OUT packet data from the endpoint buffer.
582 static int xudc_read_fifo(struct xusb_ep *ep, struct xusb_req *req)
585 u32 is_short, count, bufferspace;
589 int retval = -EAGAIN;
590 struct xusb_udc *udc = ep->udc;
592 if (ep->buffer0ready && ep->buffer1ready) {
593 dev_dbg(udc->dev, "Packet NOT ready!\n");
598 bufoffset = XUSB_EP_BUF1COUNT_OFFSET;
600 bufoffset = XUSB_EP_BUF0COUNT_OFFSET;
602 count = udc->read_fn(udc->addr + ep->offset + bufoffset);
604 if (!ep->buffer0ready && !ep->buffer1ready)
607 buf = req->usb_req.buf + req->usb_req.actual;
609 bufferspace = req->usb_req.length - req->usb_req.actual;
610 is_short = count < ep->ep_usb.maxpacket;
612 if (unlikely(!bufferspace)) {
614 * This happens when the driver's buffer
615 * is smaller than what the host sent.
616 * discard the extra data.
618 if (req->usb_req.status != -EOVERFLOW)
619 dev_dbg(udc->dev, "%s overflow %d\n",
620 ep->ep_usb.name, count);
621 req->usb_req.status = -EOVERFLOW;
622 xudc_done(ep, req, -EOVERFLOW);
626 ret = xudc_eptxrx(ep, req, buf, count);
629 req->usb_req.actual += min(count, bufferspace);
630 dev_dbg(udc->dev, "read %s, %d bytes%s req %p %d/%d\n",
631 ep->ep_usb.name, count, is_short ? "/S" : "", req,
632 req->usb_req.actual, req->usb_req.length);
635 if ((req->usb_req.actual == req->usb_req.length) || is_short) {
636 if (udc->dma_enabled && req->usb_req.length)
637 dma_sync_single_for_cpu(udc->dev,
641 xudc_done(ep, req, 0);
650 dev_dbg(udc->dev, "receive busy\n");
654 /* DMA error, dequeue the request */
655 xudc_done(ep, req, -ECONNRESET);
664 * xudc_write_fifo - Writes data into the given endpoint buffer.
665 * @ep: pointer to the usb device endpoint structure.
666 * @req: pointer to the usb request structure.
668 * Return: 0 if request is completed and -EAGAIN if not completed.
670 * Loads endpoint buffer for an IN packet.
672 static int xudc_write_fifo(struct xusb_ep *ep, struct xusb_req *req)
677 int retval = -EAGAIN;
678 struct xusb_udc *udc = ep->udc;
679 int is_last, is_short = 0;
682 max = le16_to_cpu(ep->desc->wMaxPacketSize);
683 buf = req->usb_req.buf + req->usb_req.actual;
685 length = req->usb_req.length - req->usb_req.actual;
686 length = min(length, max);
688 ret = xudc_eptxrx(ep, req, buf, length);
691 req->usb_req.actual += length;
692 if (unlikely(length != max)) {
693 is_last = is_short = 1;
695 if (likely(req->usb_req.length !=
696 req->usb_req.actual) || req->usb_req.zero)
701 dev_dbg(udc->dev, "%s: wrote %s %d bytes%s%s %d left %p\n",
702 __func__, ep->ep_usb.name, length, is_last ? "/L" : "",
703 is_short ? "/S" : "",
704 req->usb_req.length - req->usb_req.actual, req);
707 xudc_done(ep, req, 0);
712 dev_dbg(udc->dev, "Send busy\n");
716 /* DMA error, dequeue the request */
717 xudc_done(ep, req, -ECONNRESET);
726 * xudc_nuke - Cleans up the data transfer message list.
727 * @ep: pointer to the usb device endpoint structure.
728 * @status: Status of the data transfer.
730 static void xudc_nuke(struct xusb_ep *ep, int status)
732 struct xusb_req *req;
734 while (!list_empty(&ep->queue)) {
735 req = list_first_entry(&ep->queue, struct xusb_req, queue);
736 xudc_done(ep, req, status);
741 * xudc_ep_set_halt - Stalls/unstalls the given endpoint.
742 * @_ep: pointer to the usb device endpoint structure.
743 * @value: value to indicate stall/unstall.
745 * Return: 0 for success and error value on failure
747 static int xudc_ep_set_halt(struct usb_ep *_ep, int value)
749 struct xusb_ep *ep = to_xusb_ep(_ep);
750 struct xusb_udc *udc;
754 if (!_ep || (!ep->desc && ep->epnumber)) {
755 pr_debug("%s: bad ep or descriptor\n", __func__);
760 if (ep->is_in && (!list_empty(&ep->queue)) && value) {
761 dev_dbg(udc->dev, "requests pending can't halt\n");
765 if (ep->buffer0ready || ep->buffer1ready) {
766 dev_dbg(udc->dev, "HW buffers busy can't halt\n");
770 spin_lock_irqsave(&udc->lock, flags);
773 /* Stall the device.*/
774 epcfgreg = udc->read_fn(udc->addr + ep->offset);
775 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
776 udc->write_fn(udc->addr, ep->offset, epcfgreg);
778 /* Unstall the device.*/
779 epcfgreg = udc->read_fn(udc->addr + ep->offset);
780 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
781 udc->write_fn(udc->addr, ep->offset, epcfgreg);
783 /* Reset the toggle bit.*/
784 epcfgreg = udc->read_fn(ep->udc->addr + ep->offset);
785 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
786 udc->write_fn(udc->addr, ep->offset, epcfgreg);
790 spin_unlock_irqrestore(&udc->lock, flags);
795 * __xudc_ep_enable - Enables the given endpoint.
796 * @ep: pointer to the xusb endpoint structure.
797 * @desc: pointer to usb endpoint descriptor.
799 * Return: 0 for success and error value on failure
801 static int __xudc_ep_enable(struct xusb_ep *ep,
802 const struct usb_endpoint_descriptor *desc)
804 struct xusb_udc *udc = ep->udc;
810 ep->is_in = ((desc->bEndpointAddress & USB_DIR_IN) != 0);
811 /* Bit 3...0:endpoint number */
812 ep->epnumber = (desc->bEndpointAddress & 0x0f);
814 ep->ep_usb.desc = desc;
815 tmp = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
816 ep->ep_usb.maxpacket = maxpacket = le16_to_cpu(desc->wMaxPacketSize);
819 case USB_ENDPOINT_XFER_CONTROL:
820 dev_dbg(udc->dev, "only one control endpoint\n");
824 case USB_ENDPOINT_XFER_INT:
827 if (maxpacket > 64) {
828 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
832 case USB_ENDPOINT_XFER_BULK:
835 if (!(is_power_of_2(maxpacket) && maxpacket >= 8 &&
837 dev_dbg(udc->dev, "bogus maxpacket %d\n", maxpacket);
841 case USB_ENDPOINT_XFER_ISOC:
847 ep->buffer0ready = false;
848 ep->buffer1ready = false;
850 ep->rambase = rambase[ep->epnumber];
851 xudc_epconfig(ep, udc);
853 dev_dbg(udc->dev, "Enable Endpoint %d max pkt is %d\n",
854 ep->epnumber, maxpacket);
856 /* Enable the End point.*/
857 epcfg = udc->read_fn(udc->addr + ep->offset);
858 epcfg |= XUSB_EP_CFG_VALID_MASK;
859 udc->write_fn(udc->addr, ep->offset, epcfg);
863 /* Enable buffer completion interrupts for endpoint */
864 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
865 ier |= (XUSB_STATUS_INTR_BUFF_COMP_SHIFT_MASK << ep->epnumber);
866 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
868 /* for OUT endpoint set buffers ready to receive */
869 if (ep->epnumber && !ep->is_in) {
870 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
872 ep->buffer0ready = true;
873 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET,
874 (1 << (ep->epnumber +
875 XUSB_STATUS_EP_BUFF2_SHIFT)));
876 ep->buffer1ready = true;
883 * xudc_ep_enable - Enables the given endpoint.
884 * @_ep: pointer to the usb endpoint structure.
885 * @desc: pointer to usb endpoint descriptor.
887 * Return: 0 for success and error value on failure
889 static int xudc_ep_enable(struct usb_ep *_ep,
890 const struct usb_endpoint_descriptor *desc)
893 struct xusb_udc *udc;
897 if (!_ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
898 pr_debug("%s: bad ep or descriptor\n", __func__);
902 ep = to_xusb_ep(_ep);
905 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
906 dev_dbg(udc->dev, "bogus device state\n");
910 spin_lock_irqsave(&udc->lock, flags);
911 ret = __xudc_ep_enable(ep, desc);
912 spin_unlock_irqrestore(&udc->lock, flags);
918 * xudc_ep_disable - Disables the given endpoint.
919 * @_ep: pointer to the usb endpoint structure.
921 * Return: 0 for success and error value on failure
923 static int xudc_ep_disable(struct usb_ep *_ep)
928 struct xusb_udc *udc;
931 pr_debug("%s: invalid ep\n", __func__);
935 ep = to_xusb_ep(_ep);
938 spin_lock_irqsave(&udc->lock, flags);
940 xudc_nuke(ep, -ESHUTDOWN);
942 /* Restore the endpoint's pristine config */
944 ep->ep_usb.desc = NULL;
946 dev_dbg(udc->dev, "USB Ep %d disable\n ", ep->epnumber);
947 /* Disable the endpoint.*/
948 epcfg = udc->read_fn(udc->addr + ep->offset);
949 epcfg &= ~XUSB_EP_CFG_VALID_MASK;
950 udc->write_fn(udc->addr, ep->offset, epcfg);
952 spin_unlock_irqrestore(&udc->lock, flags);
957 * xudc_ep_alloc_request - Initializes the request queue.
958 * @_ep: pointer to the usb endpoint structure.
959 * @gfp_flags: Flags related to the request call.
961 * Return: pointer to request structure on success and a NULL on failure.
963 static struct usb_request *xudc_ep_alloc_request(struct usb_ep *_ep,
966 struct xusb_ep *ep = to_xusb_ep(_ep);
967 struct xusb_req *req;
969 req = kzalloc(sizeof(*req), gfp_flags);
974 INIT_LIST_HEAD(&req->queue);
975 return &req->usb_req;
979 * xudc_free_request - Releases the request from queue.
980 * @_ep: pointer to the usb device endpoint structure.
981 * @_req: pointer to the usb request structure.
983 static void xudc_free_request(struct usb_ep *_ep, struct usb_request *_req)
985 struct xusb_req *req = to_xusb_req(_req);
991 * __xudc_ep0_queue - Adds the request to endpoint 0 queue.
992 * @ep0: pointer to the xusb endpoint 0 structure.
993 * @req: pointer to the xusb request structure.
995 * Return: 0 for success and error value on failure
997 static int __xudc_ep0_queue(struct xusb_ep *ep0, struct xusb_req *req)
999 struct xusb_udc *udc = ep0->udc;
1003 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1004 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1007 if (!list_empty(&ep0->queue)) {
1008 dev_dbg(udc->dev, "%s:ep0 busy\n", __func__);
1012 req->usb_req.status = -EINPROGRESS;
1013 req->usb_req.actual = 0;
1015 list_add_tail(&req->queue, &ep0->queue);
1017 if (udc->setup.bRequestType & USB_DIR_IN) {
1018 prefetch(req->usb_req.buf);
1019 length = req->usb_req.length;
1020 corebuf = (void __force *) ((ep0->rambase << 2) +
1022 length = req->usb_req.actual = min_t(u32, length,
1024 memcpy(corebuf, req->usb_req.buf, length);
1025 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, length);
1026 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1028 if (udc->setup.wLength) {
1029 /* Enable EP0 buffer to receive data */
1030 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1031 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1041 * xudc_ep0_queue - Adds the request to endpoint 0 queue.
1042 * @_ep: pointer to the usb endpoint 0 structure.
1043 * @_req: pointer to the usb request structure.
1044 * @gfp_flags: Flags related to the request call.
1046 * Return: 0 for success and error value on failure
1048 static int xudc_ep0_queue(struct usb_ep *_ep, struct usb_request *_req,
1051 struct xusb_req *req = to_xusb_req(_req);
1052 struct xusb_ep *ep0 = to_xusb_ep(_ep);
1053 struct xusb_udc *udc = ep0->udc;
1054 unsigned long flags;
1057 spin_lock_irqsave(&udc->lock, flags);
1058 ret = __xudc_ep0_queue(ep0, req);
1059 spin_unlock_irqrestore(&udc->lock, flags);
1065 * xudc_ep_queue - Adds the request to endpoint queue.
1066 * @_ep: pointer to the usb endpoint structure.
1067 * @_req: pointer to the usb request structure.
1068 * @gfp_flags: Flags related to the request call.
1070 * Return: 0 for success and error value on failure
1072 static int xudc_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1075 struct xusb_req *req = to_xusb_req(_req);
1076 struct xusb_ep *ep = to_xusb_ep(_ep);
1077 struct xusb_udc *udc = ep->udc;
1079 unsigned long flags;
1082 dev_dbg(udc->dev, "%s: queuing request to disabled %s\n",
1083 __func__, ep->name);
1087 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1088 dev_dbg(udc->dev, "%s, bogus device state\n", __func__);
1092 spin_lock_irqsave(&udc->lock, flags);
1094 _req->status = -EINPROGRESS;
1097 if (udc->dma_enabled) {
1098 ret = usb_gadget_map_request(&udc->gadget, &req->usb_req,
1101 dev_dbg(udc->dev, "gadget_map failed ep%d\n",
1103 spin_unlock_irqrestore(&udc->lock, flags);
1108 if (list_empty(&ep->queue)) {
1110 dev_dbg(udc->dev, "xudc_write_fifo from ep_queue\n");
1111 if (!xudc_write_fifo(ep, req))
1114 dev_dbg(udc->dev, "xudc_read_fifo from ep_queue\n");
1115 if (!xudc_read_fifo(ep, req))
1121 list_add_tail(&req->queue, &ep->queue);
1123 spin_unlock_irqrestore(&udc->lock, flags);
1128 * xudc_ep_dequeue - Removes the request from the queue.
1129 * @_ep: pointer to the usb device endpoint structure.
1130 * @_req: pointer to the usb request structure.
1132 * Return: 0 for success and error value on failure
1134 static int xudc_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1136 struct xusb_ep *ep = to_xusb_ep(_ep);
1137 struct xusb_req *req = NULL;
1138 struct xusb_req *iter;
1139 struct xusb_udc *udc = ep->udc;
1140 unsigned long flags;
1142 spin_lock_irqsave(&udc->lock, flags);
1143 /* Make sure it's actually queued on this endpoint */
1144 list_for_each_entry(iter, &ep->queue, queue) {
1145 if (&iter->usb_req != _req)
1151 spin_unlock_irqrestore(&udc->lock, flags);
1154 xudc_done(ep, req, -ECONNRESET);
1155 spin_unlock_irqrestore(&udc->lock, flags);
1161 * xudc_ep0_enable - Enables the given endpoint.
1162 * @ep: pointer to the usb endpoint structure.
1163 * @desc: pointer to usb endpoint descriptor.
1165 * Return: error always.
1167 * endpoint 0 enable should not be called by gadget layer.
1169 static int xudc_ep0_enable(struct usb_ep *ep,
1170 const struct usb_endpoint_descriptor *desc)
1176 * xudc_ep0_disable - Disables the given endpoint.
1177 * @ep: pointer to the usb endpoint structure.
1179 * Return: error always.
1181 * endpoint 0 disable should not be called by gadget layer.
1183 static int xudc_ep0_disable(struct usb_ep *ep)
1188 static const struct usb_ep_ops xusb_ep0_ops = {
1189 .enable = xudc_ep0_enable,
1190 .disable = xudc_ep0_disable,
1191 .alloc_request = xudc_ep_alloc_request,
1192 .free_request = xudc_free_request,
1193 .queue = xudc_ep0_queue,
1194 .dequeue = xudc_ep_dequeue,
1195 .set_halt = xudc_ep_set_halt,
1198 static const struct usb_ep_ops xusb_ep_ops = {
1199 .enable = xudc_ep_enable,
1200 .disable = xudc_ep_disable,
1201 .alloc_request = xudc_ep_alloc_request,
1202 .free_request = xudc_free_request,
1203 .queue = xudc_ep_queue,
1204 .dequeue = xudc_ep_dequeue,
1205 .set_halt = xudc_ep_set_halt,
1209 * xudc_get_frame - Reads the current usb frame number.
1210 * @gadget: pointer to the usb gadget structure.
1212 * Return: current frame number for success and error value on failure.
1214 static int xudc_get_frame(struct usb_gadget *gadget)
1216 struct xusb_udc *udc;
1222 udc = to_udc(gadget);
1223 frame = udc->read_fn(udc->addr + XUSB_FRAMENUM_OFFSET);
1228 * xudc_wakeup - Send remote wakeup signal to host
1229 * @gadget: pointer to the usb gadget structure.
1231 * Return: 0 on success and error on failure
1233 static int xudc_wakeup(struct usb_gadget *gadget)
1235 struct xusb_udc *udc = to_udc(gadget);
1237 int status = -EINVAL;
1238 unsigned long flags;
1240 spin_lock_irqsave(&udc->lock, flags);
1242 /* Remote wake up not enabled by host */
1243 if (!udc->remote_wkp)
1246 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1247 crtlreg |= XUSB_CONTROL_USB_RMTWAKE_MASK;
1248 /* set remote wake up bit */
1249 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1251 * wait for a while and reset remote wake up bit since this bit
1252 * is not cleared by HW after sending remote wakeup to host.
1256 crtlreg &= ~XUSB_CONTROL_USB_RMTWAKE_MASK;
1257 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1260 spin_unlock_irqrestore(&udc->lock, flags);
1265 * xudc_pullup - start/stop USB traffic
1266 * @gadget: pointer to the usb gadget structure.
1267 * @is_on: flag to start or stop
1271 * This function starts/stops SIE engine of IP based on is_on.
1273 static int xudc_pullup(struct usb_gadget *gadget, int is_on)
1275 struct xusb_udc *udc = to_udc(gadget);
1276 unsigned long flags;
1279 spin_lock_irqsave(&udc->lock, flags);
1281 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
1283 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
1285 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
1287 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
1289 spin_unlock_irqrestore(&udc->lock, flags);
1295 * xudc_eps_init - initialize endpoints.
1296 * @udc: pointer to the usb device controller structure.
1298 static void xudc_eps_init(struct xusb_udc *udc)
1302 INIT_LIST_HEAD(&udc->gadget.ep_list);
1304 for (ep_number = 0; ep_number < XUSB_MAX_ENDPOINTS; ep_number++) {
1305 struct xusb_ep *ep = &udc->ep[ep_number];
1308 list_add_tail(&ep->ep_usb.ep_list,
1309 &udc->gadget.ep_list);
1310 usb_ep_set_maxpacket_limit(&ep->ep_usb,
1311 (unsigned short) ~0);
1312 snprintf(ep->name, EPNAME_SIZE, "ep%d", ep_number);
1313 ep->ep_usb.name = ep->name;
1314 ep->ep_usb.ops = &xusb_ep_ops;
1316 ep->ep_usb.caps.type_iso = true;
1317 ep->ep_usb.caps.type_bulk = true;
1318 ep->ep_usb.caps.type_int = true;
1320 ep->ep_usb.name = ep0name;
1321 usb_ep_set_maxpacket_limit(&ep->ep_usb, EP0_MAX_PACKET);
1322 ep->ep_usb.ops = &xusb_ep0_ops;
1324 ep->ep_usb.caps.type_control = true;
1327 ep->ep_usb.caps.dir_in = true;
1328 ep->ep_usb.caps.dir_out = true;
1331 ep->epnumber = ep_number;
1334 * The configuration register address offset between
1335 * each endpoint is 0x10.
1337 ep->offset = XUSB_EP0_CONFIG_OFFSET + (ep_number * 0x10);
1341 xudc_epconfig(ep, udc);
1343 /* Initialize one queue per endpoint */
1344 INIT_LIST_HEAD(&ep->queue);
1349 * xudc_stop_activity - Stops any further activity on the device.
1350 * @udc: pointer to the usb device controller structure.
1352 static void xudc_stop_activity(struct xusb_udc *udc)
1357 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1359 xudc_nuke(ep, -ESHUTDOWN);
1364 * xudc_start - Starts the device.
1365 * @gadget: pointer to the usb gadget structure
1366 * @driver: pointer to gadget driver structure
1368 * Return: zero on success and error on failure
1370 static int xudc_start(struct usb_gadget *gadget,
1371 struct usb_gadget_driver *driver)
1373 struct xusb_udc *udc = to_udc(gadget);
1374 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1375 const struct usb_endpoint_descriptor *desc = &config_bulk_out_desc;
1376 unsigned long flags;
1379 spin_lock_irqsave(&udc->lock, flags);
1382 dev_err(udc->dev, "%s is already bound to %s\n",
1383 udc->gadget.name, udc->driver->driver.name);
1388 /* hook up the driver */
1389 udc->driver = driver;
1390 udc->gadget.speed = driver->max_speed;
1392 /* Enable the control endpoint. */
1393 ret = __xudc_ep_enable(ep0, desc);
1395 /* Set device address and remote wakeup to 0 */
1396 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1397 udc->remote_wkp = 0;
1399 spin_unlock_irqrestore(&udc->lock, flags);
1404 * xudc_stop - stops the device.
1405 * @gadget: pointer to the usb gadget structure
1407 * Return: zero always
1409 static int xudc_stop(struct usb_gadget *gadget)
1411 struct xusb_udc *udc = to_udc(gadget);
1412 unsigned long flags;
1414 spin_lock_irqsave(&udc->lock, flags);
1416 udc->gadget.speed = USB_SPEED_UNKNOWN;
1419 /* Set device address and remote wakeup to 0 */
1420 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1421 udc->remote_wkp = 0;
1423 xudc_stop_activity(udc);
1425 spin_unlock_irqrestore(&udc->lock, flags);
1430 static const struct usb_gadget_ops xusb_udc_ops = {
1431 .get_frame = xudc_get_frame,
1432 .wakeup = xudc_wakeup,
1433 .pullup = xudc_pullup,
1434 .udc_start = xudc_start,
1435 .udc_stop = xudc_stop,
1439 * xudc_clear_stall_all_ep - clears stall of every endpoint.
1440 * @udc: pointer to the udc structure.
1442 static void xudc_clear_stall_all_ep(struct xusb_udc *udc)
1448 for (i = 0; i < XUSB_MAX_ENDPOINTS; i++) {
1450 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1451 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1452 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1454 /* Reset the toggle bit.*/
1455 epcfgreg = udc->read_fn(udc->addr + ep->offset);
1456 epcfgreg &= ~XUSB_EP_CFG_DATA_TOGGLE_MASK;
1457 udc->write_fn(udc->addr, ep->offset, epcfgreg);
1463 * xudc_startup_handler - The usb device controller interrupt handler.
1464 * @udc: pointer to the udc structure.
1465 * @intrstatus: The mask value containing the interrupt sources.
1467 * This function handles the RESET,SUSPEND,RESUME and DISCONNECT interrupts.
1469 static void xudc_startup_handler(struct xusb_udc *udc, u32 intrstatus)
1473 if (intrstatus & XUSB_STATUS_RESET_MASK) {
1475 dev_dbg(udc->dev, "Reset\n");
1477 if (intrstatus & XUSB_STATUS_HIGH_SPEED_MASK)
1478 udc->gadget.speed = USB_SPEED_HIGH;
1480 udc->gadget.speed = USB_SPEED_FULL;
1482 xudc_stop_activity(udc);
1483 xudc_clear_stall_all_ep(udc);
1484 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
1486 /* Set device address and remote wakeup to 0 */
1487 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
1488 udc->remote_wkp = 0;
1490 /* Enable the suspend, resume and disconnect */
1491 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1492 intrreg |= XUSB_STATUS_SUSPEND_MASK | XUSB_STATUS_RESUME_MASK |
1493 XUSB_STATUS_DISCONNECT_MASK;
1494 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1496 if (intrstatus & XUSB_STATUS_SUSPEND_MASK) {
1498 dev_dbg(udc->dev, "Suspend\n");
1500 /* Enable the reset, resume and disconnect */
1501 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1502 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1503 XUSB_STATUS_DISCONNECT_MASK;
1504 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1506 udc->usb_state = USB_STATE_SUSPENDED;
1508 if (udc->driver->suspend) {
1509 spin_unlock(&udc->lock);
1510 udc->driver->suspend(&udc->gadget);
1511 spin_lock(&udc->lock);
1514 if (intrstatus & XUSB_STATUS_RESUME_MASK) {
1515 bool condition = (udc->usb_state != USB_STATE_SUSPENDED);
1517 dev_WARN_ONCE(udc->dev, condition,
1518 "Resume IRQ while not suspended\n");
1520 dev_dbg(udc->dev, "Resume\n");
1522 /* Enable the reset, suspend and disconnect */
1523 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1524 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_SUSPEND_MASK |
1525 XUSB_STATUS_DISCONNECT_MASK;
1526 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1530 if (udc->driver->resume) {
1531 spin_unlock(&udc->lock);
1532 udc->driver->resume(&udc->gadget);
1533 spin_lock(&udc->lock);
1536 if (intrstatus & XUSB_STATUS_DISCONNECT_MASK) {
1538 dev_dbg(udc->dev, "Disconnect\n");
1540 /* Enable the reset, resume and suspend */
1541 intrreg = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
1542 intrreg |= XUSB_STATUS_RESET_MASK | XUSB_STATUS_RESUME_MASK |
1543 XUSB_STATUS_SUSPEND_MASK;
1544 udc->write_fn(udc->addr, XUSB_IER_OFFSET, intrreg);
1546 if (udc->driver && udc->driver->disconnect) {
1547 spin_unlock(&udc->lock);
1548 udc->driver->disconnect(&udc->gadget);
1549 spin_lock(&udc->lock);
1555 * xudc_ep0_stall - Stall endpoint zero.
1556 * @udc: pointer to the udc structure.
1558 * This function stalls endpoint zero.
1560 static void xudc_ep0_stall(struct xusb_udc *udc)
1563 struct xusb_ep *ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO];
1565 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1566 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1567 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1571 * xudc_setaddress - executes SET_ADDRESS command
1572 * @udc: pointer to the udc structure.
1574 * This function executes USB SET_ADDRESS command
1576 static void xudc_setaddress(struct xusb_udc *udc)
1578 struct xusb_ep *ep0 = &udc->ep[0];
1579 struct xusb_req *req = udc->req;
1582 req->usb_req.length = 0;
1583 ret = __xudc_ep0_queue(ep0, req);
1587 dev_err(udc->dev, "Can't respond to SET ADDRESS request\n");
1588 xudc_ep0_stall(udc);
1592 * xudc_getstatus - executes GET_STATUS command
1593 * @udc: pointer to the udc structure.
1595 * This function executes USB GET_STATUS command
1597 static void xudc_getstatus(struct xusb_udc *udc)
1599 struct xusb_ep *ep0 = &udc->ep[0];
1600 struct xusb_req *req = udc->req;
1601 struct xusb_ep *target_ep;
1608 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
1609 case USB_RECIP_DEVICE:
1610 /* Get device status */
1611 status = 1 << USB_DEVICE_SELF_POWERED;
1612 if (udc->remote_wkp)
1613 status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1615 case USB_RECIP_INTERFACE:
1617 case USB_RECIP_ENDPOINT:
1618 epnum = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1619 if (epnum >= XUSB_MAX_ENDPOINTS)
1621 target_ep = &udc->ep[epnum];
1622 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1623 halt = epcfgreg & XUSB_EP_CFG_STALL_MASK;
1624 if (udc->setup.wIndex & USB_DIR_IN) {
1625 if (!target_ep->is_in)
1628 if (target_ep->is_in)
1632 status = 1 << USB_ENDPOINT_HALT;
1638 req->usb_req.length = 2;
1639 *(u16 *)req->usb_req.buf = cpu_to_le16(status);
1640 ret = __xudc_ep0_queue(ep0, req);
1644 dev_err(udc->dev, "Can't respond to getstatus request\n");
1645 xudc_ep0_stall(udc);
1649 * xudc_set_clear_feature - Executes the set feature and clear feature commands.
1650 * @udc: pointer to the usb device controller structure.
1652 * Processes the SET_FEATURE and CLEAR_FEATURE commands.
1654 static void xudc_set_clear_feature(struct xusb_udc *udc)
1656 struct xusb_ep *ep0 = &udc->ep[0];
1657 struct xusb_req *req = udc->req;
1658 struct xusb_ep *target_ep;
1662 int flag = (udc->setup.bRequest == USB_REQ_SET_FEATURE ? 1 : 0);
1665 switch (udc->setup.bRequestType) {
1666 case USB_RECIP_DEVICE:
1667 switch (udc->setup.wValue) {
1668 case USB_DEVICE_TEST_MODE:
1670 * The Test Mode will be executed
1671 * after the status phase.
1674 case USB_DEVICE_REMOTE_WAKEUP:
1676 udc->remote_wkp = 1;
1678 udc->remote_wkp = 0;
1681 xudc_ep0_stall(udc);
1685 case USB_RECIP_ENDPOINT:
1686 if (!udc->setup.wValue) {
1687 endpoint = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
1688 if (endpoint >= XUSB_MAX_ENDPOINTS) {
1689 xudc_ep0_stall(udc);
1692 target_ep = &udc->ep[endpoint];
1693 outinbit = udc->setup.wIndex & USB_ENDPOINT_DIR_MASK;
1694 outinbit = outinbit >> 7;
1696 /* Make sure direction matches.*/
1697 if (outinbit != target_ep->is_in) {
1698 xudc_ep0_stall(udc);
1701 epcfgreg = udc->read_fn(udc->addr + target_ep->offset);
1703 /* Clear the stall.*/
1704 epcfgreg &= ~XUSB_EP_CFG_STALL_MASK;
1705 udc->write_fn(udc->addr,
1706 target_ep->offset, epcfgreg);
1709 epcfgreg |= XUSB_EP_CFG_STALL_MASK;
1710 udc->write_fn(udc->addr,
1714 /* Unstall the endpoint.*/
1715 epcfgreg &= ~(XUSB_EP_CFG_STALL_MASK |
1716 XUSB_EP_CFG_DATA_TOGGLE_MASK);
1717 udc->write_fn(udc->addr,
1725 xudc_ep0_stall(udc);
1729 req->usb_req.length = 0;
1730 ret = __xudc_ep0_queue(ep0, req);
1734 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
1735 xudc_ep0_stall(udc);
1739 * xudc_handle_setup - Processes the setup packet.
1740 * @udc: pointer to the usb device controller structure.
1742 * Process setup packet and delegate to gadget layer.
1744 static void xudc_handle_setup(struct xusb_udc *udc)
1745 __must_hold(&udc->lock)
1747 struct xusb_ep *ep0 = &udc->ep[0];
1748 struct usb_ctrlrequest setup;
1751 /* Load up the chapter 9 command buffer.*/
1752 ep0rambase = (u32 __force *) (udc->addr + XUSB_SETUP_PKT_ADDR_OFFSET);
1753 memcpy(&setup, ep0rambase, 8);
1756 udc->setup.wValue = cpu_to_le16(setup.wValue);
1757 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
1758 udc->setup.wLength = cpu_to_le16(setup.wLength);
1760 /* Clear previous requests */
1761 xudc_nuke(ep0, -ECONNRESET);
1763 if (udc->setup.bRequestType & USB_DIR_IN) {
1764 /* Execute the get command.*/
1765 udc->setupseqrx = STATUS_PHASE;
1766 udc->setupseqtx = DATA_PHASE;
1768 /* Execute the put command.*/
1769 udc->setupseqrx = DATA_PHASE;
1770 udc->setupseqtx = STATUS_PHASE;
1773 switch (udc->setup.bRequest) {
1774 case USB_REQ_GET_STATUS:
1775 /* Data+Status phase form udc */
1776 if ((udc->setup.bRequestType &
1777 (USB_DIR_IN | USB_TYPE_MASK)) !=
1778 (USB_DIR_IN | USB_TYPE_STANDARD))
1780 xudc_getstatus(udc);
1782 case USB_REQ_SET_ADDRESS:
1783 /* Status phase from udc */
1784 if (udc->setup.bRequestType != (USB_DIR_OUT |
1785 USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1787 xudc_setaddress(udc);
1789 case USB_REQ_CLEAR_FEATURE:
1790 case USB_REQ_SET_FEATURE:
1791 /* Requests with no data phase, status phase from udc */
1792 if ((udc->setup.bRequestType & USB_TYPE_MASK)
1793 != USB_TYPE_STANDARD)
1795 xudc_set_clear_feature(udc);
1801 spin_unlock(&udc->lock);
1802 if (udc->driver->setup(&udc->gadget, &setup) < 0)
1803 xudc_ep0_stall(udc);
1804 spin_lock(&udc->lock);
1808 * xudc_ep0_out - Processes the endpoint 0 OUT token.
1809 * @udc: pointer to the usb device controller structure.
1811 static void xudc_ep0_out(struct xusb_udc *udc)
1813 struct xusb_ep *ep0 = &udc->ep[0];
1814 struct xusb_req *req;
1816 unsigned int bytes_to_rx;
1819 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1821 switch (udc->setupseqrx) {
1824 * This resets both state machines for the next
1827 udc->setupseqrx = SETUP_PHASE;
1828 udc->setupseqtx = SETUP_PHASE;
1829 req->usb_req.actual = req->usb_req.length;
1830 xudc_done(ep0, req, 0);
1833 bytes_to_rx = udc->read_fn(udc->addr +
1834 XUSB_EP_BUF0COUNT_OFFSET);
1835 /* Copy the data to be received from the DPRAM. */
1836 ep0rambase = (u8 __force *) (udc->addr +
1837 (ep0->rambase << 2));
1838 buffer = req->usb_req.buf + req->usb_req.actual;
1839 req->usb_req.actual = req->usb_req.actual + bytes_to_rx;
1840 memcpy(buffer, ep0rambase, bytes_to_rx);
1842 if (req->usb_req.length == req->usb_req.actual) {
1843 /* Data transfer completed get ready for Status stage */
1846 /* Enable EP0 buffer to receive data */
1847 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, 0);
1848 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1857 * xudc_ep0_in - Processes the endpoint 0 IN token.
1858 * @udc: pointer to the usb device controller structure.
1860 static void xudc_ep0_in(struct xusb_udc *udc)
1862 struct xusb_ep *ep0 = &udc->ep[0];
1863 struct xusb_req *req;
1864 unsigned int bytes_to_tx;
1870 u8 test_mode = udc->setup.wIndex >> 8;
1872 req = list_first_entry(&ep0->queue, struct xusb_req, queue);
1873 bytes_to_tx = req->usb_req.length - req->usb_req.actual;
1875 switch (udc->setupseqtx) {
1877 switch (udc->setup.bRequest) {
1878 case USB_REQ_SET_ADDRESS:
1879 /* Set the address of the device.*/
1880 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET,
1883 case USB_REQ_SET_FEATURE:
1884 if (udc->setup.bRequestType ==
1886 if (udc->setup.wValue ==
1887 USB_DEVICE_TEST_MODE)
1888 udc->write_fn(udc->addr,
1889 XUSB_TESTMODE_OFFSET,
1894 req->usb_req.actual = req->usb_req.length;
1895 xudc_done(ep0, req, 0);
1900 * We're done with data transfer, next
1901 * will be zero length OUT with data toggle of
1902 * 1. Setup data_toggle.
1904 epcfgreg = udc->read_fn(udc->addr + ep0->offset);
1905 epcfgreg |= XUSB_EP_CFG_DATA_TOGGLE_MASK;
1906 udc->write_fn(udc->addr, ep0->offset, epcfgreg);
1907 udc->setupseqtx = STATUS_PHASE;
1909 length = count = min_t(u32, bytes_to_tx,
1911 /* Copy the data to be transmitted into the DPRAM. */
1912 ep0rambase = (u8 __force *) (udc->addr +
1913 (ep0->rambase << 2));
1914 buffer = req->usb_req.buf + req->usb_req.actual;
1915 req->usb_req.actual = req->usb_req.actual + length;
1916 memcpy(ep0rambase, buffer, length);
1918 udc->write_fn(udc->addr, XUSB_EP_BUF0COUNT_OFFSET, count);
1919 udc->write_fn(udc->addr, XUSB_BUFFREADY_OFFSET, 1);
1927 * xudc_ctrl_ep_handler - Endpoint 0 interrupt handler.
1928 * @udc: pointer to the udc structure.
1929 * @intrstatus: It's the mask value for the interrupt sources on endpoint 0.
1931 * Processes the commands received during enumeration phase.
1933 static void xudc_ctrl_ep_handler(struct xusb_udc *udc, u32 intrstatus)
1936 if (intrstatus & XUSB_STATUS_SETUP_PACKET_MASK) {
1937 xudc_handle_setup(udc);
1939 if (intrstatus & XUSB_STATUS_FIFO_BUFF_RDY_MASK)
1941 else if (intrstatus & XUSB_STATUS_FIFO_BUFF_FREE_MASK)
1947 * xudc_nonctrl_ep_handler - Non control endpoint interrupt handler.
1948 * @udc: pointer to the udc structure.
1949 * @epnum: End point number for which the interrupt is to be processed
1950 * @intrstatus: mask value for interrupt sources of endpoints other
1953 * Processes the buffer completion interrupts.
1955 static void xudc_nonctrl_ep_handler(struct xusb_udc *udc, u8 epnum,
1959 struct xusb_req *req;
1962 ep = &udc->ep[epnum];
1963 /* Process the End point interrupts.*/
1964 if (intrstatus & (XUSB_STATUS_EP0_BUFF1_COMP_MASK << epnum))
1965 ep->buffer0ready = 0;
1966 if (intrstatus & (XUSB_STATUS_EP0_BUFF2_COMP_MASK << epnum))
1967 ep->buffer1ready = false;
1969 if (list_empty(&ep->queue))
1972 req = list_first_entry(&ep->queue, struct xusb_req, queue);
1975 xudc_write_fifo(ep, req);
1977 xudc_read_fifo(ep, req);
1981 * xudc_irq - The main interrupt handler.
1982 * @irq: The interrupt number.
1983 * @_udc: pointer to the usb device controller structure.
1985 * Return: IRQ_HANDLED after the interrupt is handled.
1987 static irqreturn_t xudc_irq(int irq, void *_udc)
1989 struct xusb_udc *udc = _udc;
1994 unsigned long flags;
1996 spin_lock_irqsave(&udc->lock, flags);
1999 * Event interrupts are level sensitive hence first disable
2000 * IER, read ISR and figure out active interrupts.
2002 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2003 ier &= ~XUSB_STATUS_INTR_EVENT_MASK;
2004 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2006 /* Read the Interrupt Status Register.*/
2007 intrstatus = udc->read_fn(udc->addr + XUSB_STATUS_OFFSET);
2009 /* Call the handler for the event interrupt.*/
2010 if (intrstatus & XUSB_STATUS_INTR_EVENT_MASK) {
2012 * Check if there is any action to be done for :
2013 * - USB Reset received {XUSB_STATUS_RESET_MASK}
2014 * - USB Suspend received {XUSB_STATUS_SUSPEND_MASK}
2015 * - USB Resume received {XUSB_STATUS_RESUME_MASK}
2016 * - USB Disconnect received {XUSB_STATUS_DISCONNECT_MASK}
2018 xudc_startup_handler(udc, intrstatus);
2021 /* Check the buffer completion interrupts */
2022 if (intrstatus & XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK) {
2023 /* Enable Reset, Suspend, Resume and Disconnect */
2024 ier = udc->read_fn(udc->addr + XUSB_IER_OFFSET);
2025 ier |= XUSB_STATUS_INTR_EVENT_MASK;
2026 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2028 if (intrstatus & XUSB_STATUS_EP0_BUFF1_COMP_MASK)
2029 xudc_ctrl_ep_handler(udc, intrstatus);
2031 for (index = 1; index < 8; index++) {
2032 bufintr = ((intrstatus &
2033 (XUSB_STATUS_EP1_BUFF1_COMP_MASK <<
2034 (index - 1))) || (intrstatus &
2035 (XUSB_STATUS_EP1_BUFF2_COMP_MASK <<
2038 xudc_nonctrl_ep_handler(udc, index,
2044 spin_unlock_irqrestore(&udc->lock, flags);
2049 * xudc_probe - The device probe function for driver initialization.
2050 * @pdev: pointer to the platform device structure.
2052 * Return: 0 for success and error value on failure
2054 static int xudc_probe(struct platform_device *pdev)
2056 struct device_node *np = pdev->dev.of_node;
2057 struct resource *res;
2058 struct xusb_udc *udc;
2064 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2068 /* Create a dummy request for GET_STATUS, SET_ADDRESS */
2069 udc->req = devm_kzalloc(&pdev->dev, sizeof(struct xusb_req),
2074 buff = devm_kzalloc(&pdev->dev, STATUSBUFF_SIZE, GFP_KERNEL);
2078 udc->req->usb_req.buf = buff;
2080 /* Map the registers */
2081 udc->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
2082 if (IS_ERR(udc->addr))
2083 return PTR_ERR(udc->addr);
2085 irq = platform_get_irq(pdev, 0);
2088 ret = devm_request_irq(&pdev->dev, irq, xudc_irq, 0,
2089 dev_name(&pdev->dev), udc);
2091 dev_dbg(&pdev->dev, "unable to request irq %d", irq);
2095 udc->dma_enabled = of_property_read_bool(np, "xlnx,has-builtin-dma");
2097 /* Setup gadget structure */
2098 udc->gadget.ops = &xusb_udc_ops;
2099 udc->gadget.max_speed = USB_SPEED_HIGH;
2100 udc->gadget.speed = USB_SPEED_UNKNOWN;
2101 udc->gadget.ep0 = &udc->ep[XUSB_EP_NUMBER_ZERO].ep_usb;
2102 udc->gadget.name = driver_name;
2104 udc->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
2105 if (IS_ERR(udc->clk)) {
2106 if (PTR_ERR(udc->clk) != -ENOENT) {
2107 ret = PTR_ERR(udc->clk);
2112 * Clock framework support is optional, continue on,
2113 * anyways if we don't find a matching clock
2115 dev_warn(&pdev->dev, "s_axi_aclk clock property is not found\n");
2119 ret = clk_prepare_enable(udc->clk);
2121 dev_err(&pdev->dev, "Unable to enable clock.\n");
2125 spin_lock_init(&udc->lock);
2127 /* Check for IP endianness */
2128 udc->write_fn = xudc_write32_be;
2129 udc->read_fn = xudc_read32_be;
2130 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, USB_TEST_J);
2131 if ((udc->read_fn(udc->addr + XUSB_TESTMODE_OFFSET))
2133 udc->write_fn = xudc_write32;
2134 udc->read_fn = xudc_read32;
2136 udc->write_fn(udc->addr, XUSB_TESTMODE_OFFSET, 0);
2140 /* Set device address to 0.*/
2141 udc->write_fn(udc->addr, XUSB_ADDRESS_OFFSET, 0);
2143 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2145 goto err_disable_unprepare_clk;
2147 udc->dev = &udc->gadget.dev;
2149 /* Enable the interrupts.*/
2150 ier = XUSB_STATUS_GLOBAL_INTR_MASK | XUSB_STATUS_INTR_EVENT_MASK |
2151 XUSB_STATUS_FIFO_BUFF_RDY_MASK | XUSB_STATUS_FIFO_BUFF_FREE_MASK |
2152 XUSB_STATUS_SETUP_PACKET_MASK |
2153 XUSB_STATUS_INTR_BUFF_COMP_ALL_MASK;
2155 udc->write_fn(udc->addr, XUSB_IER_OFFSET, ier);
2157 platform_set_drvdata(pdev, udc);
2159 dev_vdbg(&pdev->dev, "%s at 0x%08X mapped to %p %s\n",
2160 driver_name, (u32)res->start, udc->addr,
2161 udc->dma_enabled ? "with DMA" : "without DMA");
2165 err_disable_unprepare_clk:
2166 clk_disable_unprepare(udc->clk);
2168 dev_err(&pdev->dev, "probe failed, %d\n", ret);
2173 * xudc_remove - Releases the resources allocated during the initialization.
2174 * @pdev: pointer to the platform device structure.
2178 static void xudc_remove(struct platform_device *pdev)
2180 struct xusb_udc *udc = platform_get_drvdata(pdev);
2182 usb_del_gadget_udc(&udc->gadget);
2183 clk_disable_unprepare(udc->clk);
2186 #ifdef CONFIG_PM_SLEEP
2187 static int xudc_suspend(struct device *dev)
2189 struct xusb_udc *udc;
2191 unsigned long flags;
2193 udc = dev_get_drvdata(dev);
2195 spin_lock_irqsave(&udc->lock, flags);
2197 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2198 crtlreg &= ~XUSB_CONTROL_USB_READY_MASK;
2200 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2202 spin_unlock_irqrestore(&udc->lock, flags);
2203 if (udc->driver && udc->driver->suspend)
2204 udc->driver->suspend(&udc->gadget);
2206 clk_disable(udc->clk);
2211 static int xudc_resume(struct device *dev)
2213 struct xusb_udc *udc;
2215 unsigned long flags;
2218 udc = dev_get_drvdata(dev);
2220 ret = clk_enable(udc->clk);
2224 spin_lock_irqsave(&udc->lock, flags);
2226 crtlreg = udc->read_fn(udc->addr + XUSB_CONTROL_OFFSET);
2227 crtlreg |= XUSB_CONTROL_USB_READY_MASK;
2229 udc->write_fn(udc->addr, XUSB_CONTROL_OFFSET, crtlreg);
2231 spin_unlock_irqrestore(&udc->lock, flags);
2235 #endif /* CONFIG_PM_SLEEP */
2237 static const struct dev_pm_ops xudc_pm_ops = {
2238 SET_SYSTEM_SLEEP_PM_OPS(xudc_suspend, xudc_resume)
2241 /* Match table for of_platform binding */
2242 static const struct of_device_id usb_of_match[] = {
2243 { .compatible = "xlnx,usb2-device-4.00.a", },
2244 { /* end of list */ },
2246 MODULE_DEVICE_TABLE(of, usb_of_match);
2248 static struct platform_driver xudc_driver = {
2250 .name = driver_name,
2251 .of_match_table = usb_of_match,
2254 .probe = xudc_probe,
2255 .remove_new = xudc_remove,
2258 module_platform_driver(xudc_driver);
2260 MODULE_DESCRIPTION("Xilinx udc driver");
2261 MODULE_AUTHOR("Xilinx, Inc");
2262 MODULE_LICENSE("GPL");