drivers/usb/dwc3/dwc3-pci.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /**
   3  * dwc3-pci.c - PCI Specific glue layer
   4  *
   5  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   6  *
   7  * Authors: Felipe Balbi <balbi@ti.com>,
   8  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/gpio/consumer.h>
  19 #include <linux/gpio/machine.h>
  20 #include <linux/acpi.h>
  21 #include <linux/delay.h>
  22
  23 #define PCI_DEVICE_ID_INTEL_BYT                 0x0f37
  24 #define PCI_DEVICE_ID_INTEL_MRFLD               0x119e
  25 #define PCI_DEVICE_ID_INTEL_BSW                 0x22b7
  26 #define PCI_DEVICE_ID_INTEL_SPTLP               0x9d30
  27 #define PCI_DEVICE_ID_INTEL_SPTH                0xa130
  28 #define PCI_DEVICE_ID_INTEL_BXT                 0x0aaa
  29 #define PCI_DEVICE_ID_INTEL_BXT_M               0x1aaa
  30 #define PCI_DEVICE_ID_INTEL_APL                 0x5aaa
  31 #define PCI_DEVICE_ID_INTEL_KBP                 0xa2b0
  32 #define PCI_DEVICE_ID_INTEL_CMLH                0x02ee
  33 #define PCI_DEVICE_ID_INTEL_GLK                 0x31aa
  34 #define PCI_DEVICE_ID_INTEL_CNPLP               0x9dee
  35 #define PCI_DEVICE_ID_INTEL_CNPH                0xa36e
  36 #define PCI_DEVICE_ID_INTEL_ICLLP               0x34ee
  37 #define PCI_DEVICE_ID_INTEL_EHLLP               0x4b7e
  38
  39 #define PCI_INTEL_BXT_DSM_GUID          "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
  40 #define PCI_INTEL_BXT_FUNC_PMU_PWR      4
  41 #define PCI_INTEL_BXT_STATE_D0          0
  42 #define PCI_INTEL_BXT_STATE_D3          3
  43
  44 #define GP_RWBAR                        1
  45 #define GP_RWREG1                       0xa0
  46 #define GP_RWREG1_ULPI_REFCLK_DISABLE   (1 << 17)
  47
  48 /**
  49  * struct dwc3_pci - Driver private structure
  50  * @dwc3: child dwc3 platform_device
  51  * @pci: our link to PCI bus
  52  * @guid: _DSM GUID
  53  * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
  54  * @wakeup_work: work for asynchronous resume
  55  */
  56 struct dwc3_pci {
  57         struct platform_device *dwc3;
  58         struct pci_dev *pci;
  59
  60         guid_t guid;
  61
  62         unsigned int has_dsm_for_pm:1;
  63         struct work_struct wakeup_work;
  64 };
  65
  66 static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
  67 static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
  68
  69 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
  70         { "reset-gpios", &reset_gpios, 1 },
  71         { "cs-gpios", &cs_gpios, 1 },
  72         { },
  73 };
  74
  75 static struct gpiod_lookup_table platform_bytcr_gpios = {
  76         .dev_id         = "0000:00:16.0",
  77         .table          = {
  78                 GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH),
  79                 GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH),
  80                 {}
  81         },
  82 };
  83
  84 static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci)
  85 {
  86         void __iomem    *reg;
  87         u32             value;
  88
  89         reg = pcim_iomap(pci, GP_RWBAR, 0);
  90         if (!reg)
  91                 return -ENOMEM;
  92
  93         value = readl(reg + GP_RWREG1);
  94         if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
  95                 goto unmap; /* ULPI refclk already enabled */
  96
  97         value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
  98         writel(value, reg + GP_RWREG1);
  99         /* This comes from the Intel Android x86 tree w/o any explanation */
 100         msleep(100);
 101 unmap:
 102         pcim_iounmap(pci, reg);
 103         return 0;
 104 }
 105
 106 static const struct property_entry dwc3_pci_intel_properties[] = {
 107         PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
 108         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 109         {}
 110 };
 111
 112 static const struct property_entry dwc3_pci_mrfld_properties[] = {
 113         PROPERTY_ENTRY_STRING("dr_mode", "otg"),
 114         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 115         {}
 116 };
 117
 118 static const struct property_entry dwc3_pci_amd_properties[] = {
 119         PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
 120         PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
 121         PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
 122         PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
 123         PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
 124         PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
 125         PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
 126         PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
 127         PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
 128         PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
 129         PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
 130         /* FIXME these quirks should be removed when AMD NL tapes out */
 131         PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
 132         PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
 133         PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
 134         PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
 135         {}
 136 };
 137
 138 static int dwc3_pci_quirks(struct dwc3_pci *dwc)
 139 {
 140         struct pci_dev                  *pdev = dwc->pci;
 141
 142         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
 143                 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
 144                                 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
 145                         guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
 146                         dwc->has_dsm_for_pm = true;
 147                 }
 148
 149                 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
 150                         struct gpio_desc *gpio;
 151                         int ret;
 152
 153                         /* On BYT the FW does not always enable the refclock */
 154                         ret = dwc3_byt_enable_ulpi_refclock(pdev);
 155                         if (ret)
 156                                 return ret;
 157
 158                         ret = devm_acpi_dev_add_driver_gpios(&pdev->dev,
 159                                         acpi_dwc3_byt_gpios);
 160                         if (ret)
 161                                 dev_dbg(&pdev->dev, "failed to add mapping table\n");
 162
 163                         /*
 164                          * A lot of BYT devices lack ACPI resource entries for
 165                          * the GPIOs, add a fallback mapping to the reference
 166                          * design GPIOs which all boards seem to use.
 167                          */
 168                         gpiod_add_lookup_table(&platform_bytcr_gpios);
 169
 170                         /*
 171                          * These GPIOs will turn on the USB2 PHY. Note that we have to
 172                          * put the gpio descriptors again here because the phy driver
 173                          * might want to grab them, too.
 174                          */
 175                         gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW);
 176                         if (IS_ERR(gpio))
 177                                 return PTR_ERR(gpio);
 178
 179                         gpiod_set_value_cansleep(gpio, 1);
 180                         gpiod_put(gpio);
 181
 182                         gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW);
 183                         if (IS_ERR(gpio))
 184                                 return PTR_ERR(gpio);
 185
 186                         if (gpio) {
 187                                 gpiod_set_value_cansleep(gpio, 1);
 188                                 gpiod_put(gpio);
 189                                 usleep_range(10000, 11000);
 190                         }
 191                 }
 192         }
 193
 194         return 0;
 195 }
 196
 197 #ifdef CONFIG_PM
 198 static void dwc3_pci_resume_work(struct work_struct *work)
 199 {
 200         struct dwc3_pci *dwc = container_of(work, struct dwc3_pci, wakeup_work);
 201         struct platform_device *dwc3 = dwc->dwc3;
 202         int ret;
 203
 204         ret = pm_runtime_get_sync(&dwc3->dev);
 205         if (ret)
 206                 return;
 207
 208         pm_runtime_mark_last_busy(&dwc3->dev);
 209         pm_runtime_put_sync_autosuspend(&dwc3->dev);
 210 }
 211 #endif
 212
 213 static int dwc3_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
 214 {
 215         struct property_entry *p = (struct property_entry *)id->driver_data;
 216         struct dwc3_pci         *dwc;
 217         struct resource         res[2];
 218         int                     ret;
 219         struct device           *dev = &pci->dev;
 220
 221         ret = pcim_enable_device(pci);
 222         if (ret) {
 223                 dev_err(dev, "failed to enable pci device\n");
 224                 return -ENODEV;
 225         }
 226
 227         pci_set_master(pci);
 228
 229         dwc = devm_kzalloc(dev, sizeof(*dwc), GFP_KERNEL);
 230         if (!dwc)
 231                 return -ENOMEM;
 232
 233         dwc->dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
 234         if (!dwc->dwc3)
 235                 return -ENOMEM;
 236
 237         memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res));
 238
 239         res[0].start    = pci_resource_start(pci, 0);
 240         res[0].end      = pci_resource_end(pci, 0);
 241         res[0].name     = "dwc_usb3";
 242         res[0].flags    = IORESOURCE_MEM;
 243
 244         res[1].start    = pci->irq;
 245         res[1].name     = "dwc_usb3";
 246         res[1].flags    = IORESOURCE_IRQ;
 247
 248         ret = platform_device_add_resources(dwc->dwc3, res, ARRAY_SIZE(res));
 249         if (ret) {
 250                 dev_err(dev, "couldn't add resources to dwc3 device\n");
 251                 goto err;
 252         }
 253
 254         dwc->pci = pci;
 255         dwc->dwc3->dev.parent = dev;
 256         ACPI_COMPANION_SET(&dwc->dwc3->dev, ACPI_COMPANION(dev));
 257
 258         ret = platform_device_add_properties(dwc->dwc3, p);
 259         if (ret < 0)
 260                 return ret;
 261
 262         ret = dwc3_pci_quirks(dwc);
 263         if (ret)
 264                 goto err;
 265
 266         ret = platform_device_add(dwc->dwc3);
 267         if (ret) {
 268                 dev_err(dev, "failed to register dwc3 device\n");
 269                 goto err;
 270         }
 271
 272         device_init_wakeup(dev, true);
 273         pci_set_drvdata(pci, dwc);
 274         pm_runtime_put(dev);
 275 #ifdef CONFIG_PM
 276         INIT_WORK(&dwc->wakeup_work, dwc3_pci_resume_work);
 277 #endif
 278
 279         return 0;
 280 err:
 281         platform_device_put(dwc->dwc3);
 282         return ret;
 283 }
 284
 285 static void dwc3_pci_remove(struct pci_dev *pci)
 286 {
 287         struct dwc3_pci         *dwc = pci_get_drvdata(pci);
 288         struct pci_dev          *pdev = dwc->pci;
 289
 290         if (pdev->device == PCI_DEVICE_ID_INTEL_BYT)
 291                 gpiod_remove_lookup_table(&platform_bytcr_gpios);
 292 #ifdef CONFIG_PM
 293         cancel_work_sync(&dwc->wakeup_work);
 294 #endif
 295         device_init_wakeup(&pci->dev, false);
 296         pm_runtime_get(&pci->dev);
 297         platform_device_unregister(dwc->dwc3);
 298 }
 299
 300 static const struct pci_device_id dwc3_pci_id_table[] = {
 301         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BSW),
 302           (kernel_ulong_t) &dwc3_pci_intel_properties },
 303
 304         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BYT),
 305           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 306
 307         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD),
 308           (kernel_ulong_t) &dwc3_pci_mrfld_properties, },
 309
 310         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH),
 311           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 312
 313         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP),
 314           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 315
 316         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTH),
 317           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 318
 319         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT),
 320           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 321
 322         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_BXT_M),
 323           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 324
 325         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_APL),
 326           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 327
 328         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_KBP),
 329           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 330
 331         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_GLK),
 332           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 333
 334         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPLP),
 335           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 336
 337         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CNPH),
 338           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 339
 340         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICLLP),
 341           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 342
 343         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_EHLLP),
 344           (kernel_ulong_t) &dwc3_pci_intel_properties, },
 345
 346         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB),
 347           (kernel_ulong_t) &dwc3_pci_amd_properties, },
 348         {  }    /* Terminating Entry */
 349 };
 350 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
 351
 352 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
 353 static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
 354 {
 355         union acpi_object *obj;
 356         union acpi_object tmp;
 357         union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
 358
 359         if (!dwc->has_dsm_for_pm)
 360                 return 0;
 361
 362         tmp.type = ACPI_TYPE_INTEGER;
 363         tmp.integer.value = param;
 364
 365         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), &dwc->guid,
 366                         1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
 367         if (!obj) {
 368                 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
 369                 return -EIO;
 370         }
 371
 372         ACPI_FREE(obj);
 373
 374         return 0;
 375 }
 376 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
 377
 378 #ifdef CONFIG_PM
 379 static int dwc3_pci_runtime_suspend(struct device *dev)
 380 {
 381         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 382
 383         if (device_can_wakeup(dev))
 384                 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 385
 386         return -EBUSY;
 387 }
 388
 389 static int dwc3_pci_runtime_resume(struct device *dev)
 390 {
 391         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 392         int                     ret;
 393
 394         ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 395         if (ret)
 396                 return ret;
 397
 398         queue_work(pm_wq, &dwc->wakeup_work);
 399
 400         return 0;
 401 }
 402 #endif /* CONFIG_PM */
 403
 404 #ifdef CONFIG_PM_SLEEP
 405 static int dwc3_pci_suspend(struct device *dev)
 406 {
 407         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 408
 409         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
 410 }
 411
 412 static int dwc3_pci_resume(struct device *dev)
 413 {
 414         struct dwc3_pci         *dwc = dev_get_drvdata(dev);
 415
 416         return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
 417 }
 418 #endif /* CONFIG_PM_SLEEP */
 419
 420 static const struct dev_pm_ops dwc3_pci_dev_pm_ops = {
 421         SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
 422         SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
 423                 NULL)
 424 };
 425
 426 static struct pci_driver dwc3_pci_driver = {
 427         .name           = "dwc3-pci",
 428         .id_table       = dwc3_pci_id_table,
 429         .probe          = dwc3_pci_probe,
 430         .remove         = dwc3_pci_remove,
 431         .driver         = {
 432                 .pm     = &dwc3_pci_dev_pm_ops,
 433         }
 434 };
 435
 436 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 437 MODULE_LICENSE("GPL v2");
 438 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
 439
 440 module_pci_driver(dwc3_pci_driver);