drivers/usb/dwc2/platform.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * platform.c - DesignWare HS OTG Controller platform driver
   4  *
   5  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. The names of the above-listed copyright holders may not be used
  17  *    to endorse or promote products derived from this software without
  18  *    specific prior written permission.
  19  *
  20  * ALTERNATIVELY, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") as published by the Free Software
  22  * Foundation; either version 2 of the License, or (at your option) any
  23  * later version.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  26  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  27  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  29  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  30  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  31  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  32  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  33  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  34  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  35  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/slab.h>
  41 #include <linux/clk.h>
  42 #include <linux/device.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/of_device.h>
  45 #include <linux/mutex.h>
  46 #include <linux/platform_device.h>
  47 #include <linux/phy/phy.h>
  48 #include <linux/platform_data/s3c-hsotg.h>
  49 #include <linux/reset.h>
  50
  51 #include <linux/usb/of.h>
  52
  53 #include "core.h"
  54 #include "hcd.h"
  55 #include "debug.h"
  56
  57 static const char dwc2_driver_name[] = "dwc2";
  58
  59 /*
  60  * Check the dr_mode against the module configuration and hardware
  61  * capabilities.
  62  *
  63  * The hardware, module, and dr_mode, can each be set to host, device,
  64  * or otg. Check that all these values are compatible and adjust the
  65  * value of dr_mode if possible.
  66  *
  67  *                      actual
  68  *    HW  MOD dr_mode   dr_mode
  69  *  ------------------------------
  70  *   HST  HST  any    :  HST
  71  *   HST  DEV  any    :  ---
  72  *   HST  OTG  any    :  HST
  73  *
  74  *   DEV  HST  any    :  ---
  75  *   DEV  DEV  any    :  DEV
  76  *   DEV  OTG  any    :  DEV
  77  *
  78  *   OTG  HST  any    :  HST
  79  *   OTG  DEV  any    :  DEV
  80  *   OTG  OTG  any    :  dr_mode
  81  */
  82 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
  83 {
  84         enum usb_dr_mode mode;
  85
  86         hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
  87         if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
  88                 hsotg->dr_mode = USB_DR_MODE_OTG;
  89
  90         mode = hsotg->dr_mode;
  91
  92         if (dwc2_hw_is_device(hsotg)) {
  93                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
  94                         dev_err(hsotg->dev,
  95                                 "Controller does not support host mode.\n");
  96                         return -EINVAL;
  97                 }
  98                 mode = USB_DR_MODE_PERIPHERAL;
  99         } else if (dwc2_hw_is_host(hsotg)) {
 100                 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
 101                         dev_err(hsotg->dev,
 102                                 "Controller does not support device mode.\n");
 103                         return -EINVAL;
 104                 }
 105                 mode = USB_DR_MODE_HOST;
 106         } else {
 107                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
 108                         mode = USB_DR_MODE_HOST;
 109                 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
 110                         mode = USB_DR_MODE_PERIPHERAL;
 111         }
 112
 113         if (mode != hsotg->dr_mode) {
 114                 dev_warn(hsotg->dev,
 115                          "Configuration mismatch. dr_mode forced to %s\n",
 116                         mode == USB_DR_MODE_HOST ? "host" : "device");
 117
 118                 hsotg->dr_mode = mode;
 119         }
 120
 121         return 0;
 122 }
 123
 124 static void __dwc2_disable_regulators(void *data)
 125 {
 126         struct dwc2_hsotg *hsotg = data;
 127
 128         regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
 129 }
 130
 131 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
 132 {
 133         struct platform_device *pdev = to_platform_device(hsotg->dev);
 134         int ret;
 135
 136         ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
 137                                     hsotg->supplies);
 138         if (ret)
 139                 return ret;
 140
 141         ret = devm_add_action_or_reset(&pdev->dev,
 142                                        __dwc2_disable_regulators, hsotg);
 143         if (ret)
 144                 return ret;
 145
 146         if (hsotg->clk) {
 147                 ret = clk_prepare_enable(hsotg->clk);
 148                 if (ret)
 149                         return ret;
 150         }
 151
 152         if (hsotg->uphy) {
 153                 ret = usb_phy_init(hsotg->uphy);
 154         } else if (hsotg->plat && hsotg->plat->phy_init) {
 155                 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
 156         } else {
 157                 ret = phy_power_on(hsotg->phy);
 158                 if (ret == 0)
 159                         ret = phy_init(hsotg->phy);
 160         }
 161
 162         return ret;
 163 }
 164
 165 /**
 166  * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
 167  * @hsotg: The driver state
 168  *
 169  * A wrapper for platform code responsible for controlling
 170  * low-level USB platform resources (phy, clock, regulators)
 171  */
 172 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
 173 {
 174         int ret = __dwc2_lowlevel_hw_enable(hsotg);
 175
 176         if (ret == 0)
 177                 hsotg->ll_hw_enabled = true;
 178         return ret;
 179 }
 180
 181 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
 182 {
 183         struct platform_device *pdev = to_platform_device(hsotg->dev);
 184         int ret = 0;
 185
 186         if (hsotg->uphy) {
 187                 usb_phy_shutdown(hsotg->uphy);
 188         } else if (hsotg->plat && hsotg->plat->phy_exit) {
 189                 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
 190         } else {
 191                 ret = phy_exit(hsotg->phy);
 192                 if (ret == 0)
 193                         ret = phy_power_off(hsotg->phy);
 194         }
 195         if (ret)
 196                 return ret;
 197
 198         if (hsotg->clk)
 199                 clk_disable_unprepare(hsotg->clk);
 200
 201         return 0;
 202 }
 203
 204 /**
 205  * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
 206  * @hsotg: The driver state
 207  *
 208  * A wrapper for platform code responsible for controlling
 209  * low-level USB platform resources (phy, clock, regulators)
 210  */
 211 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
 212 {
 213         int ret = __dwc2_lowlevel_hw_disable(hsotg);
 214
 215         if (ret == 0)
 216                 hsotg->ll_hw_enabled = false;
 217         return ret;
 218 }
 219
 220 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 221 {
 222         int i, ret;
 223
 224         hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
 225         if (IS_ERR(hsotg->reset))
 226                 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset),
 227                                      "error getting reset control\n");
 228
 229         reset_control_deassert(hsotg->reset);
 230
 231         hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc");
 232         if (IS_ERR(hsotg->reset_ecc))
 233                 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->reset_ecc),
 234                                      "error getting reset control for ecc\n");
 235
 236         reset_control_deassert(hsotg->reset_ecc);
 237
 238         /*
 239          * Attempt to find a generic PHY, then look for an old style
 240          * USB PHY and then fall back to pdata
 241          */
 242         hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
 243         if (IS_ERR(hsotg->phy)) {
 244                 ret = PTR_ERR(hsotg->phy);
 245                 switch (ret) {
 246                 case -ENODEV:
 247                 case -ENOSYS:
 248                         hsotg->phy = NULL;
 249                         break;
 250                 default:
 251                         return dev_err_probe(hsotg->dev, ret, "error getting phy\n");
 252                 }
 253         }
 254
 255         if (!hsotg->phy) {
 256                 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
 257                 if (IS_ERR(hsotg->uphy)) {
 258                         ret = PTR_ERR(hsotg->uphy);
 259                         switch (ret) {
 260                         case -ENODEV:
 261                         case -ENXIO:
 262                                 hsotg->uphy = NULL;
 263                                 break;
 264                         default:
 265                                 return dev_err_probe(hsotg->dev, ret, "error getting usb phy\n");
 266                         }
 267                 }
 268         }
 269
 270         hsotg->plat = dev_get_platdata(hsotg->dev);
 271
 272         /* Clock */
 273         hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
 274         if (IS_ERR(hsotg->clk))
 275                 return dev_err_probe(hsotg->dev, PTR_ERR(hsotg->clk), "cannot get otg clock\n");
 276
 277         /* Regulators */
 278         for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
 279                 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
 280
 281         ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
 282                                       hsotg->supplies);
 283         if (ret)
 284                 return dev_err_probe(hsotg->dev, ret, "failed to request supplies\n");
 285
 286         return 0;
 287 }
 288
 289 /**
 290  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
 291  * DWC_otg driver
 292  *
 293  * @dev: Platform device
 294  *
 295  * This routine is called, for example, when the rmmod command is executed. The
 296  * device may or may not be electrically present. If it is present, the driver
 297  * stops device processing. Any resources used on behalf of this device are
 298  * freed.
 299  */
 300 static int dwc2_driver_remove(struct platform_device *dev)
 301 {
 302         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
 303         struct dwc2_gregs_backup *gr;
 304         int ret = 0;
 305
 306         gr = &hsotg->gr_backup;
 307
 308         /* Exit Hibernation when driver is removed. */
 309         if (hsotg->hibernated) {
 310                 if (gr->gotgctl & GOTGCTL_CURMODE_HOST)
 311                         ret = dwc2_exit_hibernation(hsotg, 0, 0, 1);
 312                 else
 313                         ret = dwc2_exit_hibernation(hsotg, 0, 0, 0);
 314
 315                 if (ret)
 316                         dev_err(hsotg->dev,
 317                                 "exit hibernation failed.\n");
 318         }
 319
 320         /* Exit Partial Power Down when driver is removed. */
 321         if (hsotg->in_ppd) {
 322                 ret = dwc2_exit_partial_power_down(hsotg, 0, true);
 323                 if (ret)
 324                         dev_err(hsotg->dev,
 325                                 "exit partial_power_down failed\n");
 326         }
 327
 328         /* Exit clock gating when driver is removed. */
 329         if (hsotg->params.power_down == DWC2_POWER_DOWN_PARAM_NONE &&
 330             hsotg->bus_suspended) {
 331                 if (dwc2_is_device_mode(hsotg))
 332                         dwc2_gadget_exit_clock_gating(hsotg, 0);
 333                 else
 334                         dwc2_host_exit_clock_gating(hsotg, 0);
 335         }
 336
 337         dwc2_debugfs_exit(hsotg);
 338         if (hsotg->hcd_enabled)
 339                 dwc2_hcd_remove(hsotg);
 340         if (hsotg->gadget_enabled)
 341                 dwc2_hsotg_remove(hsotg);
 342
 343         dwc2_drd_exit(hsotg);
 344
 345         if (hsotg->params.activate_stm_id_vb_detection)
 346                 regulator_disable(hsotg->usb33d);
 347
 348         if (hsotg->ll_hw_enabled)
 349                 dwc2_lowlevel_hw_disable(hsotg);
 350
 351         reset_control_assert(hsotg->reset);
 352         reset_control_assert(hsotg->reset_ecc);
 353
 354         return ret;
 355 }
 356
 357 /**
 358  * dwc2_driver_shutdown() - Called on device shutdown
 359  *
 360  * @dev: Platform device
 361  *
 362  * In specific conditions (involving usb hubs) dwc2 devices can create a
 363  * lot of interrupts, even to the point of overwhelming devices running
 364  * at low frequencies. Some devices need to do special clock handling
 365  * at shutdown-time which may bring the system clock below the threshold
 366  * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
 367  * prevents reboots/poweroffs from getting stuck in such cases.
 368  */
 369 static void dwc2_driver_shutdown(struct platform_device *dev)
 370 {
 371         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
 372
 373         dwc2_disable_global_interrupts(hsotg);
 374         synchronize_irq(hsotg->irq);
 375 }
 376
 377 /**
 378  * dwc2_check_core_endianness() - Returns true if core and AHB have
 379  * opposite endianness.
 380  * @hsotg:      Programming view of the DWC_otg controller.
 381  */
 382 static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg)
 383 {
 384         u32 snpsid;
 385
 386         snpsid = ioread32(hsotg->regs + GSNPSID);
 387         if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID ||
 388             (snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID ||
 389             (snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID)
 390                 return false;
 391         return true;
 392 }
 393
 394 /**
 395  * dwc2_check_core_version() - Check core version
 396  *
 397  * @hsotg: Programming view of the DWC_otg controller
 398  *
 399  */
 400 int dwc2_check_core_version(struct dwc2_hsotg *hsotg)
 401 {
 402         struct dwc2_hw_params *hw = &hsotg->hw_params;
 403
 404         /*
 405          * Attempt to ensure this device is really a DWC_otg Controller.
 406          * Read and verify the GSNPSID register contents. The value should be
 407          * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx
 408          */
 409
 410         hw->snpsid = dwc2_readl(hsotg, GSNPSID);
 411         if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID &&
 412             (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID &&
 413             (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) {
 414                 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
 415                         hw->snpsid);
 416                 return -ENODEV;
 417         }
 418
 419         dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
 420                 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
 421                 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
 422         return 0;
 423 }
 424
 425 /**
 426  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
 427  * driver
 428  *
 429  * @dev: Platform device
 430  *
 431  * This routine creates the driver components required to control the device
 432  * (core, HCD, and PCD) and initializes the device. The driver components are
 433  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
 434  * in the device private data. This allows the driver to access the dwc2_hsotg
 435  * structure on subsequent calls to driver methods for this device.
 436  */
 437 static int dwc2_driver_probe(struct platform_device *dev)
 438 {
 439         struct dwc2_hsotg *hsotg;
 440         struct resource *res;
 441         int retval;
 442
 443         hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
 444         if (!hsotg)
 445                 return -ENOMEM;
 446
 447         hsotg->dev = &dev->dev;
 448
 449         /*
 450          * Use reasonable defaults so platforms don't have to provide these.
 451          */
 452         if (!dev->dev.dma_mask)
 453                 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
 454         retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
 455         if (retval) {
 456                 dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval);
 457                 return retval;
 458         }
 459
 460         hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res);
 461         if (IS_ERR(hsotg->regs))
 462                 return PTR_ERR(hsotg->regs);
 463
 464         dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 465                 (unsigned long)res->start, hsotg->regs);
 466
 467         retval = dwc2_lowlevel_hw_init(hsotg);
 468         if (retval)
 469                 return retval;
 470
 471         spin_lock_init(&hsotg->lock);
 472
 473         hsotg->irq = platform_get_irq(dev, 0);
 474         if (hsotg->irq < 0)
 475                 return hsotg->irq;
 476
 477         dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
 478                 hsotg->irq);
 479         retval = devm_request_irq(hsotg->dev, hsotg->irq,
 480                                   dwc2_handle_common_intr, IRQF_SHARED,
 481                                   dev_name(hsotg->dev), hsotg);
 482         if (retval)
 483                 return retval;
 484
 485         hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
 486         if (IS_ERR(hsotg->vbus_supply)) {
 487                 retval = PTR_ERR(hsotg->vbus_supply);
 488                 hsotg->vbus_supply = NULL;
 489                 if (retval != -ENODEV)
 490                         return retval;
 491         }
 492
 493         retval = dwc2_lowlevel_hw_enable(hsotg);
 494         if (retval)
 495                 return retval;
 496
 497         hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
 498
 499         retval = dwc2_get_dr_mode(hsotg);
 500         if (retval)
 501                 goto error;
 502
 503         hsotg->need_phy_for_wake =
 504                 of_property_read_bool(dev->dev.of_node,
 505                                       "snps,need-phy-for-wake");
 506
 507         /*
 508          * Before performing any core related operations
 509          * check core version.
 510          */
 511         retval = dwc2_check_core_version(hsotg);
 512         if (retval)
 513                 goto error;
 514
 515         /*
 516          * Reset before dwc2_get_hwparams() then it could get power-on real
 517          * reset value form registers.
 518          */
 519         retval = dwc2_core_reset(hsotg, false);
 520         if (retval)
 521                 goto error;
 522
 523         /* Detect config values from hardware */
 524         retval = dwc2_get_hwparams(hsotg);
 525         if (retval)
 526                 goto error;
 527
 528         /*
 529          * For OTG cores, set the force mode bits to reflect the value
 530          * of dr_mode. Force mode bits should not be touched at any
 531          * other time after this.
 532          */
 533         dwc2_force_dr_mode(hsotg);
 534
 535         retval = dwc2_init_params(hsotg);
 536         if (retval)
 537                 goto error;
 538
 539         if (hsotg->params.activate_stm_id_vb_detection) {
 540                 u32 ggpio;
 541
 542                 hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d");
 543                 if (IS_ERR(hsotg->usb33d)) {
 544                         retval = PTR_ERR(hsotg->usb33d);
 545                         dev_err_probe(hsotg->dev, retval, "failed to request usb33d supply\n");
 546                         goto error;
 547                 }
 548                 retval = regulator_enable(hsotg->usb33d);
 549                 if (retval) {
 550                         dev_err_probe(hsotg->dev, retval, "failed to enable usb33d supply\n");
 551                         goto error;
 552                 }
 553
 554                 ggpio = dwc2_readl(hsotg, GGPIO);
 555                 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
 556                 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
 557                 dwc2_writel(hsotg, ggpio, GGPIO);
 558
 559                 /* ID/VBUS detection startup time */
 560                 usleep_range(5000, 7000);
 561         }
 562
 563         retval = dwc2_drd_init(hsotg);
 564         if (retval) {
 565                 dev_err_probe(hsotg->dev, retval, "failed to initialize dual-role\n");
 566                 goto error_init;
 567         }
 568
 569         if (hsotg->dr_mode != USB_DR_MODE_HOST) {
 570                 retval = dwc2_gadget_init(hsotg);
 571                 if (retval)
 572                         goto error_drd;
 573                 hsotg->gadget_enabled = 1;
 574         }
 575
 576         /*
 577          * If we need PHY for wakeup we must be wakeup capable.
 578          * When we have a device that can wake without the PHY we
 579          * can adjust this condition.
 580          */
 581         if (hsotg->need_phy_for_wake)
 582                 device_set_wakeup_capable(&dev->dev, true);
 583
 584         hsotg->reset_phy_on_wake =
 585                 of_property_read_bool(dev->dev.of_node,
 586                                       "snps,reset-phy-on-wake");
 587         if (hsotg->reset_phy_on_wake && !hsotg->phy) {
 588                 dev_warn(hsotg->dev,
 589                          "Quirk reset-phy-on-wake only supports generic PHYs\n");
 590                 hsotg->reset_phy_on_wake = false;
 591         }
 592
 593         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
 594                 retval = dwc2_hcd_init(hsotg);
 595                 if (retval) {
 596                         if (hsotg->gadget_enabled)
 597                                 dwc2_hsotg_remove(hsotg);
 598                         goto error_drd;
 599                 }
 600                 hsotg->hcd_enabled = 1;
 601         }
 602
 603         platform_set_drvdata(dev, hsotg);
 604         hsotg->hibernated = 0;
 605
 606         dwc2_debugfs_init(hsotg);
 607
 608         /* Gadget code manages lowlevel hw on its own */
 609         if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
 610                 dwc2_lowlevel_hw_disable(hsotg);
 611
 612 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
 613         IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
 614         /* Postponed adding a new gadget to the udc class driver list */
 615         if (hsotg->gadget_enabled) {
 616                 retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget);
 617                 if (retval) {
 618                         hsotg->gadget.udc = NULL;
 619                         dwc2_hsotg_remove(hsotg);
 620                         goto error_debugfs;
 621                 }
 622         }
 623 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
 624         return 0;
 625
 626 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
 627         IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
 628 error_debugfs:
 629         dwc2_debugfs_exit(hsotg);
 630         if (hsotg->hcd_enabled)
 631                 dwc2_hcd_remove(hsotg);
 632 #endif
 633 error_drd:
 634         dwc2_drd_exit(hsotg);
 635
 636 error_init:
 637         if (hsotg->params.activate_stm_id_vb_detection)
 638                 regulator_disable(hsotg->usb33d);
 639 error:
 640         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL)
 641                 dwc2_lowlevel_hw_disable(hsotg);
 642         return retval;
 643 }
 644
 645 static int __maybe_unused dwc2_suspend(struct device *dev)
 646 {
 647         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 648         bool is_device_mode = dwc2_is_device_mode(dwc2);
 649         int ret = 0;
 650
 651         if (is_device_mode)
 652                 dwc2_hsotg_suspend(dwc2);
 653
 654         dwc2_drd_suspend(dwc2);
 655
 656         if (dwc2->params.activate_stm_id_vb_detection) {
 657                 unsigned long flags;
 658                 u32 ggpio, gotgctl;
 659
 660                 /*
 661                  * Need to force the mode to the current mode to avoid Mode
 662                  * Mismatch Interrupt when ID detection will be disabled.
 663                  */
 664                 dwc2_force_mode(dwc2, !is_device_mode);
 665
 666                 spin_lock_irqsave(&dwc2->lock, flags);
 667                 gotgctl = dwc2_readl(dwc2, GOTGCTL);
 668                 /* bypass debounce filter, enable overrides */
 669                 gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
 670                 gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN;
 671                 /* Force A / B session if needed */
 672                 if (gotgctl & GOTGCTL_ASESVLD)
 673                         gotgctl |= GOTGCTL_AVALOVAL;
 674                 if (gotgctl & GOTGCTL_BSESVLD)
 675                         gotgctl |= GOTGCTL_BVALOVAL;
 676                 dwc2_writel(dwc2, gotgctl, GOTGCTL);
 677                 spin_unlock_irqrestore(&dwc2->lock, flags);
 678
 679                 ggpio = dwc2_readl(dwc2, GGPIO);
 680                 ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN;
 681                 ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN;
 682                 dwc2_writel(dwc2, ggpio, GGPIO);
 683
 684                 regulator_disable(dwc2->usb33d);
 685         }
 686
 687         if (dwc2->ll_hw_enabled &&
 688             (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
 689                 ret = __dwc2_lowlevel_hw_disable(dwc2);
 690                 dwc2->phy_off_for_suspend = true;
 691         }
 692
 693         return ret;
 694 }
 695
 696 static int __maybe_unused dwc2_resume(struct device *dev)
 697 {
 698         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
 699         int ret = 0;
 700
 701         if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
 702                 ret = __dwc2_lowlevel_hw_enable(dwc2);
 703                 if (ret)
 704                         return ret;
 705         }
 706         dwc2->phy_off_for_suspend = false;
 707
 708         if (dwc2->params.activate_stm_id_vb_detection) {
 709                 unsigned long flags;
 710                 u32 ggpio, gotgctl;
 711
 712                 ret = regulator_enable(dwc2->usb33d);
 713                 if (ret)
 714                         return ret;
 715
 716                 ggpio = dwc2_readl(dwc2, GGPIO);
 717                 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
 718                 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
 719                 dwc2_writel(dwc2, ggpio, GGPIO);
 720
 721                 /* ID/VBUS detection startup time */
 722                 usleep_range(5000, 7000);
 723
 724                 spin_lock_irqsave(&dwc2->lock, flags);
 725                 gotgctl = dwc2_readl(dwc2, GOTGCTL);
 726                 gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS;
 727                 gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN |
 728                              GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL);
 729                 dwc2_writel(dwc2, gotgctl, GOTGCTL);
 730                 spin_unlock_irqrestore(&dwc2->lock, flags);
 731         }
 732
 733         if (!dwc2->role_sw) {
 734                 /* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
 735                 dwc2_force_dr_mode(dwc2);
 736         } else {
 737                 dwc2_drd_resume(dwc2);
 738         }
 739
 740         if (dwc2_is_device_mode(dwc2))
 741                 ret = dwc2_hsotg_resume(dwc2);
 742
 743         return ret;
 744 }
 745
 746 static const struct dev_pm_ops dwc2_dev_pm_ops = {
 747         SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
 748 };
 749
 750 static struct platform_driver dwc2_platform_driver = {
 751         .driver = {
 752                 .name = dwc2_driver_name,
 753                 .of_match_table = dwc2_of_match_table,
 754                 .acpi_match_table = ACPI_PTR(dwc2_acpi_match),
 755                 .pm = &dwc2_dev_pm_ops,
 756         },
 757         .probe = dwc2_driver_probe,
 758         .remove = dwc2_driver_remove,
 759         .shutdown = dwc2_driver_shutdown,
 760 };
 761
 762 module_platform_driver(dwc2_platform_driver);