Merge tag 'exfat-for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/linki...
[linux-2.6-microblaze.git] / drivers / usb / dwc2 / platform.c
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /*
3  * platform.c - DesignWare HS OTG Controller platform driver
4  *
5  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The names of the above-listed copyright holders may not be used
17  *    to endorse or promote products derived from this software without
18  *    specific prior written permission.
19  *
20  * ALTERNATIVELY, this software may be distributed under the terms of the
21  * GNU General Public License ("GPL") as published by the Free Software
22  * Foundation; either version 2 of the License, or (at your option) any
23  * later version.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
26  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
33  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
34  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/slab.h>
41 #include <linux/clk.h>
42 #include <linux/device.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/of_device.h>
45 #include <linux/mutex.h>
46 #include <linux/platform_device.h>
47 #include <linux/phy/phy.h>
48 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/reset.h>
50
51 #include <linux/usb/of.h>
52
53 #include "core.h"
54 #include "hcd.h"
55 #include "debug.h"
56
57 static const char dwc2_driver_name[] = "dwc2";
58
59 /*
60  * Check the dr_mode against the module configuration and hardware
61  * capabilities.
62  *
63  * The hardware, module, and dr_mode, can each be set to host, device,
64  * or otg. Check that all these values are compatible and adjust the
65  * value of dr_mode if possible.
66  *
67  *                      actual
68  *    HW  MOD dr_mode   dr_mode
69  *  ------------------------------
70  *   HST  HST  any    :  HST
71  *   HST  DEV  any    :  ---
72  *   HST  OTG  any    :  HST
73  *
74  *   DEV  HST  any    :  ---
75  *   DEV  DEV  any    :  DEV
76  *   DEV  OTG  any    :  DEV
77  *
78  *   OTG  HST  any    :  HST
79  *   OTG  DEV  any    :  DEV
80  *   OTG  OTG  any    :  dr_mode
81  */
82 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
83 {
84         enum usb_dr_mode mode;
85
86         hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
87         if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
88                 hsotg->dr_mode = USB_DR_MODE_OTG;
89
90         mode = hsotg->dr_mode;
91
92         if (dwc2_hw_is_device(hsotg)) {
93                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
94                         dev_err(hsotg->dev,
95                                 "Controller does not support host mode.\n");
96                         return -EINVAL;
97                 }
98                 mode = USB_DR_MODE_PERIPHERAL;
99         } else if (dwc2_hw_is_host(hsotg)) {
100                 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
101                         dev_err(hsotg->dev,
102                                 "Controller does not support device mode.\n");
103                         return -EINVAL;
104                 }
105                 mode = USB_DR_MODE_HOST;
106         } else {
107                 if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
108                         mode = USB_DR_MODE_HOST;
109                 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
110                         mode = USB_DR_MODE_PERIPHERAL;
111         }
112
113         if (mode != hsotg->dr_mode) {
114                 dev_warn(hsotg->dev,
115                          "Configuration mismatch. dr_mode forced to %s\n",
116                         mode == USB_DR_MODE_HOST ? "host" : "device");
117
118                 hsotg->dr_mode = mode;
119         }
120
121         return 0;
122 }
123
124 static void __dwc2_disable_regulators(void *data)
125 {
126         struct dwc2_hsotg *hsotg = data;
127
128         regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
129 }
130
131 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
132 {
133         struct platform_device *pdev = to_platform_device(hsotg->dev);
134         int ret;
135
136         ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
137                                     hsotg->supplies);
138         if (ret)
139                 return ret;
140
141         ret = devm_add_action_or_reset(&pdev->dev,
142                                        __dwc2_disable_regulators, hsotg);
143         if (ret)
144                 return ret;
145
146         if (hsotg->clk) {
147                 ret = clk_prepare_enable(hsotg->clk);
148                 if (ret)
149                         return ret;
150         }
151
152         if (hsotg->uphy) {
153                 ret = usb_phy_init(hsotg->uphy);
154         } else if (hsotg->plat && hsotg->plat->phy_init) {
155                 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
156         } else {
157                 ret = phy_power_on(hsotg->phy);
158                 if (ret == 0)
159                         ret = phy_init(hsotg->phy);
160         }
161
162         return ret;
163 }
164
165 /**
166  * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
167  * @hsotg: The driver state
168  *
169  * A wrapper for platform code responsible for controlling
170  * low-level USB platform resources (phy, clock, regulators)
171  */
172 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
173 {
174         int ret = __dwc2_lowlevel_hw_enable(hsotg);
175
176         if (ret == 0)
177                 hsotg->ll_hw_enabled = true;
178         return ret;
179 }
180
181 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
182 {
183         struct platform_device *pdev = to_platform_device(hsotg->dev);
184         int ret = 0;
185
186         if (hsotg->uphy) {
187                 usb_phy_shutdown(hsotg->uphy);
188         } else if (hsotg->plat && hsotg->plat->phy_exit) {
189                 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
190         } else {
191                 ret = phy_exit(hsotg->phy);
192                 if (ret == 0)
193                         ret = phy_power_off(hsotg->phy);
194         }
195         if (ret)
196                 return ret;
197
198         if (hsotg->clk)
199                 clk_disable_unprepare(hsotg->clk);
200
201         return 0;
202 }
203
204 /**
205  * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
206  * @hsotg: The driver state
207  *
208  * A wrapper for platform code responsible for controlling
209  * low-level USB platform resources (phy, clock, regulators)
210  */
211 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
212 {
213         int ret = __dwc2_lowlevel_hw_disable(hsotg);
214
215         if (ret == 0)
216                 hsotg->ll_hw_enabled = false;
217         return ret;
218 }
219
220 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
221 {
222         int i, ret;
223
224         hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
225         if (IS_ERR(hsotg->reset)) {
226                 ret = PTR_ERR(hsotg->reset);
227                 dev_err(hsotg->dev, "error getting reset control %d\n", ret);
228                 return ret;
229         }
230
231         reset_control_deassert(hsotg->reset);
232
233         hsotg->reset_ecc = devm_reset_control_get_optional(hsotg->dev, "dwc2-ecc");
234         if (IS_ERR(hsotg->reset_ecc)) {
235                 ret = PTR_ERR(hsotg->reset_ecc);
236                 dev_err(hsotg->dev, "error getting reset control for ecc %d\n", ret);
237                 return ret;
238         }
239
240         reset_control_deassert(hsotg->reset_ecc);
241
242         /*
243          * Attempt to find a generic PHY, then look for an old style
244          * USB PHY and then fall back to pdata
245          */
246         hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
247         if (IS_ERR(hsotg->phy)) {
248                 ret = PTR_ERR(hsotg->phy);
249                 switch (ret) {
250                 case -ENODEV:
251                 case -ENOSYS:
252                         hsotg->phy = NULL;
253                         break;
254                 case -EPROBE_DEFER:
255                         return ret;
256                 default:
257                         dev_err(hsotg->dev, "error getting phy %d\n", ret);
258                         return ret;
259                 }
260         }
261
262         if (!hsotg->phy) {
263                 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
264                 if (IS_ERR(hsotg->uphy)) {
265                         ret = PTR_ERR(hsotg->uphy);
266                         switch (ret) {
267                         case -ENODEV:
268                         case -ENXIO:
269                                 hsotg->uphy = NULL;
270                                 break;
271                         case -EPROBE_DEFER:
272                                 return ret;
273                         default:
274                                 dev_err(hsotg->dev, "error getting usb phy %d\n",
275                                         ret);
276                                 return ret;
277                         }
278                 }
279         }
280
281         hsotg->plat = dev_get_platdata(hsotg->dev);
282
283         /* Clock */
284         hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
285         if (IS_ERR(hsotg->clk)) {
286                 dev_err(hsotg->dev, "cannot get otg clock\n");
287                 return PTR_ERR(hsotg->clk);
288         }
289
290         /* Regulators */
291         for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
292                 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
293
294         ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
295                                       hsotg->supplies);
296         if (ret) {
297                 if (ret != -EPROBE_DEFER)
298                         dev_err(hsotg->dev, "failed to request supplies: %d\n",
299                                 ret);
300                 return ret;
301         }
302         return 0;
303 }
304
305 /**
306  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
307  * DWC_otg driver
308  *
309  * @dev: Platform device
310  *
311  * This routine is called, for example, when the rmmod command is executed. The
312  * device may or may not be electrically present. If it is present, the driver
313  * stops device processing. Any resources used on behalf of this device are
314  * freed.
315  */
316 static int dwc2_driver_remove(struct platform_device *dev)
317 {
318         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
319
320         dwc2_debugfs_exit(hsotg);
321         if (hsotg->hcd_enabled)
322                 dwc2_hcd_remove(hsotg);
323         if (hsotg->gadget_enabled)
324                 dwc2_hsotg_remove(hsotg);
325
326         dwc2_drd_exit(hsotg);
327
328         if (hsotg->params.activate_stm_id_vb_detection)
329                 regulator_disable(hsotg->usb33d);
330
331         if (hsotg->ll_hw_enabled)
332                 dwc2_lowlevel_hw_disable(hsotg);
333
334         reset_control_assert(hsotg->reset);
335         reset_control_assert(hsotg->reset_ecc);
336
337         return 0;
338 }
339
340 /**
341  * dwc2_driver_shutdown() - Called on device shutdown
342  *
343  * @dev: Platform device
344  *
345  * In specific conditions (involving usb hubs) dwc2 devices can create a
346  * lot of interrupts, even to the point of overwhelming devices running
347  * at low frequencies. Some devices need to do special clock handling
348  * at shutdown-time which may bring the system clock below the threshold
349  * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
350  * prevents reboots/poweroffs from getting stuck in such cases.
351  */
352 static void dwc2_driver_shutdown(struct platform_device *dev)
353 {
354         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
355
356         dwc2_disable_global_interrupts(hsotg);
357         synchronize_irq(hsotg->irq);
358 }
359
360 /**
361  * dwc2_check_core_endianness() - Returns true if core and AHB have
362  * opposite endianness.
363  * @hsotg:      Programming view of the DWC_otg controller.
364  */
365 static bool dwc2_check_core_endianness(struct dwc2_hsotg *hsotg)
366 {
367         u32 snpsid;
368
369         snpsid = ioread32(hsotg->regs + GSNPSID);
370         if ((snpsid & GSNPSID_ID_MASK) == DWC2_OTG_ID ||
371             (snpsid & GSNPSID_ID_MASK) == DWC2_FS_IOT_ID ||
372             (snpsid & GSNPSID_ID_MASK) == DWC2_HS_IOT_ID)
373                 return false;
374         return true;
375 }
376
377 /**
378  * Check core version
379  *
380  * @hsotg: Programming view of the DWC_otg controller
381  *
382  */
383 int dwc2_check_core_version(struct dwc2_hsotg *hsotg)
384 {
385         struct dwc2_hw_params *hw = &hsotg->hw_params;
386
387         /*
388          * Attempt to ensure this device is really a DWC_otg Controller.
389          * Read and verify the GSNPSID register contents. The value should be
390          * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx
391          */
392
393         hw->snpsid = dwc2_readl(hsotg, GSNPSID);
394         if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID &&
395             (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID &&
396             (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) {
397                 dev_err(hsotg->dev, "Bad value for GSNPSID: 0x%08x\n",
398                         hw->snpsid);
399                 return -ENODEV;
400         }
401
402         dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n",
403                 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf,
404                 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid);
405         return 0;
406 }
407
408 /**
409  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
410  * driver
411  *
412  * @dev: Platform device
413  *
414  * This routine creates the driver components required to control the device
415  * (core, HCD, and PCD) and initializes the device. The driver components are
416  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
417  * in the device private data. This allows the driver to access the dwc2_hsotg
418  * structure on subsequent calls to driver methods for this device.
419  */
420 static int dwc2_driver_probe(struct platform_device *dev)
421 {
422         struct dwc2_hsotg *hsotg;
423         struct resource *res;
424         int retval;
425
426         hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
427         if (!hsotg)
428                 return -ENOMEM;
429
430         hsotg->dev = &dev->dev;
431
432         /*
433          * Use reasonable defaults so platforms don't have to provide these.
434          */
435         if (!dev->dev.dma_mask)
436                 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
437         retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
438         if (retval) {
439                 dev_err(&dev->dev, "can't set coherent DMA mask: %d\n", retval);
440                 return retval;
441         }
442
443         hsotg->regs = devm_platform_get_and_ioremap_resource(dev, 0, &res);
444         if (IS_ERR(hsotg->regs))
445                 return PTR_ERR(hsotg->regs);
446
447         dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
448                 (unsigned long)res->start, hsotg->regs);
449
450         retval = dwc2_lowlevel_hw_init(hsotg);
451         if (retval)
452                 return retval;
453
454         spin_lock_init(&hsotg->lock);
455
456         hsotg->irq = platform_get_irq(dev, 0);
457         if (hsotg->irq < 0)
458                 return hsotg->irq;
459
460         dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
461                 hsotg->irq);
462         retval = devm_request_irq(hsotg->dev, hsotg->irq,
463                                   dwc2_handle_common_intr, IRQF_SHARED,
464                                   dev_name(hsotg->dev), hsotg);
465         if (retval)
466                 return retval;
467
468         hsotg->vbus_supply = devm_regulator_get_optional(hsotg->dev, "vbus");
469         if (IS_ERR(hsotg->vbus_supply)) {
470                 retval = PTR_ERR(hsotg->vbus_supply);
471                 hsotg->vbus_supply = NULL;
472                 if (retval != -ENODEV)
473                         return retval;
474         }
475
476         retval = dwc2_lowlevel_hw_enable(hsotg);
477         if (retval)
478                 return retval;
479
480         hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
481
482         retval = dwc2_get_dr_mode(hsotg);
483         if (retval)
484                 goto error;
485
486         hsotg->need_phy_for_wake =
487                 of_property_read_bool(dev->dev.of_node,
488                                       "snps,need-phy-for-wake");
489
490         /*
491          * Before performing any core related operations
492          * check core version.
493          */
494         retval = dwc2_check_core_version(hsotg);
495         if (retval)
496                 goto error;
497
498         /*
499          * Reset before dwc2_get_hwparams() then it could get power-on real
500          * reset value form registers.
501          */
502         retval = dwc2_core_reset(hsotg, false);
503         if (retval)
504                 goto error;
505
506         /* Detect config values from hardware */
507         retval = dwc2_get_hwparams(hsotg);
508         if (retval)
509                 goto error;
510
511         /*
512          * For OTG cores, set the force mode bits to reflect the value
513          * of dr_mode. Force mode bits should not be touched at any
514          * other time after this.
515          */
516         dwc2_force_dr_mode(hsotg);
517
518         retval = dwc2_init_params(hsotg);
519         if (retval)
520                 goto error;
521
522         if (hsotg->params.activate_stm_id_vb_detection) {
523                 u32 ggpio;
524
525                 hsotg->usb33d = devm_regulator_get(hsotg->dev, "usb33d");
526                 if (IS_ERR(hsotg->usb33d)) {
527                         retval = PTR_ERR(hsotg->usb33d);
528                         if (retval != -EPROBE_DEFER)
529                                 dev_err(hsotg->dev,
530                                         "failed to request usb33d supply: %d\n",
531                                         retval);
532                         goto error;
533                 }
534                 retval = regulator_enable(hsotg->usb33d);
535                 if (retval) {
536                         dev_err(hsotg->dev,
537                                 "failed to enable usb33d supply: %d\n", retval);
538                         goto error;
539                 }
540
541                 ggpio = dwc2_readl(hsotg, GGPIO);
542                 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
543                 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
544                 dwc2_writel(hsotg, ggpio, GGPIO);
545         }
546
547         retval = dwc2_drd_init(hsotg);
548         if (retval) {
549                 if (retval != -EPROBE_DEFER)
550                         dev_err(hsotg->dev, "failed to initialize dual-role\n");
551                 goto error_init;
552         }
553
554         if (hsotg->dr_mode != USB_DR_MODE_HOST) {
555                 retval = dwc2_gadget_init(hsotg);
556                 if (retval)
557                         goto error_drd;
558                 hsotg->gadget_enabled = 1;
559         }
560
561         /*
562          * If we need PHY for wakeup we must be wakeup capable.
563          * When we have a device that can wake without the PHY we
564          * can adjust this condition.
565          */
566         if (hsotg->need_phy_for_wake)
567                 device_set_wakeup_capable(&dev->dev, true);
568
569         hsotg->reset_phy_on_wake =
570                 of_property_read_bool(dev->dev.of_node,
571                                       "snps,reset-phy-on-wake");
572         if (hsotg->reset_phy_on_wake && !hsotg->phy) {
573                 dev_warn(hsotg->dev,
574                          "Quirk reset-phy-on-wake only supports generic PHYs\n");
575                 hsotg->reset_phy_on_wake = false;
576         }
577
578         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
579                 retval = dwc2_hcd_init(hsotg);
580                 if (retval) {
581                         if (hsotg->gadget_enabled)
582                                 dwc2_hsotg_remove(hsotg);
583                         goto error_drd;
584                 }
585                 hsotg->hcd_enabled = 1;
586         }
587
588         platform_set_drvdata(dev, hsotg);
589         hsotg->hibernated = 0;
590
591         dwc2_debugfs_init(hsotg);
592
593         /* Gadget code manages lowlevel hw on its own */
594         if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
595                 dwc2_lowlevel_hw_disable(hsotg);
596
597 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
598         IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
599         /* Postponed adding a new gadget to the udc class driver list */
600         if (hsotg->gadget_enabled) {
601                 retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget);
602                 if (retval) {
603                         hsotg->gadget.udc = NULL;
604                         dwc2_hsotg_remove(hsotg);
605                         goto error_debugfs;
606                 }
607         }
608 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
609         return 0;
610
611 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
612         IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
613 error_debugfs:
614         dwc2_debugfs_exit(hsotg);
615         if (hsotg->hcd_enabled)
616                 dwc2_hcd_remove(hsotg);
617 #endif
618 error_drd:
619         dwc2_drd_exit(hsotg);
620
621 error_init:
622         if (hsotg->params.activate_stm_id_vb_detection)
623                 regulator_disable(hsotg->usb33d);
624 error:
625         if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL)
626                 dwc2_lowlevel_hw_disable(hsotg);
627         return retval;
628 }
629
630 static int __maybe_unused dwc2_suspend(struct device *dev)
631 {
632         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
633         bool is_device_mode = dwc2_is_device_mode(dwc2);
634         int ret = 0;
635
636         if (is_device_mode)
637                 dwc2_hsotg_suspend(dwc2);
638
639         dwc2_drd_suspend(dwc2);
640
641         if (dwc2->params.activate_stm_id_vb_detection) {
642                 unsigned long flags;
643                 u32 ggpio, gotgctl;
644
645                 /*
646                  * Need to force the mode to the current mode to avoid Mode
647                  * Mismatch Interrupt when ID detection will be disabled.
648                  */
649                 dwc2_force_mode(dwc2, !is_device_mode);
650
651                 spin_lock_irqsave(&dwc2->lock, flags);
652                 gotgctl = dwc2_readl(dwc2, GOTGCTL);
653                 /* bypass debounce filter, enable overrides */
654                 gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
655                 gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN;
656                 /* Force A / B session if needed */
657                 if (gotgctl & GOTGCTL_ASESVLD)
658                         gotgctl |= GOTGCTL_AVALOVAL;
659                 if (gotgctl & GOTGCTL_BSESVLD)
660                         gotgctl |= GOTGCTL_BVALOVAL;
661                 dwc2_writel(dwc2, gotgctl, GOTGCTL);
662                 spin_unlock_irqrestore(&dwc2->lock, flags);
663
664                 ggpio = dwc2_readl(dwc2, GGPIO);
665                 ggpio &= ~GGPIO_STM32_OTG_GCCFG_IDEN;
666                 ggpio &= ~GGPIO_STM32_OTG_GCCFG_VBDEN;
667                 dwc2_writel(dwc2, ggpio, GGPIO);
668
669                 regulator_disable(dwc2->usb33d);
670         }
671
672         if (dwc2->ll_hw_enabled &&
673             (is_device_mode || dwc2_host_can_poweroff_phy(dwc2))) {
674                 ret = __dwc2_lowlevel_hw_disable(dwc2);
675                 dwc2->phy_off_for_suspend = true;
676         }
677
678         return ret;
679 }
680
681 static int __maybe_unused dwc2_resume(struct device *dev)
682 {
683         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
684         int ret = 0;
685
686         if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
687                 ret = __dwc2_lowlevel_hw_enable(dwc2);
688                 if (ret)
689                         return ret;
690         }
691         dwc2->phy_off_for_suspend = false;
692
693         if (dwc2->params.activate_stm_id_vb_detection) {
694                 unsigned long flags;
695                 u32 ggpio, gotgctl;
696
697                 ret = regulator_enable(dwc2->usb33d);
698                 if (ret)
699                         return ret;
700
701                 ggpio = dwc2_readl(dwc2, GGPIO);
702                 ggpio |= GGPIO_STM32_OTG_GCCFG_IDEN;
703                 ggpio |= GGPIO_STM32_OTG_GCCFG_VBDEN;
704                 dwc2_writel(dwc2, ggpio, GGPIO);
705
706                 /* ID/VBUS detection startup time */
707                 usleep_range(5000, 7000);
708
709                 spin_lock_irqsave(&dwc2->lock, flags);
710                 gotgctl = dwc2_readl(dwc2, GOTGCTL);
711                 gotgctl &= ~GOTGCTL_DBNCE_FLTR_BYPASS;
712                 gotgctl &= ~(GOTGCTL_BVALOEN | GOTGCTL_AVALOEN |
713                              GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL);
714                 dwc2_writel(dwc2, gotgctl, GOTGCTL);
715                 spin_unlock_irqrestore(&dwc2->lock, flags);
716         }
717
718         /* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
719         dwc2_force_dr_mode(dwc2);
720
721         dwc2_drd_resume(dwc2);
722
723         if (dwc2_is_device_mode(dwc2))
724                 ret = dwc2_hsotg_resume(dwc2);
725
726         return ret;
727 }
728
729 static const struct dev_pm_ops dwc2_dev_pm_ops = {
730         SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
731 };
732
733 static struct platform_driver dwc2_platform_driver = {
734         .driver = {
735                 .name = dwc2_driver_name,
736                 .of_match_table = dwc2_of_match_table,
737                 .pm = &dwc2_dev_pm_ops,
738         },
739         .probe = dwc2_driver_probe,
740         .remove = dwc2_driver_remove,
741         .shutdown = dwc2_driver_shutdown,
742 };
743
744 module_platform_driver(dwc2_platform_driver);
745
746 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
747 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
748 MODULE_LICENSE("Dual BSD/GPL");