1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
5 * Copyright (c) 2012 Intel Corporation
7 * Author: Alexander Shishkin
10 #include <linux/kernel.h>
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/pinctrl/consumer.h>
18 #include "../host/ehci.h"
24 static struct hc_driver __read_mostly ci_ehci_hc_driver;
25 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
28 struct regulator *reg_vbus;
31 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
33 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
34 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
35 struct device *dev = hcd->self.controller;
36 struct ci_hdrc *ci = dev_get_drvdata(dev);
38 int port = HCS_N_PORTS(ehci->hcs_params);
43 "Not support multi-port regulator control\n");
47 ret = regulator_enable(priv->reg_vbus);
49 ret = regulator_disable(priv->reg_vbus);
52 "Failed to %s vbus regulator, ret=%d\n",
53 enable ? "enable" : "disable", ret);
58 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
60 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
61 * As HSIC is always HS, this should be safe for others.
63 hw_port_test_set(ci, 5);
64 hw_port_test_set(ci, 0);
69 static int ehci_ci_reset(struct usb_hcd *hcd)
71 struct device *dev = hcd->self.controller;
72 struct ci_hdrc *ci = dev_get_drvdata(dev);
73 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
76 ret = ehci_setup(hcd);
80 ehci->need_io_watchdog = 0;
82 if (ci->platdata->notify_event) {
83 ret = ci->platdata->notify_event(ci,
84 CI_HDRC_CONTROLLER_RESET_EVENT);
89 ci_platform_configure(ci);
94 static const struct ehci_driver_overrides ehci_ci_overrides = {
95 .extra_priv_size = sizeof(struct ehci_ci_priv),
96 .port_power = ehci_ci_portpower,
97 .reset = ehci_ci_reset,
100 static irqreturn_t host_irq(struct ci_hdrc *ci)
102 return usb_hcd_irq(ci->irq, ci->hcd);
105 static int host_start(struct ci_hdrc *ci)
108 struct ehci_hcd *ehci;
109 struct ehci_ci_priv *priv;
115 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
116 ci->dev, dev_name(ci->dev), NULL);
120 dev_set_drvdata(ci->dev, ci);
121 hcd->rsrc_start = ci->hw_bank.phys;
122 hcd->rsrc_len = ci->hw_bank.size;
123 hcd->regs = ci->hw_bank.abs;
126 hcd->power_budget = ci->platdata->power_budget;
127 hcd->tpl_support = ci->platdata->tpl_support;
128 if (ci->phy || ci->usb_phy) {
129 hcd->skip_phy_initialization = 1;
131 hcd->usb_phy = ci->usb_phy;
134 ehci = hcd_to_ehci(hcd);
135 ehci->caps = ci->hw_bank.cap;
136 ehci->has_hostpc = ci->hw_bank.lpm;
137 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
138 ehci->imx28_write_fix = ci->imx28_write_fix;
140 priv = (struct ehci_ci_priv *)ehci->priv;
141 priv->reg_vbus = NULL;
143 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
144 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
145 ret = regulator_enable(ci->platdata->reg_vbus);
148 "Failed to enable vbus regulator, ret=%d\n",
153 priv->reg_vbus = ci->platdata->reg_vbus;
157 if (ci->platdata->pins_host)
158 pinctrl_select_state(ci->platdata->pctl,
159 ci->platdata->pins_host);
161 ret = usb_add_hcd(hcd, 0, 0);
165 struct usb_otg *otg = &ci->otg;
169 if (ci_otg_is_fsm_mode(ci)) {
170 otg->host = &hcd->self;
171 hcd->self.otg_port = 1;
174 if (ci->platdata->notify_event &&
175 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
176 ci->platdata->notify_event
177 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
183 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
184 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
185 regulator_disable(ci->platdata->reg_vbus);
192 static void host_stop(struct ci_hdrc *ci)
194 struct usb_hcd *hcd = ci->hcd;
197 if (ci->platdata->notify_event)
198 ci->platdata->notify_event(ci,
199 CI_HDRC_CONTROLLER_STOPPED_EVENT);
201 ci->role = CI_ROLE_END;
202 synchronize_irq(ci->irq);
204 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
205 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
206 regulator_disable(ci->platdata->reg_vbus);
211 if (ci->platdata->pins_host && ci->platdata->pins_default)
212 pinctrl_select_state(ci->platdata->pctl,
213 ci->platdata->pins_default);
217 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
219 if (ci->role == CI_ROLE_HOST && ci->hcd)
223 /* The below code is based on tegra ehci driver */
224 static int ci_ehci_hub_control(
233 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
234 u32 __iomem *status_reg;
238 struct device *dev = hcd->self.controller;
239 struct ci_hdrc *ci = dev_get_drvdata(dev);
241 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
243 spin_lock_irqsave(&ehci->lock, flags);
245 if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
246 temp = ehci_readl(ehci, status_reg);
247 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
252 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
253 temp |= PORT_WKDISC_E | PORT_WKOC_E;
254 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
257 * If a transaction is in progress, there may be a delay in
258 * suspending the port. Poll until the port is suspended.
260 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
262 ehci_err(ehci, "timeout waiting for SUSPEND\n");
264 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
265 if (ci->platdata->notify_event)
266 ci->platdata->notify_event(ci,
267 CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
269 temp = ehci_readl(ehci, status_reg);
270 temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
271 ehci_writel(ehci, temp, status_reg);
274 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
279 * After resume has finished, it needs do some post resume
280 * operation for some SoCs.
282 else if (typeReq == ClearPortFeature &&
283 wValue == USB_PORT_FEAT_C_SUSPEND) {
284 /* Make sure the resume has finished, it should be finished */
285 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
286 ehci_err(ehci, "timeout waiting for resume\n");
289 spin_unlock_irqrestore(&ehci->lock, flags);
291 /* Handle the hub control events here */
292 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
294 spin_unlock_irqrestore(&ehci->lock, flags);
297 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
299 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
300 struct device *dev = hcd->self.controller;
301 struct ci_hdrc *ci = dev_get_drvdata(dev);
305 int ret = orig_bus_suspend(hcd);
310 port = HCS_N_PORTS(ehci->hcs_params);
312 u32 __iomem *reg = &ehci->regs->port_status[port];
313 u32 portsc = ehci_readl(ehci, reg);
315 if (portsc & PORT_CONNECT) {
317 * For chipidea, the resume signal will be ended
318 * automatically, so for remote wakeup case, the
319 * usbcmd.rs may not be set before the resume has
320 * ended if other resume paths consumes too much
321 * time (~24ms), in that case, the SOF will not
322 * send out within 3ms after resume ends, then the
323 * high speed device will enter full speed mode.
326 tmp = ehci_readl(ehci, &ehci->regs->command);
328 ehci_writel(ehci, tmp, &ehci->regs->command);
330 * It needs a short delay between set RS bit and PHCD.
332 usleep_range(150, 200);
334 * Need to clear WKCN and WKOC for imx HSIC,
335 * otherwise, there will be wakeup event.
337 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
338 tmp = ehci_readl(ehci, reg);
339 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
340 ehci_writel(ehci, tmp, reg);
350 int ci_hdrc_host_init(struct ci_hdrc *ci)
352 struct ci_role_driver *rdrv;
354 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
357 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
361 rdrv->start = host_start;
362 rdrv->stop = host_stop;
363 rdrv->irq = host_irq;
365 ci->roles[CI_ROLE_HOST] = rdrv;
370 void ci_hdrc_host_driver_init(void)
372 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
373 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
374 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
375 ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;