drivers/usb/chipidea/core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * core.c - ChipIdea USB IP core family device controller
   4  *
   5  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
   6  * Copyright (C) 2020 NXP
   7  *
   8  * Author: David Lopo
   9  *         Peter Chen <peter.chen@nxp.com>
  10  *
  11  * Main Features:
  12  * - Four transfers are supported, usbtest is passed
  13  * - USB Certification for gadget: CH9 and Mass Storage are passed
  14  * - Low power mode
  15  * - USB wakeup
  16  */
  17 #include <linux/delay.h>
  18 #include <linux/device.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/extcon.h>
  21 #include <linux/phy/phy.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/module.h>
  24 #include <linux/idr.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/pm_runtime.h>
  30 #include <linux/pinctrl/consumer.h>
  31 #include <linux/usb/ch9.h>
  32 #include <linux/usb/gadget.h>
  33 #include <linux/usb/otg.h>
  34 #include <linux/usb/chipidea.h>
  35 #include <linux/usb/of.h>
  36 #include <linux/of.h>
  37 #include <linux/regulator/consumer.h>
  38 #include <linux/usb/ehci_def.h>
  39
  40 #include "ci.h"
  41 #include "udc.h"
  42 #include "bits.h"
  43 #include "host.h"
  44 #include "otg.h"
  45 #include "otg_fsm.h"
  46
  47 /* Controller register map */
  48 static const u8 ci_regs_nolpm[] = {
  49         [CAP_CAPLENGTH]         = 0x00U,
  50         [CAP_HCCPARAMS]         = 0x08U,
  51         [CAP_DCCPARAMS]         = 0x24U,
  52         [CAP_TESTMODE]          = 0x38U,
  53         [OP_USBCMD]             = 0x00U,
  54         [OP_USBSTS]             = 0x04U,
  55         [OP_USBINTR]            = 0x08U,
  56         [OP_DEVICEADDR]         = 0x14U,
  57         [OP_ENDPTLISTADDR]      = 0x18U,
  58         [OP_TTCTRL]             = 0x1CU,
  59         [OP_BURSTSIZE]          = 0x20U,
  60         [OP_ULPI_VIEWPORT]      = 0x30U,
  61         [OP_PORTSC]             = 0x44U,
  62         [OP_DEVLC]              = 0x84U,
  63         [OP_OTGSC]              = 0x64U,
  64         [OP_USBMODE]            = 0x68U,
  65         [OP_ENDPTSETUPSTAT]     = 0x6CU,
  66         [OP_ENDPTPRIME]         = 0x70U,
  67         [OP_ENDPTFLUSH]         = 0x74U,
  68         [OP_ENDPTSTAT]          = 0x78U,
  69         [OP_ENDPTCOMPLETE]      = 0x7CU,
  70         [OP_ENDPTCTRL]          = 0x80U,
  71 };
  72
  73 static const u8 ci_regs_lpm[] = {
  74         [CAP_CAPLENGTH]         = 0x00U,
  75         [CAP_HCCPARAMS]         = 0x08U,
  76         [CAP_DCCPARAMS]         = 0x24U,
  77         [CAP_TESTMODE]          = 0xFCU,
  78         [OP_USBCMD]             = 0x00U,
  79         [OP_USBSTS]             = 0x04U,
  80         [OP_USBINTR]            = 0x08U,
  81         [OP_DEVICEADDR]         = 0x14U,
  82         [OP_ENDPTLISTADDR]      = 0x18U,
  83         [OP_TTCTRL]             = 0x1CU,
  84         [OP_BURSTSIZE]          = 0x20U,
  85         [OP_ULPI_VIEWPORT]      = 0x30U,
  86         [OP_PORTSC]             = 0x44U,
  87         [OP_DEVLC]              = 0x84U,
  88         [OP_OTGSC]              = 0xC4U,
  89         [OP_USBMODE]            = 0xC8U,
  90         [OP_ENDPTSETUPSTAT]     = 0xD8U,
  91         [OP_ENDPTPRIME]         = 0xDCU,
  92         [OP_ENDPTFLUSH]         = 0xE0U,
  93         [OP_ENDPTSTAT]          = 0xE4U,
  94         [OP_ENDPTCOMPLETE]      = 0xE8U,
  95         [OP_ENDPTCTRL]          = 0xECU,
  96 };
  97
  98 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
  99 {
 100         int i;
 101
 102         for (i = 0; i < OP_ENDPTCTRL; i++)
 103                 ci->hw_bank.regmap[i] =
 104                         (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
 105                         (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
 106
 107         for (; i <= OP_LAST; i++)
 108                 ci->hw_bank.regmap[i] = ci->hw_bank.op +
 109                         4 * (i - OP_ENDPTCTRL) +
 110                         (is_lpm
 111                          ? ci_regs_lpm[OP_ENDPTCTRL]
 112                          : ci_regs_nolpm[OP_ENDPTCTRL]);
 113
 114 }
 115
 116 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
 117 {
 118         int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
 119         enum ci_revision rev = CI_REVISION_UNKNOWN;
 120
 121         if (ver == 0x2) {
 122                 rev = hw_read_id_reg(ci, ID_ID, REVISION)
 123                         >> __ffs(REVISION);
 124                 rev += CI_REVISION_20;
 125         } else if (ver == 0x0) {
 126                 rev = CI_REVISION_1X;
 127         }
 128
 129         return rev;
 130 }
 131
 132 /**
 133  * hw_read_intr_enable: returns interrupt enable register
 134  *
 135  * @ci: the controller
 136  *
 137  * This function returns register data
 138  */
 139 u32 hw_read_intr_enable(struct ci_hdrc *ci)
 140 {
 141         return hw_read(ci, OP_USBINTR, ~0);
 142 }
 143
 144 /**
 145  * hw_read_intr_status: returns interrupt status register
 146  *
 147  * @ci: the controller
 148  *
 149  * This function returns register data
 150  */
 151 u32 hw_read_intr_status(struct ci_hdrc *ci)
 152 {
 153         return hw_read(ci, OP_USBSTS, ~0);
 154 }
 155
 156 /**
 157  * hw_port_test_set: writes port test mode (execute without interruption)
 158  * @mode: new value
 159  *
 160  * This function returns an error code
 161  */
 162 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
 163 {
 164         const u8 TEST_MODE_MAX = 7;
 165
 166         if (mode > TEST_MODE_MAX)
 167                 return -EINVAL;
 168
 169         hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
 170         return 0;
 171 }
 172
 173 /**
 174  * hw_port_test_get: reads port test mode value
 175  *
 176  * @ci: the controller
 177  *
 178  * This function returns port test mode value
 179  */
 180 u8 hw_port_test_get(struct ci_hdrc *ci)
 181 {
 182         return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
 183 }
 184
 185 static void hw_wait_phy_stable(void)
 186 {
 187         /*
 188          * The phy needs some delay to output the stable status from low
 189          * power mode. And for OTGSC, the status inputs are debounced
 190          * using a 1 ms time constant, so, delay 2ms for controller to get
 191          * the stable status, like vbus and id when the phy leaves low power.
 192          */
 193         usleep_range(2000, 2500);
 194 }
 195
 196 /* The PHY enters/leaves low power mode */
 197 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
 198 {
 199         enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
 200         bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
 201
 202         if (enable && !lpm)
 203                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
 204                                 PORTSC_PHCD(ci->hw_bank.lpm));
 205         else if (!enable && lpm)
 206                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
 207                                 0);
 208 }
 209
 210 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
 211 {
 212         u32 reg;
 213
 214         /* bank is a module variable */
 215         ci->hw_bank.abs = base;
 216
 217         ci->hw_bank.cap = ci->hw_bank.abs;
 218         ci->hw_bank.cap += ci->platdata->capoffset;
 219         ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
 220
 221         hw_alloc_regmap(ci, false);
 222         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
 223                 __ffs(HCCPARAMS_LEN);
 224         ci->hw_bank.lpm  = reg;
 225         if (reg)
 226                 hw_alloc_regmap(ci, !!reg);
 227         ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
 228         ci->hw_bank.size += OP_LAST;
 229         ci->hw_bank.size /= sizeof(u32);
 230
 231         reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
 232                 __ffs(DCCPARAMS_DEN);
 233         ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
 234
 235         if (ci->hw_ep_max > ENDPT_MAX)
 236                 return -ENODEV;
 237
 238         ci_hdrc_enter_lpm(ci, false);
 239
 240         /* Disable all interrupts bits */
 241         hw_write(ci, OP_USBINTR, 0xffffffff, 0);
 242
 243         /* Clear all interrupts status bits*/
 244         hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
 245
 246         ci->rev = ci_get_revision(ci);
 247
 248         dev_dbg(ci->dev,
 249                 "revision: %d, lpm: %d; cap: %px op: %px\n",
 250                 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
 251
 252         /* setup lock mode ? */
 253
 254         /* ENDPTSETUPSTAT is '0' by default */
 255
 256         /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
 257
 258         return 0;
 259 }
 260
 261 void hw_phymode_configure(struct ci_hdrc *ci)
 262 {
 263         u32 portsc, lpm, sts = 0;
 264
 265         switch (ci->platdata->phy_mode) {
 266         case USBPHY_INTERFACE_MODE_UTMI:
 267                 portsc = PORTSC_PTS(PTS_UTMI);
 268                 lpm = DEVLC_PTS(PTS_UTMI);
 269                 break;
 270         case USBPHY_INTERFACE_MODE_UTMIW:
 271                 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
 272                 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
 273                 break;
 274         case USBPHY_INTERFACE_MODE_ULPI:
 275                 portsc = PORTSC_PTS(PTS_ULPI);
 276                 lpm = DEVLC_PTS(PTS_ULPI);
 277                 break;
 278         case USBPHY_INTERFACE_MODE_SERIAL:
 279                 portsc = PORTSC_PTS(PTS_SERIAL);
 280                 lpm = DEVLC_PTS(PTS_SERIAL);
 281                 sts = 1;
 282                 break;
 283         case USBPHY_INTERFACE_MODE_HSIC:
 284                 portsc = PORTSC_PTS(PTS_HSIC);
 285                 lpm = DEVLC_PTS(PTS_HSIC);
 286                 break;
 287         default:
 288                 return;
 289         }
 290
 291         if (ci->hw_bank.lpm) {
 292                 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
 293                 if (sts)
 294                         hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
 295         } else {
 296                 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
 297                 if (sts)
 298                         hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
 299         }
 300 }
 301 EXPORT_SYMBOL_GPL(hw_phymode_configure);
 302
 303 /**
 304  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
 305  * interfaces
 306  * @ci: the controller
 307  *
 308  * This function returns an error code if the phy failed to init
 309  */
 310 static int _ci_usb_phy_init(struct ci_hdrc *ci)
 311 {
 312         int ret;
 313
 314         if (ci->phy) {
 315                 ret = phy_init(ci->phy);
 316                 if (ret)
 317                         return ret;
 318
 319                 ret = phy_power_on(ci->phy);
 320                 if (ret) {
 321                         phy_exit(ci->phy);
 322                         return ret;
 323                 }
 324         } else {
 325                 ret = usb_phy_init(ci->usb_phy);
 326         }
 327
 328         return ret;
 329 }
 330
 331 /**
 332  * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
 333  * interfaces
 334  * @ci: the controller
 335  */
 336 static void ci_usb_phy_exit(struct ci_hdrc *ci)
 337 {
 338         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
 339                 return;
 340
 341         if (ci->phy) {
 342                 phy_power_off(ci->phy);
 343                 phy_exit(ci->phy);
 344         } else {
 345                 usb_phy_shutdown(ci->usb_phy);
 346         }
 347 }
 348
 349 /**
 350  * ci_usb_phy_init: initialize phy according to different phy type
 351  * @ci: the controller
 352  *
 353  * This function returns an error code if usb_phy_init has failed
 354  */
 355 static int ci_usb_phy_init(struct ci_hdrc *ci)
 356 {
 357         int ret;
 358
 359         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
 360                 return 0;
 361
 362         switch (ci->platdata->phy_mode) {
 363         case USBPHY_INTERFACE_MODE_UTMI:
 364         case USBPHY_INTERFACE_MODE_UTMIW:
 365         case USBPHY_INTERFACE_MODE_HSIC:
 366                 ret = _ci_usb_phy_init(ci);
 367                 if (!ret)
 368                         hw_wait_phy_stable();
 369                 else
 370                         return ret;
 371                 hw_phymode_configure(ci);
 372                 break;
 373         case USBPHY_INTERFACE_MODE_ULPI:
 374         case USBPHY_INTERFACE_MODE_SERIAL:
 375                 hw_phymode_configure(ci);
 376                 ret = _ci_usb_phy_init(ci);
 377                 if (ret)
 378                         return ret;
 379                 break;
 380         default:
 381                 ret = _ci_usb_phy_init(ci);
 382                 if (!ret)
 383                         hw_wait_phy_stable();
 384         }
 385
 386         return ret;
 387 }
 388
 389
 390 /**
 391  * ci_platform_configure: do controller configure
 392  * @ci: the controller
 393  *
 394  */
 395 void ci_platform_configure(struct ci_hdrc *ci)
 396 {
 397         bool is_device_mode, is_host_mode;
 398
 399         is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
 400         is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
 401
 402         if (is_device_mode) {
 403                 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
 404
 405                 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
 406                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
 407                                  USBMODE_CI_SDIS);
 408         }
 409
 410         if (is_host_mode) {
 411                 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
 412
 413                 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
 414                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
 415                                  USBMODE_CI_SDIS);
 416         }
 417
 418         if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
 419                 if (ci->hw_bank.lpm)
 420                         hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
 421                 else
 422                         hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
 423         }
 424
 425         if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
 426                 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
 427
 428         hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
 429
 430         if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
 431                 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
 432                         ci->platdata->ahb_burst_config);
 433
 434         /* override burst size, take effect only when ahb_burst_config is 0 */
 435         if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
 436                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
 437                         hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
 438                         ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
 439
 440                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
 441                         hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
 442                                 ci->platdata->rx_burst_size);
 443         }
 444 }
 445
 446 /**
 447  * hw_controller_reset: do controller reset
 448  * @ci: the controller
 449   *
 450  * This function returns an error code
 451  */
 452 static int hw_controller_reset(struct ci_hdrc *ci)
 453 {
 454         int count = 0;
 455
 456         hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
 457         while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
 458                 udelay(10);
 459                 if (count++ > 1000)
 460                         return -ETIMEDOUT;
 461         }
 462
 463         return 0;
 464 }
 465
 466 /**
 467  * hw_device_reset: resets chip (execute without interruption)
 468  * @ci: the controller
 469  *
 470  * This function returns an error code
 471  */
 472 int hw_device_reset(struct ci_hdrc *ci)
 473 {
 474         int ret;
 475
 476         /* should flush & stop before reset */
 477         hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
 478         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
 479
 480         ret = hw_controller_reset(ci);
 481         if (ret) {
 482                 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
 483                 return ret;
 484         }
 485
 486         if (ci->platdata->notify_event) {
 487                 ret = ci->platdata->notify_event(ci,
 488                         CI_HDRC_CONTROLLER_RESET_EVENT);
 489                 if (ret)
 490                         return ret;
 491         }
 492
 493         /* USBMODE should be configured step by step */
 494         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
 495         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
 496         /* HW >= 2.3 */
 497         hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
 498
 499         if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
 500                 dev_err(ci->dev, "cannot enter in %s device mode\n",
 501                         ci_role(ci)->name);
 502                 dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
 503                 return -ENODEV;
 504         }
 505
 506         ci_platform_configure(ci);
 507
 508         return 0;
 509 }
 510
 511 static irqreturn_t ci_irq(int irq, void *data)
 512 {
 513         struct ci_hdrc *ci = data;
 514         irqreturn_t ret = IRQ_NONE;
 515         u32 otgsc = 0;
 516
 517         if (ci->in_lpm) {
 518                 disable_irq_nosync(irq);
 519                 ci->wakeup_int = true;
 520                 pm_runtime_get(ci->dev);
 521                 return IRQ_HANDLED;
 522         }
 523
 524         if (ci->is_otg) {
 525                 otgsc = hw_read_otgsc(ci, ~0);
 526                 if (ci_otg_is_fsm_mode(ci)) {
 527                         ret = ci_otg_fsm_irq(ci);
 528                         if (ret == IRQ_HANDLED)
 529                                 return ret;
 530                 }
 531         }
 532
 533         /*
 534          * Handle id change interrupt, it indicates device/host function
 535          * switch.
 536          */
 537         if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
 538                 ci->id_event = true;
 539                 /* Clear ID change irq status */
 540                 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
 541                 ci_otg_queue_work(ci);
 542                 return IRQ_HANDLED;
 543         }
 544
 545         /*
 546          * Handle vbus change interrupt, it indicates device connection
 547          * and disconnection events.
 548          */
 549         if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
 550                 ci->b_sess_valid_event = true;
 551                 /* Clear BSV irq */
 552                 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
 553                 ci_otg_queue_work(ci);
 554                 return IRQ_HANDLED;
 555         }
 556
 557         /* Handle device/host interrupt */
 558         if (ci->role != CI_ROLE_END)
 559                 ret = ci_role(ci)->irq(ci);
 560
 561         return ret;
 562 }
 563
 564 static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
 565                              void *ptr)
 566 {
 567         struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
 568         struct ci_hdrc *ci = cbl->ci;
 569
 570         cbl->connected = event;
 571         cbl->changed = true;
 572
 573         ci_irq(ci->irq, ci);
 574         return NOTIFY_DONE;
 575 }
 576
 577 static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw)
 578 {
 579         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
 580         enum usb_role role;
 581         unsigned long flags;
 582
 583         spin_lock_irqsave(&ci->lock, flags);
 584         role = ci_role_to_usb_role(ci);
 585         spin_unlock_irqrestore(&ci->lock, flags);
 586
 587         return role;
 588 }
 589
 590 static int ci_usb_role_switch_set(struct usb_role_switch *sw,
 591                                   enum usb_role role)
 592 {
 593         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
 594         struct ci_hdrc_cable *cable = NULL;
 595         enum usb_role current_role = ci_role_to_usb_role(ci);
 596         enum ci_role ci_role = usb_role_to_ci_role(role);
 597         unsigned long flags;
 598
 599         if ((ci_role != CI_ROLE_END && !ci->roles[ci_role]) ||
 600             (current_role == role))
 601                 return 0;
 602
 603         pm_runtime_get_sync(ci->dev);
 604         /* Stop current role */
 605         spin_lock_irqsave(&ci->lock, flags);
 606         if (current_role == USB_ROLE_DEVICE)
 607                 cable = &ci->platdata->vbus_extcon;
 608         else if (current_role == USB_ROLE_HOST)
 609                 cable = &ci->platdata->id_extcon;
 610
 611         if (cable) {
 612                 cable->changed = true;
 613                 cable->connected = false;
 614                 ci_irq(ci->irq, ci);
 615                 spin_unlock_irqrestore(&ci->lock, flags);
 616                 if (ci->wq && role != USB_ROLE_NONE)
 617                         flush_workqueue(ci->wq);
 618                 spin_lock_irqsave(&ci->lock, flags);
 619         }
 620
 621         cable = NULL;
 622
 623         /* Start target role */
 624         if (role == USB_ROLE_DEVICE)
 625                 cable = &ci->platdata->vbus_extcon;
 626         else if (role == USB_ROLE_HOST)
 627                 cable = &ci->platdata->id_extcon;
 628
 629         if (cable) {
 630                 cable->changed = true;
 631                 cable->connected = true;
 632                 ci_irq(ci->irq, ci);
 633         }
 634         spin_unlock_irqrestore(&ci->lock, flags);
 635         pm_runtime_put_sync(ci->dev);
 636
 637         return 0;
 638 }
 639
 640 static struct usb_role_switch_desc ci_role_switch = {
 641         .set = ci_usb_role_switch_set,
 642         .get = ci_usb_role_switch_get,
 643         .allow_userspace_control = true,
 644 };
 645
 646 static int ci_get_platdata(struct device *dev,
 647                 struct ci_hdrc_platform_data *platdata)
 648 {
 649         struct extcon_dev *ext_vbus, *ext_id;
 650         struct ci_hdrc_cable *cable;
 651         int ret;
 652
 653         if (!platdata->phy_mode)
 654                 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
 655
 656         if (!platdata->dr_mode)
 657                 platdata->dr_mode = usb_get_dr_mode(dev);
 658
 659         if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
 660                 platdata->dr_mode = USB_DR_MODE_OTG;
 661
 662         if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
 663                 /* Get the vbus regulator */
 664                 platdata->reg_vbus = devm_regulator_get_optional(dev, "vbus");
 665                 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
 666                         return -EPROBE_DEFER;
 667                 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
 668                         /* no vbus regulator is needed */
 669                         platdata->reg_vbus = NULL;
 670                 } else if (IS_ERR(platdata->reg_vbus)) {
 671                         dev_err(dev, "Getting regulator error: %ld\n",
 672                                 PTR_ERR(platdata->reg_vbus));
 673                         return PTR_ERR(platdata->reg_vbus);
 674                 }
 675                 /* Get TPL support */
 676                 if (!platdata->tpl_support)
 677                         platdata->tpl_support =
 678                                 of_usb_host_tpl_support(dev->of_node);
 679         }
 680
 681         if (platdata->dr_mode == USB_DR_MODE_OTG) {
 682                 /* We can support HNP and SRP of OTG 2.0 */
 683                 platdata->ci_otg_caps.otg_rev = 0x0200;
 684                 platdata->ci_otg_caps.hnp_support = true;
 685                 platdata->ci_otg_caps.srp_support = true;
 686
 687                 /* Update otg capabilities by DT properties */
 688                 ret = of_usb_update_otg_caps(dev->of_node,
 689                                         &platdata->ci_otg_caps);
 690                 if (ret)
 691                         return ret;
 692         }
 693
 694         if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
 695                 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
 696
 697         of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
 698                                      &platdata->phy_clkgate_delay_us);
 699
 700         platdata->itc_setting = 1;
 701
 702         of_property_read_u32(dev->of_node, "itc-setting",
 703                                         &platdata->itc_setting);
 704
 705         ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
 706                                 &platdata->ahb_burst_config);
 707         if (!ret) {
 708                 platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
 709         } else if (ret != -EINVAL) {
 710                 dev_err(dev, "failed to get ahb-burst-config\n");
 711                 return ret;
 712         }
 713
 714         ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
 715                                 &platdata->tx_burst_size);
 716         if (!ret) {
 717                 platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
 718         } else if (ret != -EINVAL) {
 719                 dev_err(dev, "failed to get tx-burst-size-dword\n");
 720                 return ret;
 721         }
 722
 723         ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
 724                                 &platdata->rx_burst_size);
 725         if (!ret) {
 726                 platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
 727         } else if (ret != -EINVAL) {
 728                 dev_err(dev, "failed to get rx-burst-size-dword\n");
 729                 return ret;
 730         }
 731
 732         if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
 733                 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
 734
 735         ext_id = ERR_PTR(-ENODEV);
 736         ext_vbus = ERR_PTR(-ENODEV);
 737         if (of_property_read_bool(dev->of_node, "extcon")) {
 738                 /* Each one of them is not mandatory */
 739                 ext_vbus = extcon_get_edev_by_phandle(dev, 0);
 740                 if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
 741                         return PTR_ERR(ext_vbus);
 742
 743                 ext_id = extcon_get_edev_by_phandle(dev, 1);
 744                 if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
 745                         return PTR_ERR(ext_id);
 746         }
 747
 748         cable = &platdata->vbus_extcon;
 749         cable->nb.notifier_call = ci_cable_notifier;
 750         cable->edev = ext_vbus;
 751
 752         if (!IS_ERR(ext_vbus)) {
 753                 ret = extcon_get_state(cable->edev, EXTCON_USB);
 754                 if (ret)
 755                         cable->connected = true;
 756                 else
 757                         cable->connected = false;
 758         }
 759
 760         cable = &platdata->id_extcon;
 761         cable->nb.notifier_call = ci_cable_notifier;
 762         cable->edev = ext_id;
 763
 764         if (!IS_ERR(ext_id)) {
 765                 ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
 766                 if (ret)
 767                         cable->connected = true;
 768                 else
 769                         cable->connected = false;
 770         }
 771
 772         if (device_property_read_bool(dev, "usb-role-switch"))
 773                 ci_role_switch.fwnode = dev->fwnode;
 774
 775         platdata->pctl = devm_pinctrl_get(dev);
 776         if (!IS_ERR(platdata->pctl)) {
 777                 struct pinctrl_state *p;
 778
 779                 p = pinctrl_lookup_state(platdata->pctl, "default");
 780                 if (!IS_ERR(p))
 781                         platdata->pins_default = p;
 782
 783                 p = pinctrl_lookup_state(platdata->pctl, "host");
 784                 if (!IS_ERR(p))
 785                         platdata->pins_host = p;
 786
 787                 p = pinctrl_lookup_state(platdata->pctl, "device");
 788                 if (!IS_ERR(p))
 789                         platdata->pins_device = p;
 790         }
 791
 792         return 0;
 793 }
 794
 795 static int ci_extcon_register(struct ci_hdrc *ci)
 796 {
 797         struct ci_hdrc_cable *id, *vbus;
 798         int ret;
 799
 800         id = &ci->platdata->id_extcon;
 801         id->ci = ci;
 802         if (!IS_ERR_OR_NULL(id->edev)) {
 803                 ret = devm_extcon_register_notifier(ci->dev, id->edev,
 804                                                 EXTCON_USB_HOST, &id->nb);
 805                 if (ret < 0) {
 806                         dev_err(ci->dev, "register ID failed\n");
 807                         return ret;
 808                 }
 809         }
 810
 811         vbus = &ci->platdata->vbus_extcon;
 812         vbus->ci = ci;
 813         if (!IS_ERR_OR_NULL(vbus->edev)) {
 814                 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
 815                                                 EXTCON_USB, &vbus->nb);
 816                 if (ret < 0) {
 817                         dev_err(ci->dev, "register VBUS failed\n");
 818                         return ret;
 819                 }
 820         }
 821
 822         return 0;
 823 }
 824
 825 static DEFINE_IDA(ci_ida);
 826
 827 struct platform_device *ci_hdrc_add_device(struct device *dev,
 828                         struct resource *res, int nres,
 829                         struct ci_hdrc_platform_data *platdata)
 830 {
 831         struct platform_device *pdev;
 832         int id, ret;
 833
 834         ret = ci_get_platdata(dev, platdata);
 835         if (ret)
 836                 return ERR_PTR(ret);
 837
 838         id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
 839         if (id < 0)
 840                 return ERR_PTR(id);
 841
 842         pdev = platform_device_alloc("ci_hdrc", id);
 843         if (!pdev) {
 844                 ret = -ENOMEM;
 845                 goto put_id;
 846         }
 847
 848         pdev->dev.parent = dev;
 849
 850         ret = platform_device_add_resources(pdev, res, nres);
 851         if (ret)
 852                 goto err;
 853
 854         ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
 855         if (ret)
 856                 goto err;
 857
 858         ret = platform_device_add(pdev);
 859         if (ret)
 860                 goto err;
 861
 862         return pdev;
 863
 864 err:
 865         platform_device_put(pdev);
 866 put_id:
 867         ida_simple_remove(&ci_ida, id);
 868         return ERR_PTR(ret);
 869 }
 870 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
 871
 872 void ci_hdrc_remove_device(struct platform_device *pdev)
 873 {
 874         int id = pdev->id;
 875         platform_device_unregister(pdev);
 876         ida_simple_remove(&ci_ida, id);
 877 }
 878 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
 879
 880 static inline void ci_role_destroy(struct ci_hdrc *ci)
 881 {
 882         ci_hdrc_gadget_destroy(ci);
 883         ci_hdrc_host_destroy(ci);
 884         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
 885                 ci_hdrc_otg_destroy(ci);
 886 }
 887
 888 static void ci_get_otg_capable(struct ci_hdrc *ci)
 889 {
 890         if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
 891                 ci->is_otg = false;
 892         else
 893                 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
 894                                 DCCPARAMS_DC | DCCPARAMS_HC)
 895                                         == (DCCPARAMS_DC | DCCPARAMS_HC));
 896         if (ci->is_otg) {
 897                 dev_dbg(ci->dev, "It is OTG capable controller\n");
 898                 /* Disable and clear all OTG irq */
 899                 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
 900                                                         OTGSC_INT_STATUS_BITS);
 901         }
 902 }
 903
 904 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
 905                           char *buf)
 906 {
 907         struct ci_hdrc *ci = dev_get_drvdata(dev);
 908
 909         if (ci->role != CI_ROLE_END)
 910                 return sprintf(buf, "%s\n", ci_role(ci)->name);
 911
 912         return 0;
 913 }
 914
 915 static ssize_t role_store(struct device *dev,
 916                 struct device_attribute *attr, const char *buf, size_t n)
 917 {
 918         struct ci_hdrc *ci = dev_get_drvdata(dev);
 919         enum ci_role role;
 920         int ret;
 921
 922         if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
 923                 dev_warn(dev, "Current configuration is not dual-role, quit\n");
 924                 return -EPERM;
 925         }
 926
 927         for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
 928                 if (!strncmp(buf, ci->roles[role]->name,
 929                              strlen(ci->roles[role]->name)))
 930                         break;
 931
 932         if (role == CI_ROLE_END || role == ci->role)
 933                 return -EINVAL;
 934
 935         pm_runtime_get_sync(dev);
 936         disable_irq(ci->irq);
 937         ci_role_stop(ci);
 938         ret = ci_role_start(ci, role);
 939         if (!ret && ci->role == CI_ROLE_GADGET)
 940                 ci_handle_vbus_change(ci);
 941         enable_irq(ci->irq);
 942         pm_runtime_put_sync(dev);
 943
 944         return (ret == 0) ? n : ret;
 945 }
 946 static DEVICE_ATTR_RW(role);
 947
 948 static struct attribute *ci_attrs[] = {
 949         &dev_attr_role.attr,
 950         NULL,
 951 };
 952 ATTRIBUTE_GROUPS(ci);
 953
 954 static int ci_hdrc_probe(struct platform_device *pdev)
 955 {
 956         struct device   *dev = &pdev->dev;
 957         struct ci_hdrc  *ci;
 958         struct resource *res;
 959         void __iomem    *base;
 960         int             ret;
 961         enum usb_dr_mode dr_mode;
 962
 963         if (!dev_get_platdata(dev)) {
 964                 dev_err(dev, "platform data missing\n");
 965                 return -ENODEV;
 966         }
 967
 968         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 969         base = devm_ioremap_resource(dev, res);
 970         if (IS_ERR(base))
 971                 return PTR_ERR(base);
 972
 973         ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
 974         if (!ci)
 975                 return -ENOMEM;
 976
 977         spin_lock_init(&ci->lock);
 978         ci->dev = dev;
 979         ci->platdata = dev_get_platdata(dev);
 980         ci->imx28_write_fix = !!(ci->platdata->flags &
 981                 CI_HDRC_IMX28_WRITE_FIX);
 982         ci->supports_runtime_pm = !!(ci->platdata->flags &
 983                 CI_HDRC_SUPPORTS_RUNTIME_PM);
 984         platform_set_drvdata(pdev, ci);
 985
 986         ret = hw_device_init(ci, base);
 987         if (ret < 0) {
 988                 dev_err(dev, "can't initialize hardware\n");
 989                 return -ENODEV;
 990         }
 991
 992         ret = ci_ulpi_init(ci);
 993         if (ret)
 994                 return ret;
 995
 996         if (ci->platdata->phy) {
 997                 ci->phy = ci->platdata->phy;
 998         } else if (ci->platdata->usb_phy) {
 999                 ci->usb_phy = ci->platdata->usb_phy;
1000         } else {
1001                 /* Look for a generic PHY first */
1002                 ci->phy = devm_phy_get(dev->parent, "usb-phy");
1003
1004                 if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1005                         ret = -EPROBE_DEFER;
1006                         goto ulpi_exit;
1007                 } else if (IS_ERR(ci->phy)) {
1008                         ci->phy = NULL;
1009                 }
1010
1011                 /* Look for a legacy USB PHY from device-tree next */
1012                 if (!ci->phy) {
1013                         ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1014                                                                   "phys", 0);
1015
1016                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1017                                 ret = -EPROBE_DEFER;
1018                                 goto ulpi_exit;
1019                         } else if (IS_ERR(ci->usb_phy)) {
1020                                 ci->usb_phy = NULL;
1021                         }
1022                 }
1023
1024                 /* Look for any registered legacy USB PHY as last resort */
1025                 if (!ci->phy && !ci->usb_phy) {
1026                         ci->usb_phy = devm_usb_get_phy(dev->parent,
1027                                                        USB_PHY_TYPE_USB2);
1028
1029                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1030                                 ret = -EPROBE_DEFER;
1031                                 goto ulpi_exit;
1032                         } else if (IS_ERR(ci->usb_phy)) {
1033                                 ci->usb_phy = NULL;
1034                         }
1035                 }
1036
1037                 /* No USB PHY was found in the end */
1038                 if (!ci->phy && !ci->usb_phy) {
1039                         ret = -ENXIO;
1040                         goto ulpi_exit;
1041                 }
1042         }
1043
1044         ret = ci_usb_phy_init(ci);
1045         if (ret) {
1046                 dev_err(dev, "unable to init phy: %d\n", ret);
1047                 return ret;
1048         }
1049
1050         ci->hw_bank.phys = res->start;
1051
1052         ci->irq = platform_get_irq(pdev, 0);
1053         if (ci->irq < 0) {
1054                 ret = ci->irq;
1055                 goto deinit_phy;
1056         }
1057
1058         ci_get_otg_capable(ci);
1059
1060         dr_mode = ci->platdata->dr_mode;
1061         /* initialize role(s) before the interrupt is requested */
1062         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
1063                 ret = ci_hdrc_host_init(ci);
1064                 if (ret) {
1065                         if (ret == -ENXIO)
1066                                 dev_info(dev, "doesn't support host\n");
1067                         else
1068                                 goto deinit_phy;
1069                 }
1070         }
1071
1072         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
1073                 ret = ci_hdrc_gadget_init(ci);
1074                 if (ret) {
1075                         if (ret == -ENXIO)
1076                                 dev_info(dev, "doesn't support gadget\n");
1077                         else
1078                                 goto deinit_host;
1079                 }
1080         }
1081
1082         if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1083                 dev_err(dev, "no supported roles\n");
1084                 ret = -ENODEV;
1085                 goto deinit_gadget;
1086         }
1087
1088         if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1089                 ret = ci_hdrc_otg_init(ci);
1090                 if (ret) {
1091                         dev_err(dev, "init otg fails, ret = %d\n", ret);
1092                         goto deinit_gadget;
1093                 }
1094         }
1095
1096         if (ci_role_switch.fwnode) {
1097                 ci_role_switch.driver_data = ci;
1098                 ci->role_switch = usb_role_switch_register(dev,
1099                                         &ci_role_switch);
1100                 if (IS_ERR(ci->role_switch)) {
1101                         ret = PTR_ERR(ci->role_switch);
1102                         goto deinit_otg;
1103                 }
1104         }
1105
1106         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
1107                 if (ci->is_otg) {
1108                         ci->role = ci_otg_role(ci);
1109                         /* Enable ID change irq */
1110                         hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
1111                 } else {
1112                         /*
1113                          * If the controller is not OTG capable, but support
1114                          * role switch, the defalt role is gadget, and the
1115                          * user can switch it through debugfs.
1116                          */
1117                         ci->role = CI_ROLE_GADGET;
1118                 }
1119         } else {
1120                 ci->role = ci->roles[CI_ROLE_HOST]
1121                         ? CI_ROLE_HOST
1122                         : CI_ROLE_GADGET;
1123         }
1124
1125         if (!ci_otg_is_fsm_mode(ci)) {
1126                 /* only update vbus status for peripheral */
1127                 if (ci->role == CI_ROLE_GADGET) {
1128                         /* Pull down DP for possible charger detection */
1129                         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1130                         ci_handle_vbus_change(ci);
1131                 }
1132
1133                 ret = ci_role_start(ci, ci->role);
1134                 if (ret) {
1135                         dev_err(dev, "can't start %s role\n",
1136                                                 ci_role(ci)->name);
1137                         goto stop;
1138                 }
1139         }
1140
1141         ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
1142                         ci->platdata->name, ci);
1143         if (ret)
1144                 goto stop;
1145
1146         ret = ci_extcon_register(ci);
1147         if (ret)
1148                 goto stop;
1149
1150         if (ci->supports_runtime_pm) {
1151                 pm_runtime_set_active(&pdev->dev);
1152                 pm_runtime_enable(&pdev->dev);
1153                 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1154                 pm_runtime_mark_last_busy(ci->dev);
1155                 pm_runtime_use_autosuspend(&pdev->dev);
1156         }
1157
1158         if (ci_otg_is_fsm_mode(ci))
1159                 ci_hdrc_otg_fsm_start(ci);
1160
1161         device_set_wakeup_capable(&pdev->dev, true);
1162         dbg_create_files(ci);
1163
1164         return 0;
1165
1166 stop:
1167         if (ci->role_switch)
1168                 usb_role_switch_unregister(ci->role_switch);
1169 deinit_otg:
1170         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1171                 ci_hdrc_otg_destroy(ci);
1172 deinit_gadget:
1173         ci_hdrc_gadget_destroy(ci);
1174 deinit_host:
1175         ci_hdrc_host_destroy(ci);
1176 deinit_phy:
1177         ci_usb_phy_exit(ci);
1178 ulpi_exit:
1179         ci_ulpi_exit(ci);
1180
1181         return ret;
1182 }
1183
1184 static int ci_hdrc_remove(struct platform_device *pdev)
1185 {
1186         struct ci_hdrc *ci = platform_get_drvdata(pdev);
1187
1188         if (ci->role_switch)
1189                 usb_role_switch_unregister(ci->role_switch);
1190
1191         if (ci->supports_runtime_pm) {
1192                 pm_runtime_get_sync(&pdev->dev);
1193                 pm_runtime_disable(&pdev->dev);
1194                 pm_runtime_put_noidle(&pdev->dev);
1195         }
1196
1197         dbg_remove_files(ci);
1198         ci_role_destroy(ci);
1199         ci_hdrc_enter_lpm(ci, true);
1200         ci_usb_phy_exit(ci);
1201         ci_ulpi_exit(ci);
1202
1203         return 0;
1204 }
1205
1206 #ifdef CONFIG_PM
1207 /* Prepare wakeup by SRP before suspend */
1208 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1209 {
1210         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1211                                 !hw_read_otgsc(ci, OTGSC_ID)) {
1212                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1213                                                                 PORTSC_PP);
1214                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1215                                                                 PORTSC_WKCN);
1216         }
1217 }
1218
1219 /* Handle SRP when wakeup by data pulse */
1220 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1221 {
1222         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1223                 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1224                 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1225                         ci->fsm.a_srp_det = 1;
1226                         ci->fsm.a_bus_drop = 0;
1227                 } else {
1228                         ci->fsm.id = 1;
1229                 }
1230                 ci_otg_queue_work(ci);
1231         }
1232 }
1233
1234 static void ci_controller_suspend(struct ci_hdrc *ci)
1235 {
1236         disable_irq(ci->irq);
1237         ci_hdrc_enter_lpm(ci, true);
1238         if (ci->platdata->phy_clkgate_delay_us)
1239                 usleep_range(ci->platdata->phy_clkgate_delay_us,
1240                              ci->platdata->phy_clkgate_delay_us + 50);
1241         usb_phy_set_suspend(ci->usb_phy, 1);
1242         ci->in_lpm = true;
1243         enable_irq(ci->irq);
1244 }
1245
1246 static int ci_controller_resume(struct device *dev)
1247 {
1248         struct ci_hdrc *ci = dev_get_drvdata(dev);
1249         int ret;
1250
1251         dev_dbg(dev, "at %s\n", __func__);
1252
1253         if (!ci->in_lpm) {
1254                 WARN_ON(1);
1255                 return 0;
1256         }
1257
1258         ci_hdrc_enter_lpm(ci, false);
1259
1260         ret = ci_ulpi_resume(ci);
1261         if (ret)
1262                 return ret;
1263
1264         if (ci->usb_phy) {
1265                 usb_phy_set_suspend(ci->usb_phy, 0);
1266                 usb_phy_set_wakeup(ci->usb_phy, false);
1267                 hw_wait_phy_stable();
1268         }
1269
1270         ci->in_lpm = false;
1271         if (ci->wakeup_int) {
1272                 ci->wakeup_int = false;
1273                 pm_runtime_mark_last_busy(ci->dev);
1274                 pm_runtime_put_autosuspend(ci->dev);
1275                 enable_irq(ci->irq);
1276                 if (ci_otg_is_fsm_mode(ci))
1277                         ci_otg_fsm_wakeup_by_srp(ci);
1278         }
1279
1280         return 0;
1281 }
1282
1283 #ifdef CONFIG_PM_SLEEP
1284 static int ci_suspend(struct device *dev)
1285 {
1286         struct ci_hdrc *ci = dev_get_drvdata(dev);
1287
1288         if (ci->wq)
1289                 flush_workqueue(ci->wq);
1290         /*
1291          * Controller needs to be active during suspend, otherwise the core
1292          * may run resume when the parent is at suspend if other driver's
1293          * suspend fails, it occurs before parent's suspend has not started,
1294          * but the core suspend has finished.
1295          */
1296         if (ci->in_lpm)
1297                 pm_runtime_resume(dev);
1298
1299         if (ci->in_lpm) {
1300                 WARN_ON(1);
1301                 return 0;
1302         }
1303
1304         if (device_may_wakeup(dev)) {
1305                 if (ci_otg_is_fsm_mode(ci))
1306                         ci_otg_fsm_suspend_for_srp(ci);
1307
1308                 usb_phy_set_wakeup(ci->usb_phy, true);
1309                 enable_irq_wake(ci->irq);
1310         }
1311
1312         ci_controller_suspend(ci);
1313
1314         return 0;
1315 }
1316
1317 static int ci_resume(struct device *dev)
1318 {
1319         struct ci_hdrc *ci = dev_get_drvdata(dev);
1320         int ret;
1321
1322         if (device_may_wakeup(dev))
1323                 disable_irq_wake(ci->irq);
1324
1325         ret = ci_controller_resume(dev);
1326         if (ret)
1327                 return ret;
1328
1329         if (ci->supports_runtime_pm) {
1330                 pm_runtime_disable(dev);
1331                 pm_runtime_set_active(dev);
1332                 pm_runtime_enable(dev);
1333         }
1334
1335         return ret;
1336 }
1337 #endif /* CONFIG_PM_SLEEP */
1338
1339 static int ci_runtime_suspend(struct device *dev)
1340 {
1341         struct ci_hdrc *ci = dev_get_drvdata(dev);
1342
1343         dev_dbg(dev, "at %s\n", __func__);
1344
1345         if (ci->in_lpm) {
1346                 WARN_ON(1);
1347                 return 0;
1348         }
1349
1350         if (ci_otg_is_fsm_mode(ci))
1351                 ci_otg_fsm_suspend_for_srp(ci);
1352
1353         usb_phy_set_wakeup(ci->usb_phy, true);
1354         ci_controller_suspend(ci);
1355
1356         return 0;
1357 }
1358
1359 static int ci_runtime_resume(struct device *dev)
1360 {
1361         return ci_controller_resume(dev);
1362 }
1363
1364 #endif /* CONFIG_PM */
1365 static const struct dev_pm_ops ci_pm_ops = {
1366         SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1367         SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1368 };
1369
1370 static struct platform_driver ci_hdrc_driver = {
1371         .probe  = ci_hdrc_probe,
1372         .remove = ci_hdrc_remove,
1373         .driver = {
1374                 .name   = "ci_hdrc",
1375                 .pm     = &ci_pm_ops,
1376                 .dev_groups = ci_groups,
1377         },
1378 };
1379
1380 static int __init ci_hdrc_platform_register(void)
1381 {
1382         ci_hdrc_host_driver_init();
1383         return platform_driver_register(&ci_hdrc_driver);
1384 }
1385 module_init(ci_hdrc_platform_register);
1386
1387 static void __exit ci_hdrc_platform_unregister(void)
1388 {
1389         platform_driver_unregister(&ci_hdrc_driver);
1390 }
1391 module_exit(ci_hdrc_platform_unregister);
1392
1393 MODULE_ALIAS("platform:ci_hdrc");
1394 MODULE_LICENSE("GPL v2");
1395 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1396 MODULE_DESCRIPTION("ChipIdea HDRC Driver");