usbip: fix vudc usbip_sockfd_store races leading to gpf
[linux-2.6-microblaze.git] / drivers / usb / chipidea / core.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * core.c - ChipIdea USB IP core family device controller
4  *
5  * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6  * Copyright (C) 2020 NXP
7  *
8  * Author: David Lopo
9  *         Peter Chen <peter.chen@nxp.com>
10  *
11  * Main Features:
12  * - Four transfers are supported, usbtest is passed
13  * - USB Certification for gadget: CH9 and Mass Storage are passed
14  * - Low power mode
15  * - USB wakeup
16  */
17 #include <linux/delay.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/extcon.h>
21 #include <linux/phy/phy.h>
22 #include <linux/platform_device.h>
23 #include <linux/module.h>
24 #include <linux/idr.h>
25 #include <linux/interrupt.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/pinctrl/consumer.h>
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/gadget.h>
33 #include <linux/usb/otg.h>
34 #include <linux/usb/chipidea.h>
35 #include <linux/usb/of.h>
36 #include <linux/of.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/usb/ehci_def.h>
39
40 #include "ci.h"
41 #include "udc.h"
42 #include "bits.h"
43 #include "host.h"
44 #include "otg.h"
45 #include "otg_fsm.h"
46
47 /* Controller register map */
48 static const u8 ci_regs_nolpm[] = {
49         [CAP_CAPLENGTH]         = 0x00U,
50         [CAP_HCCPARAMS]         = 0x08U,
51         [CAP_DCCPARAMS]         = 0x24U,
52         [CAP_TESTMODE]          = 0x38U,
53         [OP_USBCMD]             = 0x00U,
54         [OP_USBSTS]             = 0x04U,
55         [OP_USBINTR]            = 0x08U,
56         [OP_DEVICEADDR]         = 0x14U,
57         [OP_ENDPTLISTADDR]      = 0x18U,
58         [OP_TTCTRL]             = 0x1CU,
59         [OP_BURSTSIZE]          = 0x20U,
60         [OP_ULPI_VIEWPORT]      = 0x30U,
61         [OP_PORTSC]             = 0x44U,
62         [OP_DEVLC]              = 0x84U,
63         [OP_OTGSC]              = 0x64U,
64         [OP_USBMODE]            = 0x68U,
65         [OP_ENDPTSETUPSTAT]     = 0x6CU,
66         [OP_ENDPTPRIME]         = 0x70U,
67         [OP_ENDPTFLUSH]         = 0x74U,
68         [OP_ENDPTSTAT]          = 0x78U,
69         [OP_ENDPTCOMPLETE]      = 0x7CU,
70         [OP_ENDPTCTRL]          = 0x80U,
71 };
72
73 static const u8 ci_regs_lpm[] = {
74         [CAP_CAPLENGTH]         = 0x00U,
75         [CAP_HCCPARAMS]         = 0x08U,
76         [CAP_DCCPARAMS]         = 0x24U,
77         [CAP_TESTMODE]          = 0xFCU,
78         [OP_USBCMD]             = 0x00U,
79         [OP_USBSTS]             = 0x04U,
80         [OP_USBINTR]            = 0x08U,
81         [OP_DEVICEADDR]         = 0x14U,
82         [OP_ENDPTLISTADDR]      = 0x18U,
83         [OP_TTCTRL]             = 0x1CU,
84         [OP_BURSTSIZE]          = 0x20U,
85         [OP_ULPI_VIEWPORT]      = 0x30U,
86         [OP_PORTSC]             = 0x44U,
87         [OP_DEVLC]              = 0x84U,
88         [OP_OTGSC]              = 0xC4U,
89         [OP_USBMODE]            = 0xC8U,
90         [OP_ENDPTSETUPSTAT]     = 0xD8U,
91         [OP_ENDPTPRIME]         = 0xDCU,
92         [OP_ENDPTFLUSH]         = 0xE0U,
93         [OP_ENDPTSTAT]          = 0xE4U,
94         [OP_ENDPTCOMPLETE]      = 0xE8U,
95         [OP_ENDPTCTRL]          = 0xECU,
96 };
97
98 static void hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
99 {
100         int i;
101
102         for (i = 0; i < OP_ENDPTCTRL; i++)
103                 ci->hw_bank.regmap[i] =
104                         (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) +
105                         (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
106
107         for (; i <= OP_LAST; i++)
108                 ci->hw_bank.regmap[i] = ci->hw_bank.op +
109                         4 * (i - OP_ENDPTCTRL) +
110                         (is_lpm
111                          ? ci_regs_lpm[OP_ENDPTCTRL]
112                          : ci_regs_nolpm[OP_ENDPTCTRL]);
113
114 }
115
116 static enum ci_revision ci_get_revision(struct ci_hdrc *ci)
117 {
118         int ver = hw_read_id_reg(ci, ID_ID, VERSION) >> __ffs(VERSION);
119         enum ci_revision rev = CI_REVISION_UNKNOWN;
120
121         if (ver == 0x2) {
122                 rev = hw_read_id_reg(ci, ID_ID, REVISION)
123                         >> __ffs(REVISION);
124                 rev += CI_REVISION_20;
125         } else if (ver == 0x0) {
126                 rev = CI_REVISION_1X;
127         }
128
129         return rev;
130 }
131
132 /**
133  * hw_read_intr_enable: returns interrupt enable register
134  *
135  * @ci: the controller
136  *
137  * This function returns register data
138  */
139 u32 hw_read_intr_enable(struct ci_hdrc *ci)
140 {
141         return hw_read(ci, OP_USBINTR, ~0);
142 }
143
144 /**
145  * hw_read_intr_status: returns interrupt status register
146  *
147  * @ci: the controller
148  *
149  * This function returns register data
150  */
151 u32 hw_read_intr_status(struct ci_hdrc *ci)
152 {
153         return hw_read(ci, OP_USBSTS, ~0);
154 }
155
156 /**
157  * hw_port_test_set: writes port test mode (execute without interruption)
158  * @ci: the controller
159  * @mode: new value
160  *
161  * This function returns an error code
162  */
163 int hw_port_test_set(struct ci_hdrc *ci, u8 mode)
164 {
165         const u8 TEST_MODE_MAX = 7;
166
167         if (mode > TEST_MODE_MAX)
168                 return -EINVAL;
169
170         hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << __ffs(PORTSC_PTC));
171         return 0;
172 }
173
174 /**
175  * hw_port_test_get: reads port test mode value
176  *
177  * @ci: the controller
178  *
179  * This function returns port test mode value
180  */
181 u8 hw_port_test_get(struct ci_hdrc *ci)
182 {
183         return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
184 }
185
186 static void hw_wait_phy_stable(void)
187 {
188         /*
189          * The phy needs some delay to output the stable status from low
190          * power mode. And for OTGSC, the status inputs are debounced
191          * using a 1 ms time constant, so, delay 2ms for controller to get
192          * the stable status, like vbus and id when the phy leaves low power.
193          */
194         usleep_range(2000, 2500);
195 }
196
197 /* The PHY enters/leaves low power mode */
198 static void ci_hdrc_enter_lpm_common(struct ci_hdrc *ci, bool enable)
199 {
200         enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
201         bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
202
203         if (enable && !lpm)
204                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
205                                 PORTSC_PHCD(ci->hw_bank.lpm));
206         else if (!enable && lpm)
207                 hw_write(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm),
208                                 0);
209 }
210
211 static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
212 {
213         return ci->platdata->enter_lpm(ci, enable);
214 }
215
216 static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
217 {
218         u32 reg;
219
220         /* bank is a module variable */
221         ci->hw_bank.abs = base;
222
223         ci->hw_bank.cap = ci->hw_bank.abs;
224         ci->hw_bank.cap += ci->platdata->capoffset;
225         ci->hw_bank.op = ci->hw_bank.cap + (ioread32(ci->hw_bank.cap) & 0xff);
226
227         hw_alloc_regmap(ci, false);
228         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
229                 __ffs(HCCPARAMS_LEN);
230         ci->hw_bank.lpm  = reg;
231         if (reg)
232                 hw_alloc_regmap(ci, !!reg);
233         ci->hw_bank.size = ci->hw_bank.op - ci->hw_bank.abs;
234         ci->hw_bank.size += OP_LAST;
235         ci->hw_bank.size /= sizeof(u32);
236
237         reg = hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
238                 __ffs(DCCPARAMS_DEN);
239         ci->hw_ep_max = reg * 2;   /* cache hw ENDPT_MAX */
240
241         if (ci->hw_ep_max > ENDPT_MAX)
242                 return -ENODEV;
243
244         ci_hdrc_enter_lpm(ci, false);
245
246         /* Disable all interrupts bits */
247         hw_write(ci, OP_USBINTR, 0xffffffff, 0);
248
249         /* Clear all interrupts status bits*/
250         hw_write(ci, OP_USBSTS, 0xffffffff, 0xffffffff);
251
252         ci->rev = ci_get_revision(ci);
253
254         dev_dbg(ci->dev,
255                 "revision: %d, lpm: %d; cap: %px op: %px\n",
256                 ci->rev, ci->hw_bank.lpm, ci->hw_bank.cap, ci->hw_bank.op);
257
258         /* setup lock mode ? */
259
260         /* ENDPTSETUPSTAT is '0' by default */
261
262         /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
263
264         return 0;
265 }
266
267 void hw_phymode_configure(struct ci_hdrc *ci)
268 {
269         u32 portsc, lpm, sts = 0;
270
271         switch (ci->platdata->phy_mode) {
272         case USBPHY_INTERFACE_MODE_UTMI:
273                 portsc = PORTSC_PTS(PTS_UTMI);
274                 lpm = DEVLC_PTS(PTS_UTMI);
275                 break;
276         case USBPHY_INTERFACE_MODE_UTMIW:
277                 portsc = PORTSC_PTS(PTS_UTMI) | PORTSC_PTW;
278                 lpm = DEVLC_PTS(PTS_UTMI) | DEVLC_PTW;
279                 break;
280         case USBPHY_INTERFACE_MODE_ULPI:
281                 portsc = PORTSC_PTS(PTS_ULPI);
282                 lpm = DEVLC_PTS(PTS_ULPI);
283                 break;
284         case USBPHY_INTERFACE_MODE_SERIAL:
285                 portsc = PORTSC_PTS(PTS_SERIAL);
286                 lpm = DEVLC_PTS(PTS_SERIAL);
287                 sts = 1;
288                 break;
289         case USBPHY_INTERFACE_MODE_HSIC:
290                 portsc = PORTSC_PTS(PTS_HSIC);
291                 lpm = DEVLC_PTS(PTS_HSIC);
292                 break;
293         default:
294                 return;
295         }
296
297         if (ci->hw_bank.lpm) {
298                 hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm);
299                 if (sts)
300                         hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS);
301         } else {
302                 hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);
303                 if (sts)
304                         hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
305         }
306 }
307 EXPORT_SYMBOL_GPL(hw_phymode_configure);
308
309 /**
310  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
311  * interfaces
312  * @ci: the controller
313  *
314  * This function returns an error code if the phy failed to init
315  */
316 static int _ci_usb_phy_init(struct ci_hdrc *ci)
317 {
318         int ret;
319
320         if (ci->phy) {
321                 ret = phy_init(ci->phy);
322                 if (ret)
323                         return ret;
324
325                 ret = phy_power_on(ci->phy);
326                 if (ret) {
327                         phy_exit(ci->phy);
328                         return ret;
329                 }
330         } else {
331                 ret = usb_phy_init(ci->usb_phy);
332         }
333
334         return ret;
335 }
336
337 /**
338  * _ci_usb_phy_exit: deinitialize phy taking in account both phy and usb_phy
339  * interfaces
340  * @ci: the controller
341  */
342 static void ci_usb_phy_exit(struct ci_hdrc *ci)
343 {
344         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
345                 return;
346
347         if (ci->phy) {
348                 phy_power_off(ci->phy);
349                 phy_exit(ci->phy);
350         } else {
351                 usb_phy_shutdown(ci->usb_phy);
352         }
353 }
354
355 /**
356  * ci_usb_phy_init: initialize phy according to different phy type
357  * @ci: the controller
358  *
359  * This function returns an error code if usb_phy_init has failed
360  */
361 static int ci_usb_phy_init(struct ci_hdrc *ci)
362 {
363         int ret;
364
365         if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
366                 return 0;
367
368         switch (ci->platdata->phy_mode) {
369         case USBPHY_INTERFACE_MODE_UTMI:
370         case USBPHY_INTERFACE_MODE_UTMIW:
371         case USBPHY_INTERFACE_MODE_HSIC:
372                 ret = _ci_usb_phy_init(ci);
373                 if (!ret)
374                         hw_wait_phy_stable();
375                 else
376                         return ret;
377                 hw_phymode_configure(ci);
378                 break;
379         case USBPHY_INTERFACE_MODE_ULPI:
380         case USBPHY_INTERFACE_MODE_SERIAL:
381                 hw_phymode_configure(ci);
382                 ret = _ci_usb_phy_init(ci);
383                 if (ret)
384                         return ret;
385                 break;
386         default:
387                 ret = _ci_usb_phy_init(ci);
388                 if (!ret)
389                         hw_wait_phy_stable();
390         }
391
392         return ret;
393 }
394
395
396 /**
397  * ci_platform_configure: do controller configure
398  * @ci: the controller
399  *
400  */
401 void ci_platform_configure(struct ci_hdrc *ci)
402 {
403         bool is_device_mode, is_host_mode;
404
405         is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
406         is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
407
408         if (is_device_mode) {
409                 phy_set_mode(ci->phy, PHY_MODE_USB_DEVICE);
410
411                 if (ci->platdata->flags & CI_HDRC_DISABLE_DEVICE_STREAMING)
412                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
413                                  USBMODE_CI_SDIS);
414         }
415
416         if (is_host_mode) {
417                 phy_set_mode(ci->phy, PHY_MODE_USB_HOST);
418
419                 if (ci->platdata->flags & CI_HDRC_DISABLE_HOST_STREAMING)
420                         hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS,
421                                  USBMODE_CI_SDIS);
422         }
423
424         if (ci->platdata->flags & CI_HDRC_FORCE_FULLSPEED) {
425                 if (ci->hw_bank.lpm)
426                         hw_write(ci, OP_DEVLC, DEVLC_PFSC, DEVLC_PFSC);
427                 else
428                         hw_write(ci, OP_PORTSC, PORTSC_PFSC, PORTSC_PFSC);
429         }
430
431         if (ci->platdata->flags & CI_HDRC_SET_NON_ZERO_TTHA)
432                 hw_write(ci, OP_TTCTRL, TTCTRL_TTHA_MASK, TTCTRL_TTHA);
433
434         hw_write(ci, OP_USBCMD, 0xff0000, ci->platdata->itc_setting << 16);
435
436         if (ci->platdata->flags & CI_HDRC_OVERRIDE_AHB_BURST)
437                 hw_write_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK,
438                         ci->platdata->ahb_burst_config);
439
440         /* override burst size, take effect only when ahb_burst_config is 0 */
441         if (!hw_read_id_reg(ci, ID_SBUSCFG, AHBBRST_MASK)) {
442                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_TX_BURST)
443                         hw_write(ci, OP_BURSTSIZE, TX_BURST_MASK,
444                         ci->platdata->tx_burst_size << __ffs(TX_BURST_MASK));
445
446                 if (ci->platdata->flags & CI_HDRC_OVERRIDE_RX_BURST)
447                         hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
448                                 ci->platdata->rx_burst_size);
449         }
450 }
451
452 /**
453  * hw_controller_reset: do controller reset
454  * @ci: the controller
455   *
456  * This function returns an error code
457  */
458 static int hw_controller_reset(struct ci_hdrc *ci)
459 {
460         int count = 0;
461
462         hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
463         while (hw_read(ci, OP_USBCMD, USBCMD_RST)) {
464                 udelay(10);
465                 if (count++ > 1000)
466                         return -ETIMEDOUT;
467         }
468
469         return 0;
470 }
471
472 /**
473  * hw_device_reset: resets chip (execute without interruption)
474  * @ci: the controller
475  *
476  * This function returns an error code
477  */
478 int hw_device_reset(struct ci_hdrc *ci)
479 {
480         int ret;
481
482         /* should flush & stop before reset */
483         hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
484         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
485
486         ret = hw_controller_reset(ci);
487         if (ret) {
488                 dev_err(ci->dev, "error resetting controller, ret=%d\n", ret);
489                 return ret;
490         }
491
492         if (ci->platdata->notify_event) {
493                 ret = ci->platdata->notify_event(ci,
494                         CI_HDRC_CONTROLLER_RESET_EVENT);
495                 if (ret)
496                         return ret;
497         }
498
499         /* USBMODE should be configured step by step */
500         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
501         hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DC);
502         /* HW >= 2.3 */
503         hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
504
505         if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DC) {
506                 dev_err(ci->dev, "cannot enter in %s device mode\n",
507                         ci_role(ci)->name);
508                 dev_err(ci->dev, "lpm = %i\n", ci->hw_bank.lpm);
509                 return -ENODEV;
510         }
511
512         ci_platform_configure(ci);
513
514         return 0;
515 }
516
517 static irqreturn_t ci_irq(int irq, void *data)
518 {
519         struct ci_hdrc *ci = data;
520         irqreturn_t ret = IRQ_NONE;
521         u32 otgsc = 0;
522
523         if (ci->in_lpm) {
524                 disable_irq_nosync(irq);
525                 ci->wakeup_int = true;
526                 pm_runtime_get(ci->dev);
527                 return IRQ_HANDLED;
528         }
529
530         if (ci->is_otg) {
531                 otgsc = hw_read_otgsc(ci, ~0);
532                 if (ci_otg_is_fsm_mode(ci)) {
533                         ret = ci_otg_fsm_irq(ci);
534                         if (ret == IRQ_HANDLED)
535                                 return ret;
536                 }
537         }
538
539         /*
540          * Handle id change interrupt, it indicates device/host function
541          * switch.
542          */
543         if (ci->is_otg && (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS)) {
544                 ci->id_event = true;
545                 /* Clear ID change irq status */
546                 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
547                 ci_otg_queue_work(ci);
548                 return IRQ_HANDLED;
549         }
550
551         /*
552          * Handle vbus change interrupt, it indicates device connection
553          * and disconnection events.
554          */
555         if (ci->is_otg && (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
556                 ci->b_sess_valid_event = true;
557                 /* Clear BSV irq */
558                 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
559                 ci_otg_queue_work(ci);
560                 return IRQ_HANDLED;
561         }
562
563         /* Handle device/host interrupt */
564         if (ci->role != CI_ROLE_END)
565                 ret = ci_role(ci)->irq(ci);
566
567         return ret;
568 }
569
570 static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
571                              void *ptr)
572 {
573         struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
574         struct ci_hdrc *ci = cbl->ci;
575
576         cbl->connected = event;
577         cbl->changed = true;
578
579         ci_irq(ci->irq, ci);
580         return NOTIFY_DONE;
581 }
582
583 static enum usb_role ci_usb_role_switch_get(struct usb_role_switch *sw)
584 {
585         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
586         enum usb_role role;
587         unsigned long flags;
588
589         spin_lock_irqsave(&ci->lock, flags);
590         role = ci_role_to_usb_role(ci);
591         spin_unlock_irqrestore(&ci->lock, flags);
592
593         return role;
594 }
595
596 static int ci_usb_role_switch_set(struct usb_role_switch *sw,
597                                   enum usb_role role)
598 {
599         struct ci_hdrc *ci = usb_role_switch_get_drvdata(sw);
600         struct ci_hdrc_cable *cable = NULL;
601         enum usb_role current_role = ci_role_to_usb_role(ci);
602         enum ci_role ci_role = usb_role_to_ci_role(role);
603         unsigned long flags;
604
605         if ((ci_role != CI_ROLE_END && !ci->roles[ci_role]) ||
606             (current_role == role))
607                 return 0;
608
609         pm_runtime_get_sync(ci->dev);
610         /* Stop current role */
611         spin_lock_irqsave(&ci->lock, flags);
612         if (current_role == USB_ROLE_DEVICE)
613                 cable = &ci->platdata->vbus_extcon;
614         else if (current_role == USB_ROLE_HOST)
615                 cable = &ci->platdata->id_extcon;
616
617         if (cable) {
618                 cable->changed = true;
619                 cable->connected = false;
620                 ci_irq(ci->irq, ci);
621                 spin_unlock_irqrestore(&ci->lock, flags);
622                 if (ci->wq && role != USB_ROLE_NONE)
623                         flush_workqueue(ci->wq);
624                 spin_lock_irqsave(&ci->lock, flags);
625         }
626
627         cable = NULL;
628
629         /* Start target role */
630         if (role == USB_ROLE_DEVICE)
631                 cable = &ci->platdata->vbus_extcon;
632         else if (role == USB_ROLE_HOST)
633                 cable = &ci->platdata->id_extcon;
634
635         if (cable) {
636                 cable->changed = true;
637                 cable->connected = true;
638                 ci_irq(ci->irq, ci);
639         }
640         spin_unlock_irqrestore(&ci->lock, flags);
641         pm_runtime_put_sync(ci->dev);
642
643         return 0;
644 }
645
646 static struct usb_role_switch_desc ci_role_switch = {
647         .set = ci_usb_role_switch_set,
648         .get = ci_usb_role_switch_get,
649         .allow_userspace_control = true,
650 };
651
652 static int ci_get_platdata(struct device *dev,
653                 struct ci_hdrc_platform_data *platdata)
654 {
655         struct extcon_dev *ext_vbus, *ext_id;
656         struct ci_hdrc_cable *cable;
657         int ret;
658
659         if (!platdata->phy_mode)
660                 platdata->phy_mode = of_usb_get_phy_mode(dev->of_node);
661
662         if (!platdata->dr_mode)
663                 platdata->dr_mode = usb_get_dr_mode(dev);
664
665         if (platdata->dr_mode == USB_DR_MODE_UNKNOWN)
666                 platdata->dr_mode = USB_DR_MODE_OTG;
667
668         if (platdata->dr_mode != USB_DR_MODE_PERIPHERAL) {
669                 /* Get the vbus regulator */
670                 platdata->reg_vbus = devm_regulator_get_optional(dev, "vbus");
671                 if (PTR_ERR(platdata->reg_vbus) == -EPROBE_DEFER) {
672                         return -EPROBE_DEFER;
673                 } else if (PTR_ERR(platdata->reg_vbus) == -ENODEV) {
674                         /* no vbus regulator is needed */
675                         platdata->reg_vbus = NULL;
676                 } else if (IS_ERR(platdata->reg_vbus)) {
677                         dev_err(dev, "Getting regulator error: %ld\n",
678                                 PTR_ERR(platdata->reg_vbus));
679                         return PTR_ERR(platdata->reg_vbus);
680                 }
681                 /* Get TPL support */
682                 if (!platdata->tpl_support)
683                         platdata->tpl_support =
684                                 of_usb_host_tpl_support(dev->of_node);
685         }
686
687         if (platdata->dr_mode == USB_DR_MODE_OTG) {
688                 /* We can support HNP and SRP of OTG 2.0 */
689                 platdata->ci_otg_caps.otg_rev = 0x0200;
690                 platdata->ci_otg_caps.hnp_support = true;
691                 platdata->ci_otg_caps.srp_support = true;
692
693                 /* Update otg capabilities by DT properties */
694                 ret = of_usb_update_otg_caps(dev->of_node,
695                                         &platdata->ci_otg_caps);
696                 if (ret)
697                         return ret;
698         }
699
700         if (usb_get_maximum_speed(dev) == USB_SPEED_FULL)
701                 platdata->flags |= CI_HDRC_FORCE_FULLSPEED;
702
703         of_property_read_u32(dev->of_node, "phy-clkgate-delay-us",
704                                      &platdata->phy_clkgate_delay_us);
705
706         platdata->itc_setting = 1;
707
708         of_property_read_u32(dev->of_node, "itc-setting",
709                                         &platdata->itc_setting);
710
711         ret = of_property_read_u32(dev->of_node, "ahb-burst-config",
712                                 &platdata->ahb_burst_config);
713         if (!ret) {
714                 platdata->flags |= CI_HDRC_OVERRIDE_AHB_BURST;
715         } else if (ret != -EINVAL) {
716                 dev_err(dev, "failed to get ahb-burst-config\n");
717                 return ret;
718         }
719
720         ret = of_property_read_u32(dev->of_node, "tx-burst-size-dword",
721                                 &platdata->tx_burst_size);
722         if (!ret) {
723                 platdata->flags |= CI_HDRC_OVERRIDE_TX_BURST;
724         } else if (ret != -EINVAL) {
725                 dev_err(dev, "failed to get tx-burst-size-dword\n");
726                 return ret;
727         }
728
729         ret = of_property_read_u32(dev->of_node, "rx-burst-size-dword",
730                                 &platdata->rx_burst_size);
731         if (!ret) {
732                 platdata->flags |= CI_HDRC_OVERRIDE_RX_BURST;
733         } else if (ret != -EINVAL) {
734                 dev_err(dev, "failed to get rx-burst-size-dword\n");
735                 return ret;
736         }
737
738         if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
739                 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
740
741         ext_id = ERR_PTR(-ENODEV);
742         ext_vbus = ERR_PTR(-ENODEV);
743         if (of_property_read_bool(dev->of_node, "extcon")) {
744                 /* Each one of them is not mandatory */
745                 ext_vbus = extcon_get_edev_by_phandle(dev, 0);
746                 if (IS_ERR(ext_vbus) && PTR_ERR(ext_vbus) != -ENODEV)
747                         return PTR_ERR(ext_vbus);
748
749                 ext_id = extcon_get_edev_by_phandle(dev, 1);
750                 if (IS_ERR(ext_id) && PTR_ERR(ext_id) != -ENODEV)
751                         return PTR_ERR(ext_id);
752         }
753
754         cable = &platdata->vbus_extcon;
755         cable->nb.notifier_call = ci_cable_notifier;
756         cable->edev = ext_vbus;
757
758         if (!IS_ERR(ext_vbus)) {
759                 ret = extcon_get_state(cable->edev, EXTCON_USB);
760                 if (ret)
761                         cable->connected = true;
762                 else
763                         cable->connected = false;
764         }
765
766         cable = &platdata->id_extcon;
767         cable->nb.notifier_call = ci_cable_notifier;
768         cable->edev = ext_id;
769
770         if (!IS_ERR(ext_id)) {
771                 ret = extcon_get_state(cable->edev, EXTCON_USB_HOST);
772                 if (ret)
773                         cable->connected = true;
774                 else
775                         cable->connected = false;
776         }
777
778         if (device_property_read_bool(dev, "usb-role-switch"))
779                 ci_role_switch.fwnode = dev->fwnode;
780
781         platdata->pctl = devm_pinctrl_get(dev);
782         if (!IS_ERR(platdata->pctl)) {
783                 struct pinctrl_state *p;
784
785                 p = pinctrl_lookup_state(platdata->pctl, "default");
786                 if (!IS_ERR(p))
787                         platdata->pins_default = p;
788
789                 p = pinctrl_lookup_state(platdata->pctl, "host");
790                 if (!IS_ERR(p))
791                         platdata->pins_host = p;
792
793                 p = pinctrl_lookup_state(platdata->pctl, "device");
794                 if (!IS_ERR(p))
795                         platdata->pins_device = p;
796         }
797
798         if (!platdata->enter_lpm)
799                 platdata->enter_lpm = ci_hdrc_enter_lpm_common;
800
801         return 0;
802 }
803
804 static int ci_extcon_register(struct ci_hdrc *ci)
805 {
806         struct ci_hdrc_cable *id, *vbus;
807         int ret;
808
809         id = &ci->platdata->id_extcon;
810         id->ci = ci;
811         if (!IS_ERR_OR_NULL(id->edev)) {
812                 ret = devm_extcon_register_notifier(ci->dev, id->edev,
813                                                 EXTCON_USB_HOST, &id->nb);
814                 if (ret < 0) {
815                         dev_err(ci->dev, "register ID failed\n");
816                         return ret;
817                 }
818         }
819
820         vbus = &ci->platdata->vbus_extcon;
821         vbus->ci = ci;
822         if (!IS_ERR_OR_NULL(vbus->edev)) {
823                 ret = devm_extcon_register_notifier(ci->dev, vbus->edev,
824                                                 EXTCON_USB, &vbus->nb);
825                 if (ret < 0) {
826                         dev_err(ci->dev, "register VBUS failed\n");
827                         return ret;
828                 }
829         }
830
831         return 0;
832 }
833
834 static DEFINE_IDA(ci_ida);
835
836 struct platform_device *ci_hdrc_add_device(struct device *dev,
837                         struct resource *res, int nres,
838                         struct ci_hdrc_platform_data *platdata)
839 {
840         struct platform_device *pdev;
841         int id, ret;
842
843         ret = ci_get_platdata(dev, platdata);
844         if (ret)
845                 return ERR_PTR(ret);
846
847         id = ida_simple_get(&ci_ida, 0, 0, GFP_KERNEL);
848         if (id < 0)
849                 return ERR_PTR(id);
850
851         pdev = platform_device_alloc("ci_hdrc", id);
852         if (!pdev) {
853                 ret = -ENOMEM;
854                 goto put_id;
855         }
856
857         pdev->dev.parent = dev;
858
859         ret = platform_device_add_resources(pdev, res, nres);
860         if (ret)
861                 goto err;
862
863         ret = platform_device_add_data(pdev, platdata, sizeof(*platdata));
864         if (ret)
865                 goto err;
866
867         ret = platform_device_add(pdev);
868         if (ret)
869                 goto err;
870
871         return pdev;
872
873 err:
874         platform_device_put(pdev);
875 put_id:
876         ida_simple_remove(&ci_ida, id);
877         return ERR_PTR(ret);
878 }
879 EXPORT_SYMBOL_GPL(ci_hdrc_add_device);
880
881 void ci_hdrc_remove_device(struct platform_device *pdev)
882 {
883         int id = pdev->id;
884         platform_device_unregister(pdev);
885         ida_simple_remove(&ci_ida, id);
886 }
887 EXPORT_SYMBOL_GPL(ci_hdrc_remove_device);
888
889 /**
890  * ci_hdrc_query_available_role: get runtime available operation mode
891  *
892  * The glue layer can get current operation mode (host/peripheral/otg)
893  * This function should be called after ci core device has created.
894  *
895  * @pdev: the platform device of ci core.
896  *
897  * Return runtime usb_dr_mode.
898  */
899 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev)
900 {
901         struct ci_hdrc *ci = platform_get_drvdata(pdev);
902
903         if (!ci)
904                 return USB_DR_MODE_UNKNOWN;
905         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])
906                 return USB_DR_MODE_OTG;
907         else if (ci->roles[CI_ROLE_HOST])
908                 return USB_DR_MODE_HOST;
909         else if (ci->roles[CI_ROLE_GADGET])
910                 return USB_DR_MODE_PERIPHERAL;
911         else
912                 return USB_DR_MODE_UNKNOWN;
913 }
914 EXPORT_SYMBOL_GPL(ci_hdrc_query_available_role);
915
916 static inline void ci_role_destroy(struct ci_hdrc *ci)
917 {
918         ci_hdrc_gadget_destroy(ci);
919         ci_hdrc_host_destroy(ci);
920         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
921                 ci_hdrc_otg_destroy(ci);
922 }
923
924 static void ci_get_otg_capable(struct ci_hdrc *ci)
925 {
926         if (ci->platdata->flags & CI_HDRC_DUAL_ROLE_NOT_OTG)
927                 ci->is_otg = false;
928         else
929                 ci->is_otg = (hw_read(ci, CAP_DCCPARAMS,
930                                 DCCPARAMS_DC | DCCPARAMS_HC)
931                                         == (DCCPARAMS_DC | DCCPARAMS_HC));
932         if (ci->is_otg) {
933                 dev_dbg(ci->dev, "It is OTG capable controller\n");
934                 /* Disable and clear all OTG irq */
935                 hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
936                                                         OTGSC_INT_STATUS_BITS);
937         }
938 }
939
940 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
941                           char *buf)
942 {
943         struct ci_hdrc *ci = dev_get_drvdata(dev);
944
945         if (ci->role != CI_ROLE_END)
946                 return sprintf(buf, "%s\n", ci_role(ci)->name);
947
948         return 0;
949 }
950
951 static ssize_t role_store(struct device *dev,
952                 struct device_attribute *attr, const char *buf, size_t n)
953 {
954         struct ci_hdrc *ci = dev_get_drvdata(dev);
955         enum ci_role role;
956         int ret;
957
958         if (!(ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET])) {
959                 dev_warn(dev, "Current configuration is not dual-role, quit\n");
960                 return -EPERM;
961         }
962
963         for (role = CI_ROLE_HOST; role < CI_ROLE_END; role++)
964                 if (!strncmp(buf, ci->roles[role]->name,
965                              strlen(ci->roles[role]->name)))
966                         break;
967
968         if (role == CI_ROLE_END || role == ci->role)
969                 return -EINVAL;
970
971         pm_runtime_get_sync(dev);
972         disable_irq(ci->irq);
973         ci_role_stop(ci);
974         ret = ci_role_start(ci, role);
975         if (!ret && ci->role == CI_ROLE_GADGET)
976                 ci_handle_vbus_change(ci);
977         enable_irq(ci->irq);
978         pm_runtime_put_sync(dev);
979
980         return (ret == 0) ? n : ret;
981 }
982 static DEVICE_ATTR_RW(role);
983
984 static struct attribute *ci_attrs[] = {
985         &dev_attr_role.attr,
986         NULL,
987 };
988 ATTRIBUTE_GROUPS(ci);
989
990 static int ci_hdrc_probe(struct platform_device *pdev)
991 {
992         struct device   *dev = &pdev->dev;
993         struct ci_hdrc  *ci;
994         struct resource *res;
995         void __iomem    *base;
996         int             ret;
997         enum usb_dr_mode dr_mode;
998
999         if (!dev_get_platdata(dev)) {
1000                 dev_err(dev, "platform data missing\n");
1001                 return -ENODEV;
1002         }
1003
1004         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1005         base = devm_ioremap_resource(dev, res);
1006         if (IS_ERR(base))
1007                 return PTR_ERR(base);
1008
1009         ci = devm_kzalloc(dev, sizeof(*ci), GFP_KERNEL);
1010         if (!ci)
1011                 return -ENOMEM;
1012
1013         spin_lock_init(&ci->lock);
1014         ci->dev = dev;
1015         ci->platdata = dev_get_platdata(dev);
1016         ci->imx28_write_fix = !!(ci->platdata->flags &
1017                 CI_HDRC_IMX28_WRITE_FIX);
1018         ci->supports_runtime_pm = !!(ci->platdata->flags &
1019                 CI_HDRC_SUPPORTS_RUNTIME_PM);
1020         platform_set_drvdata(pdev, ci);
1021
1022         ret = hw_device_init(ci, base);
1023         if (ret < 0) {
1024                 dev_err(dev, "can't initialize hardware\n");
1025                 return -ENODEV;
1026         }
1027
1028         ret = ci_ulpi_init(ci);
1029         if (ret)
1030                 return ret;
1031
1032         if (ci->platdata->phy) {
1033                 ci->phy = ci->platdata->phy;
1034         } else if (ci->platdata->usb_phy) {
1035                 ci->usb_phy = ci->platdata->usb_phy;
1036         } else {
1037                 /* Look for a generic PHY first */
1038                 ci->phy = devm_phy_get(dev->parent, "usb-phy");
1039
1040                 if (PTR_ERR(ci->phy) == -EPROBE_DEFER) {
1041                         ret = -EPROBE_DEFER;
1042                         goto ulpi_exit;
1043                 } else if (IS_ERR(ci->phy)) {
1044                         ci->phy = NULL;
1045                 }
1046
1047                 /* Look for a legacy USB PHY from device-tree next */
1048                 if (!ci->phy) {
1049                         ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent,
1050                                                                   "phys", 0);
1051
1052                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1053                                 ret = -EPROBE_DEFER;
1054                                 goto ulpi_exit;
1055                         } else if (IS_ERR(ci->usb_phy)) {
1056                                 ci->usb_phy = NULL;
1057                         }
1058                 }
1059
1060                 /* Look for any registered legacy USB PHY as last resort */
1061                 if (!ci->phy && !ci->usb_phy) {
1062                         ci->usb_phy = devm_usb_get_phy(dev->parent,
1063                                                        USB_PHY_TYPE_USB2);
1064
1065                         if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) {
1066                                 ret = -EPROBE_DEFER;
1067                                 goto ulpi_exit;
1068                         } else if (IS_ERR(ci->usb_phy)) {
1069                                 ci->usb_phy = NULL;
1070                         }
1071                 }
1072
1073                 /* No USB PHY was found in the end */
1074                 if (!ci->phy && !ci->usb_phy) {
1075                         ret = -ENXIO;
1076                         goto ulpi_exit;
1077                 }
1078         }
1079
1080         ret = ci_usb_phy_init(ci);
1081         if (ret) {
1082                 dev_err(dev, "unable to init phy: %d\n", ret);
1083                 return ret;
1084         }
1085
1086         ci->hw_bank.phys = res->start;
1087
1088         ci->irq = platform_get_irq(pdev, 0);
1089         if (ci->irq < 0) {
1090                 ret = ci->irq;
1091                 goto deinit_phy;
1092         }
1093
1094         ci_get_otg_capable(ci);
1095
1096         dr_mode = ci->platdata->dr_mode;
1097         /* initialize role(s) before the interrupt is requested */
1098         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_HOST) {
1099                 ret = ci_hdrc_host_init(ci);
1100                 if (ret) {
1101                         if (ret == -ENXIO)
1102                                 dev_info(dev, "doesn't support host\n");
1103                         else
1104                                 goto deinit_phy;
1105                 }
1106         }
1107
1108         if (dr_mode == USB_DR_MODE_OTG || dr_mode == USB_DR_MODE_PERIPHERAL) {
1109                 ret = ci_hdrc_gadget_init(ci);
1110                 if (ret) {
1111                         if (ret == -ENXIO)
1112                                 dev_info(dev, "doesn't support gadget\n");
1113                         else
1114                                 goto deinit_host;
1115                 }
1116         }
1117
1118         if (!ci->roles[CI_ROLE_HOST] && !ci->roles[CI_ROLE_GADGET]) {
1119                 dev_err(dev, "no supported roles\n");
1120                 ret = -ENODEV;
1121                 goto deinit_gadget;
1122         }
1123
1124         if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) {
1125                 ret = ci_hdrc_otg_init(ci);
1126                 if (ret) {
1127                         dev_err(dev, "init otg fails, ret = %d\n", ret);
1128                         goto deinit_gadget;
1129                 }
1130         }
1131
1132         if (ci_role_switch.fwnode) {
1133                 ci_role_switch.driver_data = ci;
1134                 ci->role_switch = usb_role_switch_register(dev,
1135                                         &ci_role_switch);
1136                 if (IS_ERR(ci->role_switch)) {
1137                         ret = PTR_ERR(ci->role_switch);
1138                         goto deinit_otg;
1139                 }
1140         }
1141
1142         if (ci->roles[CI_ROLE_HOST] && ci->roles[CI_ROLE_GADGET]) {
1143                 if (ci->is_otg) {
1144                         ci->role = ci_otg_role(ci);
1145                         /* Enable ID change irq */
1146                         hw_write_otgsc(ci, OTGSC_IDIE, OTGSC_IDIE);
1147                 } else {
1148                         /*
1149                          * If the controller is not OTG capable, but support
1150                          * role switch, the defalt role is gadget, and the
1151                          * user can switch it through debugfs.
1152                          */
1153                         ci->role = CI_ROLE_GADGET;
1154                 }
1155         } else {
1156                 ci->role = ci->roles[CI_ROLE_HOST]
1157                         ? CI_ROLE_HOST
1158                         : CI_ROLE_GADGET;
1159         }
1160
1161         if (!ci_otg_is_fsm_mode(ci)) {
1162                 /* only update vbus status for peripheral */
1163                 if (ci->role == CI_ROLE_GADGET) {
1164                         /* Pull down DP for possible charger detection */
1165                         hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1166                         ci_handle_vbus_change(ci);
1167                 }
1168
1169                 ret = ci_role_start(ci, ci->role);
1170                 if (ret) {
1171                         dev_err(dev, "can't start %s role\n",
1172                                                 ci_role(ci)->name);
1173                         goto stop;
1174                 }
1175         }
1176
1177         ret = devm_request_irq(dev, ci->irq, ci_irq, IRQF_SHARED,
1178                         ci->platdata->name, ci);
1179         if (ret)
1180                 goto stop;
1181
1182         ret = ci_extcon_register(ci);
1183         if (ret)
1184                 goto stop;
1185
1186         if (ci->supports_runtime_pm) {
1187                 pm_runtime_set_active(&pdev->dev);
1188                 pm_runtime_enable(&pdev->dev);
1189                 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
1190                 pm_runtime_mark_last_busy(ci->dev);
1191                 pm_runtime_use_autosuspend(&pdev->dev);
1192         }
1193
1194         if (ci_otg_is_fsm_mode(ci))
1195                 ci_hdrc_otg_fsm_start(ci);
1196
1197         device_set_wakeup_capable(&pdev->dev, true);
1198         dbg_create_files(ci);
1199
1200         return 0;
1201
1202 stop:
1203         if (ci->role_switch)
1204                 usb_role_switch_unregister(ci->role_switch);
1205 deinit_otg:
1206         if (ci->is_otg && ci->roles[CI_ROLE_GADGET])
1207                 ci_hdrc_otg_destroy(ci);
1208 deinit_gadget:
1209         ci_hdrc_gadget_destroy(ci);
1210 deinit_host:
1211         ci_hdrc_host_destroy(ci);
1212 deinit_phy:
1213         ci_usb_phy_exit(ci);
1214 ulpi_exit:
1215         ci_ulpi_exit(ci);
1216
1217         return ret;
1218 }
1219
1220 static int ci_hdrc_remove(struct platform_device *pdev)
1221 {
1222         struct ci_hdrc *ci = platform_get_drvdata(pdev);
1223
1224         if (ci->role_switch)
1225                 usb_role_switch_unregister(ci->role_switch);
1226
1227         if (ci->supports_runtime_pm) {
1228                 pm_runtime_get_sync(&pdev->dev);
1229                 pm_runtime_disable(&pdev->dev);
1230                 pm_runtime_put_noidle(&pdev->dev);
1231         }
1232
1233         dbg_remove_files(ci);
1234         ci_role_destroy(ci);
1235         ci_hdrc_enter_lpm(ci, true);
1236         ci_usb_phy_exit(ci);
1237         ci_ulpi_exit(ci);
1238
1239         return 0;
1240 }
1241
1242 #ifdef CONFIG_PM
1243 /* Prepare wakeup by SRP before suspend */
1244 static void ci_otg_fsm_suspend_for_srp(struct ci_hdrc *ci)
1245 {
1246         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1247                                 !hw_read_otgsc(ci, OTGSC_ID)) {
1248                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
1249                                                                 PORTSC_PP);
1250                 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_WKCN,
1251                                                                 PORTSC_WKCN);
1252         }
1253 }
1254
1255 /* Handle SRP when wakeup by data pulse */
1256 static void ci_otg_fsm_wakeup_by_srp(struct ci_hdrc *ci)
1257 {
1258         if ((ci->fsm.otg->state == OTG_STATE_A_IDLE) &&
1259                 (ci->fsm.a_bus_drop == 1) && (ci->fsm.a_bus_req == 0)) {
1260                 if (!hw_read_otgsc(ci, OTGSC_ID)) {
1261                         ci->fsm.a_srp_det = 1;
1262                         ci->fsm.a_bus_drop = 0;
1263                 } else {
1264                         ci->fsm.id = 1;
1265                 }
1266                 ci_otg_queue_work(ci);
1267         }
1268 }
1269
1270 static void ci_controller_suspend(struct ci_hdrc *ci)
1271 {
1272         disable_irq(ci->irq);
1273         ci_hdrc_enter_lpm(ci, true);
1274         if (ci->platdata->phy_clkgate_delay_us)
1275                 usleep_range(ci->platdata->phy_clkgate_delay_us,
1276                              ci->platdata->phy_clkgate_delay_us + 50);
1277         usb_phy_set_suspend(ci->usb_phy, 1);
1278         ci->in_lpm = true;
1279         enable_irq(ci->irq);
1280 }
1281
1282 /*
1283  * Handle the wakeup interrupt triggered by extcon connector
1284  * We need to call ci_irq again for extcon since the first
1285  * interrupt (wakeup int) only let the controller be out of
1286  * low power mode, but not handle any interrupts.
1287  */
1288 static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
1289 {
1290         struct ci_hdrc_cable *cable_id, *cable_vbus;
1291         u32 otgsc = hw_read_otgsc(ci, ~0);
1292
1293         cable_id = &ci->platdata->id_extcon;
1294         cable_vbus = &ci->platdata->vbus_extcon;
1295
1296         if (!IS_ERR(cable_id->edev) && ci->is_otg &&
1297                 (otgsc & OTGSC_IDIE) && (otgsc & OTGSC_IDIS))
1298                 ci_irq(ci->irq, ci);
1299
1300         if (!IS_ERR(cable_vbus->edev) && ci->is_otg &&
1301                 (otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS))
1302                 ci_irq(ci->irq, ci);
1303 }
1304
1305 static int ci_controller_resume(struct device *dev)
1306 {
1307         struct ci_hdrc *ci = dev_get_drvdata(dev);
1308         int ret;
1309
1310         dev_dbg(dev, "at %s\n", __func__);
1311
1312         if (!ci->in_lpm) {
1313                 WARN_ON(1);
1314                 return 0;
1315         }
1316
1317         ci_hdrc_enter_lpm(ci, false);
1318
1319         ret = ci_ulpi_resume(ci);
1320         if (ret)
1321                 return ret;
1322
1323         if (ci->usb_phy) {
1324                 usb_phy_set_suspend(ci->usb_phy, 0);
1325                 usb_phy_set_wakeup(ci->usb_phy, false);
1326                 hw_wait_phy_stable();
1327         }
1328
1329         ci->in_lpm = false;
1330         if (ci->wakeup_int) {
1331                 ci->wakeup_int = false;
1332                 pm_runtime_mark_last_busy(ci->dev);
1333                 pm_runtime_put_autosuspend(ci->dev);
1334                 enable_irq(ci->irq);
1335                 if (ci_otg_is_fsm_mode(ci))
1336                         ci_otg_fsm_wakeup_by_srp(ci);
1337                 ci_extcon_wakeup_int(ci);
1338         }
1339
1340         return 0;
1341 }
1342
1343 #ifdef CONFIG_PM_SLEEP
1344 static int ci_suspend(struct device *dev)
1345 {
1346         struct ci_hdrc *ci = dev_get_drvdata(dev);
1347
1348         if (ci->wq)
1349                 flush_workqueue(ci->wq);
1350         /*
1351          * Controller needs to be active during suspend, otherwise the core
1352          * may run resume when the parent is at suspend if other driver's
1353          * suspend fails, it occurs before parent's suspend has not started,
1354          * but the core suspend has finished.
1355          */
1356         if (ci->in_lpm)
1357                 pm_runtime_resume(dev);
1358
1359         if (ci->in_lpm) {
1360                 WARN_ON(1);
1361                 return 0;
1362         }
1363
1364         if (device_may_wakeup(dev)) {
1365                 if (ci_otg_is_fsm_mode(ci))
1366                         ci_otg_fsm_suspend_for_srp(ci);
1367
1368                 usb_phy_set_wakeup(ci->usb_phy, true);
1369                 enable_irq_wake(ci->irq);
1370         }
1371
1372         ci_controller_suspend(ci);
1373
1374         return 0;
1375 }
1376
1377 static int ci_resume(struct device *dev)
1378 {
1379         struct ci_hdrc *ci = dev_get_drvdata(dev);
1380         int ret;
1381
1382         if (device_may_wakeup(dev))
1383                 disable_irq_wake(ci->irq);
1384
1385         ret = ci_controller_resume(dev);
1386         if (ret)
1387                 return ret;
1388
1389         if (ci->supports_runtime_pm) {
1390                 pm_runtime_disable(dev);
1391                 pm_runtime_set_active(dev);
1392                 pm_runtime_enable(dev);
1393         }
1394
1395         return ret;
1396 }
1397 #endif /* CONFIG_PM_SLEEP */
1398
1399 static int ci_runtime_suspend(struct device *dev)
1400 {
1401         struct ci_hdrc *ci = dev_get_drvdata(dev);
1402
1403         dev_dbg(dev, "at %s\n", __func__);
1404
1405         if (ci->in_lpm) {
1406                 WARN_ON(1);
1407                 return 0;
1408         }
1409
1410         if (ci_otg_is_fsm_mode(ci))
1411                 ci_otg_fsm_suspend_for_srp(ci);
1412
1413         usb_phy_set_wakeup(ci->usb_phy, true);
1414         ci_controller_suspend(ci);
1415
1416         return 0;
1417 }
1418
1419 static int ci_runtime_resume(struct device *dev)
1420 {
1421         return ci_controller_resume(dev);
1422 }
1423
1424 #endif /* CONFIG_PM */
1425 static const struct dev_pm_ops ci_pm_ops = {
1426         SET_SYSTEM_SLEEP_PM_OPS(ci_suspend, ci_resume)
1427         SET_RUNTIME_PM_OPS(ci_runtime_suspend, ci_runtime_resume, NULL)
1428 };
1429
1430 static struct platform_driver ci_hdrc_driver = {
1431         .probe  = ci_hdrc_probe,
1432         .remove = ci_hdrc_remove,
1433         .driver = {
1434                 .name   = "ci_hdrc",
1435                 .pm     = &ci_pm_ops,
1436                 .dev_groups = ci_groups,
1437         },
1438 };
1439
1440 static int __init ci_hdrc_platform_register(void)
1441 {
1442         ci_hdrc_host_driver_init();
1443         return platform_driver_register(&ci_hdrc_driver);
1444 }
1445 module_init(ci_hdrc_platform_register);
1446
1447 static void __exit ci_hdrc_platform_unregister(void)
1448 {
1449         platform_driver_unregister(&ci_hdrc_driver);
1450 }
1451 module_exit(ci_hdrc_platform_unregister);
1452
1453 MODULE_ALIAS("platform:ci_hdrc");
1454 MODULE_LICENSE("GPL v2");
1455 MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
1456 MODULE_DESCRIPTION("ChipIdea HDRC Driver");