Merge tag 'x86_urgent_for_v5.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-microblaze.git] / drivers / usb / cdns3 / gadget.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cadence USBSS DRD Driver - gadget side.
4  *
5  * Copyright (C) 2018-2019 Cadence Design Systems.
6  * Copyright (C) 2017-2018 NXP
7  *
8  * Authors: Pawel Jez <pjez@cadence.com>,
9  *          Pawel Laszczak <pawell@cadence.com>
10  *          Peter Chen <peter.chen@nxp.com>
11  */
12
13 /*
14  * Work around 1:
15  * At some situations, the controller may get stale data address in TRB
16  * at below sequences:
17  * 1. Controller read TRB includes data address
18  * 2. Software updates TRBs includes data address and Cycle bit
19  * 3. Controller read TRB which includes Cycle bit
20  * 4. DMA run with stale data address
21  *
22  * To fix this problem, driver needs to make the first TRB in TD as invalid.
23  * After preparing all TRBs driver needs to check the position of DMA and
24  * if the DMA point to the first just added TRB and doorbell is 1,
25  * then driver must defer making this TRB as valid. This TRB will be make
26  * as valid during adding next TRB only if DMA is stopped or at TRBERR
27  * interrupt.
28  *
29  * Issue has been fixed in DEV_VER_V3 version of controller.
30  *
31  * Work around 2:
32  * Controller for OUT endpoints has shared on-chip buffers for all incoming
33  * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34  * in correct order. If the first packet in the buffer will not be handled,
35  * then the following packets directed for other endpoints and  functions
36  * will be blocked.
37  * Additionally the packets directed to one endpoint can block entire on-chip
38  * buffers. In this case transfer to other endpoints also will blocked.
39  *
40  * To resolve this issue after raising the descriptor missing interrupt
41  * driver prepares internal usb_request object and use it to arm DMA transfer.
42  *
43  * The problematic situation was observed in case when endpoint has been enabled
44  * but no usb_request were queued. Driver try detects such endpoints and will
45  * use this workaround only for these endpoint.
46  *
47  * Driver use limited number of buffer. This number can be set by macro
48  * CDNS3_WA2_NUM_BUFFERS.
49  *
50  * Such blocking situation was observed on ACM gadget. For this function
51  * host send OUT data packet but ACM function is not prepared for this packet.
52  * It's cause that buffer placed in on chip memory block transfer to other
53  * endpoints.
54  *
55  * Issue has been fixed in DEV_VER_V2 version of controller.
56  *
57  */
58
59 #include <linux/dma-mapping.h>
60 #include <linux/usb/gadget.h>
61 #include <linux/module.h>
62 #include <linux/iopoll.h>
63
64 #include "core.h"
65 #include "gadget-export.h"
66 #include "gadget.h"
67 #include "trace.h"
68 #include "drd.h"
69
70 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
71                                    struct usb_request *request,
72                                    gfp_t gfp_flags);
73
74 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
75                                  struct usb_request *request);
76
77 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
78                                         struct usb_request *request);
79
80 /**
81  * cdns3_clear_register_bit - clear bit in given register.
82  * @ptr: address of device controller register to be read and changed
83  * @mask: bits requested to clar
84  */
85 static void cdns3_clear_register_bit(void __iomem *ptr, u32 mask)
86 {
87         mask = readl(ptr) & ~mask;
88         writel(mask, ptr);
89 }
90
91 /**
92  * cdns3_set_register_bit - set bit in given register.
93  * @ptr: address of device controller register to be read and changed
94  * @mask: bits requested to set
95  */
96 void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
97 {
98         mask = readl(ptr) | mask;
99         writel(mask, ptr);
100 }
101
102 /**
103  * cdns3_ep_addr_to_index - Macro converts endpoint address to
104  * index of endpoint object in cdns3_device.eps[] container
105  * @ep_addr: endpoint address for which endpoint object is required
106  *
107  */
108 u8 cdns3_ep_addr_to_index(u8 ep_addr)
109 {
110         return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
111 }
112
113 static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
114                              struct cdns3_endpoint *priv_ep)
115 {
116         int dma_index;
117
118         dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
119
120         return dma_index / TRB_SIZE;
121 }
122
123 /**
124  * cdns3_next_request - returns next request from list
125  * @list: list containing requests
126  *
127  * Returns request or NULL if no requests in list
128  */
129 struct usb_request *cdns3_next_request(struct list_head *list)
130 {
131         return list_first_entry_or_null(list, struct usb_request, list);
132 }
133
134 /**
135  * cdns3_next_align_buf - returns next buffer from list
136  * @list: list containing buffers
137  *
138  * Returns buffer or NULL if no buffers in list
139  */
140 static struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
141 {
142         return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
143 }
144
145 /**
146  * cdns3_next_priv_request - returns next request from list
147  * @list: list containing requests
148  *
149  * Returns request or NULL if no requests in list
150  */
151 static struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
152 {
153         return list_first_entry_or_null(list, struct cdns3_request, list);
154 }
155
156 /**
157  * select_ep - selects endpoint
158  * @priv_dev:  extended gadget object
159  * @ep: endpoint address
160  */
161 void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
162 {
163         if (priv_dev->selected_ep == ep)
164                 return;
165
166         priv_dev->selected_ep = ep;
167         writel(ep, &priv_dev->regs->ep_sel);
168 }
169
170 /**
171  * cdns3_get_tdl - gets current tdl for selected endpoint.
172  * @priv_dev:  extended gadget object
173  *
174  * Before calling this function the appropriate endpoint must
175  * be selected by means of cdns3_select_ep function.
176  */
177 static int cdns3_get_tdl(struct cdns3_device *priv_dev)
178 {
179         if (priv_dev->dev_ver < DEV_VER_V3)
180                 return EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
181         else
182                 return readl(&priv_dev->regs->ep_tdl);
183 }
184
185 dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
186                                  struct cdns3_trb *trb)
187 {
188         u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
189
190         return priv_ep->trb_pool_dma + offset;
191 }
192
193 static int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
194 {
195         switch (priv_ep->type) {
196         case USB_ENDPOINT_XFER_ISOC:
197                 return TRB_ISO_RING_SIZE;
198         case USB_ENDPOINT_XFER_CONTROL:
199                 return TRB_CTRL_RING_SIZE;
200         default:
201                 if (priv_ep->use_streams)
202                         return TRB_STREAM_RING_SIZE;
203                 else
204                         return TRB_RING_SIZE;
205         }
206 }
207
208 static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
209 {
210         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
211
212         if (priv_ep->trb_pool) {
213                 dma_free_coherent(priv_dev->sysdev,
214                                   cdns3_ring_size(priv_ep),
215                                   priv_ep->trb_pool, priv_ep->trb_pool_dma);
216                 priv_ep->trb_pool = NULL;
217         }
218 }
219
220 /**
221  * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
222  * @priv_ep:  endpoint object
223  *
224  * Function will return 0 on success or -ENOMEM on allocation error
225  */
226 int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
227 {
228         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
229         int ring_size = cdns3_ring_size(priv_ep);
230         int num_trbs = ring_size / TRB_SIZE;
231         struct cdns3_trb *link_trb;
232
233         if (priv_ep->trb_pool && priv_ep->alloc_ring_size < ring_size)
234                 cdns3_free_trb_pool(priv_ep);
235
236         if (!priv_ep->trb_pool) {
237                 priv_ep->trb_pool = dma_alloc_coherent(priv_dev->sysdev,
238                                                        ring_size,
239                                                        &priv_ep->trb_pool_dma,
240                                                        GFP_DMA32 | GFP_ATOMIC);
241                 if (!priv_ep->trb_pool)
242                         return -ENOMEM;
243
244                 priv_ep->alloc_ring_size = ring_size;
245         }
246
247         memset(priv_ep->trb_pool, 0, ring_size);
248
249         priv_ep->num_trbs = num_trbs;
250
251         if (!priv_ep->num)
252                 return 0;
253
254         /* Initialize the last TRB as Link TRB */
255         link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
256
257         if (priv_ep->use_streams) {
258                 /*
259                  * For stream capable endpoints driver use single correct TRB.
260                  * The last trb has zeroed cycle bit
261                  */
262                 link_trb->control = 0;
263         } else {
264                 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
265                 link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
266         }
267         return 0;
268 }
269
270 /**
271  * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
272  * @priv_ep: endpoint object
273  *
274  * Endpoint must be selected before call to this function
275  */
276 static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
277 {
278         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
279         int val;
280
281         trace_cdns3_halt(priv_ep, 1, 1);
282
283         writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
284                &priv_dev->regs->ep_cmd);
285
286         /* wait for DFLUSH cleared */
287         readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
288                                   !(val & EP_CMD_DFLUSH), 1, 1000);
289         priv_ep->flags |= EP_STALLED;
290         priv_ep->flags &= ~EP_STALL_PENDING;
291 }
292
293 /**
294  * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
295  * @priv_dev: extended gadget object
296  */
297 void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
298 {
299         int i;
300
301         writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
302
303         cdns3_allow_enable_l1(priv_dev, 0);
304         priv_dev->hw_configured_flag = 0;
305         priv_dev->onchip_used_size = 0;
306         priv_dev->out_mem_is_allocated = 0;
307         priv_dev->wait_for_setup = 0;
308         priv_dev->using_streams = 0;
309
310         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
311                 if (priv_dev->eps[i])
312                         priv_dev->eps[i]->flags &= ~EP_CONFIGURED;
313 }
314
315 /**
316  * cdns3_ep_inc_trb - increment a trb index.
317  * @index: Pointer to the TRB index to increment.
318  * @cs: Cycle state
319  * @trb_in_seg: number of TRBs in segment
320  *
321  * The index should never point to the link TRB. After incrementing,
322  * if it is point to the link TRB, wrap around to the beginning and revert
323  * cycle state bit The
324  * link TRB is always at the last TRB entry.
325  */
326 static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
327 {
328         (*index)++;
329         if (*index == (trb_in_seg - 1)) {
330                 *index = 0;
331                 *cs ^=  1;
332         }
333 }
334
335 /**
336  * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
337  * @priv_ep: The endpoint whose enqueue pointer we're incrementing
338  */
339 static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
340 {
341         priv_ep->free_trbs--;
342         cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
343 }
344
345 /**
346  * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
347  * @priv_ep: The endpoint whose dequeue pointer we're incrementing
348  */
349 static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
350 {
351         priv_ep->free_trbs++;
352         cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
353 }
354
355 static void cdns3_move_deq_to_next_trb(struct cdns3_request *priv_req)
356 {
357         struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
358         int current_trb = priv_req->start_trb;
359
360         while (current_trb != priv_req->end_trb) {
361                 cdns3_ep_inc_deq(priv_ep);
362                 current_trb = priv_ep->dequeue;
363         }
364
365         cdns3_ep_inc_deq(priv_ep);
366 }
367
368 /**
369  * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
370  * @priv_dev: Extended gadget object
371  * @enable: Enable/disable permit to transition to L1.
372  *
373  * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
374  * then controller answer with ACK handshake.
375  * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
376  * then controller answer with NYET handshake.
377  */
378 void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
379 {
380         if (enable)
381                 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
382         else
383                 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
384 }
385
386 enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
387 {
388         u32 reg;
389
390         reg = readl(&priv_dev->regs->usb_sts);
391
392         if (DEV_SUPERSPEED(reg))
393                 return USB_SPEED_SUPER;
394         else if (DEV_HIGHSPEED(reg))
395                 return USB_SPEED_HIGH;
396         else if (DEV_FULLSPEED(reg))
397                 return USB_SPEED_FULL;
398         else if (DEV_LOWSPEED(reg))
399                 return USB_SPEED_LOW;
400         return USB_SPEED_UNKNOWN;
401 }
402
403 /**
404  * cdns3_start_all_request - add to ring all request not started
405  * @priv_dev: Extended gadget object
406  * @priv_ep: The endpoint for whom request will be started.
407  *
408  * Returns return ENOMEM if transfer ring i not enough TRBs to start
409  *         all requests.
410  */
411 static int cdns3_start_all_request(struct cdns3_device *priv_dev,
412                                    struct cdns3_endpoint *priv_ep)
413 {
414         struct usb_request *request;
415         int ret = 0;
416         u8 pending_empty = list_empty(&priv_ep->pending_req_list);
417
418         /*
419          * If the last pending transfer is INTERNAL
420          * OR streams are enabled for this endpoint
421          * do NOT start new transfer till the last one is pending
422          */
423         if (!pending_empty) {
424                 struct cdns3_request *priv_req;
425
426                 request = cdns3_next_request(&priv_ep->pending_req_list);
427                 priv_req = to_cdns3_request(request);
428                 if ((priv_req->flags & REQUEST_INTERNAL) ||
429                     (priv_ep->flags & EP_TDLCHK_EN) ||
430                         priv_ep->use_streams) {
431                         dev_dbg(priv_dev->dev, "Blocking external request\n");
432                         return ret;
433                 }
434         }
435
436         while (!list_empty(&priv_ep->deferred_req_list)) {
437                 request = cdns3_next_request(&priv_ep->deferred_req_list);
438
439                 if (!priv_ep->use_streams) {
440                         ret = cdns3_ep_run_transfer(priv_ep, request);
441                 } else {
442                         priv_ep->stream_sg_idx = 0;
443                         ret = cdns3_ep_run_stream_transfer(priv_ep, request);
444                 }
445                 if (ret)
446                         return ret;
447
448                 list_del(&request->list);
449                 list_add_tail(&request->list,
450                               &priv_ep->pending_req_list);
451                 if (request->stream_id != 0 || (priv_ep->flags & EP_TDLCHK_EN))
452                         break;
453         }
454
455         priv_ep->flags &= ~EP_RING_FULL;
456         return ret;
457 }
458
459 /*
460  * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
461  * driver try to detect whether endpoint need additional internal
462  * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
463  * if before first DESCMISS interrupt the DMA will be armed.
464  */
465 #define cdns3_wa2_enable_detection(priv_dev, priv_ep, reg) do { \
466         if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
467                 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
468                 (reg) |= EP_STS_EN_DESCMISEN; \
469         } } while (0)
470
471 static void __cdns3_descmiss_copy_data(struct usb_request *request,
472         struct usb_request *descmiss_req)
473 {
474         int length = request->actual + descmiss_req->actual;
475         struct scatterlist *s = request->sg;
476
477         if (!s) {
478                 if (length <= request->length) {
479                         memcpy(&((u8 *)request->buf)[request->actual],
480                                descmiss_req->buf,
481                                descmiss_req->actual);
482                         request->actual = length;
483                 } else {
484                         /* It should never occures */
485                         request->status = -ENOMEM;
486                 }
487         } else {
488                 if (length <= sg_dma_len(s)) {
489                         void *p = phys_to_virt(sg_dma_address(s));
490
491                         memcpy(&((u8 *)p)[request->actual],
492                                 descmiss_req->buf,
493                                 descmiss_req->actual);
494                         request->actual = length;
495                 } else {
496                         request->status = -ENOMEM;
497                 }
498         }
499 }
500
501 /**
502  * cdns3_wa2_descmiss_copy_data copy data from internal requests to
503  * request queued by class driver.
504  * @priv_ep: extended endpoint object
505  * @request: request object
506  */
507 static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
508                                          struct usb_request *request)
509 {
510         struct usb_request *descmiss_req;
511         struct cdns3_request *descmiss_priv_req;
512
513         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
514                 int chunk_end;
515
516                 descmiss_priv_req =
517                         cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
518                 descmiss_req = &descmiss_priv_req->request;
519
520                 /* driver can't touch pending request */
521                 if (descmiss_priv_req->flags & REQUEST_PENDING)
522                         break;
523
524                 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
525                 request->status = descmiss_req->status;
526                 __cdns3_descmiss_copy_data(request, descmiss_req);
527                 list_del_init(&descmiss_priv_req->list);
528                 kfree(descmiss_req->buf);
529                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
530                 --priv_ep->wa2_counter;
531
532                 if (!chunk_end)
533                         break;
534         }
535 }
536
537 static struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
538                                                      struct cdns3_endpoint *priv_ep,
539                                                      struct cdns3_request *priv_req)
540 {
541         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
542             priv_req->flags & REQUEST_INTERNAL) {
543                 struct usb_request *req;
544
545                 req = cdns3_next_request(&priv_ep->deferred_req_list);
546
547                 priv_ep->descmis_req = NULL;
548
549                 if (!req)
550                         return NULL;
551
552                 /* unmap the gadget request before copying data */
553                 usb_gadget_unmap_request_by_dev(priv_dev->sysdev, req,
554                                                 priv_ep->dir);
555
556                 cdns3_wa2_descmiss_copy_data(priv_ep, req);
557                 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
558                     req->length != req->actual) {
559                         /* wait for next part of transfer */
560                         /* re-map the gadget request buffer*/
561                         usb_gadget_map_request_by_dev(priv_dev->sysdev, req,
562                                 usb_endpoint_dir_in(priv_ep->endpoint.desc));
563                         return NULL;
564                 }
565
566                 if (req->status == -EINPROGRESS)
567                         req->status = 0;
568
569                 list_del_init(&req->list);
570                 cdns3_start_all_request(priv_dev, priv_ep);
571                 return req;
572         }
573
574         return &priv_req->request;
575 }
576
577 static int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
578                                      struct cdns3_endpoint *priv_ep,
579                                      struct cdns3_request *priv_req)
580 {
581         int deferred = 0;
582
583         /*
584          * If transfer was queued before DESCMISS appear than we
585          * can disable handling of DESCMISS interrupt. Driver assumes that it
586          * can disable special treatment for this endpoint.
587          */
588         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
589                 u32 reg;
590
591                 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
592                 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
593                 reg = readl(&priv_dev->regs->ep_sts_en);
594                 reg &= ~EP_STS_EN_DESCMISEN;
595                 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
596                 writel(reg, &priv_dev->regs->ep_sts_en);
597         }
598
599         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
600                 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
601                 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
602
603                 /*
604                  *  DESCMISS transfer has been finished, so data will be
605                  *  directly copied from internal allocated usb_request
606                  *  objects.
607                  */
608                 if (pending_empty && !descmiss_empty &&
609                     !(priv_req->flags & REQUEST_INTERNAL)) {
610                         cdns3_wa2_descmiss_copy_data(priv_ep,
611                                                      &priv_req->request);
612
613                         trace_cdns3_wa2(priv_ep, "get internal stored data");
614
615                         list_add_tail(&priv_req->request.list,
616                                       &priv_ep->pending_req_list);
617                         cdns3_gadget_giveback(priv_ep, priv_req,
618                                               priv_req->request.status);
619
620                         /*
621                          * Intentionally driver returns positive value as
622                          * correct value. It informs that transfer has
623                          * been finished.
624                          */
625                         return EINPROGRESS;
626                 }
627
628                 /*
629                  * Driver will wait for completion DESCMISS transfer,
630                  * before starts new, not DESCMISS transfer.
631                  */
632                 if (!pending_empty && !descmiss_empty) {
633                         trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
634                         deferred = 1;
635                 }
636
637                 if (priv_req->flags & REQUEST_INTERNAL)
638                         list_add_tail(&priv_req->list,
639                                       &priv_ep->wa2_descmiss_req_list);
640         }
641
642         return deferred;
643 }
644
645 static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
646 {
647         struct cdns3_request *priv_req;
648
649         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
650                 u8 chain;
651
652                 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
653                 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
654
655                 trace_cdns3_wa2(priv_ep, "removes eldest request");
656
657                 kfree(priv_req->request.buf);
658                 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
659                                              &priv_req->request);
660                 list_del_init(&priv_req->list);
661                 --priv_ep->wa2_counter;
662
663                 if (!chain)
664                         break;
665         }
666 }
667
668 /**
669  * cdns3_wa2_descmissing_packet - handles descriptor missing event.
670  * @priv_ep: extended gadget object
671  *
672  * This function is used only for WA2. For more information see Work around 2
673  * description.
674  */
675 static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
676 {
677         struct cdns3_request *priv_req;
678         struct usb_request *request;
679         u8 pending_empty = list_empty(&priv_ep->pending_req_list);
680
681         /* check for pending transfer */
682         if (!pending_empty) {
683                 trace_cdns3_wa2(priv_ep, "Ignoring Descriptor missing IRQ\n");
684                 return;
685         }
686
687         if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
688                 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
689                 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
690         }
691
692         trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
693
694         if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS) {
695                 trace_cdns3_wa2(priv_ep, "WA2 overflow\n");
696                 cdns3_wa2_remove_old_request(priv_ep);
697         }
698
699         request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
700                                                 GFP_ATOMIC);
701         if (!request)
702                 goto err;
703
704         priv_req = to_cdns3_request(request);
705         priv_req->flags |= REQUEST_INTERNAL;
706
707         /* if this field is still assigned it indicate that transfer related
708          * with this request has not been finished yet. Driver in this
709          * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
710          * flag to previous one. It will indicate that current request is
711          * part of the previous one.
712          */
713         if (priv_ep->descmis_req)
714                 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
715
716         priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
717                                         GFP_ATOMIC);
718         priv_ep->wa2_counter++;
719
720         if (!priv_req->request.buf) {
721                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
722                 goto err;
723         }
724
725         priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
726         priv_ep->descmis_req = priv_req;
727
728         __cdns3_gadget_ep_queue(&priv_ep->endpoint,
729                                 &priv_ep->descmis_req->request,
730                                 GFP_ATOMIC);
731
732         return;
733
734 err:
735         dev_err(priv_ep->cdns3_dev->dev,
736                 "Failed: No sufficient memory for DESCMIS\n");
737 }
738
739 static void cdns3_wa2_reset_tdl(struct cdns3_device *priv_dev)
740 {
741         u16 tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
742
743         if (tdl) {
744                 u16 reset_val = EP_CMD_TDL_MAX + 1 - tdl;
745
746                 writel(EP_CMD_TDL_SET(reset_val) | EP_CMD_STDL,
747                        &priv_dev->regs->ep_cmd);
748         }
749 }
750
751 static void cdns3_wa2_check_outq_status(struct cdns3_device *priv_dev)
752 {
753         u32 ep_sts_reg;
754
755         /* select EP0-out */
756         cdns3_select_ep(priv_dev, 0);
757
758         ep_sts_reg = readl(&priv_dev->regs->ep_sts);
759
760         if (EP_STS_OUTQ_VAL(ep_sts_reg)) {
761                 u32 outq_ep_num = EP_STS_OUTQ_NO(ep_sts_reg);
762                 struct cdns3_endpoint *outq_ep = priv_dev->eps[outq_ep_num];
763
764                 if ((outq_ep->flags & EP_ENABLED) && !(outq_ep->use_streams) &&
765                     outq_ep->type != USB_ENDPOINT_XFER_ISOC && outq_ep_num) {
766                         u8 pending_empty = list_empty(&outq_ep->pending_req_list);
767
768                         if ((outq_ep->flags & EP_QUIRK_EXTRA_BUF_DET) ||
769                             (outq_ep->flags & EP_QUIRK_EXTRA_BUF_EN) ||
770                             !pending_empty) {
771                         } else {
772                                 u32 ep_sts_en_reg;
773                                 u32 ep_cmd_reg;
774
775                                 cdns3_select_ep(priv_dev, outq_ep->num |
776                                                 outq_ep->dir);
777                                 ep_sts_en_reg = readl(&priv_dev->regs->ep_sts_en);
778                                 ep_cmd_reg = readl(&priv_dev->regs->ep_cmd);
779
780                                 outq_ep->flags |= EP_TDLCHK_EN;
781                                 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
782                                                        EP_CFG_TDL_CHK);
783
784                                 cdns3_wa2_enable_detection(priv_dev, outq_ep,
785                                                            ep_sts_en_reg);
786                                 writel(ep_sts_en_reg,
787                                        &priv_dev->regs->ep_sts_en);
788                                 /* reset tdl value to zero */
789                                 cdns3_wa2_reset_tdl(priv_dev);
790                                 /*
791                                  * Memory barrier - Reset tdl before ringing the
792                                  * doorbell.
793                                  */
794                                 wmb();
795                                 if (EP_CMD_DRDY & ep_cmd_reg) {
796                                         trace_cdns3_wa2(outq_ep, "Enabling WA2 skipping doorbell\n");
797
798                                 } else {
799                                         trace_cdns3_wa2(outq_ep, "Enabling WA2 ringing doorbell\n");
800                                         /*
801                                          * ring doorbell to generate DESCMIS irq
802                                          */
803                                         writel(EP_CMD_DRDY,
804                                                &priv_dev->regs->ep_cmd);
805                                 }
806                         }
807                 }
808         }
809 }
810
811 /**
812  * cdns3_gadget_giveback - call struct usb_request's ->complete callback
813  * @priv_ep: The endpoint to whom the request belongs to
814  * @priv_req: The request we're giving back
815  * @status: completion code for the request
816  *
817  * Must be called with controller's lock held and interrupts disabled. This
818  * function will unmap @req and call its ->complete() callback to notify upper
819  * layers that it has completed.
820  */
821 void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
822                            struct cdns3_request *priv_req,
823                            int status)
824 {
825         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
826         struct usb_request *request = &priv_req->request;
827
828         list_del_init(&request->list);
829
830         if (request->status == -EINPROGRESS)
831                 request->status = status;
832
833         usb_gadget_unmap_request_by_dev(priv_dev->sysdev, request,
834                                         priv_ep->dir);
835
836         if ((priv_req->flags & REQUEST_UNALIGNED) &&
837             priv_ep->dir == USB_DIR_OUT && !request->status)
838                 memcpy(request->buf, priv_req->aligned_buf->buf,
839                        request->length);
840
841         priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
842         /* All TRBs have finished, clear the counter */
843         priv_req->finished_trb = 0;
844         trace_cdns3_gadget_giveback(priv_req);
845
846         if (priv_dev->dev_ver < DEV_VER_V2) {
847                 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
848                                                     priv_req);
849                 if (!request)
850                         return;
851         }
852
853         if (request->complete) {
854                 spin_unlock(&priv_dev->lock);
855                 usb_gadget_giveback_request(&priv_ep->endpoint,
856                                             request);
857                 spin_lock(&priv_dev->lock);
858         }
859
860         if (request->buf == priv_dev->zlp_buf)
861                 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
862 }
863
864 static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
865 {
866         /* Work around for stale data address in TRB*/
867         if (priv_ep->wa1_set) {
868                 trace_cdns3_wa1(priv_ep, "restore cycle bit");
869
870                 priv_ep->wa1_set = 0;
871                 priv_ep->wa1_trb_index = 0xFFFF;
872                 if (priv_ep->wa1_cycle_bit) {
873                         priv_ep->wa1_trb->control =
874                                 priv_ep->wa1_trb->control | cpu_to_le32(0x1);
875                 } else {
876                         priv_ep->wa1_trb->control =
877                                 priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
878                 }
879         }
880 }
881
882 static void cdns3_free_aligned_request_buf(struct work_struct *work)
883 {
884         struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
885                                         aligned_buf_wq);
886         struct cdns3_aligned_buf *buf, *tmp;
887         unsigned long flags;
888
889         spin_lock_irqsave(&priv_dev->lock, flags);
890
891         list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
892                 if (!buf->in_use) {
893                         list_del(&buf->list);
894
895                         /*
896                          * Re-enable interrupts to free DMA capable memory.
897                          * Driver can't free this memory with disabled
898                          * interrupts.
899                          */
900                         spin_unlock_irqrestore(&priv_dev->lock, flags);
901                         dma_free_coherent(priv_dev->sysdev, buf->size,
902                                           buf->buf, buf->dma);
903                         kfree(buf);
904                         spin_lock_irqsave(&priv_dev->lock, flags);
905                 }
906         }
907
908         spin_unlock_irqrestore(&priv_dev->lock, flags);
909 }
910
911 static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
912 {
913         struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
914         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
915         struct cdns3_aligned_buf *buf;
916
917         /* check if buffer is aligned to 8. */
918         if (!((uintptr_t)priv_req->request.buf & 0x7))
919                 return 0;
920
921         buf = priv_req->aligned_buf;
922
923         if (!buf || priv_req->request.length > buf->size) {
924                 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
925                 if (!buf)
926                         return -ENOMEM;
927
928                 buf->size = priv_req->request.length;
929
930                 buf->buf = dma_alloc_coherent(priv_dev->sysdev,
931                                               buf->size,
932                                               &buf->dma,
933                                               GFP_ATOMIC);
934                 if (!buf->buf) {
935                         kfree(buf);
936                         return -ENOMEM;
937                 }
938
939                 if (priv_req->aligned_buf) {
940                         trace_cdns3_free_aligned_request(priv_req);
941                         priv_req->aligned_buf->in_use = 0;
942                         queue_work(system_freezable_wq,
943                                    &priv_dev->aligned_buf_wq);
944                 }
945
946                 buf->in_use = 1;
947                 priv_req->aligned_buf = buf;
948
949                 list_add_tail(&buf->list,
950                               &priv_dev->aligned_buf_list);
951         }
952
953         if (priv_ep->dir == USB_DIR_IN) {
954                 memcpy(buf->buf, priv_req->request.buf,
955                        priv_req->request.length);
956         }
957
958         priv_req->flags |= REQUEST_UNALIGNED;
959         trace_cdns3_prepare_aligned_request(priv_req);
960
961         return 0;
962 }
963
964 static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
965                                   struct cdns3_trb *trb)
966 {
967         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
968
969         if (!priv_ep->wa1_set) {
970                 u32 doorbell;
971
972                 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
973
974                 if (doorbell) {
975                         priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
976                         priv_ep->wa1_set = 1;
977                         priv_ep->wa1_trb = trb;
978                         priv_ep->wa1_trb_index = priv_ep->enqueue;
979                         trace_cdns3_wa1(priv_ep, "set guard");
980                         return 0;
981                 }
982         }
983         return 1;
984 }
985
986 static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
987                                              struct cdns3_endpoint *priv_ep)
988 {
989         int dma_index;
990         u32 doorbell;
991
992         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
993         dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
994
995         if (!doorbell || dma_index != priv_ep->wa1_trb_index)
996                 cdns3_wa1_restore_cycle_bit(priv_ep);
997 }
998
999 static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep,
1000                                         struct usb_request *request)
1001 {
1002         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1003         struct cdns3_request *priv_req;
1004         struct cdns3_trb *trb;
1005         dma_addr_t trb_dma;
1006         int address;
1007         u32 control;
1008         u32 length;
1009         u32 tdl;
1010         unsigned int sg_idx = priv_ep->stream_sg_idx;
1011
1012         priv_req = to_cdns3_request(request);
1013         address = priv_ep->endpoint.desc->bEndpointAddress;
1014
1015         priv_ep->flags |= EP_PENDING_REQUEST;
1016
1017         /* must allocate buffer aligned to 8 */
1018         if (priv_req->flags & REQUEST_UNALIGNED)
1019                 trb_dma = priv_req->aligned_buf->dma;
1020         else
1021                 trb_dma = request->dma;
1022
1023         /*  For stream capable endpoints driver use only single TD. */
1024         trb = priv_ep->trb_pool + priv_ep->enqueue;
1025         priv_req->start_trb = priv_ep->enqueue;
1026         priv_req->end_trb = priv_req->start_trb;
1027         priv_req->trb = trb;
1028
1029         cdns3_select_ep(priv_ep->cdns3_dev, address);
1030
1031         control = TRB_TYPE(TRB_NORMAL) | TRB_CYCLE |
1032                   TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
1033
1034         if (!request->num_sgs) {
1035                 trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1036                 length = request->length;
1037         } else {
1038                 trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
1039                 length = request->sg[sg_idx].length;
1040         }
1041
1042         tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
1043
1044         trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
1045
1046         /*
1047          * For DEV_VER_V2 controller version we have enabled
1048          * USB_CONF2_EN_TDL_TRB in DMULT configuration.
1049          * This enables TDL calculation based on TRB, hence setting TDL in TRB.
1050          */
1051         if (priv_dev->dev_ver >= DEV_VER_V2) {
1052                 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1053                         trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
1054         }
1055         priv_req->flags |= REQUEST_PENDING;
1056
1057         trb->control = cpu_to_le32(control);
1058
1059         trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1060
1061         /*
1062          * Memory barrier - Cycle Bit must be set before trb->length  and
1063          * trb->buffer fields.
1064          */
1065         wmb();
1066
1067         /* always first element */
1068         writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma),
1069                &priv_dev->regs->ep_traddr);
1070
1071         if (!(priv_ep->flags & EP_STALLED)) {
1072                 trace_cdns3_ring(priv_ep);
1073                 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1074                 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1075
1076                 priv_ep->prime_flag = false;
1077
1078                 /*
1079                  * Controller version DEV_VER_V2 tdl calculation
1080                  * is based on TRB
1081                  */
1082
1083                 if (priv_dev->dev_ver < DEV_VER_V2)
1084                         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1085                                &priv_dev->regs->ep_cmd);
1086                 else if (priv_dev->dev_ver > DEV_VER_V2)
1087                         writel(tdl, &priv_dev->regs->ep_tdl);
1088
1089                 priv_ep->last_stream_id = priv_req->request.stream_id;
1090                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1091                 writel(EP_CMD_ERDY_SID(priv_req->request.stream_id) |
1092                        EP_CMD_ERDY, &priv_dev->regs->ep_cmd);
1093
1094                 trace_cdns3_doorbell_epx(priv_ep->name,
1095                                          readl(&priv_dev->regs->ep_traddr));
1096         }
1097
1098         /* WORKAROUND for transition to L0 */
1099         __cdns3_gadget_wakeup(priv_dev);
1100
1101         return 0;
1102 }
1103
1104 /**
1105  * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
1106  * @priv_ep: endpoint object
1107  * @request: request object
1108  *
1109  * Returns zero on success or negative value on failure
1110  */
1111 static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
1112                                  struct usb_request *request)
1113 {
1114         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1115         struct cdns3_request *priv_req;
1116         struct cdns3_trb *trb;
1117         struct cdns3_trb *link_trb = NULL;
1118         dma_addr_t trb_dma;
1119         u32 togle_pcs = 1;
1120         int sg_iter = 0;
1121         int num_trb;
1122         int address;
1123         u32 control;
1124         int pcs;
1125         u16 total_tdl = 0;
1126         struct scatterlist *s = NULL;
1127         bool sg_supported = !!(request->num_mapped_sgs);
1128
1129         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
1130                 num_trb = priv_ep->interval;
1131         else
1132                 num_trb = sg_supported ? request->num_mapped_sgs : 1;
1133
1134         if (num_trb > priv_ep->free_trbs) {
1135                 priv_ep->flags |= EP_RING_FULL;
1136                 return -ENOBUFS;
1137         }
1138
1139         priv_req = to_cdns3_request(request);
1140         address = priv_ep->endpoint.desc->bEndpointAddress;
1141
1142         priv_ep->flags |= EP_PENDING_REQUEST;
1143
1144         /* must allocate buffer aligned to 8 */
1145         if (priv_req->flags & REQUEST_UNALIGNED)
1146                 trb_dma = priv_req->aligned_buf->dma;
1147         else
1148                 trb_dma = request->dma;
1149
1150         trb = priv_ep->trb_pool + priv_ep->enqueue;
1151         priv_req->start_trb = priv_ep->enqueue;
1152         priv_req->trb = trb;
1153
1154         cdns3_select_ep(priv_ep->cdns3_dev, address);
1155
1156         /* prepare ring */
1157         if ((priv_ep->enqueue + num_trb)  >= (priv_ep->num_trbs - 1)) {
1158                 int doorbell, dma_index;
1159                 u32 ch_bit = 0;
1160
1161                 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1162                 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1163
1164                 /* Driver can't update LINK TRB if it is current processed. */
1165                 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
1166                         priv_ep->flags |= EP_DEFERRED_DRDY;
1167                         return -ENOBUFS;
1168                 }
1169
1170                 /*updating C bt in  Link TRB before starting DMA*/
1171                 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
1172                 /*
1173                  * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
1174                  * that DMA stuck at the LINK TRB.
1175                  * On the other hand, removing TRB_CHAIN for longer TRs for
1176                  * epXout cause that DMA stuck after handling LINK TRB.
1177                  * To eliminate this strange behavioral driver set TRB_CHAIN
1178                  * bit only for TR size > 2.
1179                  */
1180                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
1181                     TRBS_PER_SEGMENT > 2)
1182                         ch_bit = TRB_CHAIN;
1183
1184                 link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1185                                     TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
1186         }
1187
1188         if (priv_dev->dev_ver <= DEV_VER_V2)
1189                 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
1190
1191         if (sg_supported)
1192                 s = request->sg;
1193
1194         /* set incorrect Cycle Bit for first trb*/
1195         control = priv_ep->pcs ? 0 : TRB_CYCLE;
1196         trb->length = 0;
1197         if (priv_dev->dev_ver >= DEV_VER_V2) {
1198                 u16 td_size;
1199
1200                 td_size = DIV_ROUND_UP(request->length,
1201                                        priv_ep->endpoint.maxpacket);
1202                 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1203                         trb->length = TRB_TDL_SS_SIZE(td_size);
1204                 else
1205                         control |= TRB_TDL_HS_SIZE(td_size);
1206         }
1207
1208         do {
1209                 u32 length;
1210
1211                 /* fill TRB */
1212                 control |= TRB_TYPE(TRB_NORMAL);
1213                 if (sg_supported) {
1214                         trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1215                         length = sg_dma_len(s);
1216                 } else {
1217                         trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
1218                         length = request->length;
1219                 }
1220
1221                 if (priv_ep->flags & EP_TDLCHK_EN)
1222                         total_tdl += DIV_ROUND_UP(length,
1223                                                priv_ep->endpoint.maxpacket);
1224
1225                 trb->length |= cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
1226                                         TRB_LEN(length));
1227                 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
1228
1229                 /*
1230                  * first trb should be prepared as last to avoid processing
1231                  *  transfer to early
1232                  */
1233                 if (sg_iter != 0)
1234                         control |= pcs;
1235
1236                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir) {
1237                         control |= TRB_IOC | TRB_ISP;
1238                 } else {
1239                         /* for last element in TD or in SG list */
1240                         if (sg_iter == (num_trb - 1) && sg_iter != 0)
1241                                 control |= pcs | TRB_IOC | TRB_ISP;
1242                 }
1243
1244                 if (sg_iter)
1245                         trb->control = cpu_to_le32(control);
1246                 else
1247                         priv_req->trb->control = cpu_to_le32(control);
1248
1249                 if (sg_supported) {
1250                         trb->control |= TRB_ISP;
1251                         /* Don't set chain bit for last TRB */
1252                         if (sg_iter < num_trb - 1)
1253                                 trb->control |= TRB_CHAIN;
1254
1255                         s = sg_next(s);
1256                 }
1257
1258                 control = 0;
1259                 ++sg_iter;
1260                 priv_req->end_trb = priv_ep->enqueue;
1261                 cdns3_ep_inc_enq(priv_ep);
1262                 trb = priv_ep->trb_pool + priv_ep->enqueue;
1263         } while (sg_iter < num_trb);
1264
1265         trb = priv_req->trb;
1266
1267         priv_req->flags |= REQUEST_PENDING;
1268         priv_req->num_of_trb = num_trb;
1269
1270         if (sg_iter == 1)
1271                 trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
1272
1273         if (priv_dev->dev_ver < DEV_VER_V2 &&
1274             (priv_ep->flags & EP_TDLCHK_EN)) {
1275                 u16 tdl = total_tdl;
1276                 u16 old_tdl = EP_CMD_TDL_GET(readl(&priv_dev->regs->ep_cmd));
1277
1278                 if (tdl > EP_CMD_TDL_MAX) {
1279                         tdl = EP_CMD_TDL_MAX;
1280                         priv_ep->pending_tdl = total_tdl - EP_CMD_TDL_MAX;
1281                 }
1282
1283                 if (old_tdl < tdl) {
1284                         tdl -= old_tdl;
1285                         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL,
1286                                &priv_dev->regs->ep_cmd);
1287                 }
1288         }
1289
1290         /*
1291          * Memory barrier - cycle bit must be set before other filds in trb.
1292          */
1293         wmb();
1294
1295         /* give the TD to the consumer*/
1296         if (togle_pcs)
1297                 trb->control = trb->control ^ cpu_to_le32(1);
1298
1299         if (priv_dev->dev_ver <= DEV_VER_V2)
1300                 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
1301
1302         if (num_trb > 1) {
1303                 int i = 0;
1304
1305                 while (i < num_trb) {
1306                         trace_cdns3_prepare_trb(priv_ep, trb + i);
1307                         if (trb + i == link_trb) {
1308                                 trb = priv_ep->trb_pool;
1309                                 num_trb = num_trb - i;
1310                                 i = 0;
1311                         } else {
1312                                 i++;
1313                         }
1314                 }
1315         } else {
1316                 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1317         }
1318
1319         /*
1320          * Memory barrier - Cycle Bit must be set before trb->length  and
1321          * trb->buffer fields.
1322          */
1323         wmb();
1324
1325         /*
1326          * For DMULT mode we can set address to transfer ring only once after
1327          * enabling endpoint.
1328          */
1329         if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
1330                 /*
1331                  * Until SW is not ready to handle the OUT transfer the ISO OUT
1332                  * Endpoint should be disabled (EP_CFG.ENABLE = 0).
1333                  * EP_CFG_ENABLE must be set before updating ep_traddr.
1334                  */
1335                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir &&
1336                     !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
1337                         priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
1338                         cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
1339                                                EP_CFG_ENABLE);
1340                 }
1341
1342                 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
1343                                         priv_req->start_trb * TRB_SIZE),
1344                                         &priv_dev->regs->ep_traddr);
1345
1346                 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
1347         }
1348
1349         if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
1350                 trace_cdns3_ring(priv_ep);
1351                 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
1352                 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
1353                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1354                 trace_cdns3_doorbell_epx(priv_ep->name,
1355                                          readl(&priv_dev->regs->ep_traddr));
1356         }
1357
1358         /* WORKAROUND for transition to L0 */
1359         __cdns3_gadget_wakeup(priv_dev);
1360
1361         return 0;
1362 }
1363
1364 void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1365 {
1366         struct cdns3_endpoint *priv_ep;
1367         struct usb_ep *ep;
1368
1369         if (priv_dev->hw_configured_flag)
1370                 return;
1371
1372         writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1373
1374         cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1375                                USB_CONF_U1EN | USB_CONF_U2EN);
1376
1377         priv_dev->hw_configured_flag = 1;
1378
1379         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1380                 if (ep->enabled) {
1381                         priv_ep = ep_to_cdns3_ep(ep);
1382                         cdns3_start_all_request(priv_dev, priv_ep);
1383                 }
1384         }
1385
1386         cdns3_allow_enable_l1(priv_dev, 1);
1387 }
1388
1389 /**
1390  * cdns3_trb_handled - check whether trb has been handled by DMA
1391  *
1392  * @priv_ep: extended endpoint object.
1393  * @priv_req: request object for checking
1394  *
1395  * Endpoint must be selected before invoking this function.
1396  *
1397  * Returns false if request has not been handled by DMA, else returns true.
1398  *
1399  * SR - start ring
1400  * ER -  end ring
1401  * DQ = priv_ep->dequeue - dequeue position
1402  * EQ = priv_ep->enqueue -  enqueue position
1403  * ST = priv_req->start_trb - index of first TRB in transfer ring
1404  * ET = priv_req->end_trb - index of last TRB in transfer ring
1405  * CI = current_index - index of processed TRB by DMA.
1406  *
1407  * As first step, we check if the TRB between the ST and ET.
1408  * Then, we check if cycle bit for index priv_ep->dequeue
1409  * is correct.
1410  *
1411  * some rules:
1412  * 1. priv_ep->dequeue never equals to current_index.
1413  * 2  priv_ep->enqueue never exceed priv_ep->dequeue
1414  * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1415  *    and priv_ep->free_trbs is zero.
1416  *    This case indicate that TR is full.
1417  *
1418  * At below two cases, the request have been handled.
1419  * Case 1 - priv_ep->dequeue < current_index
1420  *      SR ... EQ ... DQ ... CI ... ER
1421  *      SR ... DQ ... CI ... EQ ... ER
1422  *
1423  * Case 2 - priv_ep->dequeue > current_index
1424  * This situation takes place when CI go through the LINK TRB at the end of
1425  * transfer ring.
1426  *      SR ... CI ... EQ ... DQ ... ER
1427  */
1428 static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
1429                                   struct cdns3_request *priv_req)
1430 {
1431         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1432         struct cdns3_trb *trb;
1433         int current_index = 0;
1434         int handled = 0;
1435         int doorbell;
1436
1437         current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1438         doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1439
1440         /* current trb doesn't belong to this request */
1441         if (priv_req->start_trb < priv_req->end_trb) {
1442                 if (priv_ep->dequeue > priv_req->end_trb)
1443                         goto finish;
1444
1445                 if (priv_ep->dequeue < priv_req->start_trb)
1446                         goto finish;
1447         }
1448
1449         if ((priv_req->start_trb > priv_req->end_trb) &&
1450                 (priv_ep->dequeue > priv_req->end_trb) &&
1451                 (priv_ep->dequeue < priv_req->start_trb))
1452                 goto finish;
1453
1454         if ((priv_req->start_trb == priv_req->end_trb) &&
1455                 (priv_ep->dequeue != priv_req->end_trb))
1456                 goto finish;
1457
1458         trb = &priv_ep->trb_pool[priv_ep->dequeue];
1459
1460         if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
1461                 goto finish;
1462
1463         if (doorbell == 1 && current_index == priv_ep->dequeue)
1464                 goto finish;
1465
1466         /* The corner case for TRBS_PER_SEGMENT equal 2). */
1467         if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1468                 handled = 1;
1469                 goto finish;
1470         }
1471
1472         if (priv_ep->enqueue == priv_ep->dequeue &&
1473             priv_ep->free_trbs == 0) {
1474                 handled = 1;
1475         } else if (priv_ep->dequeue < current_index) {
1476                 if ((current_index == (priv_ep->num_trbs - 1)) &&
1477                     !priv_ep->dequeue)
1478                         goto finish;
1479
1480                 handled = 1;
1481         } else if (priv_ep->dequeue  > current_index) {
1482                         handled = 1;
1483         }
1484
1485 finish:
1486         trace_cdns3_request_handled(priv_req, current_index, handled);
1487
1488         return handled;
1489 }
1490
1491 static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1492                                      struct cdns3_endpoint *priv_ep)
1493 {
1494         struct cdns3_request *priv_req;
1495         struct usb_request *request;
1496         struct cdns3_trb *trb;
1497         bool request_handled = false;
1498         bool transfer_end = false;
1499
1500         while (!list_empty(&priv_ep->pending_req_list)) {
1501                 request = cdns3_next_request(&priv_ep->pending_req_list);
1502                 priv_req = to_cdns3_request(request);
1503
1504                 trb = priv_ep->trb_pool + priv_ep->dequeue;
1505
1506                 /* Request was dequeued and TRB was changed to TRB_LINK. */
1507                 if (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
1508                         trace_cdns3_complete_trb(priv_ep, trb);
1509                         cdns3_move_deq_to_next_trb(priv_req);
1510                 }
1511
1512                 if (!request->stream_id) {
1513                         /* Re-select endpoint. It could be changed by other CPU
1514                          * during handling usb_gadget_giveback_request.
1515                          */
1516                         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1517
1518                         while (cdns3_trb_handled(priv_ep, priv_req)) {
1519                                 priv_req->finished_trb++;
1520                                 if (priv_req->finished_trb >= priv_req->num_of_trb)
1521                                         request_handled = true;
1522
1523                                 trb = priv_ep->trb_pool + priv_ep->dequeue;
1524                                 trace_cdns3_complete_trb(priv_ep, trb);
1525
1526                                 if (!transfer_end)
1527                                         request->actual +=
1528                                                 TRB_LEN(le32_to_cpu(trb->length));
1529
1530                                 if (priv_req->num_of_trb > 1 &&
1531                                         le32_to_cpu(trb->control) & TRB_SMM)
1532                                         transfer_end = true;
1533
1534                                 cdns3_ep_inc_deq(priv_ep);
1535                         }
1536
1537                         if (request_handled) {
1538                                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1539                                 request_handled = false;
1540                                 transfer_end = false;
1541                         } else {
1542                                 goto prepare_next_td;
1543                         }
1544
1545                         if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1546                             TRBS_PER_SEGMENT == 2)
1547                                 break;
1548                 } else {
1549                         /* Re-select endpoint. It could be changed by other CPU
1550                          * during handling usb_gadget_giveback_request.
1551                          */
1552                         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1553
1554                         trb = priv_ep->trb_pool;
1555                         trace_cdns3_complete_trb(priv_ep, trb);
1556
1557                         if (trb != priv_req->trb)
1558                                 dev_warn(priv_dev->dev,
1559                                          "request_trb=0x%p, queue_trb=0x%p\n",
1560                                          priv_req->trb, trb);
1561
1562                         request->actual += TRB_LEN(le32_to_cpu(trb->length));
1563
1564                         if (!request->num_sgs ||
1565                             (request->num_sgs == (priv_ep->stream_sg_idx + 1))) {
1566                                 priv_ep->stream_sg_idx = 0;
1567                                 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1568                         } else {
1569                                 priv_ep->stream_sg_idx++;
1570                                 cdns3_ep_run_stream_transfer(priv_ep, request);
1571                         }
1572                         break;
1573                 }
1574         }
1575         priv_ep->flags &= ~EP_PENDING_REQUEST;
1576
1577 prepare_next_td:
1578         if (!(priv_ep->flags & EP_STALLED) &&
1579             !(priv_ep->flags & EP_STALL_PENDING))
1580                 cdns3_start_all_request(priv_dev, priv_ep);
1581 }
1582
1583 void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1584 {
1585         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1586
1587         cdns3_wa1_restore_cycle_bit(priv_ep);
1588
1589         if (rearm) {
1590                 trace_cdns3_ring(priv_ep);
1591
1592                 /* Cycle Bit must be updated before arming DMA. */
1593                 wmb();
1594                 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1595
1596                 __cdns3_gadget_wakeup(priv_dev);
1597
1598                 trace_cdns3_doorbell_epx(priv_ep->name,
1599                                          readl(&priv_dev->regs->ep_traddr));
1600         }
1601 }
1602
1603 static void cdns3_reprogram_tdl(struct cdns3_endpoint *priv_ep)
1604 {
1605         u16 tdl = priv_ep->pending_tdl;
1606         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1607
1608         if (tdl > EP_CMD_TDL_MAX) {
1609                 tdl = EP_CMD_TDL_MAX;
1610                 priv_ep->pending_tdl -= EP_CMD_TDL_MAX;
1611         } else {
1612                 priv_ep->pending_tdl = 0;
1613         }
1614
1615         writel(EP_CMD_TDL_SET(tdl) | EP_CMD_STDL, &priv_dev->regs->ep_cmd);
1616 }
1617
1618 /**
1619  * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1620  * @priv_ep: endpoint object
1621  *
1622  * Returns 0
1623  */
1624 static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1625 {
1626         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1627         u32 ep_sts_reg;
1628         struct usb_request *deferred_request;
1629         struct usb_request *pending_request;
1630         u32 tdl = 0;
1631
1632         cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1633
1634         trace_cdns3_epx_irq(priv_dev, priv_ep);
1635
1636         ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1637         writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1638
1639         if ((ep_sts_reg & EP_STS_PRIME) && priv_ep->use_streams) {
1640                 bool dbusy = !!(ep_sts_reg & EP_STS_DBUSY);
1641
1642                 tdl = cdns3_get_tdl(priv_dev);
1643
1644                 /*
1645                  * Continue the previous transfer:
1646                  * There is some racing between ERDY and PRIME. The device send
1647                  * ERDY and almost in the same time Host send PRIME. It cause
1648                  * that host ignore the ERDY packet and driver has to send it
1649                  * again.
1650                  */
1651                 if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
1652                     EP_STS_HOSTPP(ep_sts_reg))) {
1653                         writel(EP_CMD_ERDY |
1654                                EP_CMD_ERDY_SID(priv_ep->last_stream_id),
1655                                &priv_dev->regs->ep_cmd);
1656                         ep_sts_reg &= ~(EP_STS_MD_EXIT | EP_STS_IOC);
1657                 } else {
1658                         priv_ep->prime_flag = true;
1659
1660                         pending_request = cdns3_next_request(&priv_ep->pending_req_list);
1661                         deferred_request = cdns3_next_request(&priv_ep->deferred_req_list);
1662
1663                         if (deferred_request && !pending_request) {
1664                                 cdns3_start_all_request(priv_dev, priv_ep);
1665                         }
1666                 }
1667         }
1668
1669         if (ep_sts_reg & EP_STS_TRBERR) {
1670                 if (priv_ep->flags & EP_STALL_PENDING &&
1671                     !(ep_sts_reg & EP_STS_DESCMIS &&
1672                     priv_dev->dev_ver < DEV_VER_V2)) {
1673                         cdns3_ep_stall_flush(priv_ep);
1674                 }
1675
1676                 /*
1677                  * For isochronous transfer driver completes request on
1678                  * IOC or on TRBERR. IOC appears only when device receive
1679                  * OUT data packet. If host disable stream or lost some packet
1680                  * then the only way to finish all queued transfer is to do it
1681                  * on TRBERR event.
1682                  */
1683                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1684                     !priv_ep->wa1_set) {
1685                         if (!priv_ep->dir) {
1686                                 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1687
1688                                 ep_cfg &= ~EP_CFG_ENABLE;
1689                                 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1690                                 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1691                         }
1692                         cdns3_transfer_completed(priv_dev, priv_ep);
1693                 } else if (!(priv_ep->flags & EP_STALLED) &&
1694                           !(priv_ep->flags & EP_STALL_PENDING)) {
1695                         if (priv_ep->flags & EP_DEFERRED_DRDY) {
1696                                 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1697                                 cdns3_start_all_request(priv_dev, priv_ep);
1698                         } else {
1699                                 cdns3_rearm_transfer(priv_ep,
1700                                                      priv_ep->wa1_set);
1701                         }
1702                 }
1703         }
1704
1705         if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP) ||
1706             (ep_sts_reg & EP_STS_IOT)) {
1707                 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1708                         if (ep_sts_reg & EP_STS_ISP)
1709                                 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1710                         else
1711                                 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1712                 }
1713
1714                 if (!priv_ep->use_streams) {
1715                         if ((ep_sts_reg & EP_STS_IOC) ||
1716                             (ep_sts_reg & EP_STS_ISP)) {
1717                                 cdns3_transfer_completed(priv_dev, priv_ep);
1718                         } else if ((priv_ep->flags & EP_TDLCHK_EN) &
1719                                    priv_ep->pending_tdl) {
1720                                 /* handle IOT with pending tdl */
1721                                 cdns3_reprogram_tdl(priv_ep);
1722                         }
1723                 } else if (priv_ep->dir == USB_DIR_OUT) {
1724                         priv_ep->ep_sts_pending |= ep_sts_reg;
1725                 } else if (ep_sts_reg & EP_STS_IOT) {
1726                         cdns3_transfer_completed(priv_dev, priv_ep);
1727                 }
1728         }
1729
1730         /*
1731          * MD_EXIT interrupt sets when stream capable endpoint exits
1732          * from MOVE DATA state of Bulk IN/OUT stream protocol state machine
1733          */
1734         if (priv_ep->dir == USB_DIR_OUT && (ep_sts_reg & EP_STS_MD_EXIT) &&
1735             (priv_ep->ep_sts_pending & EP_STS_IOT) && priv_ep->use_streams) {
1736                 priv_ep->ep_sts_pending = 0;
1737                 cdns3_transfer_completed(priv_dev, priv_ep);
1738         }
1739
1740         /*
1741          * WA2: this condition should only be meet when
1742          * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1743          * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1744          * In other cases this interrupt will be disabled.
1745          */
1746         if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1747             !(priv_ep->flags & EP_STALLED))
1748                 cdns3_wa2_descmissing_packet(priv_ep);
1749
1750         return 0;
1751 }
1752
1753 static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1754 {
1755         if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect)
1756                 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1757 }
1758
1759 /**
1760  * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1761  * @priv_dev: extended gadget object
1762  * @usb_ists: bitmap representation of device's reported interrupts
1763  * (usb_ists register value)
1764  */
1765 static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1766                                               u32 usb_ists)
1767 __must_hold(&priv_dev->lock)
1768 {
1769         int speed = 0;
1770
1771         trace_cdns3_usb_irq(priv_dev, usb_ists);
1772         if (usb_ists & USB_ISTS_L1ENTI) {
1773                 /*
1774                  * WORKAROUND: CDNS3 controller has issue with hardware resuming
1775                  * from L1. To fix it, if any DMA transfer is pending driver
1776                  * must starts driving resume signal immediately.
1777                  */
1778                 if (readl(&priv_dev->regs->drbl))
1779                         __cdns3_gadget_wakeup(priv_dev);
1780         }
1781
1782         /* Connection detected */
1783         if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1784                 speed = cdns3_get_speed(priv_dev);
1785                 priv_dev->gadget.speed = speed;
1786                 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1787                 cdns3_ep0_config(priv_dev);
1788         }
1789
1790         /* Disconnection detected */
1791         if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1792                 spin_unlock(&priv_dev->lock);
1793                 cdns3_disconnect_gadget(priv_dev);
1794                 spin_lock(&priv_dev->lock);
1795                 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1796                 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1797                 cdns3_hw_reset_eps_config(priv_dev);
1798         }
1799
1800         if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1801                 if (priv_dev->gadget_driver &&
1802                     priv_dev->gadget_driver->suspend) {
1803                         spin_unlock(&priv_dev->lock);
1804                         priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1805                         spin_lock(&priv_dev->lock);
1806                 }
1807         }
1808
1809         if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1810                 if (priv_dev->gadget_driver &&
1811                     priv_dev->gadget_driver->resume) {
1812                         spin_unlock(&priv_dev->lock);
1813                         priv_dev->gadget_driver->resume(&priv_dev->gadget);
1814                         spin_lock(&priv_dev->lock);
1815                 }
1816         }
1817
1818         /* reset*/
1819         if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1820                 if (priv_dev->gadget_driver) {
1821                         spin_unlock(&priv_dev->lock);
1822                         usb_gadget_udc_reset(&priv_dev->gadget,
1823                                              priv_dev->gadget_driver);
1824                         spin_lock(&priv_dev->lock);
1825
1826                         /*read again to check the actual speed*/
1827                         speed = cdns3_get_speed(priv_dev);
1828                         priv_dev->gadget.speed = speed;
1829                         cdns3_hw_reset_eps_config(priv_dev);
1830                         cdns3_ep0_config(priv_dev);
1831                 }
1832         }
1833 }
1834
1835 /**
1836  * cdns3_device_irq_handler- interrupt handler for device part of controller
1837  *
1838  * @irq: irq number for cdns3 core device
1839  * @data: structure of cdns3
1840  *
1841  * Returns IRQ_HANDLED or IRQ_NONE
1842  */
1843 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1844 {
1845         struct cdns3_device *priv_dev = data;
1846         struct cdns3 *cdns = dev_get_drvdata(priv_dev->dev);
1847         irqreturn_t ret = IRQ_NONE;
1848         u32 reg;
1849
1850         if (cdns->in_lpm)
1851                 return ret;
1852
1853         /* check USB device interrupt */
1854         reg = readl(&priv_dev->regs->usb_ists);
1855         if (reg) {
1856                 /* After masking interrupts the new interrupts won't be
1857                  * reported in usb_ists/ep_ists. In order to not lose some
1858                  * of them driver disables only detected interrupts.
1859                  * They will be enabled ASAP after clearing source of
1860                  * interrupt. This an unusual behavior only applies to
1861                  * usb_ists register.
1862                  */
1863                 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1864                 /* mask deferred interrupt. */
1865                 writel(reg, &priv_dev->regs->usb_ien);
1866                 ret = IRQ_WAKE_THREAD;
1867         }
1868
1869         /* check endpoint interrupt */
1870         reg = readl(&priv_dev->regs->ep_ists);
1871         if (reg) {
1872                 writel(0, &priv_dev->regs->ep_ien);
1873                 ret = IRQ_WAKE_THREAD;
1874         }
1875
1876         return ret;
1877 }
1878
1879 /**
1880  * cdns3_device_thread_irq_handler- interrupt handler for device part
1881  * of controller
1882  *
1883  * @irq: irq number for cdns3 core device
1884  * @data: structure of cdns3
1885  *
1886  * Returns IRQ_HANDLED or IRQ_NONE
1887  */
1888 static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1889 {
1890         struct cdns3_device *priv_dev = data;
1891         irqreturn_t ret = IRQ_NONE;
1892         unsigned long flags;
1893         unsigned int bit;
1894         unsigned long reg;
1895
1896         spin_lock_irqsave(&priv_dev->lock, flags);
1897
1898         reg = readl(&priv_dev->regs->usb_ists);
1899         if (reg) {
1900                 writel(reg, &priv_dev->regs->usb_ists);
1901                 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1902                 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1903                 ret = IRQ_HANDLED;
1904         }
1905
1906         reg = readl(&priv_dev->regs->ep_ists);
1907
1908         /* handle default endpoint OUT */
1909         if (reg & EP_ISTS_EP_OUT0) {
1910                 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1911                 ret = IRQ_HANDLED;
1912         }
1913
1914         /* handle default endpoint IN */
1915         if (reg & EP_ISTS_EP_IN0) {
1916                 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1917                 ret = IRQ_HANDLED;
1918         }
1919
1920         /* check if interrupt from non default endpoint, if no exit */
1921         reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1922         if (!reg)
1923                 goto irqend;
1924
1925         for_each_set_bit(bit, &reg,
1926                          sizeof(u32) * BITS_PER_BYTE) {
1927                 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1928                 ret = IRQ_HANDLED;
1929         }
1930
1931         if (priv_dev->dev_ver < DEV_VER_V2 && priv_dev->using_streams)
1932                 cdns3_wa2_check_outq_status(priv_dev);
1933
1934 irqend:
1935         writel(~0, &priv_dev->regs->ep_ien);
1936         spin_unlock_irqrestore(&priv_dev->lock, flags);
1937
1938         return ret;
1939 }
1940
1941 /**
1942  * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1943  *
1944  * The real reservation will occur during write to EP_CFG register,
1945  * this function is used to check if the 'size' reservation is allowed.
1946  *
1947  * @priv_dev: extended gadget object
1948  * @size: the size (KB) for EP would like to allocate
1949  * @is_in: endpoint direction
1950  *
1951  * Return 0 if the required size can met or negative value on failure
1952  */
1953 static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1954                                           int size, int is_in)
1955 {
1956         int remained;
1957
1958         /* 2KB are reserved for EP0*/
1959         remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1960
1961         if (is_in) {
1962                 if (remained < size)
1963                         return -EPERM;
1964
1965                 priv_dev->onchip_used_size += size;
1966         } else {
1967                 int required;
1968
1969                 /**
1970                  *  ALL OUT EPs are shared the same chunk onchip memory, so
1971                  * driver checks if it already has assigned enough buffers
1972                  */
1973                 if (priv_dev->out_mem_is_allocated >= size)
1974                         return 0;
1975
1976                 required = size - priv_dev->out_mem_is_allocated;
1977
1978                 if (required > remained)
1979                         return -EPERM;
1980
1981                 priv_dev->out_mem_is_allocated += required;
1982                 priv_dev->onchip_used_size += required;
1983         }
1984
1985         return 0;
1986 }
1987
1988 static void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1989                                   struct cdns3_endpoint *priv_ep)
1990 {
1991         struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1992
1993         /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1994         if (priv_dev->dev_ver <= DEV_VER_V2)
1995                 writel(USB_CONF_DMULT, &regs->usb_conf);
1996
1997         if (priv_dev->dev_ver == DEV_VER_V2)
1998                 writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
1999
2000         if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
2001                 u32 mask;
2002
2003                 if (priv_ep->dir)
2004                         mask = BIT(priv_ep->num + 16);
2005                 else
2006                         mask = BIT(priv_ep->num);
2007
2008                 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
2009                         cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2010                         cdns3_set_register_bit(&regs->tdl_beh, mask);
2011                         cdns3_set_register_bit(&regs->tdl_beh2, mask);
2012                         cdns3_set_register_bit(&regs->dma_adv_td, mask);
2013                 }
2014
2015                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
2016                         cdns3_set_register_bit(&regs->tdl_from_trb, mask);
2017
2018                 cdns3_set_register_bit(&regs->dtrans, mask);
2019         }
2020 }
2021
2022 /**
2023  * cdns3_ep_config Configure hardware endpoint
2024  * @priv_ep: extended endpoint object
2025  * @enable: set EP_CFG_ENABLE bit in ep_cfg register.
2026  */
2027 int cdns3_ep_config(struct cdns3_endpoint *priv_ep, bool enable)
2028 {
2029         bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
2030         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2031         u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
2032         u32 max_packet_size = 0;
2033         u8 maxburst = 0;
2034         u32 ep_cfg = 0;
2035         u8 buffering;
2036         u8 mult = 0;
2037         int ret;
2038
2039         buffering = CDNS3_EP_BUF_SIZE - 1;
2040
2041         cdns3_configure_dmult(priv_dev, priv_ep);
2042
2043         switch (priv_ep->type) {
2044         case USB_ENDPOINT_XFER_INT:
2045                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
2046
2047                 if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
2048                     priv_dev->dev_ver > DEV_VER_V2)
2049                         ep_cfg |= EP_CFG_TDL_CHK;
2050                 break;
2051         case USB_ENDPOINT_XFER_BULK:
2052                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
2053
2054                 if ((priv_dev->dev_ver == DEV_VER_V2  && !priv_ep->dir) ||
2055                     priv_dev->dev_ver > DEV_VER_V2)
2056                         ep_cfg |= EP_CFG_TDL_CHK;
2057                 break;
2058         default:
2059                 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
2060                 mult = CDNS3_EP_ISO_HS_MULT - 1;
2061                 buffering = mult + 1;
2062         }
2063
2064         switch (priv_dev->gadget.speed) {
2065         case USB_SPEED_FULL:
2066                 max_packet_size = is_iso_ep ? 1023 : 64;
2067                 break;
2068         case USB_SPEED_HIGH:
2069                 max_packet_size = is_iso_ep ? 1024 : 512;
2070                 break;
2071         case USB_SPEED_SUPER:
2072                 /* It's limitation that driver assumes in driver. */
2073                 mult = 0;
2074                 max_packet_size = 1024;
2075                 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2076                         maxburst = CDNS3_EP_ISO_SS_BURST - 1;
2077                         buffering = (mult + 1) *
2078                                     (maxburst + 1);
2079
2080                         if (priv_ep->interval > 1)
2081                                 buffering++;
2082                 } else {
2083                         maxburst = CDNS3_EP_BUF_SIZE - 1;
2084                 }
2085                 break;
2086         default:
2087                 /* all other speed are not supported */
2088                 return -EINVAL;
2089         }
2090
2091         if (max_packet_size == 1024)
2092                 priv_ep->trb_burst_size = 128;
2093         else if (max_packet_size >= 512)
2094                 priv_ep->trb_burst_size = 64;
2095         else
2096                 priv_ep->trb_burst_size = 16;
2097
2098         /* onchip buffer is only allocated before configuration */
2099         if (!priv_dev->hw_configured_flag) {
2100                 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
2101                                                      !!priv_ep->dir);
2102                 if (ret) {
2103                         dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
2104                         return ret;
2105                 }
2106         }
2107
2108         if (enable)
2109                 ep_cfg |= EP_CFG_ENABLE;
2110
2111         if (priv_ep->use_streams && priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2112                 if (priv_dev->dev_ver >= DEV_VER_V3) {
2113                         u32 mask = BIT(priv_ep->num + (priv_ep->dir ? 16 : 0));
2114
2115                         /*
2116                          * Stream capable endpoints are handled by using ep_tdl
2117                          * register. Other endpoints use TDL from TRB feature.
2118                          */
2119                         cdns3_clear_register_bit(&priv_dev->regs->tdl_from_trb,
2120                                                  mask);
2121                 }
2122
2123                 /*  Enable Stream Bit TDL chk and SID chk */
2124                 ep_cfg |=  EP_CFG_STREAM_EN | EP_CFG_TDL_CHK | EP_CFG_SID_CHK;
2125         }
2126
2127         ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
2128                   EP_CFG_MULT(mult) |
2129                   EP_CFG_BUFFERING(buffering) |
2130                   EP_CFG_MAXBURST(maxburst);
2131
2132         cdns3_select_ep(priv_dev, bEndpointAddress);
2133         writel(ep_cfg, &priv_dev->regs->ep_cfg);
2134         priv_ep->flags |= EP_CONFIGURED;
2135
2136         dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
2137                 priv_ep->name, ep_cfg);
2138
2139         return 0;
2140 }
2141
2142 /* Find correct direction for HW endpoint according to description */
2143 static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
2144                                    struct cdns3_endpoint *priv_ep)
2145 {
2146         return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
2147                (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
2148 }
2149
2150 static struct
2151 cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
2152                                         struct usb_endpoint_descriptor *desc)
2153 {
2154         struct usb_ep *ep;
2155         struct cdns3_endpoint *priv_ep;
2156
2157         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2158                 unsigned long num;
2159                 int ret;
2160                 /* ep name pattern likes epXin or epXout */
2161                 char c[2] = {ep->name[2], '\0'};
2162
2163                 ret = kstrtoul(c, 10, &num);
2164                 if (ret)
2165                         return ERR_PTR(ret);
2166
2167                 priv_ep = ep_to_cdns3_ep(ep);
2168                 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
2169                         if (!(priv_ep->flags & EP_CLAIMED)) {
2170                                 priv_ep->num  = num;
2171                                 return priv_ep;
2172                         }
2173                 }
2174         }
2175
2176         return ERR_PTR(-ENOENT);
2177 }
2178
2179 /*
2180  *  Cadence IP has one limitation that all endpoints must be configured
2181  * (Type & MaxPacketSize) before setting configuration through hardware
2182  * register, it means we can't change endpoints configuration after
2183  * set_configuration.
2184  *
2185  * This function set EP_CLAIMED flag which is added when the gadget driver
2186  * uses usb_ep_autoconfig to configure specific endpoint;
2187  * When the udc driver receives set_configurion request,
2188  * it goes through all claimed endpoints, and configure all endpoints
2189  * accordingly.
2190  *
2191  * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
2192  * ep_cfg register which can be changed after set_configuration, and do
2193  * some software operation accordingly.
2194  */
2195 static struct
2196 usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
2197                               struct usb_endpoint_descriptor *desc,
2198                               struct usb_ss_ep_comp_descriptor *comp_desc)
2199 {
2200         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2201         struct cdns3_endpoint *priv_ep;
2202         unsigned long flags;
2203
2204         priv_ep = cdns3_find_available_ep(priv_dev, desc);
2205         if (IS_ERR(priv_ep)) {
2206                 dev_err(priv_dev->dev, "no available ep\n");
2207                 return NULL;
2208         }
2209
2210         dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
2211
2212         spin_lock_irqsave(&priv_dev->lock, flags);
2213         priv_ep->endpoint.desc = desc;
2214         priv_ep->dir  = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
2215         priv_ep->type = usb_endpoint_type(desc);
2216         priv_ep->flags |= EP_CLAIMED;
2217         priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2218
2219         spin_unlock_irqrestore(&priv_dev->lock, flags);
2220         return &priv_ep->endpoint;
2221 }
2222
2223 /**
2224  * cdns3_gadget_ep_alloc_request Allocates request
2225  * @ep: endpoint object associated with request
2226  * @gfp_flags: gfp flags
2227  *
2228  * Returns allocated request address, NULL on allocation error
2229  */
2230 struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
2231                                                   gfp_t gfp_flags)
2232 {
2233         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2234         struct cdns3_request *priv_req;
2235
2236         priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
2237         if (!priv_req)
2238                 return NULL;
2239
2240         priv_req->priv_ep = priv_ep;
2241
2242         trace_cdns3_alloc_request(priv_req);
2243         return &priv_req->request;
2244 }
2245
2246 /**
2247  * cdns3_gadget_ep_free_request Free memory occupied by request
2248  * @ep: endpoint object associated with request
2249  * @request: request to free memory
2250  */
2251 void cdns3_gadget_ep_free_request(struct usb_ep *ep,
2252                                   struct usb_request *request)
2253 {
2254         struct cdns3_request *priv_req = to_cdns3_request(request);
2255
2256         if (priv_req->aligned_buf)
2257                 priv_req->aligned_buf->in_use = 0;
2258
2259         trace_cdns3_free_request(priv_req);
2260         kfree(priv_req);
2261 }
2262
2263 /**
2264  * cdns3_gadget_ep_enable Enable endpoint
2265  * @ep: endpoint object
2266  * @desc: endpoint descriptor
2267  *
2268  * Returns 0 on success, error code elsewhere
2269  */
2270 static int cdns3_gadget_ep_enable(struct usb_ep *ep,
2271                                   const struct usb_endpoint_descriptor *desc)
2272 {
2273         struct cdns3_endpoint *priv_ep;
2274         struct cdns3_device *priv_dev;
2275         const struct usb_ss_ep_comp_descriptor *comp_desc;
2276         u32 reg = EP_STS_EN_TRBERREN;
2277         u32 bEndpointAddress;
2278         unsigned long flags;
2279         int enable = 1;
2280         int ret = 0;
2281         int val;
2282
2283         priv_ep = ep_to_cdns3_ep(ep);
2284         priv_dev = priv_ep->cdns3_dev;
2285         comp_desc = priv_ep->endpoint.comp_desc;
2286
2287         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
2288                 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
2289                 return -EINVAL;
2290         }
2291
2292         if (!desc->wMaxPacketSize) {
2293                 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
2294                 return -EINVAL;
2295         }
2296
2297         if (dev_WARN_ONCE(priv_dev->dev, priv_ep->flags & EP_ENABLED,
2298                           "%s is already enabled\n", priv_ep->name))
2299                 return 0;
2300
2301         spin_lock_irqsave(&priv_dev->lock, flags);
2302
2303         priv_ep->endpoint.desc = desc;
2304         priv_ep->type = usb_endpoint_type(desc);
2305         priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
2306
2307         if (priv_ep->interval > ISO_MAX_INTERVAL &&
2308             priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
2309                 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
2310                         ISO_MAX_INTERVAL);
2311
2312                 ret =  -EINVAL;
2313                 goto exit;
2314         }
2315
2316         bEndpointAddress = priv_ep->num | priv_ep->dir;
2317         cdns3_select_ep(priv_dev, bEndpointAddress);
2318
2319         /*
2320          * For some versions of controller at some point during ISO OUT traffic
2321          * DMA reads Transfer Ring for the EP which has never got doorbell.
2322          * This issue was detected only on simulation, but to avoid this issue
2323          * driver add protection against it. To fix it driver enable ISO OUT
2324          * endpoint before setting DRBL. This special treatment of ISO OUT
2325          * endpoints are recommended by controller specification.
2326          */
2327         if (priv_ep->type == USB_ENDPOINT_XFER_ISOC  && !priv_ep->dir)
2328                 enable = 0;
2329
2330         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
2331                 /*
2332                  * Enable stream support (SS mode) related interrupts
2333                  * in EP_STS_EN Register
2334                  */
2335                 if (priv_dev->gadget.speed >= USB_SPEED_SUPER) {
2336                         reg |= EP_STS_EN_IOTEN | EP_STS_EN_PRIMEEEN |
2337                                 EP_STS_EN_SIDERREN | EP_STS_EN_MD_EXITEN |
2338                                 EP_STS_EN_STREAMREN;
2339                         priv_ep->use_streams = true;
2340                         ret = cdns3_ep_config(priv_ep, enable);
2341                         priv_dev->using_streams |= true;
2342                 }
2343         } else {
2344                 ret = cdns3_ep_config(priv_ep, enable);
2345         }
2346
2347         if (ret)
2348                 goto exit;
2349
2350         ret = cdns3_allocate_trb_pool(priv_ep);
2351         if (ret)
2352                 goto exit;
2353
2354         bEndpointAddress = priv_ep->num | priv_ep->dir;
2355         cdns3_select_ep(priv_dev, bEndpointAddress);
2356
2357         trace_cdns3_gadget_ep_enable(priv_ep);
2358
2359         writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2360
2361         ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2362                                         !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2363                                         1, 1000);
2364
2365         if (unlikely(ret)) {
2366                 cdns3_free_trb_pool(priv_ep);
2367                 ret =  -EINVAL;
2368                 goto exit;
2369         }
2370
2371         /* enable interrupt for selected endpoint */
2372         cdns3_set_register_bit(&priv_dev->regs->ep_ien,
2373                                BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
2374
2375         if (priv_dev->dev_ver < DEV_VER_V2)
2376                 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
2377
2378         writel(reg, &priv_dev->regs->ep_sts_en);
2379
2380         ep->desc = desc;
2381         priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
2382                             EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
2383         priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
2384         priv_ep->wa1_set = 0;
2385         priv_ep->enqueue = 0;
2386         priv_ep->dequeue = 0;
2387         reg = readl(&priv_dev->regs->ep_sts);
2388         priv_ep->pcs = !!EP_STS_CCS(reg);
2389         priv_ep->ccs = !!EP_STS_CCS(reg);
2390         /* one TRB is reserved for link TRB used in DMULT mode*/
2391         priv_ep->free_trbs = priv_ep->num_trbs - 1;
2392 exit:
2393         spin_unlock_irqrestore(&priv_dev->lock, flags);
2394
2395         return ret;
2396 }
2397
2398 /**
2399  * cdns3_gadget_ep_disable Disable endpoint
2400  * @ep: endpoint object
2401  *
2402  * Returns 0 on success, error code elsewhere
2403  */
2404 static int cdns3_gadget_ep_disable(struct usb_ep *ep)
2405 {
2406         struct cdns3_endpoint *priv_ep;
2407         struct cdns3_request *priv_req;
2408         struct cdns3_device *priv_dev;
2409         struct usb_request *request;
2410         unsigned long flags;
2411         int ret = 0;
2412         u32 ep_cfg;
2413         int val;
2414
2415         if (!ep) {
2416                 pr_err("usbss: invalid parameters\n");
2417                 return -EINVAL;
2418         }
2419
2420         priv_ep = ep_to_cdns3_ep(ep);
2421         priv_dev = priv_ep->cdns3_dev;
2422
2423         if (dev_WARN_ONCE(priv_dev->dev, !(priv_ep->flags & EP_ENABLED),
2424                           "%s is already disabled\n", priv_ep->name))
2425                 return 0;
2426
2427         spin_lock_irqsave(&priv_dev->lock, flags);
2428
2429         trace_cdns3_gadget_ep_disable(priv_ep);
2430
2431         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2432
2433         ep_cfg = readl(&priv_dev->regs->ep_cfg);
2434         ep_cfg &= ~EP_CFG_ENABLE;
2435         writel(ep_cfg, &priv_dev->regs->ep_cfg);
2436
2437         /**
2438          * Driver needs some time before resetting endpoint.
2439          * It need waits for clearing DBUSY bit or for timeout expired.
2440          * 10us is enough time for controller to stop transfer.
2441          */
2442         readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
2443                                   !(val & EP_STS_DBUSY), 1, 10);
2444         writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2445
2446         readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2447                                   !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
2448                                   1, 1000);
2449         if (unlikely(ret))
2450                 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
2451                         priv_ep->name);
2452
2453         while (!list_empty(&priv_ep->pending_req_list)) {
2454                 request = cdns3_next_request(&priv_ep->pending_req_list);
2455
2456                 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2457                                       -ESHUTDOWN);
2458         }
2459
2460         while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
2461                 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
2462
2463                 kfree(priv_req->request.buf);
2464                 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
2465                                              &priv_req->request);
2466                 list_del_init(&priv_req->list);
2467                 --priv_ep->wa2_counter;
2468         }
2469
2470         while (!list_empty(&priv_ep->deferred_req_list)) {
2471                 request = cdns3_next_request(&priv_ep->deferred_req_list);
2472
2473                 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
2474                                       -ESHUTDOWN);
2475         }
2476
2477         priv_ep->descmis_req = NULL;
2478
2479         ep->desc = NULL;
2480         priv_ep->flags &= ~EP_ENABLED;
2481         priv_ep->use_streams = false;
2482
2483         spin_unlock_irqrestore(&priv_dev->lock, flags);
2484
2485         return ret;
2486 }
2487
2488 /**
2489  * cdns3_gadget_ep_queue Transfer data on endpoint
2490  * @ep: endpoint object
2491  * @request: request object
2492  * @gfp_flags: gfp flags
2493  *
2494  * Returns 0 on success, error code elsewhere
2495  */
2496 static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
2497                                    struct usb_request *request,
2498                                    gfp_t gfp_flags)
2499 {
2500         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2501         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2502         struct cdns3_request *priv_req;
2503         int ret = 0;
2504
2505         request->actual = 0;
2506         request->status = -EINPROGRESS;
2507         priv_req = to_cdns3_request(request);
2508         trace_cdns3_ep_queue(priv_req);
2509
2510         if (priv_dev->dev_ver < DEV_VER_V2) {
2511                 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
2512                                                 priv_req);
2513
2514                 if (ret == EINPROGRESS)
2515                         return 0;
2516         }
2517
2518         ret = cdns3_prepare_aligned_request_buf(priv_req);
2519         if (ret < 0)
2520                 return ret;
2521
2522         ret = usb_gadget_map_request_by_dev(priv_dev->sysdev, request,
2523                                             usb_endpoint_dir_in(ep->desc));
2524         if (ret)
2525                 return ret;
2526
2527         list_add_tail(&request->list, &priv_ep->deferred_req_list);
2528
2529         /*
2530          * For stream capable endpoint if prime irq flag is set then only start
2531          * request.
2532          * If hardware endpoint configuration has not been set yet then
2533          * just queue request in deferred list. Transfer will be started in
2534          * cdns3_set_hw_configuration.
2535          */
2536         if (!request->stream_id) {
2537                 if (priv_dev->hw_configured_flag &&
2538                     !(priv_ep->flags & EP_STALLED) &&
2539                     !(priv_ep->flags & EP_STALL_PENDING))
2540                         cdns3_start_all_request(priv_dev, priv_ep);
2541         } else {
2542                 if (priv_dev->hw_configured_flag && priv_ep->prime_flag)
2543                         cdns3_start_all_request(priv_dev, priv_ep);
2544         }
2545
2546         return 0;
2547 }
2548
2549 static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2550                                  gfp_t gfp_flags)
2551 {
2552         struct usb_request *zlp_request;
2553         struct cdns3_endpoint *priv_ep;
2554         struct cdns3_device *priv_dev;
2555         unsigned long flags;
2556         int ret;
2557
2558         if (!request || !ep)
2559                 return -EINVAL;
2560
2561         priv_ep = ep_to_cdns3_ep(ep);
2562         priv_dev = priv_ep->cdns3_dev;
2563
2564         spin_lock_irqsave(&priv_dev->lock, flags);
2565
2566         ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2567
2568         if (ret == 0 && request->zero && request->length &&
2569             (request->length % ep->maxpacket == 0)) {
2570                 struct cdns3_request *priv_req;
2571
2572                 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2573                 zlp_request->buf = priv_dev->zlp_buf;
2574                 zlp_request->length = 0;
2575
2576                 priv_req = to_cdns3_request(zlp_request);
2577                 priv_req->flags |= REQUEST_ZLP;
2578
2579                 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2580                         priv_ep->name);
2581                 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2582         }
2583
2584         spin_unlock_irqrestore(&priv_dev->lock, flags);
2585         return ret;
2586 }
2587
2588 /**
2589  * cdns3_gadget_ep_dequeue Remove request from transfer queue
2590  * @ep: endpoint object associated with request
2591  * @request: request object
2592  *
2593  * Returns 0 on success, error code elsewhere
2594  */
2595 int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2596                             struct usb_request *request)
2597 {
2598         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2599         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2600         struct usb_request *req, *req_temp;
2601         struct cdns3_request *priv_req;
2602         struct cdns3_trb *link_trb;
2603         u8 req_on_hw_ring = 0;
2604         unsigned long flags;
2605         int ret = 0;
2606
2607         if (!ep || !request || !ep->desc)
2608                 return -EINVAL;
2609
2610         spin_lock_irqsave(&priv_dev->lock, flags);
2611
2612         priv_req = to_cdns3_request(request);
2613
2614         trace_cdns3_ep_dequeue(priv_req);
2615
2616         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2617
2618         list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2619                                  list) {
2620                 if (request == req) {
2621                         req_on_hw_ring = 1;
2622                         goto found;
2623                 }
2624         }
2625
2626         list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2627                                  list) {
2628                 if (request == req)
2629                         goto found;
2630         }
2631
2632         goto not_found;
2633
2634 found:
2635         link_trb = priv_req->trb;
2636
2637         /* Update ring only if removed request is on pending_req_list list */
2638         if (req_on_hw_ring && link_trb) {
2639                 link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2640                         ((priv_req->end_trb + 1) * TRB_SIZE)));
2641                 link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2642                                     TRB_TYPE(TRB_LINK) | TRB_CHAIN);
2643
2644                 if (priv_ep->wa1_trb == priv_req->trb)
2645                         cdns3_wa1_restore_cycle_bit(priv_ep);
2646         }
2647
2648         cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2649
2650 not_found:
2651         spin_unlock_irqrestore(&priv_dev->lock, flags);
2652         return ret;
2653 }
2654
2655 /**
2656  * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
2657  * Should be called after acquiring spin_lock and selecting ep
2658  * @priv_ep: endpoint object to set stall on.
2659  */
2660 void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2661 {
2662         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2663
2664         trace_cdns3_halt(priv_ep, 1, 0);
2665
2666         if (!(priv_ep->flags & EP_STALLED)) {
2667                 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2668
2669                 if (!(ep_sts_reg & EP_STS_DBUSY))
2670                         cdns3_ep_stall_flush(priv_ep);
2671                 else
2672                         priv_ep->flags |= EP_STALL_PENDING;
2673         }
2674 }
2675
2676 /**
2677  * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
2678  * Should be called after acquiring spin_lock and selecting ep
2679  * @priv_ep: endpoint object to clear stall on
2680  */
2681 int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2682 {
2683         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2684         struct usb_request *request;
2685         struct cdns3_request *priv_req;
2686         struct cdns3_trb *trb = NULL;
2687         int ret;
2688         int val;
2689
2690         trace_cdns3_halt(priv_ep, 0, 0);
2691
2692         request = cdns3_next_request(&priv_ep->pending_req_list);
2693         if (request) {
2694                 priv_req = to_cdns3_request(request);
2695                 trb = priv_req->trb;
2696                 if (trb)
2697                         trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2698         }
2699
2700         writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2701
2702         /* wait for EPRST cleared */
2703         ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2704                                         !(val & EP_CMD_EPRST), 1, 100);
2705         if (ret)
2706                 return -EINVAL;
2707
2708         priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2709
2710         if (request) {
2711                 if (trb)
2712                         trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2713
2714                 cdns3_rearm_transfer(priv_ep, 1);
2715         }
2716
2717         cdns3_start_all_request(priv_dev, priv_ep);
2718         return ret;
2719 }
2720
2721 /**
2722  * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
2723  * @ep: endpoint object to set/clear stall on
2724  * @value: 1 for set stall, 0 for clear stall
2725  *
2726  * Returns 0 on success, error code elsewhere
2727  */
2728 int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2729 {
2730         struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2731         struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2732         unsigned long flags;
2733         int ret = 0;
2734
2735         if (!(priv_ep->flags & EP_ENABLED))
2736                 return -EPERM;
2737
2738         spin_lock_irqsave(&priv_dev->lock, flags);
2739
2740         cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2741
2742         if (!value) {
2743                 priv_ep->flags &= ~EP_WEDGE;
2744                 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2745         } else {
2746                 __cdns3_gadget_ep_set_halt(priv_ep);
2747         }
2748
2749         spin_unlock_irqrestore(&priv_dev->lock, flags);
2750
2751         return ret;
2752 }
2753
2754 extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2755
2756 static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2757         .enable = cdns3_gadget_ep_enable,
2758         .disable = cdns3_gadget_ep_disable,
2759         .alloc_request = cdns3_gadget_ep_alloc_request,
2760         .free_request = cdns3_gadget_ep_free_request,
2761         .queue = cdns3_gadget_ep_queue,
2762         .dequeue = cdns3_gadget_ep_dequeue,
2763         .set_halt = cdns3_gadget_ep_set_halt,
2764         .set_wedge = cdns3_gadget_ep_set_wedge,
2765 };
2766
2767 /**
2768  * cdns3_gadget_get_frame Returns number of actual ITP frame
2769  * @gadget: gadget object
2770  *
2771  * Returns number of actual ITP frame
2772  */
2773 static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2774 {
2775         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2776
2777         return readl(&priv_dev->regs->usb_itpn);
2778 }
2779
2780 int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2781 {
2782         enum usb_device_speed speed;
2783
2784         speed = cdns3_get_speed(priv_dev);
2785
2786         if (speed >= USB_SPEED_SUPER)
2787                 return 0;
2788
2789         /* Start driving resume signaling to indicate remote wakeup. */
2790         writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2791
2792         return 0;
2793 }
2794
2795 static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2796 {
2797         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2798         unsigned long flags;
2799         int ret = 0;
2800
2801         spin_lock_irqsave(&priv_dev->lock, flags);
2802         ret = __cdns3_gadget_wakeup(priv_dev);
2803         spin_unlock_irqrestore(&priv_dev->lock, flags);
2804         return ret;
2805 }
2806
2807 static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2808                                         int is_selfpowered)
2809 {
2810         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2811         unsigned long flags;
2812
2813         spin_lock_irqsave(&priv_dev->lock, flags);
2814         priv_dev->is_selfpowered = !!is_selfpowered;
2815         spin_unlock_irqrestore(&priv_dev->lock, flags);
2816         return 0;
2817 }
2818
2819 static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2820 {
2821         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2822
2823         if (is_on) {
2824                 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2825         } else {
2826                 writel(~0, &priv_dev->regs->ep_ists);
2827                 writel(~0, &priv_dev->regs->usb_ists);
2828                 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2829         }
2830
2831         return 0;
2832 }
2833
2834 static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2835 {
2836         struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2837         u32 reg;
2838
2839         cdns3_ep0_config(priv_dev);
2840
2841         /* enable interrupts for endpoint 0 (in and out) */
2842         writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
2843
2844         /*
2845          * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2846          * revision of controller.
2847          */
2848         if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2849                 reg = readl(&regs->dbg_link1);
2850
2851                 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2852                 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2853                        DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2854                 writel(reg, &regs->dbg_link1);
2855         }
2856
2857         /*
2858          * By default some platforms has set protected access to memory.
2859          * This cause problem with cache, so driver restore non-secure
2860          * access to memory.
2861          */
2862         reg = readl(&regs->dma_axi_ctrl);
2863         reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2864                DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2865         writel(reg, &regs->dma_axi_ctrl);
2866
2867         /* enable generic interrupt*/
2868         writel(USB_IEN_INIT, &regs->usb_ien);
2869         writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2870         /*  keep Fast Access bit */
2871         writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
2872
2873         cdns3_configure_dmult(priv_dev, NULL);
2874 }
2875
2876 /**
2877  * cdns3_gadget_udc_start Gadget start
2878  * @gadget: gadget object
2879  * @driver: driver which operates on this gadget
2880  *
2881  * Returns 0 on success, error code elsewhere
2882  */
2883 static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2884                                   struct usb_gadget_driver *driver)
2885 {
2886         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2887         unsigned long flags;
2888         enum usb_device_speed max_speed = driver->max_speed;
2889
2890         spin_lock_irqsave(&priv_dev->lock, flags);
2891         priv_dev->gadget_driver = driver;
2892
2893         /* limit speed if necessary */
2894         max_speed = min(driver->max_speed, gadget->max_speed);
2895
2896         switch (max_speed) {
2897         case USB_SPEED_FULL:
2898                 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2899                 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2900                 break;
2901         case USB_SPEED_HIGH:
2902                 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2903                 break;
2904         case USB_SPEED_SUPER:
2905                 break;
2906         default:
2907                 dev_err(priv_dev->dev,
2908                         "invalid maximum_speed parameter %d\n",
2909                         max_speed);
2910                 fallthrough;
2911         case USB_SPEED_UNKNOWN:
2912                 /* default to superspeed */
2913                 max_speed = USB_SPEED_SUPER;
2914                 break;
2915         }
2916
2917         cdns3_gadget_config(priv_dev);
2918         spin_unlock_irqrestore(&priv_dev->lock, flags);
2919         return 0;
2920 }
2921
2922 /**
2923  * cdns3_gadget_udc_stop Stops gadget
2924  * @gadget: gadget object
2925  *
2926  * Returns 0
2927  */
2928 static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2929 {
2930         struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2931         struct cdns3_endpoint *priv_ep;
2932         u32 bEndpointAddress;
2933         struct usb_ep *ep;
2934         int val;
2935
2936         priv_dev->gadget_driver = NULL;
2937
2938         priv_dev->onchip_used_size = 0;
2939         priv_dev->out_mem_is_allocated = 0;
2940         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2941
2942         list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2943                 priv_ep = ep_to_cdns3_ep(ep);
2944                 bEndpointAddress = priv_ep->num | priv_ep->dir;
2945                 cdns3_select_ep(priv_dev, bEndpointAddress);
2946                 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2947                 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2948                                           !(val & EP_CMD_EPRST), 1, 100);
2949
2950                 priv_ep->flags &= ~EP_CLAIMED;
2951         }
2952
2953         /* disable interrupt for device */
2954         writel(0, &priv_dev->regs->usb_ien);
2955         writel(0, &priv_dev->regs->usb_pwr);
2956         writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2957
2958         return 0;
2959 }
2960
2961 static const struct usb_gadget_ops cdns3_gadget_ops = {
2962         .get_frame = cdns3_gadget_get_frame,
2963         .wakeup = cdns3_gadget_wakeup,
2964         .set_selfpowered = cdns3_gadget_set_selfpowered,
2965         .pullup = cdns3_gadget_pullup,
2966         .udc_start = cdns3_gadget_udc_start,
2967         .udc_stop = cdns3_gadget_udc_stop,
2968         .match_ep = cdns3_gadget_match_ep,
2969 };
2970
2971 static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
2972 {
2973         int i;
2974
2975         /* ep0 OUT point to ep0 IN. */
2976         priv_dev->eps[16] = NULL;
2977
2978         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
2979                 if (priv_dev->eps[i]) {
2980                         cdns3_free_trb_pool(priv_dev->eps[i]);
2981                         devm_kfree(priv_dev->dev, priv_dev->eps[i]);
2982                 }
2983 }
2984
2985 /**
2986  * cdns3_init_eps Initializes software endpoints of gadget
2987  * @priv_dev: extended gadget object
2988  *
2989  * Returns 0 on success, error code elsewhere
2990  */
2991 static int cdns3_init_eps(struct cdns3_device *priv_dev)
2992 {
2993         u32 ep_enabled_reg, iso_ep_reg;
2994         struct cdns3_endpoint *priv_ep;
2995         int ep_dir, ep_number;
2996         u32 ep_mask;
2997         int ret = 0;
2998         int i;
2999
3000         /* Read it from USB_CAP3 to USB_CAP5 */
3001         ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
3002         iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
3003
3004         dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
3005
3006         for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
3007                 ep_dir = i >> 4;        /* i div 16 */
3008                 ep_number = i & 0xF;    /* i % 16 */
3009                 ep_mask = BIT(i);
3010
3011                 if (!(ep_enabled_reg & ep_mask))
3012                         continue;
3013
3014                 if (ep_dir && !ep_number) {
3015                         priv_dev->eps[i] = priv_dev->eps[0];
3016                         continue;
3017                 }
3018
3019                 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
3020                                        GFP_KERNEL);
3021                 if (!priv_ep)
3022                         goto err;
3023
3024                 /* set parent of endpoint object */
3025                 priv_ep->cdns3_dev = priv_dev;
3026                 priv_dev->eps[i] = priv_ep;
3027                 priv_ep->num = ep_number;
3028                 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
3029
3030                 if (!ep_number) {
3031                         ret = cdns3_init_ep0(priv_dev, priv_ep);
3032                         if (ret) {
3033                                 dev_err(priv_dev->dev, "Failed to init ep0\n");
3034                                 goto err;
3035                         }
3036                 } else {
3037                         snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
3038                                  ep_number, !!ep_dir ? "in" : "out");
3039                         priv_ep->endpoint.name = priv_ep->name;
3040
3041                         usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
3042                                                    CDNS3_EP_MAX_PACKET_LIMIT);
3043                         priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
3044                         priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
3045                         if (ep_dir)
3046                                 priv_ep->endpoint.caps.dir_in = 1;
3047                         else
3048                                 priv_ep->endpoint.caps.dir_out = 1;
3049
3050                         if (iso_ep_reg & ep_mask)
3051                                 priv_ep->endpoint.caps.type_iso = 1;
3052
3053                         priv_ep->endpoint.caps.type_bulk = 1;
3054                         priv_ep->endpoint.caps.type_int = 1;
3055
3056                         list_add_tail(&priv_ep->endpoint.ep_list,
3057                                       &priv_dev->gadget.ep_list);
3058                 }
3059
3060                 priv_ep->flags = 0;
3061
3062                 dev_dbg(priv_dev->dev, "Initialized  %s support: %s %s\n",
3063                          priv_ep->name,
3064                          priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
3065                          priv_ep->endpoint.caps.type_iso ? "ISO" : "");
3066
3067                 INIT_LIST_HEAD(&priv_ep->pending_req_list);
3068                 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
3069                 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
3070         }
3071
3072         return 0;
3073 err:
3074         cdns3_free_all_eps(priv_dev);
3075         return -ENOMEM;
3076 }
3077
3078 static void cdns3_gadget_release(struct device *dev)
3079 {
3080         struct cdns3_device *priv_dev = container_of(dev,
3081                         struct cdns3_device, gadget.dev);
3082
3083         kfree(priv_dev);
3084 }
3085
3086 void cdns3_gadget_exit(struct cdns3 *cdns)
3087 {
3088         struct cdns3_device *priv_dev;
3089
3090         priv_dev = cdns->gadget_dev;
3091
3092
3093         pm_runtime_mark_last_busy(cdns->dev);
3094         pm_runtime_put_autosuspend(cdns->dev);
3095
3096         usb_del_gadget(&priv_dev->gadget);
3097         devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
3098
3099         cdns3_free_all_eps(priv_dev);
3100
3101         while (!list_empty(&priv_dev->aligned_buf_list)) {
3102                 struct cdns3_aligned_buf *buf;
3103
3104                 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
3105                 dma_free_coherent(priv_dev->sysdev, buf->size,
3106                                   buf->buf,
3107                                   buf->dma);
3108
3109                 list_del(&buf->list);
3110                 kfree(buf);
3111         }
3112
3113         dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3114                           priv_dev->setup_dma);
3115
3116         kfree(priv_dev->zlp_buf);
3117         usb_put_gadget(&priv_dev->gadget);
3118         cdns->gadget_dev = NULL;
3119         cdns3_drd_gadget_off(cdns);
3120 }
3121
3122 static int cdns3_gadget_start(struct cdns3 *cdns)
3123 {
3124         struct cdns3_device *priv_dev;
3125         u32 max_speed;
3126         int ret;
3127
3128         priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
3129         if (!priv_dev)
3130                 return -ENOMEM;
3131
3132         usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3133                         cdns3_gadget_release);
3134         cdns->gadget_dev = priv_dev;
3135         priv_dev->sysdev = cdns->dev;
3136         priv_dev->dev = cdns->dev;
3137         priv_dev->regs = cdns->dev_regs;
3138
3139         device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
3140                                  &priv_dev->onchip_buffers);
3141
3142         if (priv_dev->onchip_buffers <=  0) {
3143                 u32 reg = readl(&priv_dev->regs->usb_cap2);
3144
3145                 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
3146         }
3147
3148         if (!priv_dev->onchip_buffers)
3149                 priv_dev->onchip_buffers = 256;
3150
3151         max_speed = usb_get_maximum_speed(cdns->dev);
3152
3153         /* Check the maximum_speed parameter */
3154         switch (max_speed) {
3155         case USB_SPEED_FULL:
3156         case USB_SPEED_HIGH:
3157         case USB_SPEED_SUPER:
3158                 break;
3159         default:
3160                 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
3161                         max_speed);
3162                 fallthrough;
3163         case USB_SPEED_UNKNOWN:
3164                 /* default to superspeed */
3165                 max_speed = USB_SPEED_SUPER;
3166                 break;
3167         }
3168
3169         /* fill gadget fields */
3170         priv_dev->gadget.max_speed = max_speed;
3171         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3172         priv_dev->gadget.ops = &cdns3_gadget_ops;
3173         priv_dev->gadget.name = "usb-ss-gadget";
3174         priv_dev->gadget.quirk_avoids_skb_reserve = 1;
3175         priv_dev->gadget.irq = cdns->dev_irq;
3176
3177         spin_lock_init(&priv_dev->lock);
3178         INIT_WORK(&priv_dev->pending_status_wq,
3179                   cdns3_pending_setup_status_handler);
3180
3181         INIT_WORK(&priv_dev->aligned_buf_wq,
3182                   cdns3_free_aligned_request_buf);
3183
3184         /* initialize endpoint container */
3185         INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
3186         INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
3187
3188         ret = cdns3_init_eps(priv_dev);
3189         if (ret) {
3190                 dev_err(priv_dev->dev, "Failed to create endpoints\n");
3191                 goto err1;
3192         }
3193
3194         /* allocate memory for setup packet buffer */
3195         priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
3196                                                  &priv_dev->setup_dma, GFP_DMA);
3197         if (!priv_dev->setup_buf) {
3198                 ret = -ENOMEM;
3199                 goto err2;
3200         }
3201
3202         priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
3203
3204         dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
3205                 readl(&priv_dev->regs->usb_cap6));
3206         dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
3207                 readl(&priv_dev->regs->usb_cap1));
3208         dev_dbg(priv_dev->dev, "On-Chip memory configuration: %08x\n",
3209                 readl(&priv_dev->regs->usb_cap2));
3210
3211         priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3212         if (priv_dev->dev_ver >= DEV_VER_V2)
3213                 priv_dev->gadget.sg_supported = 1;
3214
3215         priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
3216         if (!priv_dev->zlp_buf) {
3217                 ret = -ENOMEM;
3218                 goto err3;
3219         }
3220
3221         /* add USB gadget device */
3222         ret = usb_add_gadget(&priv_dev->gadget);
3223         if (ret < 0) {
3224                 dev_err(priv_dev->dev, "Failed to add gadget\n");
3225                 goto err4;
3226         }
3227
3228         return 0;
3229 err4:
3230         kfree(priv_dev->zlp_buf);
3231 err3:
3232         dma_free_coherent(priv_dev->sysdev, 8, priv_dev->setup_buf,
3233                           priv_dev->setup_dma);
3234 err2:
3235         cdns3_free_all_eps(priv_dev);
3236 err1:
3237         usb_put_gadget(&priv_dev->gadget);
3238         cdns->gadget_dev = NULL;
3239         return ret;
3240 }
3241
3242 static int __cdns3_gadget_init(struct cdns3 *cdns)
3243 {
3244         int ret = 0;
3245
3246         /* Ensure 32-bit DMA Mask in case we switched back from Host mode */
3247         ret = dma_set_mask_and_coherent(cdns->dev, DMA_BIT_MASK(32));
3248         if (ret) {
3249                 dev_err(cdns->dev, "Failed to set dma mask: %d\n", ret);
3250                 return ret;
3251         }
3252
3253         cdns3_drd_gadget_on(cdns);
3254         pm_runtime_get_sync(cdns->dev);
3255
3256         ret = cdns3_gadget_start(cdns);
3257         if (ret)
3258                 return ret;
3259
3260         /*
3261          * Because interrupt line can be shared with other components in
3262          * driver it can't use IRQF_ONESHOT flag here.
3263          */
3264         ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
3265                                         cdns3_device_irq_handler,
3266                                         cdns3_device_thread_irq_handler,
3267                                         IRQF_SHARED, dev_name(cdns->dev),
3268                                         cdns->gadget_dev);
3269
3270         if (ret)
3271                 goto err0;
3272
3273         return 0;
3274 err0:
3275         cdns3_gadget_exit(cdns);
3276         return ret;
3277 }
3278
3279 static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
3280 __must_hold(&cdns->lock)
3281 {
3282         struct cdns3_device *priv_dev = cdns->gadget_dev;
3283
3284         spin_unlock(&cdns->lock);
3285         cdns3_disconnect_gadget(priv_dev);
3286         spin_lock(&cdns->lock);
3287
3288         priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
3289         usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
3290         cdns3_hw_reset_eps_config(priv_dev);
3291
3292         /* disable interrupt for device */
3293         writel(0, &priv_dev->regs->usb_ien);
3294
3295         return 0;
3296 }
3297
3298 static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
3299 {
3300         struct cdns3_device *priv_dev = cdns->gadget_dev;
3301
3302         if (!priv_dev->gadget_driver)
3303                 return 0;
3304
3305         cdns3_gadget_config(priv_dev);
3306
3307         return 0;
3308 }
3309
3310 /**
3311  * cdns3_gadget_init - initialize device structure
3312  *
3313  * @cdns: cdns3 instance
3314  *
3315  * This function initializes the gadget.
3316  */
3317 int cdns3_gadget_init(struct cdns3 *cdns)
3318 {
3319         struct cdns3_role_driver *rdrv;
3320
3321         rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
3322         if (!rdrv)
3323                 return -ENOMEM;
3324
3325         rdrv->start     = __cdns3_gadget_init;
3326         rdrv->stop      = cdns3_gadget_exit;
3327         rdrv->suspend   = cdns3_gadget_suspend;
3328         rdrv->resume    = cdns3_gadget_resume;
3329         rdrv->state     = CDNS3_ROLE_STATE_INACTIVE;
3330         rdrv->name      = "gadget";
3331         cdns->roles[USB_ROLE_DEVICE] = rdrv;
3332
3333         return 0;
3334 }