1 // SPDX-License-Identifier: GPL-2.0
3 * uartlite.c: Serial driver for Xilinx uartlite serial controller
5 * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk>
6 * Copyright (C) 2007 Secret Lab Technologies Ltd.
9 #include <linux/platform_device.h>
10 #include <linux/module.h>
11 #include <linux/console.h>
12 #include <linux/serial.h>
13 #include <linux/serial_core.h>
14 #include <linux/tty.h>
15 #include <linux/tty_flip.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
18 #include <linux/init.h>
21 #include <linux/of_address.h>
22 #include <linux/of_device.h>
23 #include <linux/of_platform.h>
24 #include <linux/clk.h>
25 #include <linux/pm_runtime.h>
27 #define ULITE_NAME "ttyUL"
28 #define ULITE_MAJOR 204
29 #define ULITE_MINOR 187
30 #define ULITE_NR_UARTS CONFIG_SERIAL_UARTLITE_NR_UARTS
32 /* ---------------------------------------------------------------------
33 * Register definitions
35 * For register details see datasheet:
36 * http://www.xilinx.com/support/documentation/ip_documentation/opb_uartlite.pdf
41 #define ULITE_STATUS 0x08
42 #define ULITE_CONTROL 0x0c
44 #define ULITE_REGION 16
46 #define ULITE_STATUS_RXVALID 0x01
47 #define ULITE_STATUS_RXFULL 0x02
48 #define ULITE_STATUS_TXEMPTY 0x04
49 #define ULITE_STATUS_TXFULL 0x08
50 #define ULITE_STATUS_IE 0x10
51 #define ULITE_STATUS_OVERRUN 0x20
52 #define ULITE_STATUS_FRAME 0x40
53 #define ULITE_STATUS_PARITY 0x80
55 #define ULITE_CONTROL_RST_TX 0x01
56 #define ULITE_CONTROL_RST_RX 0x02
57 #define ULITE_CONTROL_IE 0x10
58 #define UART_AUTOSUSPEND_TIMEOUT 3000
60 /* Static pointer to console port */
61 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
62 static struct uart_port *console_port;
65 struct uartlite_data {
66 const struct uartlite_reg_ops *reg_ops;
68 struct uart_driver *ulite_uart_driver;
71 struct uartlite_reg_ops {
72 u32 (*in)(void __iomem *addr);
73 void (*out)(u32 val, void __iomem *addr);
76 static u32 uartlite_inbe32(void __iomem *addr)
78 return ioread32be(addr);
81 static void uartlite_outbe32(u32 val, void __iomem *addr)
83 iowrite32be(val, addr);
86 static const struct uartlite_reg_ops uartlite_be = {
87 .in = uartlite_inbe32,
88 .out = uartlite_outbe32,
91 static u32 uartlite_inle32(void __iomem *addr)
93 return ioread32(addr);
96 static void uartlite_outle32(u32 val, void __iomem *addr)
101 static const struct uartlite_reg_ops uartlite_le = {
102 .in = uartlite_inle32,
103 .out = uartlite_outle32,
106 static inline u32 uart_in32(u32 offset, struct uart_port *port)
108 struct uartlite_data *pdata = port->private_data;
110 return pdata->reg_ops->in(port->membase + offset);
113 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
115 struct uartlite_data *pdata = port->private_data;
117 pdata->reg_ops->out(val, port->membase + offset);
120 static struct uart_port ulite_ports[ULITE_NR_UARTS];
122 /* ---------------------------------------------------------------------
123 * Core UART driver operations
126 static int ulite_receive(struct uart_port *port, int stat)
128 struct tty_port *tport = &port->state->port;
129 unsigned char ch = 0;
130 char flag = TTY_NORMAL;
132 if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
133 | ULITE_STATUS_FRAME)) == 0)
137 if (stat & ULITE_STATUS_RXVALID) {
139 ch = uart_in32(ULITE_RX, port);
141 if (stat & ULITE_STATUS_PARITY)
142 port->icount.parity++;
145 if (stat & ULITE_STATUS_OVERRUN)
146 port->icount.overrun++;
148 if (stat & ULITE_STATUS_FRAME)
149 port->icount.frame++;
152 /* drop byte with parity error if IGNPAR specificed */
153 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
154 stat &= ~ULITE_STATUS_RXVALID;
156 stat &= port->read_status_mask;
158 if (stat & ULITE_STATUS_PARITY)
162 stat &= ~port->ignore_status_mask;
164 if (stat & ULITE_STATUS_RXVALID)
165 tty_insert_flip_char(tport, ch, flag);
167 if (stat & ULITE_STATUS_FRAME)
168 tty_insert_flip_char(tport, 0, TTY_FRAME);
170 if (stat & ULITE_STATUS_OVERRUN)
171 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
176 static int ulite_transmit(struct uart_port *port, int stat)
178 struct circ_buf *xmit = &port->state->xmit;
180 if (stat & ULITE_STATUS_TXFULL)
184 uart_out32(port->x_char, ULITE_TX, port);
190 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
193 uart_out32(xmit->buf[xmit->tail], ULITE_TX, port);
194 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
198 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
199 uart_write_wakeup(port);
204 static irqreturn_t ulite_isr(int irq, void *dev_id)
206 struct uart_port *port = dev_id;
207 int stat, busy, n = 0;
211 spin_lock_irqsave(&port->lock, flags);
212 stat = uart_in32(ULITE_STATUS, port);
213 busy = ulite_receive(port, stat);
214 busy |= ulite_transmit(port, stat);
215 spin_unlock_irqrestore(&port->lock, flags);
221 tty_flip_buffer_push(&port->state->port);
228 static unsigned int ulite_tx_empty(struct uart_port *port)
233 spin_lock_irqsave(&port->lock, flags);
234 ret = uart_in32(ULITE_STATUS, port);
235 spin_unlock_irqrestore(&port->lock, flags);
237 return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
240 static unsigned int ulite_get_mctrl(struct uart_port *port)
242 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
245 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
250 static void ulite_stop_tx(struct uart_port *port)
255 static void ulite_start_tx(struct uart_port *port)
257 ulite_transmit(port, uart_in32(ULITE_STATUS, port));
260 static void ulite_stop_rx(struct uart_port *port)
262 /* don't forward any more data (like !CREAD) */
263 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
264 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
267 static void ulite_break_ctl(struct uart_port *port, int ctl)
272 static int ulite_startup(struct uart_port *port)
274 struct uartlite_data *pdata = port->private_data;
277 ret = clk_enable(pdata->clk);
279 dev_err(port->dev, "Failed to enable clock\n");
283 ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
288 uart_out32(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX,
289 ULITE_CONTROL, port);
290 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
295 static void ulite_shutdown(struct uart_port *port)
297 struct uartlite_data *pdata = port->private_data;
299 uart_out32(0, ULITE_CONTROL, port);
300 uart_in32(ULITE_CONTROL, port); /* dummy */
301 free_irq(port->irq, port);
302 clk_disable(pdata->clk);
305 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
306 struct ktermios *old)
311 spin_lock_irqsave(&port->lock, flags);
313 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
314 | ULITE_STATUS_TXFULL;
316 if (termios->c_iflag & INPCK)
317 port->read_status_mask |=
318 ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
320 port->ignore_status_mask = 0;
321 if (termios->c_iflag & IGNPAR)
322 port->ignore_status_mask |= ULITE_STATUS_PARITY
323 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
325 /* ignore all characters if CREAD is not set */
326 if ((termios->c_cflag & CREAD) == 0)
327 port->ignore_status_mask |=
328 ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
329 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
332 baud = uart_get_baud_rate(port, termios, old, 0, 460800);
333 uart_update_timeout(port, termios->c_cflag, baud);
335 spin_unlock_irqrestore(&port->lock, flags);
338 static const char *ulite_type(struct uart_port *port)
340 return port->type == PORT_UARTLITE ? "uartlite" : NULL;
343 static void ulite_release_port(struct uart_port *port)
345 release_mem_region(port->mapbase, ULITE_REGION);
346 iounmap(port->membase);
347 port->membase = NULL;
350 static int ulite_request_port(struct uart_port *port)
352 struct uartlite_data *pdata = port->private_data;
355 pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
356 port, (unsigned long long) port->mapbase);
358 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
359 dev_err(port->dev, "Memory region busy\n");
363 port->membase = ioremap(port->mapbase, ULITE_REGION);
364 if (!port->membase) {
365 dev_err(port->dev, "Unable to map registers\n");
366 release_mem_region(port->mapbase, ULITE_REGION);
370 pdata->reg_ops = &uartlite_be;
371 ret = uart_in32(ULITE_CONTROL, port);
372 uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
373 ret = uart_in32(ULITE_STATUS, port);
374 /* Endianess detection */
375 if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
376 pdata->reg_ops = &uartlite_le;
381 static void ulite_config_port(struct uart_port *port, int flags)
383 if (!ulite_request_port(port))
384 port->type = PORT_UARTLITE;
387 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
389 /* we don't want the core code to modify any port params */
393 static void ulite_pm(struct uart_port *port, unsigned int state,
394 unsigned int oldstate)
397 pm_runtime_get_sync(port->dev);
399 pm_runtime_mark_last_busy(port->dev);
400 pm_runtime_put_autosuspend(port->dev);
404 #ifdef CONFIG_CONSOLE_POLL
405 static int ulite_get_poll_char(struct uart_port *port)
407 if (!(uart_in32(ULITE_STATUS, port) & ULITE_STATUS_RXVALID))
410 return uart_in32(ULITE_RX, port);
413 static void ulite_put_poll_char(struct uart_port *port, unsigned char ch)
415 while (uart_in32(ULITE_STATUS, port) & ULITE_STATUS_TXFULL)
418 /* write char to device */
419 uart_out32(ch, ULITE_TX, port);
423 static const struct uart_ops ulite_ops = {
424 .tx_empty = ulite_tx_empty,
425 .set_mctrl = ulite_set_mctrl,
426 .get_mctrl = ulite_get_mctrl,
427 .stop_tx = ulite_stop_tx,
428 .start_tx = ulite_start_tx,
429 .stop_rx = ulite_stop_rx,
430 .break_ctl = ulite_break_ctl,
431 .startup = ulite_startup,
432 .shutdown = ulite_shutdown,
433 .set_termios = ulite_set_termios,
435 .release_port = ulite_release_port,
436 .request_port = ulite_request_port,
437 .config_port = ulite_config_port,
438 .verify_port = ulite_verify_port,
440 #ifdef CONFIG_CONSOLE_POLL
441 .poll_get_char = ulite_get_poll_char,
442 .poll_put_char = ulite_put_poll_char,
446 /* ---------------------------------------------------------------------
447 * Console driver operations
450 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
451 static void ulite_console_wait_tx(struct uart_port *port)
454 unsigned long timeout;
457 * Spin waiting for TX fifo to have space available.
458 * When using the Microblaze Debug Module this can take up to 1s
460 timeout = jiffies + msecs_to_jiffies(1000);
462 val = uart_in32(ULITE_STATUS, port);
463 if ((val & ULITE_STATUS_TXFULL) == 0)
465 if (time_after(jiffies, timeout)) {
467 "timeout waiting for TX buffer empty\n");
474 static void ulite_console_putchar(struct uart_port *port, int ch)
476 ulite_console_wait_tx(port);
477 uart_out32(ch, ULITE_TX, port);
480 static void ulite_console_write(struct console *co, const char *s,
483 struct uart_port *port = console_port;
488 if (oops_in_progress) {
489 locked = spin_trylock_irqsave(&port->lock, flags);
491 spin_lock_irqsave(&port->lock, flags);
493 /* save and disable interrupt */
494 ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;
495 uart_out32(0, ULITE_CONTROL, port);
497 uart_console_write(port, s, count, ulite_console_putchar);
499 ulite_console_wait_tx(port);
501 /* restore interrupt state */
503 uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);
506 spin_unlock_irqrestore(&port->lock, flags);
509 static int ulite_console_setup(struct console *co, char *options)
511 struct uart_port *port;
520 /* Has the device been initialized yet? */
521 if (!port->mapbase) {
522 pr_debug("console on ttyUL%i not present\n", co->index);
526 /* not initialized yet? */
527 if (!port->membase) {
528 if (ulite_request_port(port))
533 uart_parse_options(options, &baud, &parity, &bits, &flow);
535 return uart_set_options(port, co, baud, parity, bits, flow);
538 static struct uart_driver ulite_uart_driver;
540 static struct console ulite_console = {
542 .write = ulite_console_write,
543 .device = uart_console_device,
544 .setup = ulite_console_setup,
545 .flags = CON_PRINTBUFFER,
546 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
547 .data = &ulite_uart_driver,
550 static void early_uartlite_putc(struct uart_port *port, int c)
553 * Limit how many times we'll spin waiting for TX FIFO status.
554 * This will prevent lockups if the base address is incorrectly
555 * set, or any other issue on the UARTLITE.
556 * This limit is pretty arbitrary, unless we are at about 10 baud
557 * we'll never timeout on a working UART.
560 unsigned retries = 1000000;
561 /* read status bit - 0x8 offset */
562 while (--retries && (readl(port->membase + 8) & (1 << 3)))
565 /* Only attempt the iowrite if we didn't timeout */
566 /* write to TX_FIFO - 0x4 offset */
568 writel(c & 0xff, port->membase + 4);
571 static void early_uartlite_write(struct console *console,
572 const char *s, unsigned n)
574 struct earlycon_device *device = console->data;
575 uart_console_write(&device->port, s, n, early_uartlite_putc);
578 static int __init early_uartlite_setup(struct earlycon_device *device,
581 if (!device->port.membase)
584 device->con->write = early_uartlite_write;
587 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
588 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
589 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
591 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
593 static struct uart_driver ulite_uart_driver = {
594 .owner = THIS_MODULE,
595 .driver_name = "uartlite",
596 .dev_name = ULITE_NAME,
597 .major = ULITE_MAJOR,
598 .minor = ULITE_MINOR,
599 .nr = ULITE_NR_UARTS,
600 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
601 .cons = &ulite_console,
605 /* ---------------------------------------------------------------------
606 * Port assignment functions (mapping devices to uart_port structures)
609 /** ulite_assign: register a uartlite device with the driver
611 * @dev: pointer to device structure
612 * @id: requested id number. Pass -1 for automatic port assignment
613 * @base: base address of uartlite registers
614 * @irq: irq number for uartlite
615 * @pdata: private data for uartlite
617 * Returns: 0 on success, <0 otherwise
619 static int ulite_assign(struct device *dev, int id, u32 base, int irq,
620 struct uartlite_data *pdata)
622 struct uart_port *port;
625 /* if id = -1; then scan for a free id and use that */
627 for (id = 0; id < ULITE_NR_UARTS; id++)
628 if (ulite_ports[id].mapbase == 0)
631 if (id < 0 || id >= ULITE_NR_UARTS) {
632 dev_err(dev, "%s%i too large\n", ULITE_NAME, id);
636 if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) {
637 dev_err(dev, "cannot assign to %s%i; it is already in use\n",
642 port = &ulite_ports[id];
644 spin_lock_init(&port->lock);
647 port->iotype = UPIO_MEM;
648 port->iobase = 1; /* mark port in use */
649 port->mapbase = base;
650 port->membase = NULL;
651 port->ops = &ulite_ops;
653 port->flags = UPF_BOOT_AUTOCONF;
655 port->type = PORT_UNKNOWN;
657 port->private_data = pdata;
659 dev_set_drvdata(dev, port);
661 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
663 * If console hasn't been found yet try to assign this port
664 * because it is required to be assigned for console setup function.
665 * If register_console() don't assign value, then console_port pointer
668 if (ulite_uart_driver.cons->index == -1)
672 /* Register the port */
673 rc = uart_add_one_port(&ulite_uart_driver, port);
675 dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc);
677 dev_set_drvdata(dev, NULL);
681 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
682 /* This is not port which is used for console that's why clean it up */
683 if (ulite_uart_driver.cons->index == -1)
690 /** ulite_release: register a uartlite device with the driver
692 * @dev: pointer to device structure
694 static int ulite_release(struct device *dev)
696 struct uart_port *port = dev_get_drvdata(dev);
700 struct uartlite_data *pdata = port->private_data;
702 rc = uart_remove_one_port(pdata->ulite_uart_driver, port);
703 dev_set_drvdata(dev, NULL);
711 * ulite_suspend - Stop the device.
713 * @dev: handle to the device structure.
716 static int __maybe_unused ulite_suspend(struct device *dev)
718 struct uart_port *port = dev_get_drvdata(dev);
721 struct uartlite_data *pdata = port->private_data;
723 uart_suspend_port(pdata->ulite_uart_driver, port);
730 * ulite_resume - Resume the device.
732 * @dev: handle to the device structure.
733 * Return: 0 on success, errno otherwise.
735 static int __maybe_unused ulite_resume(struct device *dev)
737 struct uart_port *port = dev_get_drvdata(dev);
740 struct uartlite_data *pdata = port->private_data;
742 uart_resume_port(pdata->ulite_uart_driver, port);
748 static int __maybe_unused ulite_runtime_suspend(struct device *dev)
750 struct uart_port *port = dev_get_drvdata(dev);
751 struct uartlite_data *pdata = port->private_data;
753 clk_disable(pdata->clk);
757 static int __maybe_unused ulite_runtime_resume(struct device *dev)
759 struct uart_port *port = dev_get_drvdata(dev);
760 struct uartlite_data *pdata = port->private_data;
762 clk_enable(pdata->clk);
765 /* ---------------------------------------------------------------------
766 * Platform bus binding
769 static const struct dev_pm_ops ulite_pm_ops = {
770 SET_SYSTEM_SLEEP_PM_OPS(ulite_suspend, ulite_resume)
771 SET_RUNTIME_PM_OPS(ulite_runtime_suspend,
772 ulite_runtime_resume, NULL)
775 #if defined(CONFIG_OF)
776 /* Match table for of_platform binding */
777 static const struct of_device_id ulite_of_match[] = {
778 { .compatible = "xlnx,opb-uartlite-1.00.b", },
779 { .compatible = "xlnx,xps-uartlite-1.00.a", },
782 MODULE_DEVICE_TABLE(of, ulite_of_match);
783 #endif /* CONFIG_OF */
785 static int ulite_probe(struct platform_device *pdev)
787 struct resource *res;
788 struct uartlite_data *pdata;
794 prop = of_get_property(pdev->dev.of_node, "port-number", NULL);
796 id = be32_to_cpup(prop);
799 /* Look for a serialN alias */
800 id = of_alias_get_id(pdev->dev.of_node, "serial");
805 if (!ulite_uart_driver.state) {
806 dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n");
807 ret = uart_register_driver(&ulite_uart_driver);
809 dev_err(&pdev->dev, "Failed to register driver\n");
814 pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
819 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
823 irq = platform_get_irq(pdev, 0);
827 pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
828 if (IS_ERR(pdata->clk)) {
829 if (PTR_ERR(pdata->clk) != -ENOENT)
830 return PTR_ERR(pdata->clk);
833 * Clock framework support is optional, continue on
834 * anyways if we don't find a matching clock.
839 pdata->ulite_uart_driver = &ulite_uart_driver;
840 ret = clk_prepare_enable(pdata->clk);
842 dev_err(&pdev->dev, "Failed to prepare clock\n");
846 pm_runtime_use_autosuspend(&pdev->dev);
847 pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT);
848 pm_runtime_set_active(&pdev->dev);
849 pm_runtime_enable(&pdev->dev);
851 ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata);
853 pm_runtime_mark_last_busy(&pdev->dev);
854 pm_runtime_put_autosuspend(&pdev->dev);
859 static int ulite_remove(struct platform_device *pdev)
861 struct uart_port *port = dev_get_drvdata(&pdev->dev);
862 struct uartlite_data *pdata = port->private_data;
865 clk_unprepare(pdata->clk);
866 rc = ulite_release(&pdev->dev);
867 pm_runtime_disable(&pdev->dev);
868 pm_runtime_set_suspended(&pdev->dev);
869 pm_runtime_dont_use_autosuspend(&pdev->dev);
873 /* work with hotplug and coldplug */
874 MODULE_ALIAS("platform:uartlite");
876 static struct platform_driver ulite_platform_driver = {
877 .probe = ulite_probe,
878 .remove = ulite_remove,
881 .of_match_table = of_match_ptr(ulite_of_match),
886 /* ---------------------------------------------------------------------
887 * Module setup/teardown
890 static int __init ulite_init(void)
893 pr_debug("uartlite: calling platform_driver_register()\n");
894 return platform_driver_register(&ulite_platform_driver);
897 static void __exit ulite_exit(void)
899 platform_driver_unregister(&ulite_platform_driver);
900 uart_unregister_driver(&ulite_uart_driver);
903 module_init(ulite_init);
904 module_exit(ulite_exit);
906 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
907 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
908 MODULE_LICENSE("GPL");