drivers/tty/serial/sunsu.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   4  *
   5  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   6  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   7  *
   8  * This is mainly a variation of 8250.c, credits go to authors mentioned
   9  * therein.  In fact this driver should be merged into the generic 8250.c
  10  * infrastructure perhaps using a 8250_sparc.c module.
  11  *
  12  * Fixed to use tty_get_baud_rate().
  13  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  14  *
  15  * Converted to new 2.5.x UART layer.
  16  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/spinlock.h>
  22 #include <linux/errno.h>
  23 #include <linux/tty.h>
  24 #include <linux/tty_flip.h>
  25 #include <linux/major.h>
  26 #include <linux/string.h>
  27 #include <linux/ptrace.h>
  28 #include <linux/ioport.h>
  29 #include <linux/circ_buf.h>
  30 #include <linux/serial.h>
  31 #include <linux/sysrq.h>
  32 #include <linux/console.h>
  33 #include <linux/slab.h>
  34 #ifdef CONFIG_SERIO
  35 #include <linux/serio.h>
  36 #endif
  37 #include <linux/serial_reg.h>
  38 #include <linux/init.h>
  39 #include <linux/delay.h>
  40 #include <linux/of_device.h>
  41
  42 #include <asm/io.h>
  43 #include <asm/irq.h>
  44 #include <asm/prom.h>
  45 #include <asm/setup.h>
  46
  47 #include <linux/serial_core.h>
  48 #include <linux/sunserialcore.h>
  49
  50 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  51  * in a UART clock of 1.8462 MHz.
  52  */
  53 #define SU_BASE_BAUD    (1846200 / 16)
  54
  55 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  56 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  57
  58 struct serial_uart_config {
  59         char    *name;
  60         int     dfl_xmit_fifo_size;
  61         int     flags;
  62 };
  63
  64 /*
  65  * Here we define the default xmit fifo size used for each type of UART.
  66  */
  67 static const struct serial_uart_config uart_config[] = {
  68         { "unknown",    1,      0 },
  69         { "8250",       1,      0 },
  70         { "16450",      1,      0 },
  71         { "16550",      1,      0 },
  72         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  73         { "Cirrus",     1,      0 },
  74         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  75         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  77         { "Startech",   1,      0 },
  78         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  79         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  80         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  81         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  82 };
  83
  84 struct uart_sunsu_port {
  85         struct uart_port        port;
  86         unsigned char           acr;
  87         unsigned char           ier;
  88         unsigned short          rev;
  89         unsigned char           lcr;
  90         unsigned int            lsr_break_flag;
  91         unsigned int            cflag;
  92
  93         /* Probing information.  */
  94         enum su_type            su_type;
  95         unsigned int            type_probed;    /* XXX Stupid */
  96         unsigned long           reg_size;
  97
  98 #ifdef CONFIG_SERIO
  99         struct serio            serio;
 100         int                     serio_open;
 101 #endif
 102 };
 103
 104 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 105 {
 106         offset <<= up->port.regshift;
 107
 108         switch (up->port.iotype) {
 109         case UPIO_HUB6:
 110                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 111                 return inb(up->port.iobase + 1);
 112
 113         case UPIO_MEM:
 114                 return readb(up->port.membase + offset);
 115
 116         default:
 117                 return inb(up->port.iobase + offset);
 118         }
 119 }
 120
 121 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 122 {
 123 #ifndef CONFIG_SPARC64
 124         /*
 125          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 126          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 127          * gate outputs a logical one. Since we use level triggered interrupts
 128          * we have lockup and watchdog reset. We cannot mask IRQ because
 129          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 130          * This problem is similar to what Alpha people suffer, see serial.c.
 131          */
 132         if (offset == UART_MCR)
 133                 value |= UART_MCR_OUT2;
 134 #endif
 135         offset <<= up->port.regshift;
 136
 137         switch (up->port.iotype) {
 138         case UPIO_HUB6:
 139                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 140                 outb(value, up->port.iobase + 1);
 141                 break;
 142
 143         case UPIO_MEM:
 144                 writeb(value, up->port.membase + offset);
 145                 break;
 146
 147         default:
 148                 outb(value, up->port.iobase + offset);
 149         }
 150 }
 151
 152 /*
 153  * We used to support using pause I/O for certain machines.  We
 154  * haven't supported this for a while, but just in case it's badly
 155  * needed for certain old 386 machines, I've left these #define's
 156  * in....
 157  */
 158 #define serial_inp(up, offset)          serial_in(up, offset)
 159 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
 160
 161
 162 /*
 163  * For the 16C950
 164  */
 165 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 166 {
 167         serial_out(up, UART_SCR, offset);
 168         serial_out(up, UART_ICR, value);
 169 }
 170
 171 #if 0 /* Unused currently */
 172 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 173 {
 174         unsigned int value;
 175
 176         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 177         serial_out(up, UART_SCR, offset);
 178         value = serial_in(up, UART_ICR);
 179         serial_icr_write(up, UART_ACR, up->acr);
 180
 181         return value;
 182 }
 183 #endif
 184
 185 #ifdef CONFIG_SERIAL_8250_RSA
 186 /*
 187  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 188  * We set the port uart clock rate if we succeed.
 189  */
 190 static int __enable_rsa(struct uart_sunsu_port *up)
 191 {
 192         unsigned char mode;
 193         int result;
 194
 195         mode = serial_inp(up, UART_RSA_MSR);
 196         result = mode & UART_RSA_MSR_FIFO;
 197
 198         if (!result) {
 199                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 200                 mode = serial_inp(up, UART_RSA_MSR);
 201                 result = mode & UART_RSA_MSR_FIFO;
 202         }
 203
 204         if (result)
 205                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 206
 207         return result;
 208 }
 209
 210 static void enable_rsa(struct uart_sunsu_port *up)
 211 {
 212         if (up->port.type == PORT_RSA) {
 213                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 214                         spin_lock_irq(&up->port.lock);
 215                         __enable_rsa(up);
 216                         spin_unlock_irq(&up->port.lock);
 217                 }
 218                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 219                         serial_outp(up, UART_RSA_FRR, 0);
 220         }
 221 }
 222
 223 /*
 224  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 225  * It is unknown why interrupts were disabled in here.  However,
 226  * the caller is expected to preserve this behaviour by grabbing
 227  * the spinlock before calling this function.
 228  */
 229 static void disable_rsa(struct uart_sunsu_port *up)
 230 {
 231         unsigned char mode;
 232         int result;
 233
 234         if (up->port.type == PORT_RSA &&
 235             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 236                 spin_lock_irq(&up->port.lock);
 237
 238                 mode = serial_inp(up, UART_RSA_MSR);
 239                 result = !(mode & UART_RSA_MSR_FIFO);
 240
 241                 if (!result) {
 242                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 243                         mode = serial_inp(up, UART_RSA_MSR);
 244                         result = !(mode & UART_RSA_MSR_FIFO);
 245                 }
 246
 247                 if (result)
 248                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 249                 spin_unlock_irq(&up->port.lock);
 250         }
 251 }
 252 #endif /* CONFIG_SERIAL_8250_RSA */
 253
 254 static inline void __stop_tx(struct uart_sunsu_port *p)
 255 {
 256         if (p->ier & UART_IER_THRI) {
 257                 p->ier &= ~UART_IER_THRI;
 258                 serial_out(p, UART_IER, p->ier);
 259         }
 260 }
 261
 262 static void sunsu_stop_tx(struct uart_port *port)
 263 {
 264         struct uart_sunsu_port *up =
 265                 container_of(port, struct uart_sunsu_port, port);
 266
 267         __stop_tx(up);
 268
 269         /*
 270          * We really want to stop the transmitter from sending.
 271          */
 272         if (up->port.type == PORT_16C950) {
 273                 up->acr |= UART_ACR_TXDIS;
 274                 serial_icr_write(up, UART_ACR, up->acr);
 275         }
 276 }
 277
 278 static void sunsu_start_tx(struct uart_port *port)
 279 {
 280         struct uart_sunsu_port *up =
 281                 container_of(port, struct uart_sunsu_port, port);
 282
 283         if (!(up->ier & UART_IER_THRI)) {
 284                 up->ier |= UART_IER_THRI;
 285                 serial_out(up, UART_IER, up->ier);
 286         }
 287
 288         /*
 289          * Re-enable the transmitter if we disabled it.
 290          */
 291         if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 292                 up->acr &= ~UART_ACR_TXDIS;
 293                 serial_icr_write(up, UART_ACR, up->acr);
 294         }
 295 }
 296
 297 static void sunsu_stop_rx(struct uart_port *port)
 298 {
 299         struct uart_sunsu_port *up =
 300                 container_of(port, struct uart_sunsu_port, port);
 301
 302         up->ier &= ~UART_IER_RLSI;
 303         up->port.read_status_mask &= ~UART_LSR_DR;
 304         serial_out(up, UART_IER, up->ier);
 305 }
 306
 307 static void sunsu_enable_ms(struct uart_port *port)
 308 {
 309         struct uart_sunsu_port *up =
 310                 container_of(port, struct uart_sunsu_port, port);
 311         unsigned long flags;
 312
 313         spin_lock_irqsave(&up->port.lock, flags);
 314         up->ier |= UART_IER_MSI;
 315         serial_out(up, UART_IER, up->ier);
 316         spin_unlock_irqrestore(&up->port.lock, flags);
 317 }
 318
 319 static void
 320 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 321 {
 322         struct tty_port *port = &up->port.state->port;
 323         unsigned char ch, flag;
 324         int max_count = 256;
 325         int saw_console_brk = 0;
 326
 327         do {
 328                 ch = serial_inp(up, UART_RX);
 329                 flag = TTY_NORMAL;
 330                 up->port.icount.rx++;
 331
 332                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 333                                        UART_LSR_FE | UART_LSR_OE))) {
 334                         /*
 335                          * For statistics only
 336                          */
 337                         if (*status & UART_LSR_BI) {
 338                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
 339                                 up->port.icount.brk++;
 340                                 if (up->port.cons != NULL &&
 341                                     up->port.line == up->port.cons->index)
 342                                         saw_console_brk = 1;
 343                                 /*
 344                                  * We do the SysRQ and SAK checking
 345                                  * here because otherwise the break
 346                                  * may get masked by ignore_status_mask
 347                                  * or read_status_mask.
 348                                  */
 349                                 if (uart_handle_break(&up->port))
 350                                         goto ignore_char;
 351                         } else if (*status & UART_LSR_PE)
 352                                 up->port.icount.parity++;
 353                         else if (*status & UART_LSR_FE)
 354                                 up->port.icount.frame++;
 355                         if (*status & UART_LSR_OE)
 356                                 up->port.icount.overrun++;
 357
 358                         /*
 359                          * Mask off conditions which should be ingored.
 360                          */
 361                         *status &= up->port.read_status_mask;
 362
 363                         if (up->port.cons != NULL &&
 364                             up->port.line == up->port.cons->index) {
 365                                 /* Recover the break flag from console xmit */
 366                                 *status |= up->lsr_break_flag;
 367                                 up->lsr_break_flag = 0;
 368                         }
 369
 370                         if (*status & UART_LSR_BI) {
 371                                 flag = TTY_BREAK;
 372                         } else if (*status & UART_LSR_PE)
 373                                 flag = TTY_PARITY;
 374                         else if (*status & UART_LSR_FE)
 375                                 flag = TTY_FRAME;
 376                 }
 377                 if (uart_handle_sysrq_char(&up->port, ch))
 378                         goto ignore_char;
 379                 if ((*status & up->port.ignore_status_mask) == 0)
 380                         tty_insert_flip_char(port, ch, flag);
 381                 if (*status & UART_LSR_OE)
 382                         /*
 383                          * Overrun is special, since it's reported
 384                          * immediately, and doesn't affect the current
 385                          * character.
 386                          */
 387                          tty_insert_flip_char(port, 0, TTY_OVERRUN);
 388         ignore_char:
 389                 *status = serial_inp(up, UART_LSR);
 390         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 391
 392         if (saw_console_brk)
 393                 sun_do_break();
 394 }
 395
 396 static void transmit_chars(struct uart_sunsu_port *up)
 397 {
 398         struct circ_buf *xmit = &up->port.state->xmit;
 399         int count;
 400
 401         if (up->port.x_char) {
 402                 serial_outp(up, UART_TX, up->port.x_char);
 403                 up->port.icount.tx++;
 404                 up->port.x_char = 0;
 405                 return;
 406         }
 407         if (uart_tx_stopped(&up->port)) {
 408                 sunsu_stop_tx(&up->port);
 409                 return;
 410         }
 411         if (uart_circ_empty(xmit)) {
 412                 __stop_tx(up);
 413                 return;
 414         }
 415
 416         count = up->port.fifosize;
 417         do {
 418                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 419                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 420                 up->port.icount.tx++;
 421                 if (uart_circ_empty(xmit))
 422                         break;
 423         } while (--count > 0);
 424
 425         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 426                 uart_write_wakeup(&up->port);
 427
 428         if (uart_circ_empty(xmit))
 429                 __stop_tx(up);
 430 }
 431
 432 static void check_modem_status(struct uart_sunsu_port *up)
 433 {
 434         int status;
 435
 436         status = serial_in(up, UART_MSR);
 437
 438         if ((status & UART_MSR_ANY_DELTA) == 0)
 439                 return;
 440
 441         if (status & UART_MSR_TERI)
 442                 up->port.icount.rng++;
 443         if (status & UART_MSR_DDSR)
 444                 up->port.icount.dsr++;
 445         if (status & UART_MSR_DDCD)
 446                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 447         if (status & UART_MSR_DCTS)
 448                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 449
 450         wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 451 }
 452
 453 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 454 {
 455         struct uart_sunsu_port *up = dev_id;
 456         unsigned long flags;
 457         unsigned char status;
 458
 459         spin_lock_irqsave(&up->port.lock, flags);
 460
 461         do {
 462                 status = serial_inp(up, UART_LSR);
 463                 if (status & UART_LSR_DR)
 464                         receive_chars(up, &status);
 465                 check_modem_status(up);
 466                 if (status & UART_LSR_THRE)
 467                         transmit_chars(up);
 468
 469                 spin_unlock_irqrestore(&up->port.lock, flags);
 470
 471                 tty_flip_buffer_push(&up->port.state->port);
 472
 473                 spin_lock_irqsave(&up->port.lock, flags);
 474
 475         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 476
 477         spin_unlock_irqrestore(&up->port.lock, flags);
 478
 479         return IRQ_HANDLED;
 480 }
 481
 482 /* Separate interrupt handling path for keyboard/mouse ports.  */
 483
 484 static void
 485 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 486                    unsigned int iflag, unsigned int quot);
 487
 488 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 489 {
 490         unsigned int cur_cflag = up->cflag;
 491         int quot, new_baud;
 492
 493         up->cflag &= ~CBAUD;
 494         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 495
 496         quot = up->port.uartclk / (16 * new_baud);
 497
 498         sunsu_change_speed(&up->port, up->cflag, 0, quot);
 499 }
 500
 501 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 502 {
 503         do {
 504                 unsigned char ch = serial_inp(up, UART_RX);
 505
 506                 /* Stop-A is handled by drivers/char/keyboard.c now. */
 507                 if (up->su_type == SU_PORT_KBD) {
 508 #ifdef CONFIG_SERIO
 509                         serio_interrupt(&up->serio, ch, 0);
 510 #endif
 511                 } else if (up->su_type == SU_PORT_MS) {
 512                         int ret = suncore_mouse_baud_detection(ch, is_break);
 513
 514                         switch (ret) {
 515                         case 2:
 516                                 sunsu_change_mouse_baud(up);
 517                                 /* fallthru */
 518                         case 1:
 519                                 break;
 520
 521                         case 0:
 522 #ifdef CONFIG_SERIO
 523                                 serio_interrupt(&up->serio, ch, 0);
 524 #endif
 525                                 break;
 526                         }
 527                 }
 528         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 529 }
 530
 531 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 532 {
 533         struct uart_sunsu_port *up = dev_id;
 534
 535         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 536                 unsigned char status = serial_inp(up, UART_LSR);
 537
 538                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 539                         receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 540         }
 541
 542         return IRQ_HANDLED;
 543 }
 544
 545 static unsigned int sunsu_tx_empty(struct uart_port *port)
 546 {
 547         struct uart_sunsu_port *up =
 548                 container_of(port, struct uart_sunsu_port, port);
 549         unsigned long flags;
 550         unsigned int ret;
 551
 552         spin_lock_irqsave(&up->port.lock, flags);
 553         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 554         spin_unlock_irqrestore(&up->port.lock, flags);
 555
 556         return ret;
 557 }
 558
 559 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 560 {
 561         struct uart_sunsu_port *up =
 562                 container_of(port, struct uart_sunsu_port, port);
 563         unsigned char status;
 564         unsigned int ret;
 565
 566         status = serial_in(up, UART_MSR);
 567
 568         ret = 0;
 569         if (status & UART_MSR_DCD)
 570                 ret |= TIOCM_CAR;
 571         if (status & UART_MSR_RI)
 572                 ret |= TIOCM_RNG;
 573         if (status & UART_MSR_DSR)
 574                 ret |= TIOCM_DSR;
 575         if (status & UART_MSR_CTS)
 576                 ret |= TIOCM_CTS;
 577         return ret;
 578 }
 579
 580 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 581 {
 582         struct uart_sunsu_port *up =
 583                 container_of(port, struct uart_sunsu_port, port);
 584         unsigned char mcr = 0;
 585
 586         if (mctrl & TIOCM_RTS)
 587                 mcr |= UART_MCR_RTS;
 588         if (mctrl & TIOCM_DTR)
 589                 mcr |= UART_MCR_DTR;
 590         if (mctrl & TIOCM_OUT1)
 591                 mcr |= UART_MCR_OUT1;
 592         if (mctrl & TIOCM_OUT2)
 593                 mcr |= UART_MCR_OUT2;
 594         if (mctrl & TIOCM_LOOP)
 595                 mcr |= UART_MCR_LOOP;
 596
 597         serial_out(up, UART_MCR, mcr);
 598 }
 599
 600 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 601 {
 602         struct uart_sunsu_port *up =
 603                 container_of(port, struct uart_sunsu_port, port);
 604         unsigned long flags;
 605
 606         spin_lock_irqsave(&up->port.lock, flags);
 607         if (break_state == -1)
 608                 up->lcr |= UART_LCR_SBC;
 609         else
 610                 up->lcr &= ~UART_LCR_SBC;
 611         serial_out(up, UART_LCR, up->lcr);
 612         spin_unlock_irqrestore(&up->port.lock, flags);
 613 }
 614
 615 static int sunsu_startup(struct uart_port *port)
 616 {
 617         struct uart_sunsu_port *up =
 618                 container_of(port, struct uart_sunsu_port, port);
 619         unsigned long flags;
 620         int retval;
 621
 622         if (up->port.type == PORT_16C950) {
 623                 /* Wake up and initialize UART */
 624                 up->acr = 0;
 625                 serial_outp(up, UART_LCR, 0xBF);
 626                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 627                 serial_outp(up, UART_IER, 0);
 628                 serial_outp(up, UART_LCR, 0);
 629                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 630                 serial_outp(up, UART_LCR, 0xBF);
 631                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 632                 serial_outp(up, UART_LCR, 0);
 633         }
 634
 635 #ifdef CONFIG_SERIAL_8250_RSA
 636         /*
 637          * If this is an RSA port, see if we can kick it up to the
 638          * higher speed clock.
 639          */
 640         enable_rsa(up);
 641 #endif
 642
 643         /*
 644          * Clear the FIFO buffers and disable them.
 645          * (they will be reenabled in set_termios())
 646          */
 647         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 648                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 649                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 650                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 651                 serial_outp(up, UART_FCR, 0);
 652         }
 653
 654         /*
 655          * Clear the interrupt registers.
 656          */
 657         (void) serial_inp(up, UART_LSR);
 658         (void) serial_inp(up, UART_RX);
 659         (void) serial_inp(up, UART_IIR);
 660         (void) serial_inp(up, UART_MSR);
 661
 662         /*
 663          * At this point, there's no way the LSR could still be 0xff;
 664          * if it is, then bail out, because there's likely no UART
 665          * here.
 666          */
 667         if (!(up->port.flags & UPF_BUGGY_UART) &&
 668             (serial_inp(up, UART_LSR) == 0xff)) {
 669                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 670                 return -ENODEV;
 671         }
 672
 673         if (up->su_type != SU_PORT_PORT) {
 674                 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 675                                      IRQF_SHARED, su_typev[up->su_type], up);
 676         } else {
 677                 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 678                                      IRQF_SHARED, su_typev[up->su_type], up);
 679         }
 680         if (retval) {
 681                 printk("su: Cannot register IRQ %d\n", up->port.irq);
 682                 return retval;
 683         }
 684
 685         /*
 686          * Now, initialize the UART
 687          */
 688         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 689
 690         spin_lock_irqsave(&up->port.lock, flags);
 691
 692         up->port.mctrl |= TIOCM_OUT2;
 693
 694         sunsu_set_mctrl(&up->port, up->port.mctrl);
 695         spin_unlock_irqrestore(&up->port.lock, flags);
 696
 697         /*
 698          * Finally, enable interrupts.  Note: Modem status interrupts
 699          * are set via set_termios(), which will be occurring imminently
 700          * anyway, so we don't enable them here.
 701          */
 702         up->ier = UART_IER_RLSI | UART_IER_RDI;
 703         serial_outp(up, UART_IER, up->ier);
 704
 705         if (up->port.flags & UPF_FOURPORT) {
 706                 unsigned int icp;
 707                 /*
 708                  * Enable interrupts on the AST Fourport board
 709                  */
 710                 icp = (up->port.iobase & 0xfe0) | 0x01f;
 711                 outb_p(0x80, icp);
 712                 (void) inb_p(icp);
 713         }
 714
 715         /*
 716          * And clear the interrupt registers again for luck.
 717          */
 718         (void) serial_inp(up, UART_LSR);
 719         (void) serial_inp(up, UART_RX);
 720         (void) serial_inp(up, UART_IIR);
 721         (void) serial_inp(up, UART_MSR);
 722
 723         return 0;
 724 }
 725
 726 static void sunsu_shutdown(struct uart_port *port)
 727 {
 728         struct uart_sunsu_port *up =
 729                 container_of(port, struct uart_sunsu_port, port);
 730         unsigned long flags;
 731
 732         /*
 733          * Disable interrupts from this port
 734          */
 735         up->ier = 0;
 736         serial_outp(up, UART_IER, 0);
 737
 738         spin_lock_irqsave(&up->port.lock, flags);
 739         if (up->port.flags & UPF_FOURPORT) {
 740                 /* reset interrupts on the AST Fourport board */
 741                 inb((up->port.iobase & 0xfe0) | 0x1f);
 742                 up->port.mctrl |= TIOCM_OUT1;
 743         } else
 744                 up->port.mctrl &= ~TIOCM_OUT2;
 745
 746         sunsu_set_mctrl(&up->port, up->port.mctrl);
 747         spin_unlock_irqrestore(&up->port.lock, flags);
 748
 749         /*
 750          * Disable break condition and FIFOs
 751          */
 752         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 753         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 754                                   UART_FCR_CLEAR_RCVR |
 755                                   UART_FCR_CLEAR_XMIT);
 756         serial_outp(up, UART_FCR, 0);
 757
 758 #ifdef CONFIG_SERIAL_8250_RSA
 759         /*
 760          * Reset the RSA board back to 115kbps compat mode.
 761          */
 762         disable_rsa(up);
 763 #endif
 764
 765         /*
 766          * Read data port to reset things.
 767          */
 768         (void) serial_in(up, UART_RX);
 769
 770         free_irq(up->port.irq, up);
 771 }
 772
 773 static void
 774 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 775                    unsigned int iflag, unsigned int quot)
 776 {
 777         struct uart_sunsu_port *up =
 778                 container_of(port, struct uart_sunsu_port, port);
 779         unsigned char cval, fcr = 0;
 780         unsigned long flags;
 781
 782         switch (cflag & CSIZE) {
 783         case CS5:
 784                 cval = 0x00;
 785                 break;
 786         case CS6:
 787                 cval = 0x01;
 788                 break;
 789         case CS7:
 790                 cval = 0x02;
 791                 break;
 792         default:
 793         case CS8:
 794                 cval = 0x03;
 795                 break;
 796         }
 797
 798         if (cflag & CSTOPB)
 799                 cval |= 0x04;
 800         if (cflag & PARENB)
 801                 cval |= UART_LCR_PARITY;
 802         if (!(cflag & PARODD))
 803                 cval |= UART_LCR_EPAR;
 804 #ifdef CMSPAR
 805         if (cflag & CMSPAR)
 806                 cval |= UART_LCR_SPAR;
 807 #endif
 808
 809         /*
 810          * Work around a bug in the Oxford Semiconductor 952 rev B
 811          * chip which causes it to seriously miscalculate baud rates
 812          * when DLL is 0.
 813          */
 814         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 815             up->rev == 0x5201)
 816                 quot ++;
 817
 818         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 819                 if ((up->port.uartclk / quot) < (2400 * 16))
 820                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 821 #ifdef CONFIG_SERIAL_8250_RSA
 822                 else if (up->port.type == PORT_RSA)
 823                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 824 #endif
 825                 else
 826                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 827         }
 828         if (up->port.type == PORT_16750)
 829                 fcr |= UART_FCR7_64BYTE;
 830
 831         /*
 832          * Ok, we're now changing the port state.  Do it with
 833          * interrupts disabled.
 834          */
 835         spin_lock_irqsave(&up->port.lock, flags);
 836
 837         /*
 838          * Update the per-port timeout.
 839          */
 840         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 841
 842         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 843         if (iflag & INPCK)
 844                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 845         if (iflag & (IGNBRK | BRKINT | PARMRK))
 846                 up->port.read_status_mask |= UART_LSR_BI;
 847
 848         /*
 849          * Characteres to ignore
 850          */
 851         up->port.ignore_status_mask = 0;
 852         if (iflag & IGNPAR)
 853                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 854         if (iflag & IGNBRK) {
 855                 up->port.ignore_status_mask |= UART_LSR_BI;
 856                 /*
 857                  * If we're ignoring parity and break indicators,
 858                  * ignore overruns too (for real raw support).
 859                  */
 860                 if (iflag & IGNPAR)
 861                         up->port.ignore_status_mask |= UART_LSR_OE;
 862         }
 863
 864         /*
 865          * ignore all characters if CREAD is not set
 866          */
 867         if ((cflag & CREAD) == 0)
 868                 up->port.ignore_status_mask |= UART_LSR_DR;
 869
 870         /*
 871          * CTS flow control flag and modem status interrupts
 872          */
 873         up->ier &= ~UART_IER_MSI;
 874         if (UART_ENABLE_MS(&up->port, cflag))
 875                 up->ier |= UART_IER_MSI;
 876
 877         serial_out(up, UART_IER, up->ier);
 878
 879         if (uart_config[up->port.type].flags & UART_STARTECH) {
 880                 serial_outp(up, UART_LCR, 0xBF);
 881                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 882         }
 883         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 884         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 885         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 886         if (up->port.type == PORT_16750)
 887                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 888         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 889         up->lcr = cval;                                 /* Save LCR */
 890         if (up->port.type != PORT_16750) {
 891                 if (fcr & UART_FCR_ENABLE_FIFO) {
 892                         /* emulated UARTs (Lucent Venus 167x) need two steps */
 893                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 894                 }
 895                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 896         }
 897
 898         up->cflag = cflag;
 899
 900         spin_unlock_irqrestore(&up->port.lock, flags);
 901 }
 902
 903 static void
 904 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 905                   struct ktermios *old)
 906 {
 907         unsigned int baud, quot;
 908
 909         /*
 910          * Ask the core to calculate the divisor for us.
 911          */
 912         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 913         quot = uart_get_divisor(port, baud);
 914
 915         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 916 }
 917
 918 static void sunsu_release_port(struct uart_port *port)
 919 {
 920 }
 921
 922 static int sunsu_request_port(struct uart_port *port)
 923 {
 924         return 0;
 925 }
 926
 927 static void sunsu_config_port(struct uart_port *port, int flags)
 928 {
 929         struct uart_sunsu_port *up =
 930                 container_of(port, struct uart_sunsu_port, port);
 931
 932         if (flags & UART_CONFIG_TYPE) {
 933                 /*
 934                  * We are supposed to call autoconfig here, but this requires
 935                  * splitting all the OBP probing crap from the UART probing.
 936                  * We'll do it when we kill sunsu.c altogether.
 937                  */
 938                 port->type = up->type_probed;   /* XXX */
 939         }
 940 }
 941
 942 static int
 943 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 944 {
 945         return -EINVAL;
 946 }
 947
 948 static const char *
 949 sunsu_type(struct uart_port *port)
 950 {
 951         int type = port->type;
 952
 953         if (type >= ARRAY_SIZE(uart_config))
 954                 type = 0;
 955         return uart_config[type].name;
 956 }
 957
 958 static const struct uart_ops sunsu_pops = {
 959         .tx_empty       = sunsu_tx_empty,
 960         .set_mctrl      = sunsu_set_mctrl,
 961         .get_mctrl      = sunsu_get_mctrl,
 962         .stop_tx        = sunsu_stop_tx,
 963         .start_tx       = sunsu_start_tx,
 964         .stop_rx        = sunsu_stop_rx,
 965         .enable_ms      = sunsu_enable_ms,
 966         .break_ctl      = sunsu_break_ctl,
 967         .startup        = sunsu_startup,
 968         .shutdown       = sunsu_shutdown,
 969         .set_termios    = sunsu_set_termios,
 970         .type           = sunsu_type,
 971         .release_port   = sunsu_release_port,
 972         .request_port   = sunsu_request_port,
 973         .config_port    = sunsu_config_port,
 974         .verify_port    = sunsu_verify_port,
 975 };
 976
 977 #define UART_NR 4
 978
 979 static struct uart_sunsu_port sunsu_ports[UART_NR];
 980 static int nr_inst; /* Number of already registered ports */
 981
 982 #ifdef CONFIG_SERIO
 983
 984 static DEFINE_SPINLOCK(sunsu_serio_lock);
 985
 986 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 987 {
 988         struct uart_sunsu_port *up = serio->port_data;
 989         unsigned long flags;
 990         int lsr;
 991
 992         spin_lock_irqsave(&sunsu_serio_lock, flags);
 993
 994         do {
 995                 lsr = serial_in(up, UART_LSR);
 996         } while (!(lsr & UART_LSR_THRE));
 997
 998         /* Send the character out. */
 999         serial_out(up, UART_TX, ch);
1000
1001         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1002
1003         return 0;
1004 }
1005
1006 static int sunsu_serio_open(struct serio *serio)
1007 {
1008         struct uart_sunsu_port *up = serio->port_data;
1009         unsigned long flags;
1010         int ret;
1011
1012         spin_lock_irqsave(&sunsu_serio_lock, flags);
1013         if (!up->serio_open) {
1014                 up->serio_open = 1;
1015                 ret = 0;
1016         } else
1017                 ret = -EBUSY;
1018         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1019
1020         return ret;
1021 }
1022
1023 static void sunsu_serio_close(struct serio *serio)
1024 {
1025         struct uart_sunsu_port *up = serio->port_data;
1026         unsigned long flags;
1027
1028         spin_lock_irqsave(&sunsu_serio_lock, flags);
1029         up->serio_open = 0;
1030         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1031 }
1032
1033 #endif /* CONFIG_SERIO */
1034
1035 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1036 {
1037         unsigned char status1, status2, scratch, scratch2, scratch3;
1038         unsigned char save_lcr, save_mcr;
1039         unsigned long flags;
1040
1041         if (up->su_type == SU_PORT_NONE)
1042                 return;
1043
1044         up->type_probed = PORT_UNKNOWN;
1045         up->port.iotype = UPIO_MEM;
1046
1047         spin_lock_irqsave(&up->port.lock, flags);
1048
1049         if (!(up->port.flags & UPF_BUGGY_UART)) {
1050                 /*
1051                  * Do a simple existence test first; if we fail this, there's
1052                  * no point trying anything else.
1053                  *
1054                  * 0x80 is used as a nonsense port to prevent against false
1055                  * positives due to ISA bus float.  The assumption is that
1056                  * 0x80 is a non-existent port; which should be safe since
1057                  * include/asm/io.h also makes this assumption.
1058                  */
1059                 scratch = serial_inp(up, UART_IER);
1060                 serial_outp(up, UART_IER, 0);
1061 #ifdef __i386__
1062                 outb(0xff, 0x080);
1063 #endif
1064                 scratch2 = serial_inp(up, UART_IER);
1065                 serial_outp(up, UART_IER, 0x0f);
1066 #ifdef __i386__
1067                 outb(0, 0x080);
1068 #endif
1069                 scratch3 = serial_inp(up, UART_IER);
1070                 serial_outp(up, UART_IER, scratch);
1071                 if (scratch2 != 0 || scratch3 != 0x0F)
1072                         goto out;       /* We failed; there's nothing here */
1073         }
1074
1075         save_mcr = serial_in(up, UART_MCR);
1076         save_lcr = serial_in(up, UART_LCR);
1077
1078         /*
1079          * Check to see if a UART is really there.  Certain broken
1080          * internal modems based on the Rockwell chipset fail this
1081          * test, because they apparently don't implement the loopback
1082          * test mode.  So this test is skipped on the COM 1 through
1083          * COM 4 ports.  This *should* be safe, since no board
1084          * manufacturer would be stupid enough to design a board
1085          * that conflicts with COM 1-4 --- we hope!
1086          */
1087         if (!(up->port.flags & UPF_SKIP_TEST)) {
1088                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1089                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1090                 serial_outp(up, UART_MCR, save_mcr);
1091                 if (status1 != 0x90)
1092                         goto out;       /* We failed loopback test */
1093         }
1094         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1095         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1096         serial_outp(up, UART_LCR, 0);
1097         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1098         scratch = serial_in(up, UART_IIR) >> 6;
1099         switch (scratch) {
1100                 case 0:
1101                         up->port.type = PORT_16450;
1102                         break;
1103                 case 1:
1104                         up->port.type = PORT_UNKNOWN;
1105                         break;
1106                 case 2:
1107                         up->port.type = PORT_16550;
1108                         break;
1109                 case 3:
1110                         up->port.type = PORT_16550A;
1111                         break;
1112         }
1113         if (up->port.type == PORT_16550A) {
1114                 /* Check for Startech UART's */
1115                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1116                 if (serial_in(up, UART_EFR) == 0) {
1117                         up->port.type = PORT_16650;
1118                 } else {
1119                         serial_outp(up, UART_LCR, 0xBF);
1120                         if (serial_in(up, UART_EFR) == 0)
1121                                 up->port.type = PORT_16650V2;
1122                 }
1123         }
1124         if (up->port.type == PORT_16550A) {
1125                 /* Check for TI 16750 */
1126                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1127                 serial_outp(up, UART_FCR,
1128                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1129                 scratch = serial_in(up, UART_IIR) >> 5;
1130                 if (scratch == 7) {
1131                         /*
1132                          * If this is a 16750, and not a cheap UART
1133                          * clone, then it should only go into 64 byte
1134                          * mode if the UART_FCR7_64BYTE bit was set
1135                          * while UART_LCR_DLAB was latched.
1136                          */
1137                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1138                         serial_outp(up, UART_LCR, 0);
1139                         serial_outp(up, UART_FCR,
1140                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1141                         scratch = serial_in(up, UART_IIR) >> 5;
1142                         if (scratch == 6)
1143                                 up->port.type = PORT_16750;
1144                 }
1145                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1146         }
1147         serial_outp(up, UART_LCR, save_lcr);
1148         if (up->port.type == PORT_16450) {
1149                 scratch = serial_in(up, UART_SCR);
1150                 serial_outp(up, UART_SCR, 0xa5);
1151                 status1 = serial_in(up, UART_SCR);
1152                 serial_outp(up, UART_SCR, 0x5a);
1153                 status2 = serial_in(up, UART_SCR);
1154                 serial_outp(up, UART_SCR, scratch);
1155
1156                 if ((status1 != 0xa5) || (status2 != 0x5a))
1157                         up->port.type = PORT_8250;
1158         }
1159
1160         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1161
1162         if (up->port.type == PORT_UNKNOWN)
1163                 goto out;
1164         up->type_probed = up->port.type;        /* XXX */
1165
1166         /*
1167          * Reset the UART.
1168          */
1169 #ifdef CONFIG_SERIAL_8250_RSA
1170         if (up->port.type == PORT_RSA)
1171                 serial_outp(up, UART_RSA_FRR, 0);
1172 #endif
1173         serial_outp(up, UART_MCR, save_mcr);
1174         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1175                                      UART_FCR_CLEAR_RCVR |
1176                                      UART_FCR_CLEAR_XMIT));
1177         serial_outp(up, UART_FCR, 0);
1178         (void)serial_in(up, UART_RX);
1179         serial_outp(up, UART_IER, 0);
1180
1181 out:
1182         spin_unlock_irqrestore(&up->port.lock, flags);
1183 }
1184
1185 static struct uart_driver sunsu_reg = {
1186         .owner                  = THIS_MODULE,
1187         .driver_name            = "sunsu",
1188         .dev_name               = "ttyS",
1189         .major                  = TTY_MAJOR,
1190 };
1191
1192 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1193 {
1194         int quot, baud;
1195 #ifdef CONFIG_SERIO
1196         struct serio *serio;
1197 #endif
1198
1199         if (up->su_type == SU_PORT_KBD) {
1200                 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1201                 baud = 1200;
1202         } else {
1203                 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1204                 baud = 4800;
1205         }
1206         quot = up->port.uartclk / (16 * baud);
1207
1208         sunsu_autoconfig(up);
1209         if (up->port.type == PORT_UNKNOWN)
1210                 return -ENODEV;
1211
1212         printk("%pOF: %s port at %llx, irq %u\n",
1213                up->port.dev->of_node,
1214                (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1215                (unsigned long long) up->port.mapbase,
1216                up->port.irq);
1217
1218 #ifdef CONFIG_SERIO
1219         serio = &up->serio;
1220         serio->port_data = up;
1221
1222         serio->id.type = SERIO_RS232;
1223         if (up->su_type == SU_PORT_KBD) {
1224                 serio->id.proto = SERIO_SUNKBD;
1225                 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1226         } else {
1227                 serio->id.proto = SERIO_SUN;
1228                 serio->id.extra = 1;
1229                 strlcpy(serio->name, "sums", sizeof(serio->name));
1230         }
1231         strlcpy(serio->phys,
1232                 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1233                 sizeof(serio->phys));
1234
1235         serio->write = sunsu_serio_write;
1236         serio->open = sunsu_serio_open;
1237         serio->close = sunsu_serio_close;
1238         serio->dev.parent = up->port.dev;
1239
1240         serio_register_port(serio);
1241 #endif
1242
1243         sunsu_change_speed(&up->port, up->cflag, 0, quot);
1244
1245         sunsu_startup(&up->port);
1246         return 0;
1247 }
1248
1249 /*
1250  * ------------------------------------------------------------
1251  * Serial console driver
1252  * ------------------------------------------------------------
1253  */
1254
1255 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1256
1257 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1258
1259 /*
1260  *      Wait for transmitter & holding register to empty
1261  */
1262 static void wait_for_xmitr(struct uart_sunsu_port *up)
1263 {
1264         unsigned int status, tmout = 10000;
1265
1266         /* Wait up to 10ms for the character(s) to be sent. */
1267         do {
1268                 status = serial_in(up, UART_LSR);
1269
1270                 if (status & UART_LSR_BI)
1271                         up->lsr_break_flag = UART_LSR_BI;
1272
1273                 if (--tmout == 0)
1274                         break;
1275                 udelay(1);
1276         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1277
1278         /* Wait up to 1s for flow control if necessary */
1279         if (up->port.flags & UPF_CONS_FLOW) {
1280                 tmout = 1000000;
1281                 while (--tmout &&
1282                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1283                         udelay(1);
1284         }
1285 }
1286
1287 static void sunsu_console_putchar(struct uart_port *port, int ch)
1288 {
1289         struct uart_sunsu_port *up =
1290                 container_of(port, struct uart_sunsu_port, port);
1291
1292         wait_for_xmitr(up);
1293         serial_out(up, UART_TX, ch);
1294 }
1295
1296 /*
1297  *      Print a string to the serial port trying not to disturb
1298  *      any possible real use of the port...
1299  */
1300 static void sunsu_console_write(struct console *co, const char *s,
1301                                 unsigned int count)
1302 {
1303         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1304         unsigned long flags;
1305         unsigned int ier;
1306         int locked = 1;
1307
1308         if (up->port.sysrq || oops_in_progress)
1309                 locked = spin_trylock_irqsave(&up->port.lock, flags);
1310         else
1311                 spin_lock_irqsave(&up->port.lock, flags);
1312
1313         /*
1314          *      First save the UER then disable the interrupts
1315          */
1316         ier = serial_in(up, UART_IER);
1317         serial_out(up, UART_IER, 0);
1318
1319         uart_console_write(&up->port, s, count, sunsu_console_putchar);
1320
1321         /*
1322          *      Finally, wait for transmitter to become empty
1323          *      and restore the IER
1324          */
1325         wait_for_xmitr(up);
1326         serial_out(up, UART_IER, ier);
1327
1328         if (locked)
1329                 spin_unlock_irqrestore(&up->port.lock, flags);
1330 }
1331
1332 /*
1333  *      Setup initial baud/bits/parity. We do two things here:
1334  *      - construct a cflag setting for the first su_open()
1335  *      - initialize the serial port
1336  *      Return non-zero if we didn't find a serial port.
1337  */
1338 static int __init sunsu_console_setup(struct console *co, char *options)
1339 {
1340         static struct ktermios dummy;
1341         struct ktermios termios;
1342         struct uart_port *port;
1343
1344         printk("Console: ttyS%d (SU)\n",
1345                (sunsu_reg.minor - 64) + co->index);
1346
1347         if (co->index > nr_inst)
1348                 return -ENODEV;
1349         port = &sunsu_ports[co->index].port;
1350
1351         /*
1352          * Temporary fix.
1353          */
1354         spin_lock_init(&port->lock);
1355
1356         /* Get firmware console settings.  */
1357         sunserial_console_termios(co, port->dev->of_node);
1358
1359         memset(&termios, 0, sizeof(struct ktermios));
1360         termios.c_cflag = co->cflag;
1361         port->mctrl |= TIOCM_DTR;
1362         port->ops->set_termios(port, &termios, &dummy);
1363
1364         return 0;
1365 }
1366
1367 static struct console sunsu_console = {
1368         .name   =       "ttyS",
1369         .write  =       sunsu_console_write,
1370         .device =       uart_console_device,
1371         .setup  =       sunsu_console_setup,
1372         .flags  =       CON_PRINTBUFFER,
1373         .index  =       -1,
1374         .data   =       &sunsu_reg,
1375 };
1376
1377 /*
1378  *      Register console.
1379  */
1380
1381 static inline struct console *SUNSU_CONSOLE(void)
1382 {
1383         return &sunsu_console;
1384 }
1385 #else
1386 #define SUNSU_CONSOLE()                 (NULL)
1387 #define sunsu_serial_console_init()     do { } while (0)
1388 #endif
1389
1390 static enum su_type su_get_type(struct device_node *dp)
1391 {
1392         struct device_node *ap = of_find_node_by_path("/aliases");
1393         enum su_type rc = SU_PORT_PORT;
1394
1395         if (ap) {
1396                 const char *keyb = of_get_property(ap, "keyboard", NULL);
1397                 const char *ms = of_get_property(ap, "mouse", NULL);
1398                 struct device_node *match;
1399
1400                 if (keyb) {
1401                         match = of_find_node_by_path(keyb);
1402
1403                         /*
1404                          * The pointer is used as an identifier not
1405                          * as a pointer, we can drop the refcount on
1406                          * the of__node immediately after getting it.
1407                          */
1408                         of_node_put(match);
1409
1410                         if (dp == match) {
1411                                 rc = SU_PORT_KBD;
1412                                 goto out;
1413                         }
1414                 }
1415                 if (ms) {
1416                         match = of_find_node_by_path(ms);
1417
1418                         of_node_put(match);
1419
1420                         if (dp == match) {
1421                                 rc = SU_PORT_MS;
1422                                 goto out;
1423                         }
1424                 }
1425         }
1426
1427 out:
1428         of_node_put(ap);
1429         return rc;
1430 }
1431
1432 static int su_probe(struct platform_device *op)
1433 {
1434         struct device_node *dp = op->dev.of_node;
1435         struct uart_sunsu_port *up;
1436         struct resource *rp;
1437         enum su_type type;
1438         bool ignore_line;
1439         int err;
1440
1441         type = su_get_type(dp);
1442         if (type == SU_PORT_PORT) {
1443                 if (nr_inst >= UART_NR)
1444                         return -EINVAL;
1445                 up = &sunsu_ports[nr_inst];
1446         } else {
1447                 up = kzalloc(sizeof(*up), GFP_KERNEL);
1448                 if (!up)
1449                         return -ENOMEM;
1450         }
1451
1452         up->port.line = nr_inst;
1453
1454         spin_lock_init(&up->port.lock);
1455
1456         up->su_type = type;
1457
1458         rp = &op->resource[0];
1459         up->port.mapbase = rp->start;
1460         up->reg_size = resource_size(rp);
1461         up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1462         if (!up->port.membase) {
1463                 if (type != SU_PORT_PORT)
1464                         kfree(up);
1465                 return -ENOMEM;
1466         }
1467
1468         up->port.irq = op->archdata.irqs[0];
1469
1470         up->port.dev = &op->dev;
1471
1472         up->port.type = PORT_UNKNOWN;
1473         up->port.uartclk = (SU_BASE_BAUD * 16);
1474         up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
1475
1476         err = 0;
1477         if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1478                 err = sunsu_kbd_ms_init(up);
1479                 if (err) {
1480                         of_iounmap(&op->resource[0],
1481                                    up->port.membase, up->reg_size);
1482                         kfree(up);
1483                         return err;
1484                 }
1485                 platform_set_drvdata(op, up);
1486
1487                 nr_inst++;
1488
1489                 return 0;
1490         }
1491
1492         up->port.flags |= UPF_BOOT_AUTOCONF;
1493
1494         sunsu_autoconfig(up);
1495
1496         err = -ENODEV;
1497         if (up->port.type == PORT_UNKNOWN)
1498                 goto out_unmap;
1499
1500         up->port.ops = &sunsu_pops;
1501
1502         ignore_line = false;
1503         if (of_node_name_eq(dp, "rsc-console") ||
1504             of_node_name_eq(dp, "lom-console"))
1505                 ignore_line = true;
1506
1507         sunserial_console_match(SUNSU_CONSOLE(), dp,
1508                                 &sunsu_reg, up->port.line,
1509                                 ignore_line);
1510         err = uart_add_one_port(&sunsu_reg, &up->port);
1511         if (err)
1512                 goto out_unmap;
1513
1514         platform_set_drvdata(op, up);
1515
1516         nr_inst++;
1517
1518         return 0;
1519
1520 out_unmap:
1521         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1522         kfree(up);
1523         return err;
1524 }
1525
1526 static int su_remove(struct platform_device *op)
1527 {
1528         struct uart_sunsu_port *up = platform_get_drvdata(op);
1529         bool kbdms = false;
1530
1531         if (up->su_type == SU_PORT_MS ||
1532             up->su_type == SU_PORT_KBD)
1533                 kbdms = true;
1534
1535         if (kbdms) {
1536 #ifdef CONFIG_SERIO
1537                 serio_unregister_port(&up->serio);
1538 #endif
1539         } else if (up->port.type != PORT_UNKNOWN)
1540                 uart_remove_one_port(&sunsu_reg, &up->port);
1541
1542         if (up->port.membase)
1543                 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1544
1545         if (kbdms)
1546                 kfree(up);
1547
1548         return 0;
1549 }
1550
1551 static const struct of_device_id su_match[] = {
1552         {
1553                 .name = "su",
1554         },
1555         {
1556                 .name = "su_pnp",
1557         },
1558         {
1559                 .name = "serial",
1560                 .compatible = "su",
1561         },
1562         {
1563                 .type = "serial",
1564                 .compatible = "su",
1565         },
1566         {},
1567 };
1568 MODULE_DEVICE_TABLE(of, su_match);
1569
1570 static struct platform_driver su_driver = {
1571         .driver = {
1572                 .name = "su",
1573                 .of_match_table = su_match,
1574         },
1575         .probe          = su_probe,
1576         .remove         = su_remove,
1577 };
1578
1579 static int __init sunsu_init(void)
1580 {
1581         struct device_node *dp;
1582         int err;
1583         int num_uart = 0;
1584
1585         for_each_node_by_name(dp, "su") {
1586                 if (su_get_type(dp) == SU_PORT_PORT)
1587                         num_uart++;
1588         }
1589         for_each_node_by_name(dp, "su_pnp") {
1590                 if (su_get_type(dp) == SU_PORT_PORT)
1591                         num_uart++;
1592         }
1593         for_each_node_by_name(dp, "serial") {
1594                 if (of_device_is_compatible(dp, "su")) {
1595                         if (su_get_type(dp) == SU_PORT_PORT)
1596                                 num_uart++;
1597                 }
1598         }
1599         for_each_node_by_type(dp, "serial") {
1600                 if (of_device_is_compatible(dp, "su")) {
1601                         if (su_get_type(dp) == SU_PORT_PORT)
1602                                 num_uart++;
1603                 }
1604         }
1605
1606         if (num_uart) {
1607                 err = sunserial_register_minors(&sunsu_reg, num_uart);
1608                 if (err)
1609                         return err;
1610         }
1611
1612         err = platform_driver_register(&su_driver);
1613         if (err && num_uart)
1614                 sunserial_unregister_minors(&sunsu_reg, num_uart);
1615
1616         return err;
1617 }
1618
1619 static void __exit sunsu_exit(void)
1620 {
1621         platform_driver_unregister(&su_driver);
1622         if (sunsu_reg.nr)
1623                 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1624 }
1625
1626 module_init(sunsu_init);
1627 module_exit(sunsu_exit);
1628
1629 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1630 MODULE_DESCRIPTION("Sun SU serial port driver");
1631 MODULE_VERSION("2.0");
1632 MODULE_LICENSE("GPL");