drivers/tty/serial/cpm_uart/cpm_uart_core.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *  Driver for CPM (SCC/SMC) serial ports; core driver
   4  *
   5  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   6  *  Based on ppc8xx.c by Thomas Gleixner
   7  *  Based on drivers/serial/amba.c by Russell King
   8  *
   9  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  10  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  11  *
  12  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  13  *            (C) 2004 Intracom, S.A.
  14  *            (C) 2005-2006 MontaVista Software, Inc.
  15  *              Vitaly Bordug <vbordug@ru.mvista.com>
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/tty.h>
  20 #include <linux/tty_flip.h>
  21 #include <linux/ioport.h>
  22 #include <linux/init.h>
  23 #include <linux/serial.h>
  24 #include <linux/console.h>
  25 #include <linux/sysrq.h>
  26 #include <linux/device.h>
  27 #include <linux/memblock.h>
  28 #include <linux/dma-mapping.h>
  29 #include <linux/fs_uart_pd.h>
  30 #include <linux/of_address.h>
  31 #include <linux/of_irq.h>
  32 #include <linux/of_platform.h>
  33 #include <linux/gpio.h>
  34 #include <linux/of_gpio.h>
  35 #include <linux/clk.h>
  36
  37 #include <asm/io.h>
  38 #include <asm/irq.h>
  39 #include <asm/delay.h>
  40 #include <asm/fs_pd.h>
  41 #include <asm/udbg.h>
  42
  43 #include <linux/serial_core.h>
  44 #include <linux/kernel.h>
  45
  46 #include "cpm_uart.h"
  47
  48
  49 /**************************************************************/
  50
  51 static int  cpm_uart_tx_pump(struct uart_port *port);
  52 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  53 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  54 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  55
  56 /**************************************************************/
  57
  58 #define HW_BUF_SPD_THRESHOLD    2400
  59
  60 /*
  61  * Check, if transmit buffers are processed
  62 */
  63 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  64 {
  65         struct uart_cpm_port *pinfo =
  66                 container_of(port, struct uart_cpm_port, port);
  67         cbd_t __iomem *bdp = pinfo->tx_bd_base;
  68         int ret = 0;
  69
  70         while (1) {
  71                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  72                         break;
  73
  74                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  75                         ret = TIOCSER_TEMT;
  76                         break;
  77                 }
  78                 bdp++;
  79         }
  80
  81         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  82
  83         return ret;
  84 }
  85
  86 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  87 {
  88         struct uart_cpm_port *pinfo =
  89                 container_of(port, struct uart_cpm_port, port);
  90
  91         if (pinfo->gpios[GPIO_RTS] >= 0)
  92                 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
  93
  94         if (pinfo->gpios[GPIO_DTR] >= 0)
  95                 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
  96 }
  97
  98 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
  99 {
 100         struct uart_cpm_port *pinfo =
 101                 container_of(port, struct uart_cpm_port, port);
 102         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 103
 104         if (pinfo->gpios[GPIO_CTS] >= 0) {
 105                 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
 106                         mctrl &= ~TIOCM_CTS;
 107         }
 108
 109         if (pinfo->gpios[GPIO_DSR] >= 0) {
 110                 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
 111                         mctrl &= ~TIOCM_DSR;
 112         }
 113
 114         if (pinfo->gpios[GPIO_DCD] >= 0) {
 115                 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
 116                         mctrl &= ~TIOCM_CAR;
 117         }
 118
 119         if (pinfo->gpios[GPIO_RI] >= 0) {
 120                 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
 121                         mctrl |= TIOCM_RNG;
 122         }
 123
 124         return mctrl;
 125 }
 126
 127 /*
 128  * Stop transmitter
 129  */
 130 static void cpm_uart_stop_tx(struct uart_port *port)
 131 {
 132         struct uart_cpm_port *pinfo =
 133                 container_of(port, struct uart_cpm_port, port);
 134         smc_t __iomem *smcp = pinfo->smcp;
 135         scc_t __iomem *sccp = pinfo->sccp;
 136
 137         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 138
 139         if (IS_SMC(pinfo))
 140                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 141         else
 142                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 143 }
 144
 145 /*
 146  * Start transmitter
 147  */
 148 static void cpm_uart_start_tx(struct uart_port *port)
 149 {
 150         struct uart_cpm_port *pinfo =
 151                 container_of(port, struct uart_cpm_port, port);
 152         smc_t __iomem *smcp = pinfo->smcp;
 153         scc_t __iomem *sccp = pinfo->sccp;
 154
 155         pr_debug("CPM uart[%d]:start tx\n", port->line);
 156
 157         if (IS_SMC(pinfo)) {
 158                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 159                         return;
 160         } else {
 161                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 162                         return;
 163         }
 164
 165         if (cpm_uart_tx_pump(port) != 0) {
 166                 if (IS_SMC(pinfo)) {
 167                         setbits8(&smcp->smc_smcm, SMCM_TX);
 168                 } else {
 169                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 170                 }
 171         }
 172 }
 173
 174 /*
 175  * Stop receiver
 176  */
 177 static void cpm_uart_stop_rx(struct uart_port *port)
 178 {
 179         struct uart_cpm_port *pinfo =
 180                 container_of(port, struct uart_cpm_port, port);
 181         smc_t __iomem *smcp = pinfo->smcp;
 182         scc_t __iomem *sccp = pinfo->sccp;
 183
 184         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 185
 186         if (IS_SMC(pinfo))
 187                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 188         else
 189                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 190 }
 191
 192 /*
 193  * Generate a break.
 194  */
 195 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 196 {
 197         struct uart_cpm_port *pinfo =
 198                 container_of(port, struct uart_cpm_port, port);
 199
 200         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 201                 break_state);
 202
 203         if (break_state)
 204                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 205         else
 206                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 207 }
 208
 209 /*
 210  * Transmit characters, refill buffer descriptor, if possible
 211  */
 212 static void cpm_uart_int_tx(struct uart_port *port)
 213 {
 214         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 215
 216         cpm_uart_tx_pump(port);
 217 }
 218
 219 #ifdef CONFIG_CONSOLE_POLL
 220 static int serial_polled;
 221 #endif
 222
 223 /*
 224  * Receive characters
 225  */
 226 static void cpm_uart_int_rx(struct uart_port *port)
 227 {
 228         int i;
 229         unsigned char ch;
 230         u8 *cp;
 231         struct tty_port *tport = &port->state->port;
 232         struct uart_cpm_port *pinfo =
 233                 container_of(port, struct uart_cpm_port, port);
 234         cbd_t __iomem *bdp;
 235         u16 status;
 236         unsigned int flg;
 237
 238         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 239
 240         /* Just loop through the closed BDs and copy the characters into
 241          * the buffer.
 242          */
 243         bdp = pinfo->rx_cur;
 244         for (;;) {
 245 #ifdef CONFIG_CONSOLE_POLL
 246                 if (unlikely(serial_polled)) {
 247                         serial_polled = 0;
 248                         return;
 249                 }
 250 #endif
 251                 /* get status */
 252                 status = in_be16(&bdp->cbd_sc);
 253                 /* If this one is empty, return happy */
 254                 if (status & BD_SC_EMPTY)
 255                         break;
 256
 257                 /* get number of characters, and check spce in flip-buffer */
 258                 i = in_be16(&bdp->cbd_datlen);
 259
 260                 /* If we have not enough room in tty flip buffer, then we try
 261                  * later, which will be the next rx-interrupt or a timeout
 262                  */
 263                 if (tty_buffer_request_room(tport, i) < i) {
 264                         printk(KERN_WARNING "No room in flip buffer\n");
 265                         return;
 266                 }
 267
 268                 /* get pointer */
 269                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 270
 271                 /* loop through the buffer */
 272                 while (i-- > 0) {
 273                         ch = *cp++;
 274                         port->icount.rx++;
 275                         flg = TTY_NORMAL;
 276
 277                         if (status &
 278                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 279                                 goto handle_error;
 280                         if (uart_handle_sysrq_char(port, ch))
 281                                 continue;
 282 #ifdef CONFIG_CONSOLE_POLL
 283                         if (unlikely(serial_polled)) {
 284                                 serial_polled = 0;
 285                                 return;
 286                         }
 287 #endif
 288                       error_return:
 289                         tty_insert_flip_char(tport, ch, flg);
 290
 291                 }               /* End while (i--) */
 292
 293                 /* This BD is ready to be used again. Clear status. get next */
 294                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 295                                         BD_SC_OV | BD_SC_ID);
 296                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 297
 298                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 299                         bdp = pinfo->rx_bd_base;
 300                 else
 301                         bdp++;
 302
 303         } /* End for (;;) */
 304
 305         /* Write back buffer pointer */
 306         pinfo->rx_cur = bdp;
 307
 308         /* activate BH processing */
 309         tty_flip_buffer_push(tport);
 310
 311         return;
 312
 313         /* Error processing */
 314
 315       handle_error:
 316         /* Statistics */
 317         if (status & BD_SC_BR)
 318                 port->icount.brk++;
 319         if (status & BD_SC_PR)
 320                 port->icount.parity++;
 321         if (status & BD_SC_FR)
 322                 port->icount.frame++;
 323         if (status & BD_SC_OV)
 324                 port->icount.overrun++;
 325
 326         /* Mask out ignored conditions */
 327         status &= port->read_status_mask;
 328
 329         /* Handle the remaining ones */
 330         if (status & BD_SC_BR)
 331                 flg = TTY_BREAK;
 332         else if (status & BD_SC_PR)
 333                 flg = TTY_PARITY;
 334         else if (status & BD_SC_FR)
 335                 flg = TTY_FRAME;
 336
 337         /* overrun does not affect the current character ! */
 338         if (status & BD_SC_OV) {
 339                 ch = 0;
 340                 flg = TTY_OVERRUN;
 341                 /* We skip this buffer */
 342                 /* CHECK: Is really nothing senseful there */
 343                 /* ASSUMPTION: it contains nothing valid */
 344                 i = 0;
 345         }
 346         port->sysrq = 0;
 347         goto error_return;
 348 }
 349
 350 /*
 351  * Asynchron mode interrupt handler
 352  */
 353 static irqreturn_t cpm_uart_int(int irq, void *data)
 354 {
 355         u8 events;
 356         struct uart_port *port = data;
 357         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 358         smc_t __iomem *smcp = pinfo->smcp;
 359         scc_t __iomem *sccp = pinfo->sccp;
 360
 361         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 362
 363         if (IS_SMC(pinfo)) {
 364                 events = in_8(&smcp->smc_smce);
 365                 out_8(&smcp->smc_smce, events);
 366                 if (events & SMCM_BRKE)
 367                         uart_handle_break(port);
 368                 if (events & SMCM_RX)
 369                         cpm_uart_int_rx(port);
 370                 if (events & SMCM_TX)
 371                         cpm_uart_int_tx(port);
 372         } else {
 373                 events = in_be16(&sccp->scc_scce);
 374                 out_be16(&sccp->scc_scce, events);
 375                 if (events & UART_SCCM_BRKE)
 376                         uart_handle_break(port);
 377                 if (events & UART_SCCM_RX)
 378                         cpm_uart_int_rx(port);
 379                 if (events & UART_SCCM_TX)
 380                         cpm_uart_int_tx(port);
 381         }
 382         return (events) ? IRQ_HANDLED : IRQ_NONE;
 383 }
 384
 385 static int cpm_uart_startup(struct uart_port *port)
 386 {
 387         int retval;
 388         struct uart_cpm_port *pinfo =
 389                 container_of(port, struct uart_cpm_port, port);
 390
 391         pr_debug("CPM uart[%d]:startup\n", port->line);
 392
 393         /* If the port is not the console, make sure rx is disabled. */
 394         if (!(pinfo->flags & FLAG_CONSOLE)) {
 395                 /* Disable UART rx */
 396                 if (IS_SMC(pinfo)) {
 397                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
 398                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 399                 } else {
 400                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
 401                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 402                 }
 403                 cpm_uart_initbd(pinfo);
 404                 if (IS_SMC(pinfo)) {
 405                         out_be32(&pinfo->smcup->smc_rstate, 0);
 406                         out_be32(&pinfo->smcup->smc_tstate, 0);
 407                         out_be16(&pinfo->smcup->smc_rbptr,
 408                                  in_be16(&pinfo->smcup->smc_rbase));
 409                         out_be16(&pinfo->smcup->smc_tbptr,
 410                                  in_be16(&pinfo->smcup->smc_tbase));
 411                 } else {
 412                         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 413                 }
 414         }
 415         /* Install interrupt handler. */
 416         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 417         if (retval)
 418                 return retval;
 419
 420         /* Startup rx-int */
 421         if (IS_SMC(pinfo)) {
 422                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 423                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 424         } else {
 425                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 426                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 427         }
 428
 429         return 0;
 430 }
 431
 432 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 433 {
 434         set_current_state(TASK_UNINTERRUPTIBLE);
 435         schedule_timeout(pinfo->wait_closing);
 436 }
 437
 438 /*
 439  * Shutdown the uart
 440  */
 441 static void cpm_uart_shutdown(struct uart_port *port)
 442 {
 443         struct uart_cpm_port *pinfo =
 444                 container_of(port, struct uart_cpm_port, port);
 445
 446         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 447
 448         /* free interrupt handler */
 449         free_irq(port->irq, port);
 450
 451         /* If the port is not the console, disable Rx and Tx. */
 452         if (!(pinfo->flags & FLAG_CONSOLE)) {
 453                 /* Wait for all the BDs marked sent */
 454                 while(!cpm_uart_tx_empty(port)) {
 455                         set_current_state(TASK_UNINTERRUPTIBLE);
 456                         schedule_timeout(2);
 457                 }
 458
 459                 if (pinfo->wait_closing)
 460                         cpm_uart_wait_until_send(pinfo);
 461
 462                 /* Stop uarts */
 463                 if (IS_SMC(pinfo)) {
 464                         smc_t __iomem *smcp = pinfo->smcp;
 465                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 466                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 467                 } else {
 468                         scc_t __iomem *sccp = pinfo->sccp;
 469                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 470                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 471                 }
 472
 473                 /* Shut them really down and reinit buffer descriptors */
 474                 if (IS_SMC(pinfo)) {
 475                         out_be16(&pinfo->smcup->smc_brkcr, 0);
 476                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 477                 } else {
 478                         out_be16(&pinfo->sccup->scc_brkcr, 0);
 479                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 480                 }
 481
 482                 cpm_uart_initbd(pinfo);
 483         }
 484 }
 485
 486 static void cpm_uart_set_termios(struct uart_port *port,
 487                                  struct ktermios *termios,
 488                                  struct ktermios *old)
 489 {
 490         int baud;
 491         unsigned long flags;
 492         u16 cval, scval, prev_mode;
 493         int bits, sbits;
 494         struct uart_cpm_port *pinfo =
 495                 container_of(port, struct uart_cpm_port, port);
 496         smc_t __iomem *smcp = pinfo->smcp;
 497         scc_t __iomem *sccp = pinfo->sccp;
 498         int maxidl;
 499
 500         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 501
 502         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 503         if (baud < HW_BUF_SPD_THRESHOLD ||
 504             (pinfo->port.state && pinfo->port.state->port.low_latency))
 505                 pinfo->rx_fifosize = 1;
 506         else
 507                 pinfo->rx_fifosize = RX_BUF_SIZE;
 508
 509         /* MAXIDL is the timeout after which a receive buffer is closed
 510          * when not full if no more characters are received.
 511          * We calculate it from the baudrate so that the duration is
 512          * always the same at standard rates: about 4ms.
 513          */
 514         maxidl = baud / 2400;
 515         if (maxidl < 1)
 516                 maxidl = 1;
 517         if (maxidl > 0x10)
 518                 maxidl = 0x10;
 519
 520         /* Character length programmed into the mode register is the
 521          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 522          * 1 or 2 stop bits, minus 1.
 523          * The value 'bits' counts this for us.
 524          */
 525         cval = 0;
 526         scval = 0;
 527
 528         /* byte size */
 529         switch (termios->c_cflag & CSIZE) {
 530         case CS5:
 531                 bits = 5;
 532                 break;
 533         case CS6:
 534                 bits = 6;
 535                 break;
 536         case CS7:
 537                 bits = 7;
 538                 break;
 539         case CS8:
 540                 bits = 8;
 541                 break;
 542                 /* Never happens, but GCC is too dumb to figure it out */
 543         default:
 544                 bits = 8;
 545                 break;
 546         }
 547         sbits = bits - 5;
 548
 549         if (termios->c_cflag & CSTOPB) {
 550                 cval |= SMCMR_SL;       /* Two stops */
 551                 scval |= SCU_PSMR_SL;
 552                 bits++;
 553         }
 554
 555         if (termios->c_cflag & PARENB) {
 556                 cval |= SMCMR_PEN;
 557                 scval |= SCU_PSMR_PEN;
 558                 bits++;
 559                 if (!(termios->c_cflag & PARODD)) {
 560                         cval |= SMCMR_PM_EVEN;
 561                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 562                 }
 563         }
 564
 565         /*
 566          * Update the timeout
 567          */
 568         uart_update_timeout(port, termios->c_cflag, baud);
 569
 570         /*
 571          * Set up parity check flag
 572          */
 573         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 574         if (termios->c_iflag & INPCK)
 575                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 576         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 577                 port->read_status_mask |= BD_SC_BR;
 578
 579         /*
 580          * Characters to ignore
 581          */
 582         port->ignore_status_mask = 0;
 583         if (termios->c_iflag & IGNPAR)
 584                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 585         if (termios->c_iflag & IGNBRK) {
 586                 port->ignore_status_mask |= BD_SC_BR;
 587                 /*
 588                  * If we're ignore parity and break indicators, ignore
 589                  * overruns too.  (For real raw support).
 590                  */
 591                 if (termios->c_iflag & IGNPAR)
 592                         port->ignore_status_mask |= BD_SC_OV;
 593         }
 594         /*
 595          * !!! ignore all characters if CREAD is not set
 596          */
 597         if ((termios->c_cflag & CREAD) == 0)
 598                 port->read_status_mask &= ~BD_SC_EMPTY;
 599
 600         spin_lock_irqsave(&port->lock, flags);
 601
 602         /* Start bit has not been added (so don't, because we would just
 603          * subtract it later), and we need to add one for the number of
 604          * stops bits (there is always at least one).
 605          */
 606         bits++;
 607         if (IS_SMC(pinfo)) {
 608                 /*
 609                  * MRBLR can be changed while an SMC/SCC is operating only
 610                  * if it is done in a single bus cycle with one 16-bit move
 611                  * (not two 8-bit bus cycles back-to-back). This occurs when
 612                  * the cp shifts control to the next RxBD, so the change does
 613                  * not take effect immediately. To guarantee the exact RxBD
 614                  * on which the change occurs, change MRBLR only while the
 615                  * SMC/SCC receiver is disabled.
 616                  */
 617                 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
 618                 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
 619
 620                 /* Set the mode register.  We want to keep a copy of the
 621                  * enables, because we want to put them back if they were
 622                  * present.
 623                  */
 624                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
 625                 /* Output in *one* operation, so we don't interrupt RX/TX if they
 626                  * were already enabled. */
 627                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
 628                     SMCMR_SM_UART | prev_mode);
 629         } else {
 630                 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 631                 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
 632                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 633         }
 634
 635         if (pinfo->clk)
 636                 clk_set_rate(pinfo->clk, baud);
 637         else
 638                 cpm_set_brg(pinfo->brg - 1, baud);
 639         spin_unlock_irqrestore(&port->lock, flags);
 640 }
 641
 642 static const char *cpm_uart_type(struct uart_port *port)
 643 {
 644         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 645
 646         return port->type == PORT_CPM ? "CPM UART" : NULL;
 647 }
 648
 649 /*
 650  * verify the new serial_struct (for TIOCSSERIAL).
 651  */
 652 static int cpm_uart_verify_port(struct uart_port *port,
 653                                 struct serial_struct *ser)
 654 {
 655         int ret = 0;
 656
 657         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 658
 659         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 660                 ret = -EINVAL;
 661         if (ser->irq < 0 || ser->irq >= nr_irqs)
 662                 ret = -EINVAL;
 663         if (ser->baud_base < 9600)
 664                 ret = -EINVAL;
 665         return ret;
 666 }
 667
 668 /*
 669  * Transmit characters, refill buffer descriptor, if possible
 670  */
 671 static int cpm_uart_tx_pump(struct uart_port *port)
 672 {
 673         cbd_t __iomem *bdp;
 674         u8 *p;
 675         int count;
 676         struct uart_cpm_port *pinfo =
 677                 container_of(port, struct uart_cpm_port, port);
 678         struct circ_buf *xmit = &port->state->xmit;
 679
 680         /* Handle xon/xoff */
 681         if (port->x_char) {
 682                 /* Pick next descriptor and fill from buffer */
 683                 bdp = pinfo->tx_cur;
 684
 685                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 686
 687                 *p++ = port->x_char;
 688
 689                 out_be16(&bdp->cbd_datlen, 1);
 690                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 691                 /* Get next BD. */
 692                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 693                         bdp = pinfo->tx_bd_base;
 694                 else
 695                         bdp++;
 696                 pinfo->tx_cur = bdp;
 697
 698                 port->icount.tx++;
 699                 port->x_char = 0;
 700                 return 1;
 701         }
 702
 703         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 704                 cpm_uart_stop_tx(port);
 705                 return 0;
 706         }
 707
 708         /* Pick next descriptor and fill from buffer */
 709         bdp = pinfo->tx_cur;
 710
 711         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 712                xmit->tail != xmit->head) {
 713                 count = 0;
 714                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 715                 while (count < pinfo->tx_fifosize) {
 716                         *p++ = xmit->buf[xmit->tail];
 717                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 718                         port->icount.tx++;
 719                         count++;
 720                         if (xmit->head == xmit->tail)
 721                                 break;
 722                 }
 723                 out_be16(&bdp->cbd_datlen, count);
 724                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 725                 /* Get next BD. */
 726                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 727                         bdp = pinfo->tx_bd_base;
 728                 else
 729                         bdp++;
 730         }
 731         pinfo->tx_cur = bdp;
 732
 733         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 734                 uart_write_wakeup(port);
 735
 736         if (uart_circ_empty(xmit)) {
 737                 cpm_uart_stop_tx(port);
 738                 return 0;
 739         }
 740
 741         return 1;
 742 }
 743
 744 /*
 745  * init buffer descriptors
 746  */
 747 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 748 {
 749         int i;
 750         u8 *mem_addr;
 751         cbd_t __iomem *bdp;
 752
 753         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 754
 755         /* Set the physical address of the host memory
 756          * buffers in the buffer descriptors, and the
 757          * virtual address for us to work with.
 758          */
 759         mem_addr = pinfo->mem_addr;
 760         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 761         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 762                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 763                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 764                 mem_addr += pinfo->rx_fifosize;
 765         }
 766
 767         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 768         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 769
 770         /* Set the physical address of the host memory
 771          * buffers in the buffer descriptors, and the
 772          * virtual address for us to work with.
 773          */
 774         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 775         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 776         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 777                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 778                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 779                 mem_addr += pinfo->tx_fifosize;
 780         }
 781
 782         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 783         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 784 }
 785
 786 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 787 {
 788         scc_t __iomem *scp;
 789         scc_uart_t __iomem *sup;
 790
 791         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 792
 793         scp = pinfo->sccp;
 794         sup = pinfo->sccup;
 795
 796         /* Store address */
 797         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 798                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 799         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 800                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 801
 802         /* Set up the uart parameters in the
 803          * parameter ram.
 804          */
 805
 806         cpm_set_scc_fcr(sup);
 807
 808         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 809         out_be16(&sup->scc_maxidl, 0x10);
 810         out_be16(&sup->scc_brkcr, 1);
 811         out_be16(&sup->scc_parec, 0);
 812         out_be16(&sup->scc_frmec, 0);
 813         out_be16(&sup->scc_nosec, 0);
 814         out_be16(&sup->scc_brkec, 0);
 815         out_be16(&sup->scc_uaddr1, 0);
 816         out_be16(&sup->scc_uaddr2, 0);
 817         out_be16(&sup->scc_toseq, 0);
 818         out_be16(&sup->scc_char1, 0x8000);
 819         out_be16(&sup->scc_char2, 0x8000);
 820         out_be16(&sup->scc_char3, 0x8000);
 821         out_be16(&sup->scc_char4, 0x8000);
 822         out_be16(&sup->scc_char5, 0x8000);
 823         out_be16(&sup->scc_char6, 0x8000);
 824         out_be16(&sup->scc_char7, 0x8000);
 825         out_be16(&sup->scc_char8, 0x8000);
 826         out_be16(&sup->scc_rccm, 0xc0ff);
 827
 828         /* Send the CPM an initialize command.
 829          */
 830         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 831
 832         /* Set UART mode, 8 bit, no parity, one stop.
 833          * Enable receive and transmit.
 834          */
 835         out_be32(&scp->scc_gsmrh, 0);
 836         out_be32(&scp->scc_gsmrl,
 837                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 838
 839         /* Enable rx interrupts  and clear all pending events.  */
 840         out_be16(&scp->scc_sccm, 0);
 841         out_be16(&scp->scc_scce, 0xffff);
 842         out_be16(&scp->scc_dsr, 0x7e7e);
 843         out_be16(&scp->scc_psmr, 0x3000);
 844
 845         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 846 }
 847
 848 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 849 {
 850         smc_t __iomem *sp;
 851         smc_uart_t __iomem *up;
 852
 853         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 854
 855         sp = pinfo->smcp;
 856         up = pinfo->smcup;
 857
 858         /* Store address */
 859         out_be16(&pinfo->smcup->smc_rbase,
 860                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 861         out_be16(&pinfo->smcup->smc_tbase,
 862                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 863
 864 /*
 865  *  In case SMC is being relocated...
 866  */
 867         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 868         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 869         out_be32(&up->smc_rstate, 0);
 870         out_be32(&up->smc_tstate, 0);
 871         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 872         out_be16(&up->smc_brkec, 0);
 873
 874         /* Set up the uart parameters in the
 875          * parameter ram.
 876          */
 877         cpm_set_smc_fcr(up);
 878
 879         /* Using idle character time requires some additional tuning.  */
 880         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 881         out_be16(&up->smc_maxidl, 0x10);
 882         out_be16(&up->smc_brklen, 0);
 883         out_be16(&up->smc_brkec, 0);
 884         out_be16(&up->smc_brkcr, 1);
 885
 886         /* Set UART mode, 8 bit, no parity, one stop.
 887          * Enable receive and transmit.
 888          */
 889         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 890
 891         /* Enable only rx interrupts clear all pending events. */
 892         out_8(&sp->smc_smcm, 0);
 893         out_8(&sp->smc_smce, 0xff);
 894
 895         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 896 }
 897
 898 /*
 899  * Initialize port. This is called from early_console stuff
 900  * so we have to be careful here !
 901  */
 902 static int cpm_uart_request_port(struct uart_port *port)
 903 {
 904         struct uart_cpm_port *pinfo =
 905                 container_of(port, struct uart_cpm_port, port);
 906         int ret;
 907
 908         pr_debug("CPM uart[%d]:request port\n", port->line);
 909
 910         if (pinfo->flags & FLAG_CONSOLE)
 911                 return 0;
 912
 913         if (IS_SMC(pinfo)) {
 914                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 915                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 916         } else {
 917                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 918                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 919         }
 920
 921         ret = cpm_uart_allocbuf(pinfo, 0);
 922
 923         if (ret)
 924                 return ret;
 925
 926         cpm_uart_initbd(pinfo);
 927         if (IS_SMC(pinfo))
 928                 cpm_uart_init_smc(pinfo);
 929         else
 930                 cpm_uart_init_scc(pinfo);
 931
 932         return 0;
 933 }
 934
 935 static void cpm_uart_release_port(struct uart_port *port)
 936 {
 937         struct uart_cpm_port *pinfo =
 938                 container_of(port, struct uart_cpm_port, port);
 939
 940         if (!(pinfo->flags & FLAG_CONSOLE))
 941                 cpm_uart_freebuf(pinfo);
 942 }
 943
 944 /*
 945  * Configure/autoconfigure the port.
 946  */
 947 static void cpm_uart_config_port(struct uart_port *port, int flags)
 948 {
 949         pr_debug("CPM uart[%d]:config_port\n", port->line);
 950
 951         if (flags & UART_CONFIG_TYPE) {
 952                 port->type = PORT_CPM;
 953                 cpm_uart_request_port(port);
 954         }
 955 }
 956
 957 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
 958 /*
 959  * Write a string to the serial port
 960  * Note that this is called with interrupts already disabled
 961  */
 962 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
 963                 const char *string, u_int count, bool handle_linefeed)
 964 {
 965         unsigned int i;
 966         cbd_t __iomem *bdp, *bdbase;
 967         unsigned char *cpm_outp_addr;
 968
 969         /* Get the address of the host memory buffer.
 970          */
 971         bdp = pinfo->tx_cur;
 972         bdbase = pinfo->tx_bd_base;
 973
 974         /*
 975          * Now, do each character.  This is not as bad as it looks
 976          * since this is a holding FIFO and not a transmitting FIFO.
 977          * We could add the complexity of filling the entire transmit
 978          * buffer, but we would just wait longer between accesses......
 979          */
 980         for (i = 0; i < count; i++, string++) {
 981                 /* Wait for transmitter fifo to empty.
 982                  * Ready indicates output is ready, and xmt is doing
 983                  * that, not that it is ready for us to send.
 984                  */
 985                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
 986                         ;
 987
 988                 /* Send the character out.
 989                  * If the buffer address is in the CPM DPRAM, don't
 990                  * convert it.
 991                  */
 992                 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
 993                                         pinfo);
 994                 *cpm_outp_addr = *string;
 995
 996                 out_be16(&bdp->cbd_datlen, 1);
 997                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 998
 999                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1000                         bdp = bdbase;
1001                 else
1002                         bdp++;
1003
1004                 /* if a LF, also do CR... */
1005                 if (handle_linefeed && *string == 10) {
1006                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1007                                 ;
1008
1009                         cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1010                                                 pinfo);
1011                         *cpm_outp_addr = 13;
1012
1013                         out_be16(&bdp->cbd_datlen, 1);
1014                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1015
1016                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1017                                 bdp = bdbase;
1018                         else
1019                                 bdp++;
1020                 }
1021         }
1022
1023         /*
1024          * Finally, Wait for transmitter & holding register to empty
1025          *  and restore the IER
1026          */
1027         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1028                 ;
1029
1030         pinfo->tx_cur = bdp;
1031 }
1032 #endif
1033
1034 #ifdef CONFIG_CONSOLE_POLL
1035 /* Serial polling routines for writing and reading from the uart while
1036  * in an interrupt or debug context.
1037  */
1038
1039 #define GDB_BUF_SIZE    512     /* power of 2, please */
1040
1041 static char poll_buf[GDB_BUF_SIZE];
1042 static char *pollp;
1043 static int poll_chars;
1044
1045 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1046 {
1047         u_char          c, *cp;
1048         volatile cbd_t  *bdp;
1049         int             i;
1050
1051         /* Get the address of the host memory buffer.
1052          */
1053         bdp = pinfo->rx_cur;
1054         if (bdp->cbd_sc & BD_SC_EMPTY)
1055                 return NO_POLL_CHAR;
1056
1057         /* If the buffer address is in the CPM DPRAM, don't
1058          * convert it.
1059          */
1060         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1061
1062         if (obuf) {
1063                 i = c = bdp->cbd_datlen;
1064                 while (i-- > 0)
1065                         *obuf++ = *cp++;
1066         } else
1067                 c = *cp;
1068         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1069         bdp->cbd_sc |= BD_SC_EMPTY;
1070
1071         if (bdp->cbd_sc & BD_SC_WRAP)
1072                 bdp = pinfo->rx_bd_base;
1073         else
1074                 bdp++;
1075         pinfo->rx_cur = (cbd_t *)bdp;
1076
1077         return (int)c;
1078 }
1079
1080 static int cpm_get_poll_char(struct uart_port *port)
1081 {
1082         struct uart_cpm_port *pinfo =
1083                 container_of(port, struct uart_cpm_port, port);
1084
1085         if (!serial_polled) {
1086                 serial_polled = 1;
1087                 poll_chars = 0;
1088         }
1089         if (poll_chars <= 0) {
1090                 int ret = poll_wait_key(poll_buf, pinfo);
1091
1092                 if (ret == NO_POLL_CHAR)
1093                         return ret;
1094                 poll_chars = ret;
1095                 pollp = poll_buf;
1096         }
1097         poll_chars--;
1098         return *pollp++;
1099 }
1100
1101 static void cpm_put_poll_char(struct uart_port *port,
1102                          unsigned char c)
1103 {
1104         struct uart_cpm_port *pinfo =
1105                 container_of(port, struct uart_cpm_port, port);
1106         static char ch[2];
1107
1108         ch[0] = (char)c;
1109         cpm_uart_early_write(pinfo, ch, 1, false);
1110 }
1111 #endif /* CONFIG_CONSOLE_POLL */
1112
1113 static const struct uart_ops cpm_uart_pops = {
1114         .tx_empty       = cpm_uart_tx_empty,
1115         .set_mctrl      = cpm_uart_set_mctrl,
1116         .get_mctrl      = cpm_uart_get_mctrl,
1117         .stop_tx        = cpm_uart_stop_tx,
1118         .start_tx       = cpm_uart_start_tx,
1119         .stop_rx        = cpm_uart_stop_rx,
1120         .break_ctl      = cpm_uart_break_ctl,
1121         .startup        = cpm_uart_startup,
1122         .shutdown       = cpm_uart_shutdown,
1123         .set_termios    = cpm_uart_set_termios,
1124         .type           = cpm_uart_type,
1125         .release_port   = cpm_uart_release_port,
1126         .request_port   = cpm_uart_request_port,
1127         .config_port    = cpm_uart_config_port,
1128         .verify_port    = cpm_uart_verify_port,
1129 #ifdef CONFIG_CONSOLE_POLL
1130         .poll_get_char = cpm_get_poll_char,
1131         .poll_put_char = cpm_put_poll_char,
1132 #endif
1133 };
1134
1135 struct uart_cpm_port cpm_uart_ports[UART_NR];
1136
1137 static int cpm_uart_init_port(struct device_node *np,
1138                               struct uart_cpm_port *pinfo)
1139 {
1140         const u32 *data;
1141         void __iomem *mem, *pram;
1142         int len;
1143         int ret;
1144         int i;
1145
1146         data = of_get_property(np, "clock", NULL);
1147         if (data) {
1148                 struct clk *clk = clk_get(NULL, (const char*)data);
1149                 if (!IS_ERR(clk))
1150                         pinfo->clk = clk;
1151         }
1152         if (!pinfo->clk) {
1153                 data = of_get_property(np, "fsl,cpm-brg", &len);
1154                 if (!data || len != 4) {
1155                         printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1156                                         "fsl,cpm-brg property.\n", np);
1157                         return -EINVAL;
1158                 }
1159                 pinfo->brg = *data;
1160         }
1161
1162         data = of_get_property(np, "fsl,cpm-command", &len);
1163         if (!data || len != 4) {
1164                 printk(KERN_ERR "CPM UART %pOFn has no/invalid "
1165                                 "fsl,cpm-command property.\n", np);
1166                 return -EINVAL;
1167         }
1168         pinfo->command = *data;
1169
1170         mem = of_iomap(np, 0);
1171         if (!mem)
1172                 return -ENOMEM;
1173
1174         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1175             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1176                 pinfo->sccp = mem;
1177                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1178         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1179                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1180                 pinfo->flags |= FLAG_SMC;
1181                 pinfo->smcp = mem;
1182                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1183         } else {
1184                 ret = -ENODEV;
1185                 goto out_mem;
1186         }
1187
1188         if (!pram) {
1189                 ret = -ENOMEM;
1190                 goto out_mem;
1191         }
1192
1193         pinfo->tx_nrfifos = TX_NUM_FIFO;
1194         pinfo->tx_fifosize = TX_BUF_SIZE;
1195         pinfo->rx_nrfifos = RX_NUM_FIFO;
1196         pinfo->rx_fifosize = RX_BUF_SIZE;
1197
1198         pinfo->port.uartclk = ppc_proc_freq;
1199         pinfo->port.mapbase = (unsigned long)mem;
1200         pinfo->port.type = PORT_CPM;
1201         pinfo->port.ops = &cpm_uart_pops;
1202         pinfo->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_CPM_CONSOLE);
1203         pinfo->port.iotype = UPIO_MEM;
1204         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1205         spin_lock_init(&pinfo->port.lock);
1206
1207         pinfo->port.irq = irq_of_parse_and_map(np, 0);
1208         if (pinfo->port.irq == NO_IRQ) {
1209                 ret = -EINVAL;
1210                 goto out_pram;
1211         }
1212
1213         for (i = 0; i < NUM_GPIOS; i++) {
1214                 int gpio;
1215
1216                 pinfo->gpios[i] = -1;
1217
1218                 gpio = of_get_gpio(np, i);
1219
1220                 if (gpio_is_valid(gpio)) {
1221                         ret = gpio_request(gpio, "cpm_uart");
1222                         if (ret) {
1223                                 pr_err("can't request gpio #%d: %d\n", i, ret);
1224                                 continue;
1225                         }
1226                         if (i == GPIO_RTS || i == GPIO_DTR)
1227                                 ret = gpio_direction_output(gpio, 0);
1228                         else
1229                                 ret = gpio_direction_input(gpio);
1230                         if (ret) {
1231                                 pr_err("can't set direction for gpio #%d: %d\n",
1232                                         i, ret);
1233                                 gpio_free(gpio);
1234                                 continue;
1235                         }
1236                         pinfo->gpios[i] = gpio;
1237                 }
1238         }
1239
1240 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1241         udbg_putc = NULL;
1242 #endif
1243
1244         return cpm_uart_request_port(&pinfo->port);
1245
1246 out_pram:
1247         cpm_uart_unmap_pram(pinfo, pram);
1248 out_mem:
1249         iounmap(mem);
1250         return ret;
1251 }
1252
1253 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1254 /*
1255  *      Print a string to the serial port trying not to disturb
1256  *      any possible real use of the port...
1257  *
1258  *      Note that this is called with interrupts already disabled
1259  */
1260 static void cpm_uart_console_write(struct console *co, const char *s,
1261                                    u_int count)
1262 {
1263         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1264         unsigned long flags;
1265         int nolock = oops_in_progress;
1266
1267         if (unlikely(nolock)) {
1268                 local_irq_save(flags);
1269         } else {
1270                 spin_lock_irqsave(&pinfo->port.lock, flags);
1271         }
1272
1273         cpm_uart_early_write(pinfo, s, count, true);
1274
1275         if (unlikely(nolock)) {
1276                 local_irq_restore(flags);
1277         } else {
1278                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1279         }
1280 }
1281
1282
1283 static int __init cpm_uart_console_setup(struct console *co, char *options)
1284 {
1285         int baud = 38400;
1286         int bits = 8;
1287         int parity = 'n';
1288         int flow = 'n';
1289         int ret;
1290         struct uart_cpm_port *pinfo;
1291         struct uart_port *port;
1292
1293         struct device_node *np;
1294         int i = 0;
1295
1296         if (co->index >= UART_NR) {
1297                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1298                        co->index);
1299                 return -ENODEV;
1300         }
1301
1302         for_each_node_by_type(np, "serial") {
1303                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1304                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1305                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1306                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1307                         continue;
1308
1309                 if (i++ == co->index)
1310                         break;
1311         }
1312
1313         if (!np)
1314                 return -ENODEV;
1315
1316         pinfo = &cpm_uart_ports[co->index];
1317
1318         pinfo->flags |= FLAG_CONSOLE;
1319         port = &pinfo->port;
1320
1321         ret = cpm_uart_init_port(np, pinfo);
1322         of_node_put(np);
1323         if (ret)
1324                 return ret;
1325
1326         if (options) {
1327                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1328         } else {
1329                 if ((baud = uart_baudrate()) == -1)
1330                         baud = 9600;
1331         }
1332
1333         if (IS_SMC(pinfo)) {
1334                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1335                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1336                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1337                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1338         } else {
1339                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1340                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1341                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1342                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1343         }
1344
1345         ret = cpm_uart_allocbuf(pinfo, 1);
1346
1347         if (ret)
1348                 return ret;
1349
1350         cpm_uart_initbd(pinfo);
1351
1352         if (IS_SMC(pinfo))
1353                 cpm_uart_init_smc(pinfo);
1354         else
1355                 cpm_uart_init_scc(pinfo);
1356
1357         uart_set_options(port, co, baud, parity, bits, flow);
1358         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1359
1360         return 0;
1361 }
1362
1363 static struct uart_driver cpm_reg;
1364 static struct console cpm_scc_uart_console = {
1365         .name           = "ttyCPM",
1366         .write          = cpm_uart_console_write,
1367         .device         = uart_console_device,
1368         .setup          = cpm_uart_console_setup,
1369         .flags          = CON_PRINTBUFFER,
1370         .index          = -1,
1371         .data           = &cpm_reg,
1372 };
1373
1374 static int __init cpm_uart_console_init(void)
1375 {
1376         register_console(&cpm_scc_uart_console);
1377         return 0;
1378 }
1379
1380 console_initcall(cpm_uart_console_init);
1381
1382 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1383 #else
1384 #define CPM_UART_CONSOLE        NULL
1385 #endif
1386
1387 static struct uart_driver cpm_reg = {
1388         .owner          = THIS_MODULE,
1389         .driver_name    = "ttyCPM",
1390         .dev_name       = "ttyCPM",
1391         .major          = SERIAL_CPM_MAJOR,
1392         .minor          = SERIAL_CPM_MINOR,
1393         .cons           = CPM_UART_CONSOLE,
1394         .nr             = UART_NR,
1395 };
1396
1397 static int probe_index;
1398
1399 static int cpm_uart_probe(struct platform_device *ofdev)
1400 {
1401         int index = probe_index++;
1402         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1403         int ret;
1404
1405         pinfo->port.line = index;
1406
1407         if (index >= UART_NR)
1408                 return -ENODEV;
1409
1410         platform_set_drvdata(ofdev, pinfo);
1411
1412         /* initialize the device pointer for the port */
1413         pinfo->port.dev = &ofdev->dev;
1414
1415         ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1416         if (ret)
1417                 return ret;
1418
1419         return uart_add_one_port(&cpm_reg, &pinfo->port);
1420 }
1421
1422 static int cpm_uart_remove(struct platform_device *ofdev)
1423 {
1424         struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1425         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1426 }
1427
1428 static const struct of_device_id cpm_uart_match[] = {
1429         {
1430                 .compatible = "fsl,cpm1-smc-uart",
1431         },
1432         {
1433                 .compatible = "fsl,cpm1-scc-uart",
1434         },
1435         {
1436                 .compatible = "fsl,cpm2-smc-uart",
1437         },
1438         {
1439                 .compatible = "fsl,cpm2-scc-uart",
1440         },
1441         {}
1442 };
1443 MODULE_DEVICE_TABLE(of, cpm_uart_match);
1444
1445 static struct platform_driver cpm_uart_driver = {
1446         .driver = {
1447                 .name = "cpm_uart",
1448                 .of_match_table = cpm_uart_match,
1449         },
1450         .probe = cpm_uart_probe,
1451         .remove = cpm_uart_remove,
1452  };
1453
1454 static int __init cpm_uart_init(void)
1455 {
1456         int ret = uart_register_driver(&cpm_reg);
1457         if (ret)
1458                 return ret;
1459
1460         ret = platform_driver_register(&cpm_uart_driver);
1461         if (ret)
1462                 uart_unregister_driver(&cpm_reg);
1463
1464         return ret;
1465 }
1466
1467 static void __exit cpm_uart_exit(void)
1468 {
1469         platform_driver_unregister(&cpm_uart_driver);
1470         uart_unregister_driver(&cpm_reg);
1471 }
1472
1473 module_init(cpm_uart_init);
1474 module_exit(cpm_uart_exit);
1475
1476 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1477 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1478 MODULE_LICENSE("GPL");
1479 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);