1 // SPDX-License-Identifier: GPL-2.0+
3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
8 * This code is loosely based on the 1.8 moxa driver which is based on
9 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
12 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
13 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
15 * - Fixed x86_64 cleanness
18 #include <linux/module.h>
19 #include <linux/errno.h>
20 #include <linux/signal.h>
21 #include <linux/sched.h>
22 #include <linux/timer.h>
23 #include <linux/interrupt.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/serial.h>
27 #include <linux/serial_reg.h>
28 #include <linux/major.h>
29 #include <linux/string.h>
30 #include <linux/fcntl.h>
31 #include <linux/ptrace.h>
32 #include <linux/ioport.h>
34 #include <linux/delay.h>
35 #include <linux/pci.h>
36 #include <linux/bitops.h>
37 #include <linux/slab.h>
38 #include <linux/ratelimit.h>
42 #include <linux/uaccess.h>
45 * Semi-public control interfaces
53 #define MOXA_SET_OP_MODE (MOXA + 66)
54 #define MOXA_GET_OP_MODE (MOXA + 67)
57 #define RS485_2WIRE_MODE 1
59 #define RS485_4WIRE_MODE 3
60 #define OP_MODE_MASK 3
62 /* --------------------------------------------------- */
65 * Follow just what Moxa Must chip defines.
67 * When LCR register (offset 0x03) is written the following value, the Must chip
68 * will enter enhanced mode. And a write to EFR (offset 0x02) bit 6,7 will
71 #define MOXA_MUST_ENTER_ENHANCED 0xBF
73 /* when enhanced mode is enabled, access to general bank register */
74 #define MOXA_MUST_GDL_REGISTER 0x07
75 #define MOXA_MUST_GDL_MASK 0x7F
76 #define MOXA_MUST_GDL_HAS_BAD_DATA 0x80
78 #define MOXA_MUST_LSR_RERR 0x80 /* error in receive FIFO */
79 /* enhanced register bank select and enhanced mode setting register */
80 /* This works only when LCR register equals to 0xBF */
81 #define MOXA_MUST_EFR_REGISTER 0x02
82 #define MOXA_MUST_EFR_EFRB_ENABLE 0x10 /* enhanced mode enable */
83 /* enhanced register bank set 0, 1, 2 */
84 #define MOXA_MUST_EFR_BANK0 0x00
85 #define MOXA_MUST_EFR_BANK1 0x40
86 #define MOXA_MUST_EFR_BANK2 0x80
87 #define MOXA_MUST_EFR_BANK3 0xC0
88 #define MOXA_MUST_EFR_BANK_MASK 0xC0
90 /* set XON1 value register, when LCR=0xBF and change to bank0 */
91 #define MOXA_MUST_XON1_REGISTER 0x04
93 /* set XON2 value register, when LCR=0xBF and change to bank0 */
94 #define MOXA_MUST_XON2_REGISTER 0x05
96 /* set XOFF1 value register, when LCR=0xBF and change to bank0 */
97 #define MOXA_MUST_XOFF1_REGISTER 0x06
99 /* set XOFF2 value register, when LCR=0xBF and change to bank0 */
100 #define MOXA_MUST_XOFF2_REGISTER 0x07
102 #define MOXA_MUST_RBRTL_REGISTER 0x04
103 #define MOXA_MUST_RBRTH_REGISTER 0x05
104 #define MOXA_MUST_RBRTI_REGISTER 0x06
105 #define MOXA_MUST_THRTL_REGISTER 0x07
106 #define MOXA_MUST_ENUM_REGISTER 0x04
107 #define MOXA_MUST_HWID_REGISTER 0x05
108 #define MOXA_MUST_ECR_REGISTER 0x06
109 #define MOXA_MUST_CSR_REGISTER 0x07
111 #define MOXA_MUST_FCR_GDA_MODE_ENABLE 0x20 /* good data mode enable */
112 #define MOXA_MUST_FCR_GDA_ONLY_ENABLE 0x10 /* only good data put into RxFIFO */
114 #define MOXA_MUST_IER_ECTSI 0x80 /* enable CTS interrupt */
115 #define MOXA_MUST_IER_ERTSI 0x40 /* enable RTS interrupt */
116 #define MOXA_MUST_IER_XINT 0x20 /* enable Xon/Xoff interrupt */
117 #define MOXA_MUST_IER_EGDAI 0x10 /* enable GDA interrupt */
119 #define MOXA_MUST_RECV_ISR (UART_IER_RDI | MOXA_MUST_IER_EGDAI)
121 /* GDA interrupt pending */
122 #define MOXA_MUST_IIR_GDA 0x1C
123 #define MOXA_MUST_IIR_RDA 0x04
124 #define MOXA_MUST_IIR_RTO 0x0C
125 #define MOXA_MUST_IIR_LSR 0x06
127 /* received Xon/Xoff or specical interrupt pending */
128 #define MOXA_MUST_IIR_XSC 0x10
130 /* RTS/CTS change state interrupt pending */
131 #define MOXA_MUST_IIR_RTSCTS 0x20
132 #define MOXA_MUST_IIR_MASK 0x3E
134 #define MOXA_MUST_MCR_XON_FLAG 0x40
135 #define MOXA_MUST_MCR_XON_ANY 0x80
136 #define MOXA_MUST_MCR_TX_XON 0x08
138 #define MOXA_MUST_EFR_SF_MASK 0x0F /* software flow control on chip mask value */
139 #define MOXA_MUST_EFR_SF_TX1 0x08 /* send Xon1/Xoff1 */
140 #define MOXA_MUST_EFR_SF_TX2 0x04 /* send Xon2/Xoff2 */
141 #define MOXA_MUST_EFR_SF_TX12 0x0C /* send Xon1,Xon2/Xoff1,Xoff2 */
142 #define MOXA_MUST_EFR_SF_TX_NO 0x00 /* don't send Xon/Xoff */
143 #define MOXA_MUST_EFR_SF_TX_MASK 0x0C /* Tx software flow control mask */
144 #define MOXA_MUST_EFR_SF_RX_NO 0x00 /* don't receive Xon/Xoff */
145 #define MOXA_MUST_EFR_SF_RX1 0x02 /* receive Xon1/Xoff1 */
146 #define MOXA_MUST_EFR_SF_RX2 0x01 /* receive Xon2/Xoff2 */
147 #define MOXA_MUST_EFR_SF_RX12 0x03 /* receive Xon1,Xon2/Xoff1,Xoff2 */
148 #define MOXA_MUST_EFR_SF_RX_MASK 0x03 /* Rx software flow control mask */
150 #define MXSERMAJOR 174
152 #define MXSER_BOARDS 4 /* Max. boards */
153 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
154 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
155 #define MXSER_ISR_PASS_LIMIT 100
157 #define WAKEUP_CHARS 256
159 #define MXSER_BAUD_BASE 921600
160 #define MXSER_CUSTOM_DIVISOR (MXSER_BAUD_BASE * 16)
162 #define PCI_DEVICE_ID_POS104UL 0x1044
163 #define PCI_DEVICE_ID_CB108 0x1080
164 #define PCI_DEVICE_ID_CP102UF 0x1023
165 #define PCI_DEVICE_ID_CP112UL 0x1120
166 #define PCI_DEVICE_ID_CB114 0x1142
167 #define PCI_DEVICE_ID_CP114UL 0x1143
168 #define PCI_DEVICE_ID_CB134I 0x1341
169 #define PCI_DEVICE_ID_CP138U 0x1380
171 #define MXSER_NPORTS(ddata) ((ddata) & 0xffU)
172 #define MXSER_HIGHBAUD 0x0100
174 enum mxser_must_hwid {
175 MOXA_OTHER_UART = 0x00,
176 MOXA_MUST_MU150_HWID = 0x01,
177 MOXA_MUST_MU860_HWID = 0x02,
180 static const struct {
186 } Gpci_uart_info[] = {
187 { MOXA_OTHER_UART, 16, 14, 1, 921600 },
188 { MOXA_MUST_MU150_HWID, 64, 48, 16, 230400 },
189 { MOXA_MUST_MU860_HWID, 128, 96, 32, 921600 }
191 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
194 /* driver_data correspond to the lines in the structure above
195 see also ISA probe function before you change something */
196 static const struct pci_device_id mxser_pcibrds[] = {
197 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 8 },
198 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
199 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 2 },
200 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 4 },
201 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 4 },
202 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 2 | MXSER_HIGHBAUD },
203 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 4 },
204 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 8 },
205 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 2 },
206 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 4 },
207 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 4 },
208 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 8 }, /* RC7000 */
209 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 8 },
210 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 2 },
211 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 2 },
212 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 8 },
213 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 8 },
214 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 4 },
215 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 8 },
216 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 4 },
217 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 4 },
218 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 8 },
219 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 4 },
220 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 4 },
221 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 2 },
222 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 2 },
225 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227 static int ttymajor = MXSERMAJOR;
229 /* Variables for insmod */
231 MODULE_AUTHOR("Casper Yang");
232 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
233 module_param(ttymajor, int, 0);
234 MODULE_LICENSE("GPL");
239 struct tty_port port;
240 struct mxser_board *board;
242 unsigned long ioaddr;
243 unsigned long opmode_ioaddr;
247 int type; /* UART type */
249 unsigned char x_char; /* xon/xoff character */
250 u8 IER; /* Interrupt Enable Register */
251 u8 MCR; /* Modem control register */
252 u8 FCR; /* FIFO control register */
256 struct async_icount icount; /* kernel counters for 4 input interrupts */
257 unsigned int timeout;
260 u8 ignore_status_mask;
262 unsigned int xmit_head;
263 unsigned int xmit_tail;
264 unsigned int xmit_cnt;
272 unsigned short nports;
274 unsigned long vector;
276 enum mxser_must_hwid must_hwid;
279 struct mxser_port ports[];
282 static DECLARE_BITMAP(mxser_boards, MXSER_BOARDS);
283 static struct tty_driver *mxvar_sdriver;
285 static u8 __mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set,
290 oldlcr = inb(baseio + UART_LCR);
291 outb(MOXA_MUST_ENTER_ENHANCED, baseio + UART_LCR);
293 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
297 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
300 outb(oldlcr, baseio + UART_LCR);
305 static u8 mxser_must_select_bank(unsigned long baseio, u8 bank)
307 return __mxser_must_set_EFR(baseio, MOXA_MUST_EFR_BANK_MASK, bank,
311 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
313 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
314 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
315 outb(oldlcr, baseio + UART_LCR);
318 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
320 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
321 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
322 outb(oldlcr, baseio + UART_LCR);
325 static void mxser_set_must_fifo_value(struct mxser_port *info)
327 u8 oldlcr = mxser_must_select_bank(info->ioaddr, MOXA_MUST_EFR_BANK1);
328 outb(info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
329 outb(info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
330 outb(info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
331 outb(oldlcr, info->ioaddr + UART_LCR);
334 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
336 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
337 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
338 outb(oldlcr, baseio + UART_LCR);
341 static u8 mxser_get_must_hardware_id(unsigned long baseio)
343 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
344 u8 id = inb(baseio + MOXA_MUST_HWID_REGISTER);
345 outb(oldlcr, baseio + UART_LCR);
350 static void mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set)
352 __mxser_must_set_EFR(baseio, clear, set, true);
355 static void mxser_must_set_enhance_mode(unsigned long baseio, bool enable)
357 mxser_must_set_EFR(baseio,
358 enable ? 0 : MOXA_MUST_EFR_EFRB_ENABLE,
359 enable ? MOXA_MUST_EFR_EFRB_ENABLE : 0);
362 static void mxser_must_no_sw_flow_control(unsigned long baseio)
364 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_MASK, 0);
367 static void mxser_must_set_tx_sw_flow_control(unsigned long baseio, bool enable)
369 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_TX_MASK,
370 enable ? MOXA_MUST_EFR_SF_TX1 : 0);
373 static void mxser_must_set_rx_sw_flow_control(unsigned long baseio, bool enable)
375 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_RX_MASK,
376 enable ? MOXA_MUST_EFR_SF_RX1 : 0);
379 static enum mxser_must_hwid mxser_must_get_hwid(unsigned long io)
384 outb(0, io + UART_LCR);
385 mxser_must_set_enhance_mode(io, false);
386 oldmcr = inb(io + UART_MCR);
387 outb(0, io + UART_MCR);
388 mxser_set_must_xon1_value(io, 0x11);
389 if ((hwid = inb(io + UART_MCR)) != 0) {
390 outb(oldmcr, io + UART_MCR);
391 return MOXA_OTHER_UART;
394 hwid = mxser_get_must_hardware_id(io);
395 for (i = 1; i < UART_INFO_NUM; i++) /* 0 = OTHER_UART */
396 if (hwid == Gpci_uart_info[i].type)
399 return MOXA_OTHER_UART;
402 static bool mxser_16550A_or_MUST(struct mxser_port *info)
404 return info->type == PORT_16550A || info->board->must_hwid;
407 static void mxser_process_txrx_fifo(struct mxser_port *info)
411 if (info->type == PORT_16450 || info->type == PORT_8250) {
412 info->rx_high_water = 1;
413 info->rx_low_water = 1;
414 info->xmit_fifo_size = 1;
418 for (i = 0; i < UART_INFO_NUM; i++)
419 if (info->board->must_hwid == Gpci_uart_info[i].type) {
420 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
421 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
422 info->xmit_fifo_size = Gpci_uart_info[i].fifo_size;
427 static void __mxser_start_tx(struct mxser_port *info)
429 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
430 info->IER |= UART_IER_THRI;
431 outb(info->IER, info->ioaddr + UART_IER);
434 static void mxser_start_tx(struct mxser_port *info)
438 spin_lock_irqsave(&info->slock, flags);
439 __mxser_start_tx(info);
440 spin_unlock_irqrestore(&info->slock, flags);
443 static void __mxser_stop_tx(struct mxser_port *info)
445 info->IER &= ~UART_IER_THRI;
446 outb(info->IER, info->ioaddr + UART_IER);
449 static int mxser_carrier_raised(struct tty_port *port)
451 struct mxser_port *mp = container_of(port, struct mxser_port, port);
452 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
455 static void mxser_dtr_rts(struct tty_port *port, int on)
457 struct mxser_port *mp = container_of(port, struct mxser_port, port);
461 spin_lock_irqsave(&mp->slock, flags);
462 mcr = inb(mp->ioaddr + UART_MCR);
464 mcr |= UART_MCR_DTR | UART_MCR_RTS;
466 mcr &= ~(UART_MCR_DTR | UART_MCR_RTS);
467 outb(mcr, mp->ioaddr + UART_MCR);
468 spin_unlock_irqrestore(&mp->slock, flags);
471 static int mxser_set_baud(struct tty_struct *tty, speed_t newspd)
473 struct mxser_port *info = tty->driver_data;
474 unsigned int quot = 0, baud;
478 if (newspd > info->board->max_baud)
482 quot = 2 * MXSER_BAUD_BASE / 269;
483 tty_encode_baud_rate(tty, 134, 134);
485 quot = MXSER_BAUD_BASE / newspd;
488 baud = MXSER_BAUD_BASE / quot;
489 tty_encode_baud_rate(tty, baud, baud);
495 * worst case (128 * 1000 * 10 * 18432) needs 35 bits, so divide in the
498 timeout = (u64)info->xmit_fifo_size * HZ * 10 * quot;
499 do_div(timeout, MXSER_BAUD_BASE);
500 info->timeout = timeout + HZ / 50; /* Add .02 seconds of slop */
503 info->MCR |= UART_MCR_DTR;
504 outb(info->MCR, info->ioaddr + UART_MCR);
506 info->MCR &= ~UART_MCR_DTR;
507 outb(info->MCR, info->ioaddr + UART_MCR);
511 cval = inb(info->ioaddr + UART_LCR);
513 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
515 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
516 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
517 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
520 if (C_BAUD(tty) == BOTHER) {
521 quot = MXSER_BAUD_BASE % newspd;
523 if (quot % newspd > newspd / 2) {
529 mxser_set_must_enum_value(info->ioaddr, quot);
532 mxser_set_must_enum_value(info->ioaddr, 0);
537 static void mxser_handle_cts(struct tty_struct *tty, struct mxser_port *info,
540 bool cts = msr & UART_MSR_CTS;
542 if (tty->hw_stopped) {
546 if (!mxser_16550A_or_MUST(info))
547 __mxser_start_tx(info);
555 if (!mxser_16550A_or_MUST(info))
556 __mxser_stop_tx(info);
560 * This routine is called to set the UART divisor registers to match
561 * the specified baud rate for a serial port.
563 static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_termios)
565 struct mxser_port *info = tty->driver_data;
566 unsigned cflag, cval;
568 cflag = tty->termios.c_cflag;
570 if (mxser_set_baud(tty, tty_get_baud_rate(tty))) {
571 /* Use previous rate on a failure */
573 speed_t baud = tty_termios_baud_rate(old_termios);
574 tty_encode_baud_rate(tty, baud, baud);
578 /* byte size and parity */
579 switch (cflag & CSIZE) {
582 cval = UART_LCR_WLEN5;
585 cval = UART_LCR_WLEN6;
588 cval = UART_LCR_WLEN7;
591 cval = UART_LCR_WLEN8;
596 cval |= UART_LCR_STOP;
598 cval |= UART_LCR_PARITY;
599 if (!(cflag & PARODD))
600 cval |= UART_LCR_EPAR;
602 cval |= UART_LCR_SPAR;
605 if (info->board->must_hwid) {
606 info->FCR |= UART_FCR_ENABLE_FIFO |
607 MOXA_MUST_FCR_GDA_MODE_ENABLE;
608 mxser_set_must_fifo_value(info);
609 } else if (info->type != PORT_8250 && info->type != PORT_16450) {
610 info->FCR |= UART_FCR_ENABLE_FIFO;
611 switch (info->rx_high_water) {
613 info->FCR |= UART_FCR_TRIGGER_1;
616 info->FCR |= UART_FCR_TRIGGER_4;
619 info->FCR |= UART_FCR_TRIGGER_8;
622 info->FCR |= UART_FCR_TRIGGER_14;
627 /* CTS flow control flag and modem status interrupts */
628 info->IER &= ~UART_IER_MSI;
629 info->MCR &= ~UART_MCR_AFE;
630 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
631 if (cflag & CRTSCTS) {
632 info->IER |= UART_IER_MSI;
633 if (mxser_16550A_or_MUST(info)) {
634 info->MCR |= UART_MCR_AFE;
636 mxser_handle_cts(tty, info,
637 inb(info->ioaddr + UART_MSR));
640 outb(info->MCR, info->ioaddr + UART_MCR);
641 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
643 info->IER |= UART_IER_MSI;
644 outb(info->IER, info->ioaddr + UART_IER);
647 * Set up parity check flag
649 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
651 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
652 if (I_BRKINT(tty) || I_PARMRK(tty))
653 info->read_status_mask |= UART_LSR_BI;
655 info->ignore_status_mask = 0;
658 info->ignore_status_mask |= UART_LSR_BI;
659 info->read_status_mask |= UART_LSR_BI;
661 * If we're ignore parity and break indicators, ignore
662 * overruns too. (For real raw support).
665 info->ignore_status_mask |=
669 info->read_status_mask |=
675 if (info->board->must_hwid) {
676 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
677 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
678 mxser_must_set_rx_sw_flow_control(info->ioaddr, I_IXON(tty));
679 mxser_must_set_tx_sw_flow_control(info->ioaddr, I_IXOFF(tty));
683 outb(info->FCR, info->ioaddr + UART_FCR);
684 outb(cval, info->ioaddr + UART_LCR);
687 static void mxser_check_modem_status(struct tty_struct *tty,
688 struct mxser_port *port, int status)
690 /* update input line counters */
691 if (status & UART_MSR_TERI)
693 if (status & UART_MSR_DDSR)
695 if (status & UART_MSR_DDCD)
697 if (status & UART_MSR_DCTS)
699 wake_up_interruptible(&port->port.delta_msr_wait);
701 if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
702 if (status & UART_MSR_DCD)
703 wake_up_interruptible(&port->port.open_wait);
706 if (tty_port_cts_enabled(&port->port))
707 mxser_handle_cts(tty, port, status);
710 static void mxser_disable_and_clear_FIFO(struct mxser_port *info)
712 u8 fcr = UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT;
714 if (info->board->must_hwid)
715 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
717 outb(fcr, info->ioaddr + UART_FCR);
720 static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
722 struct mxser_port *info = container_of(port, struct mxser_port, port);
726 page = __get_free_page(GFP_KERNEL);
730 spin_lock_irqsave(&info->slock, flags);
733 set_bit(TTY_IO_ERROR, &tty->flags);
735 spin_unlock_irqrestore(&info->slock, flags);
738 info->port.xmit_buf = (unsigned char *) page;
741 * Clear the FIFO buffers and disable them
742 * (they will be reenabled in mxser_change_speed())
744 mxser_disable_and_clear_FIFO(info);
747 * At this point there's no way the LSR could still be 0xFF;
748 * if it is, then bail out, because there's likely no UART
751 if (inb(info->ioaddr + UART_LSR) == 0xff) {
752 spin_unlock_irqrestore(&info->slock, flags);
753 if (capable(CAP_SYS_ADMIN)) {
754 set_bit(TTY_IO_ERROR, &tty->flags);
761 * Clear the interrupt registers.
763 (void) inb(info->ioaddr + UART_LSR);
764 (void) inb(info->ioaddr + UART_RX);
765 (void) inb(info->ioaddr + UART_IIR);
766 (void) inb(info->ioaddr + UART_MSR);
769 * Now, initialize the UART
771 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
772 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
773 outb(info->MCR, info->ioaddr + UART_MCR);
776 * Finally, enable interrupts
778 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
780 if (info->board->must_hwid)
781 info->IER |= MOXA_MUST_IER_EGDAI;
782 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
785 * And clear the interrupt registers again for luck.
787 (void) inb(info->ioaddr + UART_LSR);
788 (void) inb(info->ioaddr + UART_RX);
789 (void) inb(info->ioaddr + UART_IIR);
790 (void) inb(info->ioaddr + UART_MSR);
792 clear_bit(TTY_IO_ERROR, &tty->flags);
793 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
796 * and set the speed of the serial port
798 mxser_change_speed(tty, NULL);
799 spin_unlock_irqrestore(&info->slock, flags);
805 * This routine will shutdown a serial port
807 static void mxser_shutdown_port(struct tty_port *port)
809 struct mxser_port *info = container_of(port, struct mxser_port, port);
812 spin_lock_irqsave(&info->slock, flags);
815 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
816 * here so the queue might never be waken up
818 wake_up_interruptible(&info->port.delta_msr_wait);
821 * Free the xmit buffer, if necessary
823 if (info->port.xmit_buf) {
824 free_page((unsigned long) info->port.xmit_buf);
825 info->port.xmit_buf = NULL;
829 outb(0x00, info->ioaddr + UART_IER);
831 /* clear Rx/Tx FIFO's */
832 mxser_disable_and_clear_FIFO(info);
834 /* read data port to reset things */
835 (void) inb(info->ioaddr + UART_RX);
838 if (info->board->must_hwid)
839 mxser_must_no_sw_flow_control(info->ioaddr);
841 spin_unlock_irqrestore(&info->slock, flags);
845 * This routine is called whenever a serial port is opened. It
846 * enables interrupts for a serial port, linking in its async structure into
847 * the IRQ chain. It also performs the serial-specific
848 * initialization for the tty structure.
850 static int mxser_open(struct tty_struct *tty, struct file *filp)
852 struct tty_port *tport = tty->port;
853 struct mxser_port *port = container_of(tport, struct mxser_port, port);
855 tty->driver_data = port;
857 return tty_port_open(tport, tty, filp);
860 static void mxser_flush_buffer(struct tty_struct *tty)
862 struct mxser_port *info = tty->driver_data;
866 spin_lock_irqsave(&info->slock, flags);
867 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
869 outb(info->FCR | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
870 info->ioaddr + UART_FCR);
872 spin_unlock_irqrestore(&info->slock, flags);
878 static void mxser_close_port(struct tty_port *port)
880 struct mxser_port *info = container_of(port, struct mxser_port, port);
881 unsigned long timeout;
883 * At this point we stop accepting input. To do this, we
884 * disable the receive line status interrupts, and tell the
885 * interrupt driver to stop checking the data ready bit in the
886 * line status register.
888 info->IER &= ~UART_IER_RLSI;
889 if (info->board->must_hwid)
890 info->IER &= ~MOXA_MUST_RECV_ISR;
892 outb(info->IER, info->ioaddr + UART_IER);
894 * Before we drop DTR, make sure the UART transmitter
895 * has completely drained; this is especially
896 * important if there is a transmit FIFO!
898 timeout = jiffies + HZ;
899 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
900 schedule_timeout_interruptible(5);
901 if (time_after(jiffies, timeout))
907 * This routine is called when the serial port gets closed. First, we
908 * wait for the last remaining data to be sent. Then, we unlink its
909 * async structure from the interrupt chain if necessary, and we free
910 * that IRQ if nothing is left in the chain.
912 static void mxser_close(struct tty_struct *tty, struct file *filp)
914 struct mxser_port *info = tty->driver_data;
915 struct tty_port *port = &info->port;
919 if (tty_port_close_start(port, tty, filp) == 0)
922 mutex_lock(&port->mutex);
923 mxser_close_port(port);
924 mxser_flush_buffer(tty);
925 if (tty_port_initialized(port) && C_HUPCL(tty))
926 tty_port_lower_dtr_rts(port);
927 mxser_shutdown_port(port);
928 tty_port_set_initialized(port, 0);
929 mutex_unlock(&port->mutex);
931 /* Right now the tty_port set is done outside of the close_end helper
932 as we don't yet have everyone using refcounts */
933 tty_port_close_end(port, tty);
934 tty_port_tty_set(port, NULL);
937 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
940 struct mxser_port *info = tty->driver_data;
943 if (!info->port.xmit_buf)
947 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
948 SERIAL_XMIT_SIZE - info->xmit_head));
952 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
953 spin_lock_irqsave(&info->slock, flags);
954 info->xmit_head = (info->xmit_head + c) &
955 (SERIAL_XMIT_SIZE - 1);
957 spin_unlock_irqrestore(&info->slock, flags);
964 if (info->xmit_cnt && !tty->flow.stopped)
965 if (!tty->hw_stopped || mxser_16550A_or_MUST(info))
966 mxser_start_tx(info);
971 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
973 struct mxser_port *info = tty->driver_data;
976 if (!info->port.xmit_buf)
979 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
982 spin_lock_irqsave(&info->slock, flags);
983 info->port.xmit_buf[info->xmit_head++] = ch;
984 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
986 spin_unlock_irqrestore(&info->slock, flags);
992 static void mxser_flush_chars(struct tty_struct *tty)
994 struct mxser_port *info = tty->driver_data;
996 if (!info->xmit_cnt || tty->flow.stopped || !info->port.xmit_buf ||
997 (tty->hw_stopped && !mxser_16550A_or_MUST(info)))
1000 mxser_start_tx(info);
1003 static unsigned int mxser_write_room(struct tty_struct *tty)
1005 struct mxser_port *info = tty->driver_data;
1008 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1009 return ret < 0 ? 0 : ret;
1012 static unsigned int mxser_chars_in_buffer(struct tty_struct *tty)
1014 struct mxser_port *info = tty->driver_data;
1015 return info->xmit_cnt;
1019 * ------------------------------------------------------------
1020 * friends of mxser_ioctl()
1021 * ------------------------------------------------------------
1023 static int mxser_get_serial_info(struct tty_struct *tty,
1024 struct serial_struct *ss)
1026 struct mxser_port *info = tty->driver_data;
1027 struct tty_port *port = &info->port;
1028 unsigned int closing_wait, close_delay;
1030 mutex_lock(&port->mutex);
1032 close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
1033 closing_wait = info->port.closing_wait;
1034 if (closing_wait != ASYNC_CLOSING_WAIT_NONE)
1035 closing_wait = jiffies_to_msecs(closing_wait) / 10;
1037 ss->type = info->type;
1038 ss->line = tty->index;
1039 ss->port = info->ioaddr;
1040 ss->irq = info->board->irq;
1041 ss->flags = info->port.flags;
1042 ss->baud_base = MXSER_BAUD_BASE;
1043 ss->close_delay = close_delay;
1044 ss->closing_wait = closing_wait;
1045 ss->custom_divisor = MXSER_CUSTOM_DIVISOR,
1046 mutex_unlock(&port->mutex);
1050 static int mxser_set_serial_info(struct tty_struct *tty,
1051 struct serial_struct *ss)
1053 struct mxser_port *info = tty->driver_data;
1054 struct tty_port *port = &info->port;
1056 unsigned long sl_flags;
1057 unsigned int old_speed, close_delay, closing_wait;
1060 if (tty_io_error(tty))
1063 mutex_lock(&port->mutex);
1065 if (ss->irq != info->board->irq ||
1066 ss->port != info->ioaddr) {
1067 mutex_unlock(&port->mutex);
1071 old_speed = port->flags & ASYNC_SPD_MASK;
1073 close_delay = msecs_to_jiffies(ss->close_delay * 10);
1074 closing_wait = ss->closing_wait;
1075 if (closing_wait != ASYNC_CLOSING_WAIT_NONE)
1076 closing_wait = msecs_to_jiffies(closing_wait * 10);
1078 if (!capable(CAP_SYS_ADMIN)) {
1079 if ((ss->baud_base != MXSER_BAUD_BASE) ||
1080 (close_delay != port->close_delay) ||
1081 (closing_wait != port->closing_wait) ||
1082 ((ss->flags & ~ASYNC_USR_MASK) != (port->flags & ~ASYNC_USR_MASK))) {
1083 mutex_unlock(&port->mutex);
1086 port->flags = (port->flags & ~ASYNC_USR_MASK) |
1087 (ss->flags & ASYNC_USR_MASK);
1090 * OK, past this point, all the error checking has been done.
1091 * At this point, we start making changes.....
1093 port->flags = ((port->flags & ~ASYNC_FLAGS) |
1094 (ss->flags & ASYNC_FLAGS));
1095 port->close_delay = close_delay;
1096 port->closing_wait = closing_wait;
1097 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1098 (ss->baud_base != MXSER_BAUD_BASE ||
1099 ss->custom_divisor !=
1100 MXSER_CUSTOM_DIVISOR)) {
1101 if (ss->custom_divisor == 0) {
1102 mutex_unlock(&port->mutex);
1105 baud = ss->baud_base / ss->custom_divisor;
1106 tty_encode_baud_rate(tty, baud, baud);
1109 info->type = ss->type;
1111 mxser_process_txrx_fifo(info);
1114 if (tty_port_initialized(port)) {
1115 if (old_speed != (port->flags & ASYNC_SPD_MASK)) {
1116 spin_lock_irqsave(&info->slock, sl_flags);
1117 mxser_change_speed(tty, NULL);
1118 spin_unlock_irqrestore(&info->slock, sl_flags);
1121 retval = mxser_activate(port, tty);
1123 tty_port_set_initialized(port, 1);
1125 mutex_unlock(&port->mutex);
1130 * mxser_get_lsr_info - get line status register info
1132 * Purpose: Let user call ioctl() to get info when the UART physically
1133 * is emptied. On bus types like RS485, the transmitter must
1134 * release the bus after transmitting. This must be done when
1135 * the transmit shift register is empty, not be done when the
1136 * transmit holding register is empty. This functionality
1137 * allows an RS485 driver to be written in user space.
1139 static int mxser_get_lsr_info(struct mxser_port *info,
1140 unsigned int __user *value)
1142 unsigned char status;
1143 unsigned int result;
1144 unsigned long flags;
1146 spin_lock_irqsave(&info->slock, flags);
1147 status = inb(info->ioaddr + UART_LSR);
1148 spin_unlock_irqrestore(&info->slock, flags);
1149 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1150 return put_user(result, value);
1153 static int mxser_tiocmget(struct tty_struct *tty)
1155 struct mxser_port *info = tty->driver_data;
1156 unsigned char control, status;
1157 unsigned long flags;
1159 if (tty_io_error(tty))
1162 spin_lock_irqsave(&info->slock, flags);
1163 control = info->MCR;
1164 status = inb(info->ioaddr + UART_MSR);
1165 if (status & UART_MSR_ANY_DELTA)
1166 mxser_check_modem_status(tty, info, status);
1167 spin_unlock_irqrestore(&info->slock, flags);
1169 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1170 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1171 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1172 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1173 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1174 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1177 static int mxser_tiocmset(struct tty_struct *tty,
1178 unsigned int set, unsigned int clear)
1180 struct mxser_port *info = tty->driver_data;
1181 unsigned long flags;
1183 if (tty_io_error(tty))
1186 spin_lock_irqsave(&info->slock, flags);
1188 if (set & TIOCM_RTS)
1189 info->MCR |= UART_MCR_RTS;
1190 if (set & TIOCM_DTR)
1191 info->MCR |= UART_MCR_DTR;
1193 if (clear & TIOCM_RTS)
1194 info->MCR &= ~UART_MCR_RTS;
1195 if (clear & TIOCM_DTR)
1196 info->MCR &= ~UART_MCR_DTR;
1198 outb(info->MCR, info->ioaddr + UART_MCR);
1199 spin_unlock_irqrestore(&info->slock, flags);
1203 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1204 struct async_icount *cprev)
1206 struct async_icount cnow;
1207 unsigned long flags;
1210 spin_lock_irqsave(&info->slock, flags);
1211 cnow = info->icount; /* atomic copy */
1212 spin_unlock_irqrestore(&info->slock, flags);
1214 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1215 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1216 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1217 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1224 /* We should likely switch to TIOCGRS485/TIOCSRS485. */
1225 static int mxser_ioctl_op_mode(struct mxser_port *port, int index, bool set,
1226 int __user *u_opmode)
1228 int opmode, p = index % 4;
1229 int shiftbit = p * 2;
1232 if (port->board->must_hwid != MOXA_MUST_MU860_HWID)
1236 if (get_user(opmode, u_opmode))
1239 if (opmode & ~OP_MODE_MASK)
1242 spin_lock_irq(&port->slock);
1243 val = inb(port->opmode_ioaddr);
1244 val &= ~(OP_MODE_MASK << shiftbit);
1245 val |= (opmode << shiftbit);
1246 outb(val, port->opmode_ioaddr);
1247 spin_unlock_irq(&port->slock);
1252 spin_lock_irq(&port->slock);
1253 opmode = inb(port->opmode_ioaddr) >> shiftbit;
1254 spin_unlock_irq(&port->slock);
1256 return put_user(opmode & OP_MODE_MASK, u_opmode);
1259 static int mxser_ioctl(struct tty_struct *tty,
1260 unsigned int cmd, unsigned long arg)
1262 struct mxser_port *info = tty->driver_data;
1263 struct async_icount cnow;
1264 unsigned long flags;
1265 void __user *argp = (void __user *)arg;
1267 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE)
1268 return mxser_ioctl_op_mode(info, tty->index,
1269 cmd == MOXA_SET_OP_MODE, argp);
1271 if (cmd != TIOCMIWAIT && tty_io_error(tty))
1275 case TIOCSERGETLSR: /* Get line status register */
1276 return mxser_get_lsr_info(info, argp);
1278 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1279 * - mask passed in arg for lines of interest
1280 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1281 * Caller should use TIOCGICOUNT to see which one it was
1284 spin_lock_irqsave(&info->slock, flags);
1285 cnow = info->icount; /* note the counters on entry */
1286 spin_unlock_irqrestore(&info->slock, flags);
1288 return wait_event_interruptible(info->port.delta_msr_wait,
1289 mxser_cflags_changed(info, arg, &cnow));
1291 return -ENOIOCTLCMD;
1297 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1298 * Return: write counters to the user passed counter struct
1299 * NB: both 1->0 and 0->1 transitions are counted except for
1300 * RI where only 0->1 is counted.
1303 static int mxser_get_icount(struct tty_struct *tty,
1304 struct serial_icounter_struct *icount)
1307 struct mxser_port *info = tty->driver_data;
1308 struct async_icount cnow;
1309 unsigned long flags;
1311 spin_lock_irqsave(&info->slock, flags);
1312 cnow = info->icount;
1313 spin_unlock_irqrestore(&info->slock, flags);
1315 icount->frame = cnow.frame;
1316 icount->brk = cnow.brk;
1317 icount->overrun = cnow.overrun;
1318 icount->buf_overrun = cnow.buf_overrun;
1319 icount->parity = cnow.parity;
1320 icount->rx = cnow.rx;
1321 icount->tx = cnow.tx;
1322 icount->cts = cnow.cts;
1323 icount->dsr = cnow.dsr;
1324 icount->rng = cnow.rng;
1325 icount->dcd = cnow.dcd;
1329 static void mxser_stoprx(struct tty_struct *tty)
1331 struct mxser_port *info = tty->driver_data;
1333 info->ldisc_stop_rx = true;
1335 if (info->board->must_hwid) {
1336 info->IER &= ~MOXA_MUST_RECV_ISR;
1337 outb(info->IER, info->ioaddr + UART_IER);
1339 info->x_char = STOP_CHAR(tty);
1340 outb(0, info->ioaddr + UART_IER);
1341 info->IER |= UART_IER_THRI;
1342 outb(info->IER, info->ioaddr + UART_IER);
1346 if (C_CRTSCTS(tty)) {
1347 info->MCR &= ~UART_MCR_RTS;
1348 outb(info->MCR, info->ioaddr + UART_MCR);
1353 * This routine is called by the upper-layer tty layer to signal that
1354 * incoming characters should be throttled.
1356 static void mxser_throttle(struct tty_struct *tty)
1361 static void mxser_unthrottle(struct tty_struct *tty)
1363 struct mxser_port *info = tty->driver_data;
1366 info->ldisc_stop_rx = false;
1371 if (info->board->must_hwid) {
1372 info->IER |= MOXA_MUST_RECV_ISR;
1373 outb(info->IER, info->ioaddr + UART_IER);
1375 info->x_char = START_CHAR(tty);
1376 outb(0, info->ioaddr + UART_IER);
1377 info->IER |= UART_IER_THRI;
1378 outb(info->IER, info->ioaddr + UART_IER);
1383 if (C_CRTSCTS(tty)) {
1384 info->MCR |= UART_MCR_RTS;
1385 outb(info->MCR, info->ioaddr + UART_MCR);
1390 * mxser_stop() and mxser_start()
1392 * This routines are called before setting or resetting tty->flow.stopped.
1393 * They enable or disable transmitter interrupts, as necessary.
1395 static void mxser_stop(struct tty_struct *tty)
1397 struct mxser_port *info = tty->driver_data;
1398 unsigned long flags;
1400 spin_lock_irqsave(&info->slock, flags);
1401 if (info->IER & UART_IER_THRI)
1402 __mxser_stop_tx(info);
1403 spin_unlock_irqrestore(&info->slock, flags);
1406 static void mxser_start(struct tty_struct *tty)
1408 struct mxser_port *info = tty->driver_data;
1409 unsigned long flags;
1411 spin_lock_irqsave(&info->slock, flags);
1412 if (info->xmit_cnt && info->port.xmit_buf)
1413 __mxser_start_tx(info);
1414 spin_unlock_irqrestore(&info->slock, flags);
1417 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1419 struct mxser_port *info = tty->driver_data;
1420 unsigned long flags;
1422 spin_lock_irqsave(&info->slock, flags);
1423 mxser_change_speed(tty, old_termios);
1424 spin_unlock_irqrestore(&info->slock, flags);
1426 if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
1427 tty->hw_stopped = 0;
1431 /* Handle sw stopped */
1432 if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
1433 tty->flow.stopped = 0;
1435 if (info->board->must_hwid) {
1436 spin_lock_irqsave(&info->slock, flags);
1437 mxser_must_set_rx_sw_flow_control(info->ioaddr, false);
1438 spin_unlock_irqrestore(&info->slock, flags);
1446 * mxser_wait_until_sent() --- wait until the transmitter is empty
1448 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1450 struct mxser_port *info = tty->driver_data;
1451 unsigned long orig_jiffies, char_time;
1452 unsigned long flags;
1455 if (info->type == PORT_UNKNOWN)
1458 if (info->xmit_fifo_size == 0)
1459 return; /* Just in case.... */
1461 orig_jiffies = jiffies;
1463 * Set the check interval to be 1/5 of the estimated time to
1464 * send a single character, and make it at least 1. The check
1465 * interval should also be less than the timeout.
1467 * Note: we have to use pretty tight timings here to satisfy
1470 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1471 char_time = char_time / 5;
1474 if (timeout && timeout < char_time)
1475 char_time = timeout;
1477 * If the transmitter hasn't cleared in twice the approximate
1478 * amount of time to send the entire FIFO, it probably won't
1479 * ever clear. This assumes the UART isn't doing flow
1480 * control, which is currently the case. Hence, if it ever
1481 * takes longer than info->timeout, this is probably due to a
1482 * UART bug of some kind. So, we clamp the timeout parameter at
1485 if (!timeout || timeout > 2 * info->timeout)
1486 timeout = 2 * info->timeout;
1488 spin_lock_irqsave(&info->slock, flags);
1489 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1490 spin_unlock_irqrestore(&info->slock, flags);
1491 schedule_timeout_interruptible(char_time);
1492 spin_lock_irqsave(&info->slock, flags);
1493 if (signal_pending(current))
1495 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1498 spin_unlock_irqrestore(&info->slock, flags);
1499 set_current_state(TASK_RUNNING);
1503 * This routine is called by tty_hangup() when a hangup is signaled.
1505 static void mxser_hangup(struct tty_struct *tty)
1507 struct mxser_port *info = tty->driver_data;
1509 mxser_flush_buffer(tty);
1510 tty_port_hangup(&info->port);
1514 * mxser_rs_break() --- routine which turns the break handling on or off
1516 static int mxser_rs_break(struct tty_struct *tty, int break_state)
1518 struct mxser_port *info = tty->driver_data;
1519 unsigned long flags;
1522 spin_lock_irqsave(&info->slock, flags);
1523 lcr = inb(info->ioaddr + UART_LCR);
1524 if (break_state == -1)
1525 lcr |= UART_LCR_SBC;
1527 lcr &= ~UART_LCR_SBC;
1528 outb(lcr, info->ioaddr + UART_LCR);
1529 spin_unlock_irqrestore(&info->slock, flags);
1534 static bool mxser_receive_chars_new(struct tty_struct *tty,
1535 struct mxser_port *port, u8 status)
1537 enum mxser_must_hwid hwid = port->board->must_hwid;
1540 if (hwid == MOXA_OTHER_UART)
1542 if (status & (UART_LSR_BRK_ERROR_BITS | MOXA_MUST_LSR_RERR))
1545 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
1546 if (hwid == MOXA_MUST_MU150_HWID)
1547 gdl &= MOXA_MUST_GDL_MASK;
1549 if (gdl >= tty->receive_room && !port->ldisc_stop_rx)
1553 u8 ch = inb(port->ioaddr + UART_RX);
1554 tty_insert_flip_char(&port->port, ch, 0);
1560 static u8 mxser_receive_chars_old(struct tty_struct *tty,
1561 struct mxser_port *port, u8 status)
1563 enum mxser_must_hwid hwid = port->board->must_hwid;
1564 int recv_room = tty->receive_room;
1574 ch = inb(port->ioaddr + UART_RX);
1575 if (hwid && (status & UART_LSR_OE))
1576 outb(port->FCR | UART_FCR_CLEAR_RCVR,
1577 port->ioaddr + UART_FCR);
1578 status &= port->read_status_mask;
1579 if (status & port->ignore_status_mask) {
1580 if (++ignored > 100)
1584 if (status & UART_LSR_BRK_ERROR_BITS) {
1585 if (status & UART_LSR_BI) {
1589 if (port->port.flags & ASYNC_SAK)
1591 } else if (status & UART_LSR_PE) {
1593 port->icount.parity++;
1594 } else if (status & UART_LSR_FE) {
1596 port->icount.frame++;
1597 } else if (status & UART_LSR_OE) {
1599 port->icount.overrun++;
1602 tty_insert_flip_char(&port->port, ch, flag);
1604 if (cnt >= recv_room) {
1605 if (!port->ldisc_stop_rx)
1615 status = inb(port->ioaddr + UART_LSR);
1616 } while (status & UART_LSR_DR);
1621 static u8 mxser_receive_chars(struct tty_struct *tty,
1622 struct mxser_port *port, u8 status)
1624 if (tty->receive_room == 0 && !port->ldisc_stop_rx)
1627 if (!mxser_receive_chars_new(tty, port, status))
1628 status = mxser_receive_chars_old(tty, port, status);
1630 tty_flip_buffer_push(&port->port);
1635 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1640 outb(port->x_char, port->ioaddr + UART_TX);
1646 if (port->port.xmit_buf == NULL)
1649 if (!port->xmit_cnt || tty->flow.stopped ||
1650 (tty->hw_stopped && !mxser_16550A_or_MUST(port))) {
1651 __mxser_stop_tx(port);
1655 cnt = port->xmit_cnt;
1656 count = port->xmit_fifo_size;
1658 outb(port->port.xmit_buf[port->xmit_tail++],
1659 port->ioaddr + UART_TX);
1660 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
1661 if (!--port->xmit_cnt)
1663 } while (--count > 0);
1665 port->icount.tx += (cnt - port->xmit_cnt);
1667 if (port->xmit_cnt < WAKEUP_CHARS)
1670 if (!port->xmit_cnt)
1671 __mxser_stop_tx(port);
1674 static bool mxser_port_isr(struct mxser_port *port)
1676 struct tty_struct *tty;
1677 u8 iir, msr, status;
1680 iir = inb(port->ioaddr + UART_IIR);
1681 if (iir & UART_IIR_NO_INT)
1684 iir &= MOXA_MUST_IIR_MASK;
1685 tty = tty_port_tty_get(&port->port);
1686 if (!tty || port->closing || !tty_port_initialized(&port->port)) {
1687 status = inb(port->ioaddr + UART_LSR);
1688 outb(port->FCR | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1689 port->ioaddr + UART_FCR);
1690 inb(port->ioaddr + UART_MSR);
1696 status = inb(port->ioaddr + UART_LSR);
1698 if (port->board->must_hwid) {
1699 if (iir == MOXA_MUST_IIR_GDA ||
1700 iir == MOXA_MUST_IIR_RDA ||
1701 iir == MOXA_MUST_IIR_RTO ||
1702 iir == MOXA_MUST_IIR_LSR)
1703 status = mxser_receive_chars(tty, port, status);
1705 status &= port->read_status_mask;
1706 if (status & UART_LSR_DR)
1707 status = mxser_receive_chars(tty, port, status);
1710 msr = inb(port->ioaddr + UART_MSR);
1711 if (msr & UART_MSR_ANY_DELTA)
1712 mxser_check_modem_status(tty, port, msr);
1714 if (port->board->must_hwid) {
1715 if (iir == 0x02 && (status & UART_LSR_THRE))
1716 mxser_transmit_chars(tty, port);
1718 if (status & UART_LSR_THRE)
1719 mxser_transmit_chars(tty, port);
1729 * This is the serial driver's generic interrupt routine
1731 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1733 struct mxser_board *brd = dev_id;
1734 struct mxser_port *port;
1735 unsigned int int_cnt, pass_counter = 0;
1736 unsigned int i, max = brd->nports;
1737 int handled = IRQ_NONE;
1738 u8 irqbits, bits, mask = BIT(max) - 1;
1740 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
1741 irqbits = inb(brd->vector) & mask;
1742 if (irqbits == mask)
1745 handled = IRQ_HANDLED;
1746 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
1747 if (irqbits == mask)
1751 port = &brd->ports[i];
1754 spin_lock(&port->slock);
1756 if (mxser_port_isr(port))
1758 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
1759 spin_unlock(&port->slock);
1766 static const struct tty_operations mxser_ops = {
1768 .close = mxser_close,
1769 .write = mxser_write,
1770 .put_char = mxser_put_char,
1771 .flush_chars = mxser_flush_chars,
1772 .write_room = mxser_write_room,
1773 .chars_in_buffer = mxser_chars_in_buffer,
1774 .flush_buffer = mxser_flush_buffer,
1775 .ioctl = mxser_ioctl,
1776 .throttle = mxser_throttle,
1777 .unthrottle = mxser_unthrottle,
1778 .set_termios = mxser_set_termios,
1780 .start = mxser_start,
1781 .hangup = mxser_hangup,
1782 .break_ctl = mxser_rs_break,
1783 .wait_until_sent = mxser_wait_until_sent,
1784 .tiocmget = mxser_tiocmget,
1785 .tiocmset = mxser_tiocmset,
1786 .set_serial = mxser_set_serial_info,
1787 .get_serial = mxser_get_serial_info,
1788 .get_icount = mxser_get_icount,
1791 static const struct tty_port_operations mxser_port_ops = {
1792 .carrier_raised = mxser_carrier_raised,
1793 .dtr_rts = mxser_dtr_rts,
1794 .activate = mxser_activate,
1795 .shutdown = mxser_shutdown_port,
1799 * The MOXA Smartio/Industio serial driver boot-time initialization code!
1802 static void mxser_initbrd(struct mxser_board *brd, bool high_baud)
1804 struct mxser_port *info;
1808 brd->must_hwid = mxser_must_get_hwid(brd->ports[0].ioaddr);
1809 is_mu860 = brd->must_hwid == MOXA_MUST_MU860_HWID;
1811 for (i = 0; i < UART_INFO_NUM; i++) {
1812 if (Gpci_uart_info[i].type == brd->must_hwid) {
1813 brd->max_baud = Gpci_uart_info[i].max_baud;
1815 /* exception....CP-102 */
1817 brd->max_baud = 921600;
1823 /* set to RS232 mode by default */
1824 outb(0, brd->vector + 4);
1825 outb(0, brd->vector + 0x0c);
1828 for (i = 0; i < brd->nports; i++) {
1829 info = &brd->ports[i];
1832 info->opmode_ioaddr = brd->vector + 4;
1834 info->opmode_ioaddr = brd->vector + 0x0c;
1836 tty_port_init(&info->port);
1837 info->port.ops = &mxser_port_ops;
1839 info->ldisc_stop_rx = false;
1841 /* Enhance mode enabled here */
1842 if (brd->must_hwid != MOXA_OTHER_UART)
1843 mxser_must_set_enhance_mode(info->ioaddr, true);
1845 info->type = PORT_16550A;
1847 mxser_process_txrx_fifo(info);
1849 info->port.close_delay = 5 * HZ / 10;
1850 info->port.closing_wait = 30 * HZ;
1851 spin_lock_init(&info->slock);
1853 /* before set INT ISR, disable all int */
1854 outb(inb(info->ioaddr + UART_IER) & 0xf0,
1855 info->ioaddr + UART_IER);
1859 static int mxser_probe(struct pci_dev *pdev,
1860 const struct pci_device_id *ent)
1862 struct mxser_board *brd;
1863 unsigned int i, base;
1864 unsigned long ioaddress;
1865 unsigned short nports = MXSER_NPORTS(ent->driver_data);
1866 struct device *tty_dev;
1867 int retval = -EINVAL;
1869 i = find_first_zero_bit(mxser_boards, MXSER_BOARDS);
1870 if (i >= MXSER_BOARDS) {
1871 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
1872 "not configured\n", MXSER_BOARDS);
1876 brd = devm_kzalloc(&pdev->dev, struct_size(brd, ports, nports),
1882 __set_bit(brd->idx, mxser_boards);
1883 base = i * MXSER_PORTS_PER_BOARD;
1885 retval = pcim_enable_device(pdev);
1887 dev_err(&pdev->dev, "PCI enable failed\n");
1892 ioaddress = pci_resource_start(pdev, 2);
1893 retval = pci_request_region(pdev, 2, "mxser(IO)");
1897 brd->nports = nports;
1898 for (i = 0; i < nports; i++)
1899 brd->ports[i].ioaddr = ioaddress + 8 * i;
1902 ioaddress = pci_resource_start(pdev, 3);
1903 retval = pci_request_region(pdev, 3, "mxser(vector)");
1906 brd->vector = ioaddress;
1909 brd->irq = pdev->irq;
1911 mxser_initbrd(brd, ent->driver_data & MXSER_HIGHBAUD);
1913 retval = devm_request_irq(&pdev->dev, brd->irq, mxser_interrupt,
1914 IRQF_SHARED, "mxser", brd);
1916 dev_err(&pdev->dev, "request irq failed");
1920 for (i = 0; i < nports; i++) {
1921 tty_dev = tty_port_register_device(&brd->ports[i].port,
1922 mxvar_sdriver, base + i, &pdev->dev);
1923 if (IS_ERR(tty_dev)) {
1924 retval = PTR_ERR(tty_dev);
1926 tty_unregister_device(mxvar_sdriver,
1932 pci_set_drvdata(pdev, brd);
1936 for (i = 0; i < nports; i++)
1937 tty_port_destroy(&brd->ports[i].port);
1939 __clear_bit(brd->idx, mxser_boards);
1944 static void mxser_remove(struct pci_dev *pdev)
1946 struct mxser_board *brd = pci_get_drvdata(pdev);
1947 unsigned int i, base = brd->idx * MXSER_PORTS_PER_BOARD;
1949 for (i = 0; i < brd->nports; i++) {
1950 tty_unregister_device(mxvar_sdriver, base + i);
1951 tty_port_destroy(&brd->ports[i].port);
1954 __clear_bit(brd->idx, mxser_boards);
1957 static struct pci_driver mxser_driver = {
1959 .id_table = mxser_pcibrds,
1960 .probe = mxser_probe,
1961 .remove = mxser_remove
1964 static int __init mxser_module_init(void)
1968 mxvar_sdriver = tty_alloc_driver(MXSER_PORTS, TTY_DRIVER_REAL_RAW |
1969 TTY_DRIVER_DYNAMIC_DEV);
1970 if (IS_ERR(mxvar_sdriver))
1971 return PTR_ERR(mxvar_sdriver);
1973 /* Initialize the tty_driver structure */
1974 mxvar_sdriver->name = "ttyMI";
1975 mxvar_sdriver->major = ttymajor;
1976 mxvar_sdriver->minor_start = 0;
1977 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
1978 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
1979 mxvar_sdriver->init_termios = tty_std_termios;
1980 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
1981 tty_set_operations(mxvar_sdriver, &mxser_ops);
1983 retval = tty_register_driver(mxvar_sdriver);
1985 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
1990 retval = pci_register_driver(&mxser_driver);
1992 printk(KERN_ERR "mxser: can't register pci driver\n");
1998 tty_unregister_driver(mxvar_sdriver);
2000 tty_driver_kref_put(mxvar_sdriver);
2004 static void __exit mxser_module_exit(void)
2006 pci_unregister_driver(&mxser_driver);
2007 tty_unregister_driver(mxvar_sdriver);
2008 tty_driver_kref_put(mxvar_sdriver);
2011 module_init(mxser_module_init);
2012 module_exit(mxser_module_exit);