1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_DWORDS 16
17 #define USB4_DATA_RETRIES 3
20 USB4_SB_TARGET_ROUTER,
21 USB4_SB_TARGET_PARTNER,
22 USB4_SB_TARGET_RETIMER,
25 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
26 #define USB4_NVM_READ_OFFSET_SHIFT 2
27 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
28 #define USB4_NVM_READ_LENGTH_SHIFT 24
30 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
31 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
33 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
34 #define USB4_DROM_ADDRESS_SHIFT 2
35 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
36 #define USB4_DROM_SIZE_SHIFT 15
38 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
40 typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
41 typedef int (*write_block_fn)(void *, const void *, size_t);
43 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
44 u32 value, int timeout_msec)
46 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
52 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
56 if ((val & bit) == value)
59 usleep_range(50, 100);
60 } while (ktime_before(ktime_get(), timeout));
65 static int usb4_do_read_data(u16 address, void *buf, size_t size,
66 read_block_fn read_block, void *read_block_data)
68 unsigned int retries = USB4_DATA_RETRIES;
72 unsigned int dwaddress, dwords;
73 u8 data[USB4_DATA_DWORDS * 4];
78 nbytes = min_t(size_t, size + offset, USB4_DATA_DWORDS * 4);
80 dwaddress = address / 4;
81 dwords = ALIGN(nbytes, 4) / 4;
83 ret = read_block(read_block_data, dwaddress, data, dwords);
85 if (ret != -ENODEV && retries--)
91 memcpy(buf, data + offset, nbytes);
101 static int usb4_do_write_data(unsigned int address, const void *buf, size_t size,
102 write_block_fn write_next_block, void *write_block_data)
104 unsigned int retries = USB4_DATA_RETRIES;
107 offset = address & 3;
108 address = address & ~3;
111 u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
112 u8 data[USB4_DATA_DWORDS * 4];
115 memcpy(data + offset, buf, nbytes);
117 ret = write_next_block(write_block_data, data, nbytes / 4);
119 if (ret == -ETIMEDOUT) {
135 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
136 u32 *metadata, u8 *status,
137 const void *tx_data, size_t tx_dwords,
138 void *rx_data, size_t rx_dwords)
144 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
149 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
155 val = opcode | ROUTER_CS_26_OV;
156 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
160 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
164 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
168 if (val & ROUTER_CS_26_ONS)
172 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
173 ROUTER_CS_26_STATUS_SHIFT;
176 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
181 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
190 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
191 u8 *status, const void *tx_data, size_t tx_dwords,
192 void *rx_data, size_t rx_dwords)
194 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
196 if (tx_dwords > USB4_DATA_DWORDS || rx_dwords > USB4_DATA_DWORDS)
200 * If the connection manager implementation provides USB4 router
201 * operation proxy callback, call it here instead of running the
202 * operation natively.
204 if (cm_ops->usb4_switch_op) {
207 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
208 tx_data, tx_dwords, rx_data,
210 if (ret != -EOPNOTSUPP)
214 * If the proxy was not supported then run the native
215 * router operation instead.
219 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
220 tx_dwords, rx_data, rx_dwords);
223 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
224 u32 *metadata, u8 *status)
226 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
229 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
230 u32 *metadata, u8 *status,
231 const void *tx_data, size_t tx_dwords,
232 void *rx_data, size_t rx_dwords)
234 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
235 tx_dwords, rx_data, rx_dwords);
238 static void usb4_switch_check_wakes(struct tb_switch *sw)
240 struct tb_port *port;
244 if (!device_may_wakeup(&sw->dev))
248 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
251 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
252 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
253 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
255 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
258 /* Check for any connected downstream ports for USB4 wake */
259 tb_switch_for_each_port(sw, port) {
260 if (!tb_port_has_remote(port))
263 if (tb_port_read(port, &val, TB_CFG_PORT,
264 port->cap_usb4 + PORT_CS_18, 1))
267 tb_port_dbg(port, "USB4 wake: %s\n",
268 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
270 if (val & PORT_CS_18_WOU4S)
275 pm_wakeup_event(&sw->dev, 0);
278 static bool link_is_usb4(struct tb_port *port)
285 if (tb_port_read(port, &val, TB_CFG_PORT,
286 port->cap_usb4 + PORT_CS_18, 1))
289 return !(val & PORT_CS_18_TCM);
293 * usb4_switch_setup() - Additional setup for USB4 device
294 * @sw: USB4 router to setup
296 * USB4 routers need additional settings in order to enable all the
297 * tunneling. This function enables USB and PCIe tunneling if it can be
298 * enabled (e.g the parent switch also supports them). If USB tunneling
299 * is not available for some reason (like that there is Thunderbolt 3
300 * switch upstream) then the internal xHCI controller is enabled
303 int usb4_switch_setup(struct tb_switch *sw)
305 struct tb_port *downstream_port;
306 struct tb_switch *parent;
311 usb4_switch_check_wakes(sw);
316 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
320 parent = tb_switch_parent(sw);
321 downstream_port = tb_port_at(tb_route(sw), parent);
322 sw->link_usb4 = link_is_usb4(downstream_port);
323 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
325 xhci = val & ROUTER_CS_6_HCI;
326 tbt3 = !(val & ROUTER_CS_6_TNS);
328 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
329 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
331 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
335 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
336 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
337 val |= ROUTER_CS_5_UTO;
342 * Only enable PCIe tunneling if the parent router supports it
343 * and it is not disabled.
345 if (tb_acpi_may_tunnel_pcie() &&
346 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
347 val |= ROUTER_CS_5_PTO;
349 * xHCI can be enabled if PCIe tunneling is supported
350 * and the parent does not have any USB3 dowstream
351 * adapters (so we cannot do USB 3.x tunneling).
354 val |= ROUTER_CS_5_HCO;
357 /* TBT3 supported by the CM */
358 val |= ROUTER_CS_5_C3S;
359 /* Tunneling configuration is ready now */
360 val |= ROUTER_CS_5_CV;
362 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
366 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
371 * usb4_switch_read_uid() - Read UID from USB4 router
373 * @uid: UID is stored here
375 * Reads 64-bit UID from USB4 router config space.
377 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
379 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
382 static int usb4_switch_drom_read_block(void *data,
383 unsigned int dwaddress, void *buf,
386 struct tb_switch *sw = data;
391 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
392 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
393 USB4_DROM_ADDRESS_MASK;
395 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
396 &status, NULL, 0, buf, dwords);
400 return status ? -EIO : 0;
404 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
406 * @address: Byte address inside DROM to start reading
407 * @buf: Buffer where the DROM content is stored
408 * @size: Number of bytes to read from DROM
410 * Uses USB4 router operations to read router DROM. For devices this
411 * should always work but for hosts it may return %-EOPNOTSUPP in which
412 * case the host router does not have DROM.
414 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
417 return usb4_do_read_data(address, buf, size,
418 usb4_switch_drom_read_block, sw);
422 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
425 * Checks whether conditions are met so that lane bonding can be
426 * established with the upstream router. Call only for device routers.
428 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
434 up = tb_upstream_port(sw);
435 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
439 return !!(val & PORT_CS_18_BE);
443 * usb4_switch_set_wake() - Enabled/disable wake
445 * @flags: Wakeup flags (%0 to disable)
447 * Enables/disables router to wake up from sleep.
449 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
451 struct tb_port *port;
452 u64 route = tb_route(sw);
457 * Enable wakes coming from all USB4 downstream ports (from
458 * child routers). For device routers do this also for the
459 * upstream USB4 port.
461 tb_switch_for_each_port(sw, port) {
462 if (!tb_port_is_null(port))
464 if (!route && tb_is_upstream_port(port))
469 ret = tb_port_read(port, &val, TB_CFG_PORT,
470 port->cap_usb4 + PORT_CS_19, 1);
474 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
476 if (flags & TB_WAKE_ON_CONNECT)
477 val |= PORT_CS_19_WOC;
478 if (flags & TB_WAKE_ON_DISCONNECT)
479 val |= PORT_CS_19_WOD;
480 if (flags & TB_WAKE_ON_USB4)
481 val |= PORT_CS_19_WOU4;
483 ret = tb_port_write(port, &val, TB_CFG_PORT,
484 port->cap_usb4 + PORT_CS_19, 1);
490 * Enable wakes from PCIe and USB 3.x on this router. Only
491 * needed for device routers.
494 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
498 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
499 if (flags & TB_WAKE_ON_USB3)
500 val |= ROUTER_CS_5_WOU;
501 if (flags & TB_WAKE_ON_PCIE)
502 val |= ROUTER_CS_5_WOP;
504 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
513 * usb4_switch_set_sleep() - Prepare the router to enter sleep
516 * Sets sleep bit for the router. Returns when the router sleep ready
517 * bit has been asserted.
519 int usb4_switch_set_sleep(struct tb_switch *sw)
524 /* Set sleep bit and wait for sleep ready to be asserted */
525 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
529 val |= ROUTER_CS_5_SLP;
531 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
535 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
536 ROUTER_CS_6_SLPR, 500);
540 * usb4_switch_nvm_sector_size() - Return router NVM sector size
543 * If the router supports NVM operations this function returns the NVM
544 * sector size in bytes. If NVM operations are not supported returns
547 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
553 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
559 return status == 0x2 ? -EOPNOTSUPP : -EIO;
561 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
564 static int usb4_switch_nvm_read_block(void *data,
565 unsigned int dwaddress, void *buf, size_t dwords)
567 struct tb_switch *sw = data;
572 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
573 USB4_NVM_READ_LENGTH_MASK;
574 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
575 USB4_NVM_READ_OFFSET_MASK;
577 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
578 &status, NULL, 0, buf, dwords);
582 return status ? -EIO : 0;
586 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
588 * @address: Starting address in bytes
589 * @buf: Read data is placed here
590 * @size: How many bytes to read
592 * Reads NVM contents of the router. If NVM is not supported returns
595 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
598 return usb4_do_read_data(address, buf, size,
599 usb4_switch_nvm_read_block, sw);
602 static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
603 unsigned int address)
605 u32 metadata, dwaddress;
609 dwaddress = address / 4;
610 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
611 USB4_NVM_SET_OFFSET_MASK;
613 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
618 return status ? -EIO : 0;
621 static int usb4_switch_nvm_write_next_block(void *data, const void *buf,
624 struct tb_switch *sw = data;
628 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
629 buf, dwords, NULL, 0);
633 return status ? -EIO : 0;
637 * usb4_switch_nvm_write() - Write to the router NVM
639 * @address: Start address where to write in bytes
640 * @buf: Pointer to the data to write
641 * @size: Size of @buf in bytes
643 * Writes @buf to the router NVM using USB4 router operations. If NVM
644 * write is not supported returns %-EOPNOTSUPP.
646 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
647 const void *buf, size_t size)
651 ret = usb4_switch_nvm_set_offset(sw, address);
655 return usb4_do_write_data(address, buf, size,
656 usb4_switch_nvm_write_next_block, sw);
660 * usb4_switch_nvm_authenticate() - Authenticate new NVM
663 * After the new NVM has been written via usb4_switch_nvm_write(), this
664 * function triggers NVM authentication process. The router gets power
665 * cycled and if the authentication is successful the new NVM starts
666 * running. In case of failure returns negative errno.
668 * The caller should call usb4_switch_nvm_authenticate_status() to read
669 * the status of the authentication after power cycle. It should be the
670 * first router operation to avoid the status being lost.
672 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
676 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
679 * The router is power cycled once NVM_AUTH is started so it is
680 * expected to get any of the following errors back.
693 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
695 * @status: Status code of the operation
697 * The function checks if there is status available from the last NVM
698 * authenticate router operation. If there is status then %0 is returned
699 * and the status code is placed in @status. Returns negative errno in case
702 * Must be called before any other router operation.
704 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
706 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
711 if (cm_ops->usb4_switch_nvm_authenticate_status) {
712 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
713 if (ret != -EOPNOTSUPP)
717 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
721 /* Check that the opcode is correct */
722 opcode = val & ROUTER_CS_26_OPCODE_MASK;
723 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
724 if (val & ROUTER_CS_26_OV)
726 if (val & ROUTER_CS_26_ONS)
729 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
730 ROUTER_CS_26_STATUS_SHIFT;
739 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
743 * For DP tunneling this function can be used to query availability of
744 * DP IN resource. Returns true if the resource is available for DP
745 * tunneling, false otherwise.
747 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
749 u32 metadata = in->port;
753 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
756 * If DP resource allocation is not supported assume it is
759 if (ret == -EOPNOTSUPP)
768 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
772 * Allocates DP IN resource for DP tunneling using USB4 router
773 * operations. If the resource was allocated returns %0. Otherwise
774 * returns negative errno, in particular %-EBUSY if the resource is
777 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
779 u32 metadata = in->port;
783 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
785 if (ret == -EOPNOTSUPP)
790 return status ? -EBUSY : 0;
794 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
798 * Releases the previously allocated DP IN resource.
800 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
802 u32 metadata = in->port;
806 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
808 if (ret == -EOPNOTSUPP)
813 return status ? -EIO : 0;
816 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
821 /* Assume port is primary */
822 tb_switch_for_each_port(sw, p) {
823 if (!tb_port_is_null(p))
825 if (tb_is_upstream_port(p))
838 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
842 * USB4 routers have direct mapping between USB4 ports and PCIe
843 * downstream adapters where the PCIe topology is extended. This
844 * function returns the corresponding downstream PCIe adapter or %NULL
845 * if no such mapping was possible.
847 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
848 const struct tb_port *port)
850 int usb4_idx = usb4_port_idx(sw, port);
854 /* Find PCIe down port matching usb4_port */
855 tb_switch_for_each_port(sw, p) {
856 if (!tb_port_is_pcie_down(p))
859 if (pcie_idx == usb4_idx)
869 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
873 * USB4 routers have direct mapping between USB4 ports and USB 3.x
874 * downstream adapters where the USB 3.x topology is extended. This
875 * function returns the corresponding downstream USB 3.x adapter or
876 * %NULL if no such mapping was possible.
878 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
879 const struct tb_port *port)
881 int usb4_idx = usb4_port_idx(sw, port);
885 /* Find USB3 down port matching usb4_port */
886 tb_switch_for_each_port(sw, p) {
887 if (!tb_port_is_usb3_down(p))
890 if (usb_idx == usb4_idx)
900 * usb4_port_unlock() - Unlock USB4 downstream port
901 * @port: USB4 port to unlock
903 * Unlocks USB4 downstream port so that the connection manager can
904 * access the router below this port.
906 int usb4_port_unlock(struct tb_port *port)
911 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
915 val &= ~ADP_CS_4_LCK;
916 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
919 static int usb4_port_set_configured(struct tb_port *port, bool configured)
927 ret = tb_port_read(port, &val, TB_CFG_PORT,
928 port->cap_usb4 + PORT_CS_19, 1);
933 val |= PORT_CS_19_PC;
935 val &= ~PORT_CS_19_PC;
937 return tb_port_write(port, &val, TB_CFG_PORT,
938 port->cap_usb4 + PORT_CS_19, 1);
942 * usb4_port_configure() - Set USB4 port configured
945 * Sets the USB4 link to be configured for power management purposes.
947 int usb4_port_configure(struct tb_port *port)
949 return usb4_port_set_configured(port, true);
953 * usb4_port_unconfigure() - Set USB4 port unconfigured
956 * Sets the USB4 link to be unconfigured for power management purposes.
958 void usb4_port_unconfigure(struct tb_port *port)
960 usb4_port_set_configured(port, false);
963 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
971 ret = tb_port_read(port, &val, TB_CFG_PORT,
972 port->cap_usb4 + PORT_CS_19, 1);
977 val |= PORT_CS_19_PID;
979 val &= ~PORT_CS_19_PID;
981 return tb_port_write(port, &val, TB_CFG_PORT,
982 port->cap_usb4 + PORT_CS_19, 1);
986 * usb4_port_configure_xdomain() - Configure port for XDomain
987 * @port: USB4 port connected to another host
989 * Marks the USB4 port as being connected to another host. Returns %0 in
990 * success and negative errno in failure.
992 int usb4_port_configure_xdomain(struct tb_port *port)
994 return usb4_set_xdomain_configured(port, true);
998 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
999 * @port: USB4 port that was connected to another host
1001 * Clears USB4 port from being marked as XDomain.
1003 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1005 usb4_set_xdomain_configured(port, false);
1008 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1009 u32 value, int timeout_msec)
1011 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1017 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1021 if ((val & bit) == value)
1024 usleep_range(50, 100);
1025 } while (ktime_before(ktime_get(), timeout));
1030 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1032 if (dwords > USB4_DATA_DWORDS)
1035 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1039 static int usb4_port_write_data(struct tb_port *port, const void *data,
1042 if (dwords > USB4_DATA_DWORDS)
1045 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1049 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1050 u8 index, u8 reg, void *buf, u8 size)
1052 size_t dwords = DIV_ROUND_UP(size, 4);
1056 if (!port->cap_usb4)
1060 val |= size << PORT_CS_1_LENGTH_SHIFT;
1061 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1062 if (target == USB4_SB_TARGET_RETIMER)
1063 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1064 val |= PORT_CS_1_PND;
1066 ret = tb_port_write(port, &val, TB_CFG_PORT,
1067 port->cap_usb4 + PORT_CS_1, 1);
1071 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1072 PORT_CS_1_PND, 0, 500);
1076 ret = tb_port_read(port, &val, TB_CFG_PORT,
1077 port->cap_usb4 + PORT_CS_1, 1);
1081 if (val & PORT_CS_1_NR)
1083 if (val & PORT_CS_1_RC)
1086 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1089 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1090 u8 index, u8 reg, const void *buf, u8 size)
1092 size_t dwords = DIV_ROUND_UP(size, 4);
1096 if (!port->cap_usb4)
1100 ret = usb4_port_write_data(port, buf, dwords);
1106 val |= size << PORT_CS_1_LENGTH_SHIFT;
1107 val |= PORT_CS_1_WNR_WRITE;
1108 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1109 if (target == USB4_SB_TARGET_RETIMER)
1110 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1111 val |= PORT_CS_1_PND;
1113 ret = tb_port_write(port, &val, TB_CFG_PORT,
1114 port->cap_usb4 + PORT_CS_1, 1);
1118 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1119 PORT_CS_1_PND, 0, 500);
1123 ret = tb_port_read(port, &val, TB_CFG_PORT,
1124 port->cap_usb4 + PORT_CS_1, 1);
1128 if (val & PORT_CS_1_NR)
1130 if (val & PORT_CS_1_RC)
1136 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1137 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1144 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1149 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1153 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1162 case USB4_SB_OPCODE_ERR:
1165 case USB4_SB_OPCODE_ONS:
1173 } while (ktime_before(ktime_get(), timeout));
1179 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1182 * This forces the USB4 port to send broadcast RT transaction which
1183 * makes the retimers on the link to assign index to themselves. Returns
1184 * %0 in case of success and negative errno if there was an error.
1186 int usb4_port_enumerate_retimers(struct tb_port *port)
1190 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1191 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1192 USB4_SB_OPCODE, &val, sizeof(val));
1195 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1196 enum usb4_sb_opcode opcode,
1199 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1204 * usb4_port_retimer_read() - Read from retimer sideband registers
1206 * @index: Retimer index
1207 * @reg: Sideband register to read
1208 * @buf: Data from @reg is stored here
1209 * @size: Number of bytes to read
1211 * Function reads retimer sideband registers starting from @reg. The
1212 * retimer is connected to @port at @index. Returns %0 in case of
1213 * success, and read data is copied to @buf. If there is no retimer
1214 * present at given @index returns %-ENODEV. In any other failure
1215 * returns negative errno.
1217 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1220 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1225 * usb4_port_retimer_write() - Write to retimer sideband registers
1227 * @index: Retimer index
1228 * @reg: Sideband register to write
1229 * @buf: Data that is written starting from @reg
1230 * @size: Number of bytes to write
1232 * Writes retimer sideband registers starting from @reg. The retimer is
1233 * connected to @port at @index. Returns %0 in case of success. If there
1234 * is no retimer present at given @index returns %-ENODEV. In any other
1235 * failure returns negative errno.
1237 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1238 const void *buf, u8 size)
1240 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1245 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1247 * @index: Retimer index
1249 * If the retimer at @index is last one (connected directly to the
1250 * Type-C port) this function returns %1. If it is not returns %0. If
1251 * the retimer is not present returns %-ENODEV. Otherwise returns
1254 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1259 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1264 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1266 return ret ? ret : metadata & 1;
1270 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1272 * @index: Retimer index
1274 * Reads NVM sector size (in bytes) of a retimer at @index. This
1275 * operation can be used to determine whether the retimer supports NVM
1276 * upgrade for example. Returns sector size in bytes or negative errno
1277 * in case of error. Specifically returns %-ENODEV if there is no
1278 * retimer at @index.
1280 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1285 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1290 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1292 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1295 static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1296 unsigned int address)
1298 u32 metadata, dwaddress;
1301 dwaddress = address / 4;
1302 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1303 USB4_NVM_SET_OFFSET_MASK;
1305 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1310 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1314 struct retimer_info {
1315 struct tb_port *port;
1319 static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf,
1323 const struct retimer_info *info = data;
1324 struct tb_port *port = info->port;
1325 u8 index = info->index;
1328 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1333 return usb4_port_retimer_op(port, index,
1334 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1338 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1340 * @index: Retimer index
1341 * @address: Byte address where to start the write
1342 * @buf: Data to write
1343 * @size: Size in bytes how much to write
1345 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1346 * upgrade. Returns %0 if the data was written successfully and negative
1347 * errno in case of failure. Specifically returns %-ENODEV if there is
1348 * no retimer at @index.
1350 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1351 const void *buf, size_t size)
1353 struct retimer_info info = { .port = port, .index = index };
1356 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1360 return usb4_do_write_data(address, buf, size,
1361 usb4_port_retimer_nvm_write_next_block, &info);
1365 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1367 * @index: Retimer index
1369 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1370 * this function can be used to trigger the NVM upgrade process. If
1371 * successful the retimer restarts with the new NVM and may not have the
1372 * index set so one needs to call usb4_port_enumerate_retimers() to
1373 * force index to be assigned.
1375 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1380 * We need to use the raw operation here because once the
1381 * authentication completes the retimer index is not set anymore
1382 * so we do not get back the status now.
1384 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1385 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1386 USB4_SB_OPCODE, &val, sizeof(val));
1390 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1392 * @index: Retimer index
1393 * @status: Raw status code read from metadata
1395 * This can be called after usb4_port_retimer_nvm_authenticate() and
1396 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1398 * Returns %0 if the authentication status was successfully read. The
1399 * completion metadata (the result) is then stored into @status. If
1400 * reading the status fails, returns negative errno.
1402 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1408 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1418 case USB4_SB_OPCODE_ERR:
1419 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1420 &metadata, sizeof(metadata));
1424 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1427 case USB4_SB_OPCODE_ONS:
1435 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1436 void *buf, size_t dwords)
1438 const struct retimer_info *info = data;
1439 struct tb_port *port = info->port;
1440 u8 index = info->index;
1444 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1445 if (dwords < USB4_DATA_DWORDS)
1446 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1448 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1453 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1457 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1462 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1464 * @index: Retimer index
1465 * @address: NVM address (in bytes) to start reading
1466 * @buf: Data read from NVM is stored here
1467 * @size: Number of bytes to read
1469 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1470 * read was successful and negative errno in case of failure.
1471 * Specifically returns %-ENODEV if there is no retimer at @index.
1473 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1474 unsigned int address, void *buf, size_t size)
1476 struct retimer_info info = { .port = port, .index = index };
1478 return usb4_do_read_data(address, buf, size,
1479 usb4_port_retimer_nvm_read_block, &info);
1483 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1484 * @port: USB3 adapter port
1486 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1487 * Negative errno in case of error.
1489 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1494 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1497 ret = tb_port_read(port, &val, TB_CFG_PORT,
1498 port->cap_adap + ADP_USB3_CS_4, 1);
1502 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1503 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1507 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1508 * @port: USB3 adapter port
1510 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1511 * link is not up returns %0 and negative errno in case of failure.
1513 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1518 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1521 ret = tb_port_read(port, &val, TB_CFG_PORT,
1522 port->cap_adap + ADP_USB3_CS_4, 1);
1526 if (!(val & ADP_USB3_CS_4_ULV))
1529 lr = val & ADP_USB3_CS_4_ALR_MASK;
1530 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1533 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1538 if (!tb_port_is_usb3_down(port))
1540 if (tb_route(port->sw))
1543 ret = tb_port_read(port, &val, TB_CFG_PORT,
1544 port->cap_adap + ADP_USB3_CS_2, 1);
1549 val |= ADP_USB3_CS_2_CMR;
1551 val &= ~ADP_USB3_CS_2_CMR;
1553 ret = tb_port_write(port, &val, TB_CFG_PORT,
1554 port->cap_adap + ADP_USB3_CS_2, 1);
1559 * We can use val here directly as the CMR bit is in the same place
1560 * as HCA. Just mask out others.
1562 val &= ADP_USB3_CS_2_CMR;
1563 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1564 ADP_USB3_CS_1_HCA, val, 1500);
1567 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1569 return usb4_usb3_port_cm_request(port, true);
1572 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1574 return usb4_usb3_port_cm_request(port, false);
1577 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1579 unsigned long uframes;
1581 uframes = bw * 512UL << scale;
1582 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1585 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1587 unsigned long uframes;
1589 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1590 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1591 return DIV_ROUND_UP(uframes, 512UL << scale);
1594 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1601 ret = tb_port_read(port, &val, TB_CFG_PORT,
1602 port->cap_adap + ADP_USB3_CS_2, 1);
1606 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1607 port->cap_adap + ADP_USB3_CS_3, 1);
1611 scale &= ADP_USB3_CS_3_SCALE_MASK;
1613 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1614 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1616 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1617 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1623 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1624 * @port: USB3 adapter port
1625 * @upstream_bw: Allocated upstream bandwidth is stored here
1626 * @downstream_bw: Allocated downstream bandwidth is stored here
1628 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1629 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1632 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1637 ret = usb4_usb3_port_set_cm_request(port);
1641 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1643 usb4_usb3_port_clear_cm_request(port);
1648 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1655 ret = tb_port_read(port, &val, TB_CFG_PORT,
1656 port->cap_adap + ADP_USB3_CS_1, 1);
1660 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1661 port->cap_adap + ADP_USB3_CS_3, 1);
1665 scale &= ADP_USB3_CS_3_SCALE_MASK;
1667 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1668 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1670 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1671 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1676 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1680 u32 val, ubw, dbw, scale;
1683 /* Read the used scale, hardware default is 0 */
1684 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1685 port->cap_adap + ADP_USB3_CS_3, 1);
1689 scale &= ADP_USB3_CS_3_SCALE_MASK;
1690 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1691 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1693 ret = tb_port_read(port, &val, TB_CFG_PORT,
1694 port->cap_adap + ADP_USB3_CS_2, 1);
1698 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1699 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1702 return tb_port_write(port, &val, TB_CFG_PORT,
1703 port->cap_adap + ADP_USB3_CS_2, 1);
1707 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1708 * @port: USB3 adapter port
1709 * @upstream_bw: New upstream bandwidth
1710 * @downstream_bw: New downstream bandwidth
1712 * This can be used to set how much bandwidth is allocated for the USB3
1713 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1714 * new values programmed to the USB3 adapter allocation registers. If
1715 * the values are lower than what is currently consumed the allocation
1716 * is set to what is currently consumed instead (consumed bandwidth
1717 * cannot be taken away by CM). The actual new values are returned in
1718 * @upstream_bw and @downstream_bw.
1720 * Returns %0 in case of success and negative errno if there was a
1723 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1726 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1728 ret = usb4_usb3_port_set_cm_request(port);
1732 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1737 /* Don't allow it go lower than what is consumed */
1738 allocate_up = max(*upstream_bw, consumed_up);
1739 allocate_down = max(*downstream_bw, consumed_down);
1741 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1746 *upstream_bw = allocate_up;
1747 *downstream_bw = allocate_down;
1750 usb4_usb3_port_clear_cm_request(port);
1755 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1756 * @port: USB3 adapter port
1757 * @upstream_bw: New allocated upstream bandwidth
1758 * @downstream_bw: New allocated downstream bandwidth
1760 * Releases USB3 allocated bandwidth down to what is actually consumed.
1761 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1763 * Returns 0% in success and negative errno in case of failure.
1765 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1768 int ret, consumed_up, consumed_down;
1770 ret = usb4_usb3_port_set_cm_request(port);
1774 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1780 * Always keep 1000 Mb/s to make sure xHCI has at least some
1781 * bandwidth available for isochronous traffic.
1783 if (consumed_up < 1000)
1785 if (consumed_down < 1000)
1786 consumed_down = 1000;
1788 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1793 *upstream_bw = consumed_up;
1794 *downstream_bw = consumed_down;
1797 usb4_usb3_port_clear_cm_request(port);