1 // SPDX-License-Identifier: GPL-2.0
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
16 #define USB4_DATA_RETRIES 3
19 USB4_SB_TARGET_ROUTER,
20 USB4_SB_TARGET_PARTNER,
21 USB4_SB_TARGET_RETIMER,
24 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
25 #define USB4_NVM_READ_OFFSET_SHIFT 2
26 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
27 #define USB4_NVM_READ_LENGTH_SHIFT 24
29 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
30 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
32 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
33 #define USB4_DROM_ADDRESS_SHIFT 2
34 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
35 #define USB4_DROM_SIZE_SHIFT 15
37 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
39 #define USB4_BA_LENGTH_MASK GENMASK(7, 0)
40 #define USB4_BA_INDEX_MASK GENMASK(15, 0)
43 USB4_BA_MAX_USB3 = 0x1,
44 USB4_BA_MIN_DP_AUX = 0x2,
45 USB4_BA_MIN_DP_MAIN = 0x3,
46 USB4_BA_MAX_PCIE = 0x4,
50 #define USB4_BA_VALUE_MASK GENMASK(31, 16)
51 #define USB4_BA_VALUE_SHIFT 16
53 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
54 u32 *metadata, u8 *status,
55 const void *tx_data, size_t tx_dwords,
56 void *rx_data, size_t rx_dwords)
62 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
67 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
73 val = opcode | ROUTER_CS_26_OV;
74 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
78 ret = tb_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
82 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
86 if (val & ROUTER_CS_26_ONS)
90 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
91 ROUTER_CS_26_STATUS_SHIFT;
94 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
99 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
108 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
109 u8 *status, const void *tx_data, size_t tx_dwords,
110 void *rx_data, size_t rx_dwords)
112 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
114 if (tx_dwords > NVM_DATA_DWORDS || rx_dwords > NVM_DATA_DWORDS)
118 * If the connection manager implementation provides USB4 router
119 * operation proxy callback, call it here instead of running the
120 * operation natively.
122 if (cm_ops->usb4_switch_op) {
125 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
126 tx_data, tx_dwords, rx_data,
128 if (ret != -EOPNOTSUPP)
132 * If the proxy was not supported then run the native
133 * router operation instead.
137 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
138 tx_dwords, rx_data, rx_dwords);
141 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
142 u32 *metadata, u8 *status)
144 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
147 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
148 u32 *metadata, u8 *status,
149 const void *tx_data, size_t tx_dwords,
150 void *rx_data, size_t rx_dwords)
152 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
153 tx_dwords, rx_data, rx_dwords);
156 static void usb4_switch_check_wakes(struct tb_switch *sw)
158 bool wakeup_usb4 = false;
159 struct usb4_port *usb4;
160 struct tb_port *port;
164 if (!device_may_wakeup(&sw->dev))
168 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
171 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
172 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
173 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
175 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
179 * Check for any downstream ports for USB4 wake,
180 * connection wake and disconnection wake.
182 tb_switch_for_each_port(sw, port) {
186 if (tb_port_read(port, &val, TB_CFG_PORT,
187 port->cap_usb4 + PORT_CS_18, 1))
190 tb_port_dbg(port, "USB4 wake: %s, connection wake: %s, disconnection wake: %s\n",
191 (val & PORT_CS_18_WOU4S) ? "yes" : "no",
192 (val & PORT_CS_18_WOCS) ? "yes" : "no",
193 (val & PORT_CS_18_WODS) ? "yes" : "no");
195 wakeup_usb4 = val & (PORT_CS_18_WOU4S | PORT_CS_18_WOCS |
199 if (device_may_wakeup(&usb4->dev) && wakeup_usb4)
200 pm_wakeup_event(&usb4->dev, 0);
202 wakeup |= wakeup_usb4;
206 pm_wakeup_event(&sw->dev, 0);
209 static bool link_is_usb4(struct tb_port *port)
216 if (tb_port_read(port, &val, TB_CFG_PORT,
217 port->cap_usb4 + PORT_CS_18, 1))
220 return !(val & PORT_CS_18_TCM);
224 * usb4_switch_setup() - Additional setup for USB4 device
225 * @sw: USB4 router to setup
227 * USB4 routers need additional settings in order to enable all the
228 * tunneling. This function enables USB and PCIe tunneling if it can be
229 * enabled (e.g the parent switch also supports them). If USB tunneling
230 * is not available for some reason (like that there is Thunderbolt 3
231 * switch upstream) then the internal xHCI controller is enabled
234 int usb4_switch_setup(struct tb_switch *sw)
236 struct tb_port *downstream_port;
237 struct tb_switch *parent;
242 usb4_switch_check_wakes(sw);
247 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
251 parent = tb_switch_parent(sw);
252 downstream_port = tb_port_at(tb_route(sw), parent);
253 sw->link_usb4 = link_is_usb4(downstream_port);
254 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT");
256 xhci = val & ROUTER_CS_6_HCI;
257 tbt3 = !(val & ROUTER_CS_6_TNS);
259 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
260 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
262 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
266 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
267 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
268 val |= ROUTER_CS_5_UTO;
273 * Only enable PCIe tunneling if the parent router supports it
274 * and it is not disabled.
276 if (tb_acpi_may_tunnel_pcie() &&
277 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
278 val |= ROUTER_CS_5_PTO;
280 * xHCI can be enabled if PCIe tunneling is supported
281 * and the parent does not have any USB3 dowstream
282 * adapters (so we cannot do USB 3.x tunneling).
285 val |= ROUTER_CS_5_HCO;
288 /* TBT3 supported by the CM */
289 val |= ROUTER_CS_5_C3S;
290 /* Tunneling configuration is ready now */
291 val |= ROUTER_CS_5_CV;
293 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
297 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
302 * usb4_switch_read_uid() - Read UID from USB4 router
304 * @uid: UID is stored here
306 * Reads 64-bit UID from USB4 router config space.
308 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
310 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
313 static int usb4_switch_drom_read_block(void *data,
314 unsigned int dwaddress, void *buf,
317 struct tb_switch *sw = data;
322 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
323 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
324 USB4_DROM_ADDRESS_MASK;
326 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
327 &status, NULL, 0, buf, dwords);
331 return status ? -EIO : 0;
335 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
337 * @address: Byte address inside DROM to start reading
338 * @buf: Buffer where the DROM content is stored
339 * @size: Number of bytes to read from DROM
341 * Uses USB4 router operations to read router DROM. For devices this
342 * should always work but for hosts it may return %-EOPNOTSUPP in which
343 * case the host router does not have DROM.
345 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
348 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
349 usb4_switch_drom_read_block, sw);
353 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
356 * Checks whether conditions are met so that lane bonding can be
357 * established with the upstream router. Call only for device routers.
359 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
365 up = tb_upstream_port(sw);
366 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
370 return !!(val & PORT_CS_18_BE);
374 * usb4_switch_set_wake() - Enabled/disable wake
376 * @flags: Wakeup flags (%0 to disable)
378 * Enables/disables router to wake up from sleep.
380 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
382 struct usb4_port *usb4;
383 struct tb_port *port;
384 u64 route = tb_route(sw);
389 * Enable wakes coming from all USB4 downstream ports (from
390 * child routers). For device routers do this also for the
391 * upstream USB4 port.
393 tb_switch_for_each_port(sw, port) {
394 if (!tb_port_is_null(port))
396 if (!route && tb_is_upstream_port(port))
401 ret = tb_port_read(port, &val, TB_CFG_PORT,
402 port->cap_usb4 + PORT_CS_19, 1);
406 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
408 if (tb_is_upstream_port(port)) {
409 val |= PORT_CS_19_WOU4;
411 bool configured = val & PORT_CS_19_PC;
414 if (((flags & TB_WAKE_ON_CONNECT) |
415 device_may_wakeup(&usb4->dev)) && !configured)
416 val |= PORT_CS_19_WOC;
417 if (((flags & TB_WAKE_ON_DISCONNECT) |
418 device_may_wakeup(&usb4->dev)) && configured)
419 val |= PORT_CS_19_WOD;
420 if ((flags & TB_WAKE_ON_USB4) && configured)
421 val |= PORT_CS_19_WOU4;
424 ret = tb_port_write(port, &val, TB_CFG_PORT,
425 port->cap_usb4 + PORT_CS_19, 1);
431 * Enable wakes from PCIe, USB 3.x and DP on this router. Only
432 * needed for device routers.
435 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
439 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU | ROUTER_CS_5_WOD);
440 if (flags & TB_WAKE_ON_USB3)
441 val |= ROUTER_CS_5_WOU;
442 if (flags & TB_WAKE_ON_PCIE)
443 val |= ROUTER_CS_5_WOP;
444 if (flags & TB_WAKE_ON_DP)
445 val |= ROUTER_CS_5_WOD;
447 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
456 * usb4_switch_set_sleep() - Prepare the router to enter sleep
459 * Sets sleep bit for the router. Returns when the router sleep ready
460 * bit has been asserted.
462 int usb4_switch_set_sleep(struct tb_switch *sw)
467 /* Set sleep bit and wait for sleep ready to be asserted */
468 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
472 val |= ROUTER_CS_5_SLP;
474 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
478 return tb_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
479 ROUTER_CS_6_SLPR, 500);
483 * usb4_switch_nvm_sector_size() - Return router NVM sector size
486 * If the router supports NVM operations this function returns the NVM
487 * sector size in bytes. If NVM operations are not supported returns
490 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
496 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
502 return status == 0x2 ? -EOPNOTSUPP : -EIO;
504 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
507 static int usb4_switch_nvm_read_block(void *data,
508 unsigned int dwaddress, void *buf, size_t dwords)
510 struct tb_switch *sw = data;
515 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
516 USB4_NVM_READ_LENGTH_MASK;
517 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
518 USB4_NVM_READ_OFFSET_MASK;
520 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
521 &status, NULL, 0, buf, dwords);
525 return status ? -EIO : 0;
529 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
531 * @address: Starting address in bytes
532 * @buf: Read data is placed here
533 * @size: How many bytes to read
535 * Reads NVM contents of the router. If NVM is not supported returns
538 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
541 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
542 usb4_switch_nvm_read_block, sw);
546 * usb4_switch_nvm_set_offset() - Set NVM write offset
548 * @address: Start offset
550 * Explicitly sets NVM write offset. Normally when writing to NVM this
551 * is done automatically by usb4_switch_nvm_write().
553 * Returns %0 in success and negative errno if there was a failure.
555 int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address)
557 u32 metadata, dwaddress;
561 dwaddress = address / 4;
562 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
563 USB4_NVM_SET_OFFSET_MASK;
565 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
570 return status ? -EIO : 0;
573 static int usb4_switch_nvm_write_next_block(void *data, unsigned int dwaddress,
574 const void *buf, size_t dwords)
576 struct tb_switch *sw = data;
580 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
581 buf, dwords, NULL, 0);
585 return status ? -EIO : 0;
589 * usb4_switch_nvm_write() - Write to the router NVM
591 * @address: Start address where to write in bytes
592 * @buf: Pointer to the data to write
593 * @size: Size of @buf in bytes
595 * Writes @buf to the router NVM using USB4 router operations. If NVM
596 * write is not supported returns %-EOPNOTSUPP.
598 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
599 const void *buf, size_t size)
603 ret = usb4_switch_nvm_set_offset(sw, address);
607 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
608 usb4_switch_nvm_write_next_block, sw);
612 * usb4_switch_nvm_authenticate() - Authenticate new NVM
615 * After the new NVM has been written via usb4_switch_nvm_write(), this
616 * function triggers NVM authentication process. The router gets power
617 * cycled and if the authentication is successful the new NVM starts
618 * running. In case of failure returns negative errno.
620 * The caller should call usb4_switch_nvm_authenticate_status() to read
621 * the status of the authentication after power cycle. It should be the
622 * first router operation to avoid the status being lost.
624 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
628 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
631 * The router is power cycled once NVM_AUTH is started so it is
632 * expected to get any of the following errors back.
645 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
647 * @status: Status code of the operation
649 * The function checks if there is status available from the last NVM
650 * authenticate router operation. If there is status then %0 is returned
651 * and the status code is placed in @status. Returns negative errno in case
654 * Must be called before any other router operation.
656 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
658 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
663 if (cm_ops->usb4_switch_nvm_authenticate_status) {
664 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
665 if (ret != -EOPNOTSUPP)
669 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
673 /* Check that the opcode is correct */
674 opcode = val & ROUTER_CS_26_OPCODE_MASK;
675 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
676 if (val & ROUTER_CS_26_OV)
678 if (val & ROUTER_CS_26_ONS)
681 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
682 ROUTER_CS_26_STATUS_SHIFT;
691 * usb4_switch_credits_init() - Read buffer allocation parameters
694 * Reads @sw buffer allocation parameters and initializes @sw buffer
695 * allocation fields accordingly. Specifically @sw->credits_allocation
696 * is set to %true if these parameters can be used in tunneling.
698 * Returns %0 on success and negative errno otherwise.
700 int usb4_switch_credits_init(struct tb_switch *sw)
702 int max_usb3, min_dp_aux, min_dp_main, max_pcie, max_dma;
703 int ret, length, i, nports;
704 const struct tb_port *port;
705 u32 data[NVM_DATA_DWORDS];
709 memset(data, 0, sizeof(data));
710 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_BUFFER_ALLOC, &metadata,
711 &status, NULL, 0, data, ARRAY_SIZE(data));
717 length = metadata & USB4_BA_LENGTH_MASK;
718 if (WARN_ON(length > ARRAY_SIZE(data)))
727 tb_sw_dbg(sw, "credit allocation parameters:\n");
729 for (i = 0; i < length; i++) {
732 index = data[i] & USB4_BA_INDEX_MASK;
733 value = (data[i] & USB4_BA_VALUE_MASK) >> USB4_BA_VALUE_SHIFT;
736 case USB4_BA_MAX_USB3:
737 tb_sw_dbg(sw, " USB3: %u\n", value);
740 case USB4_BA_MIN_DP_AUX:
741 tb_sw_dbg(sw, " DP AUX: %u\n", value);
744 case USB4_BA_MIN_DP_MAIN:
745 tb_sw_dbg(sw, " DP main: %u\n", value);
748 case USB4_BA_MAX_PCIE:
749 tb_sw_dbg(sw, " PCIe: %u\n", value);
753 tb_sw_dbg(sw, " DMA: %u\n", value);
757 tb_sw_dbg(sw, " unknown credit allocation index %#x, skipping\n",
764 * Validate the buffer allocation preferences. If we find
765 * issues, log a warning and fall back using the hard-coded
769 /* Host router must report baMaxHI */
770 if (!tb_route(sw) && max_dma < 0) {
771 tb_sw_warn(sw, "host router is missing baMaxHI\n");
776 tb_switch_for_each_port(sw, port) {
777 if (tb_port_is_null(port))
781 /* Must have DP buffer allocation (multiple USB4 ports) */
782 if (nports > 2 && (min_dp_aux < 0 || min_dp_main < 0)) {
783 tb_sw_warn(sw, "multiple USB4 ports require baMinDPaux/baMinDPmain\n");
787 tb_switch_for_each_port(sw, port) {
788 if (tb_port_is_dpout(port) && min_dp_main < 0) {
789 tb_sw_warn(sw, "missing baMinDPmain");
792 if ((tb_port_is_dpin(port) || tb_port_is_dpout(port)) &&
794 tb_sw_warn(sw, "missing baMinDPaux");
797 if ((tb_port_is_usb3_down(port) || tb_port_is_usb3_up(port)) &&
799 tb_sw_warn(sw, "missing baMaxUSB3");
802 if ((tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) &&
804 tb_sw_warn(sw, "missing baMaxPCIe");
810 * Buffer allocation passed the validation so we can use it in
813 sw->credit_allocation = true;
815 sw->max_usb3_credits = max_usb3;
817 sw->min_dp_aux_credits = min_dp_aux;
819 sw->min_dp_main_credits = min_dp_main;
821 sw->max_pcie_credits = max_pcie;
823 sw->max_dma_credits = max_dma;
832 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
836 * For DP tunneling this function can be used to query availability of
837 * DP IN resource. Returns true if the resource is available for DP
838 * tunneling, false otherwise.
840 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
842 u32 metadata = in->port;
846 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
849 * If DP resource allocation is not supported assume it is
852 if (ret == -EOPNOTSUPP)
861 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
865 * Allocates DP IN resource for DP tunneling using USB4 router
866 * operations. If the resource was allocated returns %0. Otherwise
867 * returns negative errno, in particular %-EBUSY if the resource is
870 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
872 u32 metadata = in->port;
876 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
878 if (ret == -EOPNOTSUPP)
883 return status ? -EBUSY : 0;
887 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
891 * Releases the previously allocated DP IN resource.
893 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
895 u32 metadata = in->port;
899 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
901 if (ret == -EOPNOTSUPP)
906 return status ? -EIO : 0;
909 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
914 /* Assume port is primary */
915 tb_switch_for_each_port(sw, p) {
916 if (!tb_port_is_null(p))
918 if (tb_is_upstream_port(p))
931 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
935 * USB4 routers have direct mapping between USB4 ports and PCIe
936 * downstream adapters where the PCIe topology is extended. This
937 * function returns the corresponding downstream PCIe adapter or %NULL
938 * if no such mapping was possible.
940 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
941 const struct tb_port *port)
943 int usb4_idx = usb4_port_idx(sw, port);
947 /* Find PCIe down port matching usb4_port */
948 tb_switch_for_each_port(sw, p) {
949 if (!tb_port_is_pcie_down(p))
952 if (pcie_idx == usb4_idx)
962 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
966 * USB4 routers have direct mapping between USB4 ports and USB 3.x
967 * downstream adapters where the USB 3.x topology is extended. This
968 * function returns the corresponding downstream USB 3.x adapter or
969 * %NULL if no such mapping was possible.
971 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
972 const struct tb_port *port)
974 int usb4_idx = usb4_port_idx(sw, port);
978 /* Find USB3 down port matching usb4_port */
979 tb_switch_for_each_port(sw, p) {
980 if (!tb_port_is_usb3_down(p))
983 if (usb_idx == usb4_idx)
993 * usb4_switch_add_ports() - Add USB4 ports for this router
996 * For USB4 router finds all USB4 ports and registers devices for each.
997 * Can be called to any router.
999 * Return %0 in case of success and negative errno in case of failure.
1001 int usb4_switch_add_ports(struct tb_switch *sw)
1003 struct tb_port *port;
1005 if (tb_switch_is_icm(sw) || !tb_switch_is_usb4(sw))
1008 tb_switch_for_each_port(sw, port) {
1009 struct usb4_port *usb4;
1011 if (!tb_port_is_null(port))
1013 if (!port->cap_usb4)
1016 usb4 = usb4_port_device_add(port);
1018 usb4_switch_remove_ports(sw);
1019 return PTR_ERR(usb4);
1029 * usb4_switch_remove_ports() - Removes USB4 ports from this router
1032 * Unregisters previously registered USB4 ports.
1034 void usb4_switch_remove_ports(struct tb_switch *sw)
1036 struct tb_port *port;
1038 tb_switch_for_each_port(sw, port) {
1040 usb4_port_device_remove(port->usb4);
1047 * usb4_port_unlock() - Unlock USB4 downstream port
1048 * @port: USB4 port to unlock
1050 * Unlocks USB4 downstream port so that the connection manager can
1051 * access the router below this port.
1053 int usb4_port_unlock(struct tb_port *port)
1058 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1062 val &= ~ADP_CS_4_LCK;
1063 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
1067 * usb4_port_hotplug_enable() - Enables hotplug for a port
1068 * @port: USB4 port to operate on
1070 * Enables hot plug events on a given port. This is only intended
1071 * to be used on lane, DP-IN, and DP-OUT adapters.
1073 int usb4_port_hotplug_enable(struct tb_port *port)
1078 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1082 val &= ~ADP_CS_5_DHP;
1083 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_5, 1);
1086 static int usb4_port_set_configured(struct tb_port *port, bool configured)
1091 if (!port->cap_usb4)
1094 ret = tb_port_read(port, &val, TB_CFG_PORT,
1095 port->cap_usb4 + PORT_CS_19, 1);
1100 val |= PORT_CS_19_PC;
1102 val &= ~PORT_CS_19_PC;
1104 return tb_port_write(port, &val, TB_CFG_PORT,
1105 port->cap_usb4 + PORT_CS_19, 1);
1109 * usb4_port_configure() - Set USB4 port configured
1110 * @port: USB4 router
1112 * Sets the USB4 link to be configured for power management purposes.
1114 int usb4_port_configure(struct tb_port *port)
1116 return usb4_port_set_configured(port, true);
1120 * usb4_port_unconfigure() - Set USB4 port unconfigured
1121 * @port: USB4 router
1123 * Sets the USB4 link to be unconfigured for power management purposes.
1125 void usb4_port_unconfigure(struct tb_port *port)
1127 usb4_port_set_configured(port, false);
1130 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
1135 if (!port->cap_usb4)
1138 ret = tb_port_read(port, &val, TB_CFG_PORT,
1139 port->cap_usb4 + PORT_CS_19, 1);
1144 val |= PORT_CS_19_PID;
1146 val &= ~PORT_CS_19_PID;
1148 return tb_port_write(port, &val, TB_CFG_PORT,
1149 port->cap_usb4 + PORT_CS_19, 1);
1153 * usb4_port_configure_xdomain() - Configure port for XDomain
1154 * @port: USB4 port connected to another host
1155 * @xd: XDomain that is connected to the port
1157 * Marks the USB4 port as being connected to another host and updates
1158 * the link type. Returns %0 in success and negative errno in failure.
1160 int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd)
1162 xd->link_usb4 = link_is_usb4(port);
1163 return usb4_set_xdomain_configured(port, true);
1167 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
1168 * @port: USB4 port that was connected to another host
1170 * Clears USB4 port from being marked as XDomain.
1172 void usb4_port_unconfigure_xdomain(struct tb_port *port)
1174 usb4_set_xdomain_configured(port, false);
1177 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1178 u32 value, int timeout_msec)
1180 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1186 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1190 if ((val & bit) == value)
1193 usleep_range(50, 100);
1194 } while (ktime_before(ktime_get(), timeout));
1199 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1201 if (dwords > NVM_DATA_DWORDS)
1204 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1208 static int usb4_port_write_data(struct tb_port *port, const void *data,
1211 if (dwords > NVM_DATA_DWORDS)
1214 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1218 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1219 u8 index, u8 reg, void *buf, u8 size)
1221 size_t dwords = DIV_ROUND_UP(size, 4);
1225 if (!port->cap_usb4)
1229 val |= size << PORT_CS_1_LENGTH_SHIFT;
1230 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1231 if (target == USB4_SB_TARGET_RETIMER)
1232 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1233 val |= PORT_CS_1_PND;
1235 ret = tb_port_write(port, &val, TB_CFG_PORT,
1236 port->cap_usb4 + PORT_CS_1, 1);
1240 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1241 PORT_CS_1_PND, 0, 500);
1245 ret = tb_port_read(port, &val, TB_CFG_PORT,
1246 port->cap_usb4 + PORT_CS_1, 1);
1250 if (val & PORT_CS_1_NR)
1252 if (val & PORT_CS_1_RC)
1255 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1258 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1259 u8 index, u8 reg, const void *buf, u8 size)
1261 size_t dwords = DIV_ROUND_UP(size, 4);
1265 if (!port->cap_usb4)
1269 ret = usb4_port_write_data(port, buf, dwords);
1275 val |= size << PORT_CS_1_LENGTH_SHIFT;
1276 val |= PORT_CS_1_WNR_WRITE;
1277 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1278 if (target == USB4_SB_TARGET_RETIMER)
1279 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1280 val |= PORT_CS_1_PND;
1282 ret = tb_port_write(port, &val, TB_CFG_PORT,
1283 port->cap_usb4 + PORT_CS_1, 1);
1287 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1288 PORT_CS_1_PND, 0, 500);
1292 ret = tb_port_read(port, &val, TB_CFG_PORT,
1293 port->cap_usb4 + PORT_CS_1, 1);
1297 if (val & PORT_CS_1_NR)
1299 if (val & PORT_CS_1_RC)
1305 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1306 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1313 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1318 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1322 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1331 case USB4_SB_OPCODE_ERR:
1334 case USB4_SB_OPCODE_ONS:
1342 } while (ktime_before(ktime_get(), timeout));
1347 static int usb4_port_set_router_offline(struct tb_port *port, bool offline)
1352 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1353 USB4_SB_METADATA, &val, sizeof(val));
1357 val = USB4_SB_OPCODE_ROUTER_OFFLINE;
1358 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1359 USB4_SB_OPCODE, &val, sizeof(val));
1363 * usb4_port_router_offline() - Put the USB4 port to offline mode
1366 * This function puts the USB4 port into offline mode. In this mode the
1367 * port does not react on hotplug events anymore. This needs to be
1368 * called before retimer access is done when the USB4 links is not up.
1370 * Returns %0 in case of success and negative errno if there was an
1373 int usb4_port_router_offline(struct tb_port *port)
1375 return usb4_port_set_router_offline(port, true);
1379 * usb4_port_router_online() - Put the USB4 port back to online
1382 * Makes the USB4 port functional again.
1384 int usb4_port_router_online(struct tb_port *port)
1386 return usb4_port_set_router_offline(port, false);
1390 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1393 * This forces the USB4 port to send broadcast RT transaction which
1394 * makes the retimers on the link to assign index to themselves. Returns
1395 * %0 in case of success and negative errno if there was an error.
1397 int usb4_port_enumerate_retimers(struct tb_port *port)
1401 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1402 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1403 USB4_SB_OPCODE, &val, sizeof(val));
1407 * usb4_port_clx_supported() - Check if CLx is supported by the link
1408 * @port: Port to check for CLx support for
1410 * PORT_CS_18_CPS bit reflects if the link supports CLx including
1411 * active cables (if connected on the link).
1413 bool usb4_port_clx_supported(struct tb_port *port)
1418 ret = tb_port_read(port, &val, TB_CFG_PORT,
1419 port->cap_usb4 + PORT_CS_18, 1);
1423 return !!(val & PORT_CS_18_CPS);
1427 * usb4_port_margining_caps() - Read USB4 port marginig capabilities
1429 * @caps: Array with at least two elements to hold the results
1431 * Reads the USB4 port lane margining capabilities into @caps.
1433 int usb4_port_margining_caps(struct tb_port *port, u32 *caps)
1437 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1438 USB4_SB_OPCODE_READ_LANE_MARGINING_CAP, 500);
1442 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1443 USB4_SB_DATA, caps, sizeof(*caps) * 2);
1447 * usb4_port_hw_margin() - Run hardware lane margining on port
1449 * @lanes: Which lanes to run (must match the port capabilities). Can be
1451 * @ber_level: BER level contour value
1452 * @timing: Perform timing margining instead of voltage
1453 * @right_high: Use Right/high margin instead of left/low
1454 * @results: Array with at least two elements to hold the results
1456 * Runs hardware lane margining on USB4 port and returns the result in
1459 int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1460 unsigned int ber_level, bool timing, bool right_high,
1468 val |= USB4_MARGIN_HW_TIME;
1470 val |= USB4_MARGIN_HW_RH;
1472 val |= (ber_level << USB4_MARGIN_HW_BER_SHIFT) &
1473 USB4_MARGIN_HW_BER_MASK;
1475 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1476 USB4_SB_METADATA, &val, sizeof(val));
1480 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1481 USB4_SB_OPCODE_RUN_HW_LANE_MARGINING, 2500);
1485 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1486 USB4_SB_DATA, results, sizeof(*results) * 2);
1490 * usb4_port_sw_margin() - Run software lane margining on port
1492 * @lanes: Which lanes to run (must match the port capabilities). Can be
1494 * @timing: Perform timing margining instead of voltage
1495 * @right_high: Use Right/high margin instead of left/low
1496 * @counter: What to do with the error counter
1498 * Runs software lane margining on USB4 port. Read back the error
1499 * counters by calling usb4_port_sw_margin_errors(). Returns %0 in
1500 * success and negative errno otherwise.
1502 int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1503 bool right_high, u32 counter)
1510 val |= USB4_MARGIN_SW_TIME;
1512 val |= USB4_MARGIN_SW_RH;
1513 val |= (counter << USB4_MARGIN_SW_COUNTER_SHIFT) &
1514 USB4_MARGIN_SW_COUNTER_MASK;
1516 ret = usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1517 USB4_SB_METADATA, &val, sizeof(val));
1521 return usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1522 USB4_SB_OPCODE_RUN_SW_LANE_MARGINING, 2500);
1526 * usb4_port_sw_margin_errors() - Read the software margining error counters
1528 * @errors: Error metadata is copied here.
1530 * This reads back the software margining error counters from the port.
1531 * Returns %0 in success and negative errno otherwise.
1533 int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors)
1537 ret = usb4_port_sb_op(port, USB4_SB_TARGET_ROUTER, 0,
1538 USB4_SB_OPCODE_READ_SW_MARGIN_ERR, 150);
1542 return usb4_port_sb_read(port, USB4_SB_TARGET_ROUTER, 0,
1543 USB4_SB_METADATA, errors, sizeof(*errors));
1546 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1547 enum usb4_sb_opcode opcode,
1550 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1555 * usb4_port_retimer_set_inbound_sbtx() - Enable sideband channel transactions
1557 * @index: Retimer index
1559 * Enables sideband channel transations on SBTX. Can be used when USB4
1560 * link does not go up, for example if there is no device connected.
1562 int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index)
1566 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1573 * Per the USB4 retimer spec, the retimer is not required to
1574 * send an RT (Retimer Transaction) response for the first
1575 * SET_INBOUND_SBTX command
1577 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_SET_INBOUND_SBTX,
1582 * usb4_port_retimer_unset_inbound_sbtx() - Disable sideband channel transactions
1584 * @index: Retimer index
1586 * Disables sideband channel transations on SBTX. The reverse of
1587 * usb4_port_retimer_set_inbound_sbtx().
1589 int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index)
1591 return usb4_port_retimer_op(port, index,
1592 USB4_SB_OPCODE_UNSET_INBOUND_SBTX, 500);
1596 * usb4_port_retimer_read() - Read from retimer sideband registers
1598 * @index: Retimer index
1599 * @reg: Sideband register to read
1600 * @buf: Data from @reg is stored here
1601 * @size: Number of bytes to read
1603 * Function reads retimer sideband registers starting from @reg. The
1604 * retimer is connected to @port at @index. Returns %0 in case of
1605 * success, and read data is copied to @buf. If there is no retimer
1606 * present at given @index returns %-ENODEV. In any other failure
1607 * returns negative errno.
1609 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1612 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1617 * usb4_port_retimer_write() - Write to retimer sideband registers
1619 * @index: Retimer index
1620 * @reg: Sideband register to write
1621 * @buf: Data that is written starting from @reg
1622 * @size: Number of bytes to write
1624 * Writes retimer sideband registers starting from @reg. The retimer is
1625 * connected to @port at @index. Returns %0 in case of success. If there
1626 * is no retimer present at given @index returns %-ENODEV. In any other
1627 * failure returns negative errno.
1629 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1630 const void *buf, u8 size)
1632 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1637 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1639 * @index: Retimer index
1641 * If the retimer at @index is last one (connected directly to the
1642 * Type-C port) this function returns %1. If it is not returns %0. If
1643 * the retimer is not present returns %-ENODEV. Otherwise returns
1646 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1651 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1656 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1658 return ret ? ret : metadata & 1;
1662 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1664 * @index: Retimer index
1666 * Reads NVM sector size (in bytes) of a retimer at @index. This
1667 * operation can be used to determine whether the retimer supports NVM
1668 * upgrade for example. Returns sector size in bytes or negative errno
1669 * in case of error. Specifically returns %-ENODEV if there is no
1670 * retimer at @index.
1672 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1677 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1682 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1684 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1688 * usb4_port_retimer_nvm_set_offset() - Set NVM write offset
1690 * @index: Retimer index
1691 * @address: Start offset
1693 * Exlicitly sets NVM write offset. Normally when writing to NVM this is
1694 * done automatically by usb4_port_retimer_nvm_write().
1696 * Returns %0 in success and negative errno if there was a failure.
1698 int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1699 unsigned int address)
1701 u32 metadata, dwaddress;
1704 dwaddress = address / 4;
1705 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1706 USB4_NVM_SET_OFFSET_MASK;
1708 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1713 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1717 struct retimer_info {
1718 struct tb_port *port;
1722 static int usb4_port_retimer_nvm_write_next_block(void *data,
1723 unsigned int dwaddress, const void *buf, size_t dwords)
1726 const struct retimer_info *info = data;
1727 struct tb_port *port = info->port;
1728 u8 index = info->index;
1731 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1736 return usb4_port_retimer_op(port, index,
1737 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1741 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1743 * @index: Retimer index
1744 * @address: Byte address where to start the write
1745 * @buf: Data to write
1746 * @size: Size in bytes how much to write
1748 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1749 * upgrade. Returns %0 if the data was written successfully and negative
1750 * errno in case of failure. Specifically returns %-ENODEV if there is
1751 * no retimer at @index.
1753 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1754 const void *buf, size_t size)
1756 struct retimer_info info = { .port = port, .index = index };
1759 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1763 return tb_nvm_write_data(address, buf, size, USB4_DATA_RETRIES,
1764 usb4_port_retimer_nvm_write_next_block, &info);
1768 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1770 * @index: Retimer index
1772 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1773 * this function can be used to trigger the NVM upgrade process. If
1774 * successful the retimer restarts with the new NVM and may not have the
1775 * index set so one needs to call usb4_port_enumerate_retimers() to
1776 * force index to be assigned.
1778 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1783 * We need to use the raw operation here because once the
1784 * authentication completes the retimer index is not set anymore
1785 * so we do not get back the status now.
1787 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1788 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1789 USB4_SB_OPCODE, &val, sizeof(val));
1793 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1795 * @index: Retimer index
1796 * @status: Raw status code read from metadata
1798 * This can be called after usb4_port_retimer_nvm_authenticate() and
1799 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1801 * Returns %0 if the authentication status was successfully read. The
1802 * completion metadata (the result) is then stored into @status. If
1803 * reading the status fails, returns negative errno.
1805 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1811 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1821 case USB4_SB_OPCODE_ERR:
1822 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1823 &metadata, sizeof(metadata));
1827 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1830 case USB4_SB_OPCODE_ONS:
1838 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1839 void *buf, size_t dwords)
1841 const struct retimer_info *info = data;
1842 struct tb_port *port = info->port;
1843 u8 index = info->index;
1847 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1848 if (dwords < NVM_DATA_DWORDS)
1849 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1851 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1856 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1860 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1865 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1867 * @index: Retimer index
1868 * @address: NVM address (in bytes) to start reading
1869 * @buf: Data read from NVM is stored here
1870 * @size: Number of bytes to read
1872 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1873 * read was successful and negative errno in case of failure.
1874 * Specifically returns %-ENODEV if there is no retimer at @index.
1876 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1877 unsigned int address, void *buf, size_t size)
1879 struct retimer_info info = { .port = port, .index = index };
1881 return tb_nvm_read_data(address, buf, size, USB4_DATA_RETRIES,
1882 usb4_port_retimer_nvm_read_block, &info);
1885 static inline unsigned int
1886 usb4_usb3_port_max_bandwidth(const struct tb_port *port, unsigned int bw)
1888 /* Take the possible bandwidth limitation into account */
1890 return min(bw, port->max_bw);
1895 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1896 * @port: USB3 adapter port
1898 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1899 * Negative errno in case of error.
1901 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1906 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1909 ret = tb_port_read(port, &val, TB_CFG_PORT,
1910 port->cap_adap + ADP_USB3_CS_4, 1);
1914 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1915 ret = lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1917 return usb4_usb3_port_max_bandwidth(port, ret);
1921 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1922 * @port: USB3 adapter port
1924 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1925 * link is not up returns %0 and negative errno in case of failure.
1927 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1932 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1935 ret = tb_port_read(port, &val, TB_CFG_PORT,
1936 port->cap_adap + ADP_USB3_CS_4, 1);
1940 if (!(val & ADP_USB3_CS_4_ULV))
1943 lr = val & ADP_USB3_CS_4_ALR_MASK;
1944 ret = lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1946 return usb4_usb3_port_max_bandwidth(port, ret);
1949 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1954 if (!tb_port_is_usb3_down(port))
1956 if (tb_route(port->sw))
1959 ret = tb_port_read(port, &val, TB_CFG_PORT,
1960 port->cap_adap + ADP_USB3_CS_2, 1);
1965 val |= ADP_USB3_CS_2_CMR;
1967 val &= ~ADP_USB3_CS_2_CMR;
1969 ret = tb_port_write(port, &val, TB_CFG_PORT,
1970 port->cap_adap + ADP_USB3_CS_2, 1);
1975 * We can use val here directly as the CMR bit is in the same place
1976 * as HCA. Just mask out others.
1978 val &= ADP_USB3_CS_2_CMR;
1979 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1980 ADP_USB3_CS_1_HCA, val, 1500);
1983 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1985 return usb4_usb3_port_cm_request(port, true);
1988 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1990 return usb4_usb3_port_cm_request(port, false);
1993 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1995 unsigned long uframes;
1997 uframes = bw * 512UL << scale;
1998 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
2001 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
2003 unsigned long uframes;
2005 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
2006 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
2007 return DIV_ROUND_UP(uframes, 512UL << scale);
2010 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
2017 ret = tb_port_read(port, &val, TB_CFG_PORT,
2018 port->cap_adap + ADP_USB3_CS_2, 1);
2022 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2023 port->cap_adap + ADP_USB3_CS_3, 1);
2027 scale &= ADP_USB3_CS_3_SCALE_MASK;
2029 bw = val & ADP_USB3_CS_2_AUBW_MASK;
2030 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2032 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
2033 *downstream_bw = usb3_bw_to_mbps(bw, scale);
2039 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
2040 * @port: USB3 adapter port
2041 * @upstream_bw: Allocated upstream bandwidth is stored here
2042 * @downstream_bw: Allocated downstream bandwidth is stored here
2044 * Stores currently allocated USB3 bandwidth into @upstream_bw and
2045 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
2048 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
2053 ret = usb4_usb3_port_set_cm_request(port);
2057 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
2059 usb4_usb3_port_clear_cm_request(port);
2064 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
2071 ret = tb_port_read(port, &val, TB_CFG_PORT,
2072 port->cap_adap + ADP_USB3_CS_1, 1);
2076 ret = tb_port_read(port, &scale, TB_CFG_PORT,
2077 port->cap_adap + ADP_USB3_CS_3, 1);
2081 scale &= ADP_USB3_CS_3_SCALE_MASK;
2083 bw = val & ADP_USB3_CS_1_CUBW_MASK;
2084 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2086 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
2087 *downstream_bw = usb3_bw_to_mbps(bw, scale);
2092 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
2096 u32 val, ubw, dbw, scale;
2099 /* Figure out suitable scale */
2101 max_bw = max(upstream_bw, downstream_bw);
2102 while (scale < 64) {
2103 if (mbps_to_usb3_bw(max_bw, scale) < 4096)
2108 if (WARN_ON(scale >= 64))
2111 ret = tb_port_write(port, &scale, TB_CFG_PORT,
2112 port->cap_adap + ADP_USB3_CS_3, 1);
2116 ubw = mbps_to_usb3_bw(upstream_bw, scale);
2117 dbw = mbps_to_usb3_bw(downstream_bw, scale);
2119 tb_port_dbg(port, "scaled bandwidth %u/%u, scale %u\n", ubw, dbw, scale);
2121 ret = tb_port_read(port, &val, TB_CFG_PORT,
2122 port->cap_adap + ADP_USB3_CS_2, 1);
2126 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
2127 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
2130 return tb_port_write(port, &val, TB_CFG_PORT,
2131 port->cap_adap + ADP_USB3_CS_2, 1);
2135 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
2136 * @port: USB3 adapter port
2137 * @upstream_bw: New upstream bandwidth
2138 * @downstream_bw: New downstream bandwidth
2140 * This can be used to set how much bandwidth is allocated for the USB3
2141 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
2142 * new values programmed to the USB3 adapter allocation registers. If
2143 * the values are lower than what is currently consumed the allocation
2144 * is set to what is currently consumed instead (consumed bandwidth
2145 * cannot be taken away by CM). The actual new values are returned in
2146 * @upstream_bw and @downstream_bw.
2148 * Returns %0 in case of success and negative errno if there was a
2151 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
2154 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
2156 ret = usb4_usb3_port_set_cm_request(port);
2160 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2165 /* Don't allow it go lower than what is consumed */
2166 allocate_up = max(*upstream_bw, consumed_up);
2167 allocate_down = max(*downstream_bw, consumed_down);
2169 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
2174 *upstream_bw = allocate_up;
2175 *downstream_bw = allocate_down;
2178 usb4_usb3_port_clear_cm_request(port);
2183 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
2184 * @port: USB3 adapter port
2185 * @upstream_bw: New allocated upstream bandwidth
2186 * @downstream_bw: New allocated downstream bandwidth
2188 * Releases USB3 allocated bandwidth down to what is actually consumed.
2189 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
2191 * Returns 0% in success and negative errno in case of failure.
2193 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
2196 int ret, consumed_up, consumed_down;
2198 ret = usb4_usb3_port_set_cm_request(port);
2202 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
2208 * Always keep 1000 Mb/s to make sure xHCI has at least some
2209 * bandwidth available for isochronous traffic.
2211 if (consumed_up < 1000)
2213 if (consumed_down < 1000)
2214 consumed_down = 1000;
2216 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
2221 *upstream_bw = consumed_up;
2222 *downstream_bw = consumed_down;
2225 usb4_usb3_port_clear_cm_request(port);
2229 static bool is_usb4_dpin(const struct tb_port *port)
2231 if (!tb_port_is_dpin(port))
2233 if (!tb_switch_is_usb4(port->sw))
2239 * usb4_dp_port_set_cm_id() - Assign CM ID to the DP IN adapter
2240 * @port: DP IN adapter
2241 * @cm_id: CM ID to assign
2243 * Sets CM ID for the @port. Returns %0 on success and negative errno
2244 * otherwise. Speficially returns %-EOPNOTSUPP if the @port does not
2247 int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id)
2252 if (!is_usb4_dpin(port))
2255 ret = tb_port_read(port, &val, TB_CFG_PORT,
2256 port->cap_adap + ADP_DP_CS_2, 1);
2260 val &= ~ADP_DP_CS_2_CM_ID_MASK;
2261 val |= cm_id << ADP_DP_CS_2_CM_ID_SHIFT;
2263 return tb_port_write(port, &val, TB_CFG_PORT,
2264 port->cap_adap + ADP_DP_CS_2, 1);
2268 * usb4_dp_port_bw_mode_supported() - Is the bandwidth allocation mode supported
2269 * @port: DP IN adapter to check
2271 * Can be called to any DP IN adapter. Returns true if the adapter
2272 * supports USB4 bandwidth allocation mode, false otherwise.
2274 bool usb4_dp_port_bw_mode_supported(struct tb_port *port)
2279 if (!is_usb4_dpin(port))
2282 ret = tb_port_read(port, &val, TB_CFG_PORT,
2283 port->cap_adap + DP_LOCAL_CAP, 1);
2287 return !!(val & DP_COMMON_CAP_BW_MODE);
2291 * usb4_dp_port_bw_mode_enabled() - Is the bandwidth allocation mode enabled
2292 * @port: DP IN adapter to check
2294 * Can be called to any DP IN adapter. Returns true if the bandwidth
2295 * allocation mode has been enabled, false otherwise.
2297 bool usb4_dp_port_bw_mode_enabled(struct tb_port *port)
2302 if (!is_usb4_dpin(port))
2305 ret = tb_port_read(port, &val, TB_CFG_PORT,
2306 port->cap_adap + ADP_DP_CS_8, 1);
2310 return !!(val & ADP_DP_CS_8_DPME);
2314 * usb4_dp_port_set_cm_bw_mode_supported() - Set/clear CM support for bandwidth allocation mode
2315 * @port: DP IN adapter
2316 * @supported: Does the CM support bandwidth allocation mode
2318 * Can be called to any DP IN adapter. Sets or clears the CM support bit
2319 * of the DP IN adapter. Returns %0 in success and negative errno
2320 * otherwise. Specifically returns %-OPNOTSUPP if the passed in adapter
2321 * does not support this.
2323 int usb4_dp_port_set_cm_bw_mode_supported(struct tb_port *port, bool supported)
2328 if (!is_usb4_dpin(port))
2331 ret = tb_port_read(port, &val, TB_CFG_PORT,
2332 port->cap_adap + ADP_DP_CS_2, 1);
2337 val |= ADP_DP_CS_2_CMMS;
2339 val &= ~ADP_DP_CS_2_CMMS;
2341 return tb_port_write(port, &val, TB_CFG_PORT,
2342 port->cap_adap + ADP_DP_CS_2, 1);
2346 * usb4_dp_port_group_id() - Return Group ID assigned for the adapter
2347 * @port: DP IN adapter
2349 * Reads bandwidth allocation Group ID from the DP IN adapter and
2350 * returns it. If the adapter does not support setting Group_ID
2351 * %-EOPNOTSUPP is returned.
2353 int usb4_dp_port_group_id(struct tb_port *port)
2358 if (!is_usb4_dpin(port))
2361 ret = tb_port_read(port, &val, TB_CFG_PORT,
2362 port->cap_adap + ADP_DP_CS_2, 1);
2366 return (val & ADP_DP_CS_2_GROUP_ID_MASK) >> ADP_DP_CS_2_GROUP_ID_SHIFT;
2370 * usb4_dp_port_set_group_id() - Set adapter Group ID
2371 * @port: DP IN adapter
2372 * @group_id: Group ID for the adapter
2374 * Sets bandwidth allocation mode Group ID for the DP IN adapter.
2375 * Returns %0 in case of success and negative errno otherwise.
2376 * Specifically returns %-EOPNOTSUPP if the adapter does not support
2379 int usb4_dp_port_set_group_id(struct tb_port *port, int group_id)
2384 if (!is_usb4_dpin(port))
2387 ret = tb_port_read(port, &val, TB_CFG_PORT,
2388 port->cap_adap + ADP_DP_CS_2, 1);
2392 val &= ~ADP_DP_CS_2_GROUP_ID_MASK;
2393 val |= group_id << ADP_DP_CS_2_GROUP_ID_SHIFT;
2395 return tb_port_write(port, &val, TB_CFG_PORT,
2396 port->cap_adap + ADP_DP_CS_2, 1);
2400 * usb4_dp_port_nrd() - Read non-reduced rate and lanes
2401 * @port: DP IN adapter
2402 * @rate: Non-reduced rate in Mb/s is placed here
2403 * @lanes: Non-reduced lanes are placed here
2405 * Reads the non-reduced rate and lanes from the DP IN adapter. Returns
2406 * %0 in success and negative errno otherwise. Specifically returns
2407 * %-EOPNOTSUPP if the adapter does not support this.
2409 int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes)
2414 if (!is_usb4_dpin(port))
2417 ret = tb_port_read(port, &val, TB_CFG_PORT,
2418 port->cap_adap + ADP_DP_CS_2, 1);
2422 tmp = (val & ADP_DP_CS_2_NRD_MLR_MASK) >> ADP_DP_CS_2_NRD_MLR_SHIFT;
2424 case DP_COMMON_CAP_RATE_RBR:
2427 case DP_COMMON_CAP_RATE_HBR:
2430 case DP_COMMON_CAP_RATE_HBR2:
2433 case DP_COMMON_CAP_RATE_HBR3:
2438 tmp = val & ADP_DP_CS_2_NRD_MLC_MASK;
2440 case DP_COMMON_CAP_1_LANE:
2443 case DP_COMMON_CAP_2_LANES:
2446 case DP_COMMON_CAP_4_LANES:
2455 * usb4_dp_port_set_nrd() - Set non-reduced rate and lanes
2456 * @port: DP IN adapter
2457 * @rate: Non-reduced rate in Mb/s
2458 * @lanes: Non-reduced lanes
2460 * Before the capabilities reduction this function can be used to set
2461 * the non-reduced values for the DP IN adapter. Returns %0 in success
2462 * and negative errno otherwise. If the adapter does not support this
2463 * %-EOPNOTSUPP is returned.
2465 int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes)
2470 if (!is_usb4_dpin(port))
2473 ret = tb_port_read(port, &val, TB_CFG_PORT,
2474 port->cap_adap + ADP_DP_CS_2, 1);
2478 val &= ~ADP_DP_CS_2_NRD_MLR_MASK;
2484 val |= (DP_COMMON_CAP_RATE_HBR << ADP_DP_CS_2_NRD_MLR_SHIFT)
2485 & ADP_DP_CS_2_NRD_MLR_MASK;
2488 val |= (DP_COMMON_CAP_RATE_HBR2 << ADP_DP_CS_2_NRD_MLR_SHIFT)
2489 & ADP_DP_CS_2_NRD_MLR_MASK;
2492 val |= (DP_COMMON_CAP_RATE_HBR3 << ADP_DP_CS_2_NRD_MLR_SHIFT)
2493 & ADP_DP_CS_2_NRD_MLR_MASK;
2499 val &= ~ADP_DP_CS_2_NRD_MLC_MASK;
2505 val |= DP_COMMON_CAP_2_LANES;
2508 val |= DP_COMMON_CAP_4_LANES;
2514 return tb_port_write(port, &val, TB_CFG_PORT,
2515 port->cap_adap + ADP_DP_CS_2, 1);
2519 * usb4_dp_port_granularity() - Return granularity for the bandwidth values
2520 * @port: DP IN adapter
2522 * Reads the programmed granularity from @port. If the DP IN adapter does
2523 * not support bandwidth allocation mode returns %-EOPNOTSUPP and negative
2524 * errno in other error cases.
2526 int usb4_dp_port_granularity(struct tb_port *port)
2531 if (!is_usb4_dpin(port))
2534 ret = tb_port_read(port, &val, TB_CFG_PORT,
2535 port->cap_adap + ADP_DP_CS_2, 1);
2539 val &= ADP_DP_CS_2_GR_MASK;
2540 val >>= ADP_DP_CS_2_GR_SHIFT;
2543 case ADP_DP_CS_2_GR_0_25G:
2545 case ADP_DP_CS_2_GR_0_5G:
2547 case ADP_DP_CS_2_GR_1G:
2555 * usb4_dp_port_set_granularity() - Set granularity for the bandwidth values
2556 * @port: DP IN adapter
2557 * @granularity: Granularity in Mb/s. Supported values: 1000, 500 and 250.
2559 * Sets the granularity used with the estimated, allocated and requested
2560 * bandwidth. Returns %0 in success and negative errno otherwise. If the
2561 * adapter does not support this %-EOPNOTSUPP is returned.
2563 int usb4_dp_port_set_granularity(struct tb_port *port, int granularity)
2568 if (!is_usb4_dpin(port))
2571 ret = tb_port_read(port, &val, TB_CFG_PORT,
2572 port->cap_adap + ADP_DP_CS_2, 1);
2576 val &= ~ADP_DP_CS_2_GR_MASK;
2578 switch (granularity) {
2580 val |= ADP_DP_CS_2_GR_0_25G << ADP_DP_CS_2_GR_SHIFT;
2583 val |= ADP_DP_CS_2_GR_0_5G << ADP_DP_CS_2_GR_SHIFT;
2586 val |= ADP_DP_CS_2_GR_1G << ADP_DP_CS_2_GR_SHIFT;
2592 return tb_port_write(port, &val, TB_CFG_PORT,
2593 port->cap_adap + ADP_DP_CS_2, 1);
2597 * usb4_dp_port_set_estimated_bw() - Set estimated bandwidth
2598 * @port: DP IN adapter
2599 * @bw: Estimated bandwidth in Mb/s.
2601 * Sets the estimated bandwidth to @bw. Set the granularity by calling
2602 * usb4_dp_port_set_granularity() before calling this. The @bw is round
2603 * down to the closest granularity multiplier. Returns %0 in success
2604 * and negative errno otherwise. Specifically returns %-EOPNOTSUPP if
2605 * the adapter does not support this.
2607 int usb4_dp_port_set_estimated_bw(struct tb_port *port, int bw)
2609 u32 val, granularity;
2612 if (!is_usb4_dpin(port))
2615 ret = usb4_dp_port_granularity(port);
2620 ret = tb_port_read(port, &val, TB_CFG_PORT,
2621 port->cap_adap + ADP_DP_CS_2, 1);
2625 val &= ~ADP_DP_CS_2_ESTIMATED_BW_MASK;
2626 val |= (bw / granularity) << ADP_DP_CS_2_ESTIMATED_BW_SHIFT;
2628 return tb_port_write(port, &val, TB_CFG_PORT,
2629 port->cap_adap + ADP_DP_CS_2, 1);
2633 * usb4_dp_port_allocated_bw() - Return allocated bandwidth
2634 * @port: DP IN adapter
2636 * Reads and returns allocated bandwidth for @port in Mb/s (taking into
2637 * account the programmed granularity). Returns negative errno in case
2640 int usb4_dp_port_allocated_bw(struct tb_port *port)
2642 u32 val, granularity;
2645 if (!is_usb4_dpin(port))
2648 ret = usb4_dp_port_granularity(port);
2653 ret = tb_port_read(port, &val, TB_CFG_PORT,
2654 port->cap_adap + DP_STATUS, 1);
2658 val &= DP_STATUS_ALLOCATED_BW_MASK;
2659 val >>= DP_STATUS_ALLOCATED_BW_SHIFT;
2661 return val * granularity;
2664 static int __usb4_dp_port_set_cm_ack(struct tb_port *port, bool ack)
2669 ret = tb_port_read(port, &val, TB_CFG_PORT,
2670 port->cap_adap + ADP_DP_CS_2, 1);
2675 val |= ADP_DP_CS_2_CA;
2677 val &= ~ADP_DP_CS_2_CA;
2679 return tb_port_write(port, &val, TB_CFG_PORT,
2680 port->cap_adap + ADP_DP_CS_2, 1);
2683 static inline int usb4_dp_port_set_cm_ack(struct tb_port *port)
2685 return __usb4_dp_port_set_cm_ack(port, true);
2688 static int usb4_dp_port_wait_and_clear_cm_ack(struct tb_port *port,
2695 ret = __usb4_dp_port_set_cm_ack(port, false);
2699 end = ktime_add_ms(ktime_get(), timeout_msec);
2701 ret = tb_port_read(port, &val, TB_CFG_PORT,
2702 port->cap_adap + ADP_DP_CS_8, 1);
2706 if (!(val & ADP_DP_CS_8_DR))
2709 usleep_range(50, 100);
2710 } while (ktime_before(ktime_get(), end));
2712 if (val & ADP_DP_CS_8_DR)
2715 ret = tb_port_read(port, &val, TB_CFG_PORT,
2716 port->cap_adap + ADP_DP_CS_2, 1);
2720 val &= ~ADP_DP_CS_2_CA;
2721 return tb_port_write(port, &val, TB_CFG_PORT,
2722 port->cap_adap + ADP_DP_CS_2, 1);
2726 * usb4_dp_port_allocate_bw() - Set allocated bandwidth
2727 * @port: DP IN adapter
2728 * @bw: New allocated bandwidth in Mb/s
2730 * Communicates the new allocated bandwidth with the DPCD (graphics
2731 * driver). Takes into account the programmed granularity. Returns %0 in
2732 * success and negative errno in case of error.
2734 int usb4_dp_port_allocate_bw(struct tb_port *port, int bw)
2736 u32 val, granularity;
2739 if (!is_usb4_dpin(port))
2742 ret = usb4_dp_port_granularity(port);
2747 ret = tb_port_read(port, &val, TB_CFG_PORT,
2748 port->cap_adap + DP_STATUS, 1);
2752 val &= ~DP_STATUS_ALLOCATED_BW_MASK;
2753 val |= (bw / granularity) << DP_STATUS_ALLOCATED_BW_SHIFT;
2755 ret = tb_port_write(port, &val, TB_CFG_PORT,
2756 port->cap_adap + DP_STATUS, 1);
2760 ret = usb4_dp_port_set_cm_ack(port);
2764 return usb4_dp_port_wait_and_clear_cm_ack(port, 500);
2768 * usb4_dp_port_requested_bw() - Read requested bandwidth
2769 * @port: DP IN adapter
2771 * Reads the DPCD (graphics driver) requested bandwidth and returns it
2772 * in Mb/s. Takes the programmed granularity into account. In case of
2773 * error returns negative errno. Specifically returns %-EOPNOTSUPP if
2774 * the adapter does not support bandwidth allocation mode, and %ENODATA
2775 * if there is no active bandwidth request from the graphics driver.
2777 int usb4_dp_port_requested_bw(struct tb_port *port)
2779 u32 val, granularity;
2782 if (!is_usb4_dpin(port))
2785 ret = usb4_dp_port_granularity(port);
2790 ret = tb_port_read(port, &val, TB_CFG_PORT,
2791 port->cap_adap + ADP_DP_CS_8, 1);
2795 if (!(val & ADP_DP_CS_8_DR))
2798 return (val & ADP_DP_CS_8_REQUESTED_BW_MASK) * granularity;