drivers/thunderbolt/nhi.c

   1 /*
   2  * Thunderbolt Cactus Ridge driver - NHI driver
   3  *
   4  * The NHI (native host interface) is the pci device that allows us to send and
   5  * receive frames from the thunderbolt bus.
   6  *
   7  * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
   8  */
   9
  10 #include <linux/pm_runtime.h>
  11 #include <linux/slab.h>
  12 #include <linux/errno.h>
  13 #include <linux/pci.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17
  18 #include "nhi.h"
  19 #include "nhi_regs.h"
  20 #include "tb.h"
  21
  22 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
  23
  24 /*
  25  * Used to enable end-to-end workaround for missing RX packets. Do not
  26  * use this ring for anything else.
  27  */
  28 #define RING_E2E_UNUSED_HOPID   2
  29 /* HopIDs 0-7 are reserved by the Thunderbolt protocol */
  30 #define RING_FIRST_USABLE_HOPID 8
  31
  32 /*
  33  * Minimal number of vectors when we use MSI-X. Two for control channel
  34  * Rx/Tx and the rest four are for cross domain DMA paths.
  35  */
  36 #define MSIX_MIN_VECS           6
  37 #define MSIX_MAX_VECS           16
  38
  39 #define NHI_MAILBOX_TIMEOUT     500 /* ms */
  40
  41 static int ring_interrupt_index(struct tb_ring *ring)
  42 {
  43         int bit = ring->hop;
  44         if (!ring->is_tx)
  45                 bit += ring->nhi->hop_count;
  46         return bit;
  47 }
  48
  49 /**
  50  * ring_interrupt_active() - activate/deactivate interrupts for a single ring
  51  *
  52  * ring->nhi->lock must be held.
  53  */
  54 static void ring_interrupt_active(struct tb_ring *ring, bool active)
  55 {
  56         int reg = REG_RING_INTERRUPT_BASE +
  57                   ring_interrupt_index(ring) / 32 * 4;
  58         int bit = ring_interrupt_index(ring) & 31;
  59         int mask = 1 << bit;
  60         u32 old, new;
  61
  62         if (ring->irq > 0) {
  63                 u32 step, shift, ivr, misc;
  64                 void __iomem *ivr_base;
  65                 int index;
  66
  67                 if (ring->is_tx)
  68                         index = ring->hop;
  69                 else
  70                         index = ring->hop + ring->nhi->hop_count;
  71
  72                 /*
  73                  * Ask the hardware to clear interrupt status bits automatically
  74                  * since we already know which interrupt was triggered.
  75                  */
  76                 misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
  77                 if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
  78                         misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
  79                         iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
  80                 }
  81
  82                 ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
  83                 step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  84                 shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  85                 ivr = ioread32(ivr_base + step);
  86                 ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
  87                 if (active)
  88                         ivr |= ring->vector << shift;
  89                 iowrite32(ivr, ivr_base + step);
  90         }
  91
  92         old = ioread32(ring->nhi->iobase + reg);
  93         if (active)
  94                 new = old | mask;
  95         else
  96                 new = old & ~mask;
  97
  98         dev_info(&ring->nhi->pdev->dev,
  99                  "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
 100                  active ? "enabling" : "disabling", reg, bit, old, new);
 101
 102         if (new == old)
 103                 dev_WARN(&ring->nhi->pdev->dev,
 104                                          "interrupt for %s %d is already %s\n",
 105                                          RING_TYPE(ring), ring->hop,
 106                                          active ? "enabled" : "disabled");
 107         iowrite32(new, ring->nhi->iobase + reg);
 108 }
 109
 110 /**
 111  * nhi_disable_interrupts() - disable interrupts for all rings
 112  *
 113  * Use only during init and shutdown.
 114  */
 115 static void nhi_disable_interrupts(struct tb_nhi *nhi)
 116 {
 117         int i = 0;
 118         /* disable interrupts */
 119         for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
 120                 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
 121
 122         /* clear interrupt status bits */
 123         for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
 124                 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
 125 }
 126
 127 /* ring helper methods */
 128
 129 static void __iomem *ring_desc_base(struct tb_ring *ring)
 130 {
 131         void __iomem *io = ring->nhi->iobase;
 132         io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
 133         io += ring->hop * 16;
 134         return io;
 135 }
 136
 137 static void __iomem *ring_options_base(struct tb_ring *ring)
 138 {
 139         void __iomem *io = ring->nhi->iobase;
 140         io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
 141         io += ring->hop * 32;
 142         return io;
 143 }
 144
 145 static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
 146 {
 147         iowrite16(value, ring_desc_base(ring) + offset);
 148 }
 149
 150 static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
 151 {
 152         iowrite32(value, ring_desc_base(ring) + offset);
 153 }
 154
 155 static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
 156 {
 157         iowrite32(value, ring_desc_base(ring) + offset);
 158         iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
 159 }
 160
 161 static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
 162 {
 163         iowrite32(value, ring_options_base(ring) + offset);
 164 }
 165
 166 static bool ring_full(struct tb_ring *ring)
 167 {
 168         return ((ring->head + 1) % ring->size) == ring->tail;
 169 }
 170
 171 static bool ring_empty(struct tb_ring *ring)
 172 {
 173         return ring->head == ring->tail;
 174 }
 175
 176 /**
 177  * ring_write_descriptors() - post frames from ring->queue to the controller
 178  *
 179  * ring->lock is held.
 180  */
 181 static void ring_write_descriptors(struct tb_ring *ring)
 182 {
 183         struct ring_frame *frame, *n;
 184         struct ring_desc *descriptor;
 185         list_for_each_entry_safe(frame, n, &ring->queue, list) {
 186                 if (ring_full(ring))
 187                         break;
 188                 list_move_tail(&frame->list, &ring->in_flight);
 189                 descriptor = &ring->descriptors[ring->head];
 190                 descriptor->phys = frame->buffer_phy;
 191                 descriptor->time = 0;
 192                 descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
 193                 if (ring->is_tx) {
 194                         descriptor->length = frame->size;
 195                         descriptor->eof = frame->eof;
 196                         descriptor->sof = frame->sof;
 197                 }
 198                 ring->head = (ring->head + 1) % ring->size;
 199                 ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
 200         }
 201 }
 202
 203 /**
 204  * ring_work() - progress completed frames
 205  *
 206  * If the ring is shutting down then all frames are marked as canceled and
 207  * their callbacks are invoked.
 208  *
 209  * Otherwise we collect all completed frame from the ring buffer, write new
 210  * frame to the ring buffer and invoke the callbacks for the completed frames.
 211  */
 212 static void ring_work(struct work_struct *work)
 213 {
 214         struct tb_ring *ring = container_of(work, typeof(*ring), work);
 215         struct ring_frame *frame;
 216         bool canceled = false;
 217         unsigned long flags;
 218         LIST_HEAD(done);
 219
 220         spin_lock_irqsave(&ring->lock, flags);
 221
 222         if (!ring->running) {
 223                 /*  Move all frames to done and mark them as canceled. */
 224                 list_splice_tail_init(&ring->in_flight, &done);
 225                 list_splice_tail_init(&ring->queue, &done);
 226                 canceled = true;
 227                 goto invoke_callback;
 228         }
 229
 230         while (!ring_empty(ring)) {
 231                 if (!(ring->descriptors[ring->tail].flags
 232                                 & RING_DESC_COMPLETED))
 233                         break;
 234                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 235                                          list);
 236                 list_move_tail(&frame->list, &done);
 237                 if (!ring->is_tx) {
 238                         frame->size = ring->descriptors[ring->tail].length;
 239                         frame->eof = ring->descriptors[ring->tail].eof;
 240                         frame->sof = ring->descriptors[ring->tail].sof;
 241                         frame->flags = ring->descriptors[ring->tail].flags;
 242                 }
 243                 ring->tail = (ring->tail + 1) % ring->size;
 244         }
 245         ring_write_descriptors(ring);
 246
 247 invoke_callback:
 248         /* allow callbacks to schedule new work */
 249         spin_unlock_irqrestore(&ring->lock, flags);
 250         while (!list_empty(&done)) {
 251                 frame = list_first_entry(&done, typeof(*frame), list);
 252                 /*
 253                  * The callback may reenqueue or delete frame.
 254                  * Do not hold on to it.
 255                  */
 256                 list_del_init(&frame->list);
 257                 if (frame->callback)
 258                         frame->callback(ring, frame, canceled);
 259         }
 260 }
 261
 262 int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
 263 {
 264         unsigned long flags;
 265         int ret = 0;
 266
 267         spin_lock_irqsave(&ring->lock, flags);
 268         if (ring->running) {
 269                 list_add_tail(&frame->list, &ring->queue);
 270                 ring_write_descriptors(ring);
 271         } else {
 272                 ret = -ESHUTDOWN;
 273         }
 274         spin_unlock_irqrestore(&ring->lock, flags);
 275         return ret;
 276 }
 277 EXPORT_SYMBOL_GPL(__tb_ring_enqueue);
 278
 279 /**
 280  * tb_ring_poll() - Poll one completed frame from the ring
 281  * @ring: Ring to poll
 282  *
 283  * This function can be called when @start_poll callback of the @ring
 284  * has been called. It will read one completed frame from the ring and
 285  * return it to the caller. Returns %NULL if there is no more completed
 286  * frames.
 287  */
 288 struct ring_frame *tb_ring_poll(struct tb_ring *ring)
 289 {
 290         struct ring_frame *frame = NULL;
 291         unsigned long flags;
 292
 293         spin_lock_irqsave(&ring->lock, flags);
 294         if (!ring->running)
 295                 goto unlock;
 296         if (ring_empty(ring))
 297                 goto unlock;
 298
 299         if (ring->descriptors[ring->tail].flags & RING_DESC_COMPLETED) {
 300                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 301                                          list);
 302                 list_del_init(&frame->list);
 303
 304                 if (!ring->is_tx) {
 305                         frame->size = ring->descriptors[ring->tail].length;
 306                         frame->eof = ring->descriptors[ring->tail].eof;
 307                         frame->sof = ring->descriptors[ring->tail].sof;
 308                         frame->flags = ring->descriptors[ring->tail].flags;
 309                 }
 310
 311                 ring->tail = (ring->tail + 1) % ring->size;
 312         }
 313
 314 unlock:
 315         spin_unlock_irqrestore(&ring->lock, flags);
 316         return frame;
 317 }
 318 EXPORT_SYMBOL_GPL(tb_ring_poll);
 319
 320 static void __ring_interrupt_mask(struct tb_ring *ring, bool mask)
 321 {
 322         int idx = ring_interrupt_index(ring);
 323         int reg = REG_RING_INTERRUPT_BASE + idx / 32 * 4;
 324         int bit = idx % 32;
 325         u32 val;
 326
 327         val = ioread32(ring->nhi->iobase + reg);
 328         if (mask)
 329                 val &= ~BIT(bit);
 330         else
 331                 val |= BIT(bit);
 332         iowrite32(val, ring->nhi->iobase + reg);
 333 }
 334
 335 /* Both @nhi->lock and @ring->lock should be held */
 336 static void __ring_interrupt(struct tb_ring *ring)
 337 {
 338         if (!ring->running)
 339                 return;
 340
 341         if (ring->start_poll) {
 342                 __ring_interrupt_mask(ring, true);
 343                 ring->start_poll(ring->poll_data);
 344         } else {
 345                 schedule_work(&ring->work);
 346         }
 347 }
 348
 349 /**
 350  * tb_ring_poll_complete() - Re-start interrupt for the ring
 351  * @ring: Ring to re-start the interrupt
 352  *
 353  * This will re-start (unmask) the ring interrupt once the user is done
 354  * with polling.
 355  */
 356 void tb_ring_poll_complete(struct tb_ring *ring)
 357 {
 358         unsigned long flags;
 359
 360         spin_lock_irqsave(&ring->nhi->lock, flags);
 361         spin_lock(&ring->lock);
 362         if (ring->start_poll)
 363                 __ring_interrupt_mask(ring, false);
 364         spin_unlock(&ring->lock);
 365         spin_unlock_irqrestore(&ring->nhi->lock, flags);
 366 }
 367 EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
 368
 369 static irqreturn_t ring_msix(int irq, void *data)
 370 {
 371         struct tb_ring *ring = data;
 372
 373         spin_lock(&ring->nhi->lock);
 374         spin_lock(&ring->lock);
 375         __ring_interrupt(ring);
 376         spin_unlock(&ring->lock);
 377         spin_unlock(&ring->nhi->lock);
 378
 379         return IRQ_HANDLED;
 380 }
 381
 382 static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
 383 {
 384         struct tb_nhi *nhi = ring->nhi;
 385         unsigned long irqflags;
 386         int ret;
 387
 388         if (!nhi->pdev->msix_enabled)
 389                 return 0;
 390
 391         ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
 392         if (ret < 0)
 393                 return ret;
 394
 395         ring->vector = ret;
 396
 397         ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector);
 398         if (ring->irq < 0)
 399                 return ring->irq;
 400
 401         irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
 402         return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
 403 }
 404
 405 static void ring_release_msix(struct tb_ring *ring)
 406 {
 407         if (ring->irq <= 0)
 408                 return;
 409
 410         free_irq(ring->irq, ring);
 411         ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
 412         ring->vector = 0;
 413         ring->irq = 0;
 414 }
 415
 416 static int nhi_alloc_hop(struct tb_nhi *nhi, struct tb_ring *ring)
 417 {
 418         int ret = 0;
 419
 420         spin_lock_irq(&nhi->lock);
 421
 422         if (ring->hop < 0) {
 423                 unsigned int i;
 424
 425                 /*
 426                  * Automatically allocate HopID from the non-reserved
 427                  * range 8 .. hop_count - 1.
 428                  */
 429                 for (i = RING_FIRST_USABLE_HOPID; i < nhi->hop_count; i++) {
 430                         if (ring->is_tx) {
 431                                 if (!nhi->tx_rings[i]) {
 432                                         ring->hop = i;
 433                                         break;
 434                                 }
 435                         } else {
 436                                 if (!nhi->rx_rings[i]) {
 437                                         ring->hop = i;
 438                                         break;
 439                                 }
 440                         }
 441                 }
 442         }
 443
 444         if (ring->hop < 0 || ring->hop >= nhi->hop_count) {
 445                 dev_warn(&nhi->pdev->dev, "invalid hop: %d\n", ring->hop);
 446                 ret = -EINVAL;
 447                 goto err_unlock;
 448         }
 449         if (ring->is_tx && nhi->tx_rings[ring->hop]) {
 450                 dev_warn(&nhi->pdev->dev, "TX hop %d already allocated\n",
 451                          ring->hop);
 452                 ret = -EBUSY;
 453                 goto err_unlock;
 454         } else if (!ring->is_tx && nhi->rx_rings[ring->hop]) {
 455                 dev_warn(&nhi->pdev->dev, "RX hop %d already allocated\n",
 456                          ring->hop);
 457                 ret = -EBUSY;
 458                 goto err_unlock;
 459         }
 460
 461         if (ring->is_tx)
 462                 nhi->tx_rings[ring->hop] = ring;
 463         else
 464                 nhi->rx_rings[ring->hop] = ring;
 465
 466 err_unlock:
 467         spin_unlock_irq(&nhi->lock);
 468
 469         return ret;
 470 }
 471
 472 static struct tb_ring *tb_ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
 473                                      bool transmit, unsigned int flags,
 474                                      u16 sof_mask, u16 eof_mask,
 475                                      void (*start_poll)(void *),
 476                                      void *poll_data)
 477 {
 478         struct tb_ring *ring = NULL;
 479         dev_info(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
 480                  transmit ? "TX" : "RX", hop, size);
 481
 482         /* Tx Ring 2 is reserved for E2E workaround */
 483         if (transmit && hop == RING_E2E_UNUSED_HOPID)
 484                 return NULL;
 485
 486         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
 487         if (!ring)
 488                 return NULL;
 489
 490         spin_lock_init(&ring->lock);
 491         INIT_LIST_HEAD(&ring->queue);
 492         INIT_LIST_HEAD(&ring->in_flight);
 493         INIT_WORK(&ring->work, ring_work);
 494
 495         ring->nhi = nhi;
 496         ring->hop = hop;
 497         ring->is_tx = transmit;
 498         ring->size = size;
 499         ring->flags = flags;
 500         ring->sof_mask = sof_mask;
 501         ring->eof_mask = eof_mask;
 502         ring->head = 0;
 503         ring->tail = 0;
 504         ring->running = false;
 505         ring->start_poll = start_poll;
 506         ring->poll_data = poll_data;
 507
 508         ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
 509                         size * sizeof(*ring->descriptors),
 510                         &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
 511         if (!ring->descriptors)
 512                 goto err_free_ring;
 513
 514         if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
 515                 goto err_free_descs;
 516
 517         if (nhi_alloc_hop(nhi, ring))
 518                 goto err_release_msix;
 519
 520         return ring;
 521
 522 err_release_msix:
 523         ring_release_msix(ring);
 524 err_free_descs:
 525         dma_free_coherent(&ring->nhi->pdev->dev,
 526                           ring->size * sizeof(*ring->descriptors),
 527                           ring->descriptors, ring->descriptors_dma);
 528 err_free_ring:
 529         kfree(ring);
 530
 531         return NULL;
 532 }
 533
 534 /**
 535  * tb_ring_alloc_tx() - Allocate DMA ring for transmit
 536  * @nhi: Pointer to the NHI the ring is to be allocated
 537  * @hop: HopID (ring) to allocate
 538  * @size: Number of entries in the ring
 539  * @flags: Flags for the ring
 540  */
 541 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
 542                                  unsigned int flags)
 543 {
 544         return tb_ring_alloc(nhi, hop, size, true, flags, 0, 0, NULL, NULL);
 545 }
 546 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx);
 547
 548 /**
 549  * tb_ring_alloc_rx() - Allocate DMA ring for receive
 550  * @nhi: Pointer to the NHI the ring is to be allocated
 551  * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
 552  * @size: Number of entries in the ring
 553  * @flags: Flags for the ring
 554  * @sof_mask: Mask of PDF values that start a frame
 555  * @eof_mask: Mask of PDF values that end a frame
 556  * @start_poll: If not %NULL the ring will call this function when an
 557  *              interrupt is triggered and masked, instead of callback
 558  *              in each Rx frame.
 559  * @poll_data: Optional data passed to @start_poll
 560  */
 561 struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
 562                                  unsigned int flags, u16 sof_mask, u16 eof_mask,
 563                                  void (*start_poll)(void *), void *poll_data)
 564 {
 565         return tb_ring_alloc(nhi, hop, size, false, flags, sof_mask, eof_mask,
 566                              start_poll, poll_data);
 567 }
 568 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx);
 569
 570 /**
 571  * tb_ring_start() - enable a ring
 572  *
 573  * Must not be invoked in parallel with tb_ring_stop().
 574  */
 575 void tb_ring_start(struct tb_ring *ring)
 576 {
 577         u16 frame_size;
 578         u32 flags;
 579
 580         spin_lock_irq(&ring->nhi->lock);
 581         spin_lock(&ring->lock);
 582         if (ring->nhi->going_away)
 583                 goto err;
 584         if (ring->running) {
 585                 dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
 586                 goto err;
 587         }
 588         dev_info(&ring->nhi->pdev->dev, "starting %s %d\n",
 589                  RING_TYPE(ring), ring->hop);
 590
 591         if (ring->flags & RING_FLAG_FRAME) {
 592                 /* Means 4096 */
 593                 frame_size = 0;
 594                 flags = RING_FLAG_ENABLE;
 595         } else {
 596                 frame_size = TB_FRAME_SIZE;
 597                 flags = RING_FLAG_ENABLE | RING_FLAG_RAW;
 598         }
 599
 600         if (ring->flags & RING_FLAG_E2E && !ring->is_tx) {
 601                 u32 hop;
 602
 603                 /*
 604                  * In order not to lose Rx packets we enable end-to-end
 605                  * workaround which transfers Rx credits to an unused Tx
 606                  * HopID.
 607                  */
 608                 hop = RING_E2E_UNUSED_HOPID << REG_RX_OPTIONS_E2E_HOP_SHIFT;
 609                 hop &= REG_RX_OPTIONS_E2E_HOP_MASK;
 610                 flags |= hop | RING_FLAG_E2E_FLOW_CONTROL;
 611         }
 612
 613         ring_iowrite64desc(ring, ring->descriptors_dma, 0);
 614         if (ring->is_tx) {
 615                 ring_iowrite32desc(ring, ring->size, 12);
 616                 ring_iowrite32options(ring, 0, 4); /* time releated ? */
 617                 ring_iowrite32options(ring, flags, 0);
 618         } else {
 619                 u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
 620
 621                 ring_iowrite32desc(ring, (frame_size << 16) | ring->size, 12);
 622                 ring_iowrite32options(ring, sof_eof_mask, 4);
 623                 ring_iowrite32options(ring, flags, 0);
 624         }
 625         ring_interrupt_active(ring, true);
 626         ring->running = true;
 627 err:
 628         spin_unlock(&ring->lock);
 629         spin_unlock_irq(&ring->nhi->lock);
 630 }
 631 EXPORT_SYMBOL_GPL(tb_ring_start);
 632
 633 /**
 634  * tb_ring_stop() - shutdown a ring
 635  *
 636  * Must not be invoked from a callback.
 637  *
 638  * This method will disable the ring. Further calls to
 639  * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
 640  * called.
 641  *
 642  * All enqueued frames will be canceled and their callbacks will be executed
 643  * with frame->canceled set to true (on the callback thread). This method
 644  * returns only after all callback invocations have finished.
 645  */
 646 void tb_ring_stop(struct tb_ring *ring)
 647 {
 648         spin_lock_irq(&ring->nhi->lock);
 649         spin_lock(&ring->lock);
 650         dev_info(&ring->nhi->pdev->dev, "stopping %s %d\n",
 651                  RING_TYPE(ring), ring->hop);
 652         if (ring->nhi->going_away)
 653                 goto err;
 654         if (!ring->running) {
 655                 dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
 656                          RING_TYPE(ring), ring->hop);
 657                 goto err;
 658         }
 659         ring_interrupt_active(ring, false);
 660
 661         ring_iowrite32options(ring, 0, 0);
 662         ring_iowrite64desc(ring, 0, 0);
 663         ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
 664         ring_iowrite32desc(ring, 0, 12);
 665         ring->head = 0;
 666         ring->tail = 0;
 667         ring->running = false;
 668
 669 err:
 670         spin_unlock(&ring->lock);
 671         spin_unlock_irq(&ring->nhi->lock);
 672
 673         /*
 674          * schedule ring->work to invoke callbacks on all remaining frames.
 675          */
 676         schedule_work(&ring->work);
 677         flush_work(&ring->work);
 678 }
 679 EXPORT_SYMBOL_GPL(tb_ring_stop);
 680
 681 /*
 682  * tb_ring_free() - free ring
 683  *
 684  * When this method returns all invocations of ring->callback will have
 685  * finished.
 686  *
 687  * Ring must be stopped.
 688  *
 689  * Must NOT be called from ring_frame->callback!
 690  */
 691 void tb_ring_free(struct tb_ring *ring)
 692 {
 693         spin_lock_irq(&ring->nhi->lock);
 694         /*
 695          * Dissociate the ring from the NHI. This also ensures that
 696          * nhi_interrupt_work cannot reschedule ring->work.
 697          */
 698         if (ring->is_tx)
 699                 ring->nhi->tx_rings[ring->hop] = NULL;
 700         else
 701                 ring->nhi->rx_rings[ring->hop] = NULL;
 702
 703         if (ring->running) {
 704                 dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
 705                          RING_TYPE(ring), ring->hop);
 706         }
 707         spin_unlock_irq(&ring->nhi->lock);
 708
 709         ring_release_msix(ring);
 710
 711         dma_free_coherent(&ring->nhi->pdev->dev,
 712                           ring->size * sizeof(*ring->descriptors),
 713                           ring->descriptors, ring->descriptors_dma);
 714
 715         ring->descriptors = NULL;
 716         ring->descriptors_dma = 0;
 717
 718
 719         dev_info(&ring->nhi->pdev->dev,
 720                  "freeing %s %d\n",
 721                  RING_TYPE(ring),
 722                  ring->hop);
 723
 724         /**
 725          * ring->work can no longer be scheduled (it is scheduled only
 726          * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
 727          * to finish before freeing the ring.
 728          */
 729         flush_work(&ring->work);
 730         kfree(ring);
 731 }
 732 EXPORT_SYMBOL_GPL(tb_ring_free);
 733
 734 /**
 735  * nhi_mailbox_cmd() - Send a command through NHI mailbox
 736  * @nhi: Pointer to the NHI structure
 737  * @cmd: Command to send
 738  * @data: Data to be send with the command
 739  *
 740  * Sends mailbox command to the firmware running on NHI. Returns %0 in
 741  * case of success and negative errno in case of failure.
 742  */
 743 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
 744 {
 745         ktime_t timeout;
 746         u32 val;
 747
 748         iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
 749
 750         val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 751         val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
 752         val |= REG_INMAIL_OP_REQUEST | cmd;
 753         iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
 754
 755         timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
 756         do {
 757                 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 758                 if (!(val & REG_INMAIL_OP_REQUEST))
 759                         break;
 760                 usleep_range(10, 20);
 761         } while (ktime_before(ktime_get(), timeout));
 762
 763         if (val & REG_INMAIL_OP_REQUEST)
 764                 return -ETIMEDOUT;
 765         if (val & REG_INMAIL_ERROR)
 766                 return -EIO;
 767
 768         return 0;
 769 }
 770
 771 /**
 772  * nhi_mailbox_mode() - Return current firmware operation mode
 773  * @nhi: Pointer to the NHI structure
 774  *
 775  * The function reads current firmware operation mode using NHI mailbox
 776  * registers and returns it to the caller.
 777  */
 778 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
 779 {
 780         u32 val;
 781
 782         val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
 783         val &= REG_OUTMAIL_CMD_OPMODE_MASK;
 784         val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
 785
 786         return (enum nhi_fw_mode)val;
 787 }
 788
 789 static void nhi_interrupt_work(struct work_struct *work)
 790 {
 791         struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
 792         int value = 0; /* Suppress uninitialized usage warning. */
 793         int bit;
 794         int hop = -1;
 795         int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
 796         struct tb_ring *ring;
 797
 798         spin_lock_irq(&nhi->lock);
 799
 800         /*
 801          * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
 802          * (TX, RX, RX overflow). We iterate over the bits and read a new
 803          * dwords as required. The registers are cleared on read.
 804          */
 805         for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
 806                 if (bit % 32 == 0)
 807                         value = ioread32(nhi->iobase
 808                                          + REG_RING_NOTIFY_BASE
 809                                          + 4 * (bit / 32));
 810                 if (++hop == nhi->hop_count) {
 811                         hop = 0;
 812                         type++;
 813                 }
 814                 if ((value & (1 << (bit % 32))) == 0)
 815                         continue;
 816                 if (type == 2) {
 817                         dev_warn(&nhi->pdev->dev,
 818                                  "RX overflow for ring %d\n",
 819                                  hop);
 820                         continue;
 821                 }
 822                 if (type == 0)
 823                         ring = nhi->tx_rings[hop];
 824                 else
 825                         ring = nhi->rx_rings[hop];
 826                 if (ring == NULL) {
 827                         dev_warn(&nhi->pdev->dev,
 828                                  "got interrupt for inactive %s ring %d\n",
 829                                  type ? "RX" : "TX",
 830                                  hop);
 831                         continue;
 832                 }
 833
 834                 spin_lock(&ring->lock);
 835                 __ring_interrupt(ring);
 836                 spin_unlock(&ring->lock);
 837         }
 838         spin_unlock_irq(&nhi->lock);
 839 }
 840
 841 static irqreturn_t nhi_msi(int irq, void *data)
 842 {
 843         struct tb_nhi *nhi = data;
 844         schedule_work(&nhi->interrupt_work);
 845         return IRQ_HANDLED;
 846 }
 847
 848 static int nhi_suspend_noirq(struct device *dev)
 849 {
 850         struct pci_dev *pdev = to_pci_dev(dev);
 851         struct tb *tb = pci_get_drvdata(pdev);
 852
 853         return tb_domain_suspend_noirq(tb);
 854 }
 855
 856 static void nhi_enable_int_throttling(struct tb_nhi *nhi)
 857 {
 858         /* Throttling is specified in 256ns increments */
 859         u32 throttle = DIV_ROUND_UP(128 * NSEC_PER_USEC, 256);
 860         unsigned int i;
 861
 862         /*
 863          * Configure interrupt throttling for all vectors even if we
 864          * only use few.
 865          */
 866         for (i = 0; i < MSIX_MAX_VECS; i++) {
 867                 u32 reg = REG_INT_THROTTLING_RATE + i * 4;
 868                 iowrite32(throttle, nhi->iobase + reg);
 869         }
 870 }
 871
 872 static int nhi_resume_noirq(struct device *dev)
 873 {
 874         struct pci_dev *pdev = to_pci_dev(dev);
 875         struct tb *tb = pci_get_drvdata(pdev);
 876
 877         /*
 878          * Check that the device is still there. It may be that the user
 879          * unplugged last device which causes the host controller to go
 880          * away on PCs.
 881          */
 882         if (!pci_device_is_present(pdev))
 883                 tb->nhi->going_away = true;
 884         else
 885                 nhi_enable_int_throttling(tb->nhi);
 886
 887         return tb_domain_resume_noirq(tb);
 888 }
 889
 890 static int nhi_suspend(struct device *dev)
 891 {
 892         struct pci_dev *pdev = to_pci_dev(dev);
 893         struct tb *tb = pci_get_drvdata(pdev);
 894
 895         return tb_domain_suspend(tb);
 896 }
 897
 898 static void nhi_complete(struct device *dev)
 899 {
 900         struct pci_dev *pdev = to_pci_dev(dev);
 901         struct tb *tb = pci_get_drvdata(pdev);
 902
 903         tb_domain_complete(tb);
 904 }
 905
 906 static void nhi_shutdown(struct tb_nhi *nhi)
 907 {
 908         int i;
 909         dev_info(&nhi->pdev->dev, "shutdown\n");
 910
 911         for (i = 0; i < nhi->hop_count; i++) {
 912                 if (nhi->tx_rings[i])
 913                         dev_WARN(&nhi->pdev->dev,
 914                                  "TX ring %d is still active\n", i);
 915                 if (nhi->rx_rings[i])
 916                         dev_WARN(&nhi->pdev->dev,
 917                                  "RX ring %d is still active\n", i);
 918         }
 919         nhi_disable_interrupts(nhi);
 920         /*
 921          * We have to release the irq before calling flush_work. Otherwise an
 922          * already executing IRQ handler could call schedule_work again.
 923          */
 924         if (!nhi->pdev->msix_enabled) {
 925                 devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
 926                 flush_work(&nhi->interrupt_work);
 927         }
 928         ida_destroy(&nhi->msix_ida);
 929 }
 930
 931 static int nhi_init_msi(struct tb_nhi *nhi)
 932 {
 933         struct pci_dev *pdev = nhi->pdev;
 934         int res, irq, nvec;
 935
 936         /* In case someone left them on. */
 937         nhi_disable_interrupts(nhi);
 938
 939         nhi_enable_int_throttling(nhi);
 940
 941         ida_init(&nhi->msix_ida);
 942
 943         /*
 944          * The NHI has 16 MSI-X vectors or a single MSI. We first try to
 945          * get all MSI-X vectors and if we succeed, each ring will have
 946          * one MSI-X. If for some reason that does not work out, we
 947          * fallback to a single MSI.
 948          */
 949         nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
 950                                      PCI_IRQ_MSIX);
 951         if (nvec < 0) {
 952                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 953                 if (nvec < 0)
 954                         return nvec;
 955
 956                 INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
 957
 958                 irq = pci_irq_vector(nhi->pdev, 0);
 959                 if (irq < 0)
 960                         return irq;
 961
 962                 res = devm_request_irq(&pdev->dev, irq, nhi_msi,
 963                                        IRQF_NO_SUSPEND, "thunderbolt", nhi);
 964                 if (res) {
 965                         dev_err(&pdev->dev, "request_irq failed, aborting\n");
 966                         return res;
 967                 }
 968         }
 969
 970         return 0;
 971 }
 972
 973 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 974 {
 975         struct tb_nhi *nhi;
 976         struct tb *tb;
 977         int res;
 978
 979         res = pcim_enable_device(pdev);
 980         if (res) {
 981                 dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
 982                 return res;
 983         }
 984
 985         res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
 986         if (res) {
 987                 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
 988                 return res;
 989         }
 990
 991         nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
 992         if (!nhi)
 993                 return -ENOMEM;
 994
 995         nhi->pdev = pdev;
 996         /* cannot fail - table is allocated bin pcim_iomap_regions */
 997         nhi->iobase = pcim_iomap_table(pdev)[0];
 998         nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
 999         if (nhi->hop_count != 12 && nhi->hop_count != 32)
1000                 dev_warn(&pdev->dev, "unexpected hop count: %d\n",
1001                          nhi->hop_count);
1002
1003         nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1004                                      sizeof(*nhi->tx_rings), GFP_KERNEL);
1005         nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1006                                      sizeof(*nhi->rx_rings), GFP_KERNEL);
1007         if (!nhi->tx_rings || !nhi->rx_rings)
1008                 return -ENOMEM;
1009
1010         res = nhi_init_msi(nhi);
1011         if (res) {
1012                 dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
1013                 return res;
1014         }
1015
1016         spin_lock_init(&nhi->lock);
1017
1018         pci_set_master(pdev);
1019
1020         tb = icm_probe(nhi);
1021         if (!tb)
1022                 tb = tb_probe(nhi);
1023         if (!tb) {
1024                 dev_err(&nhi->pdev->dev,
1025                         "failed to determine connection manager, aborting\n");
1026                 return -ENODEV;
1027         }
1028
1029         dev_info(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
1030
1031         res = tb_domain_add(tb);
1032         if (res) {
1033                 /*
1034                  * At this point the RX/TX rings might already have been
1035                  * activated. Do a proper shutdown.
1036                  */
1037                 tb_domain_put(tb);
1038                 nhi_shutdown(nhi);
1039                 return res;
1040         }
1041         pci_set_drvdata(pdev, tb);
1042
1043         return 0;
1044 }
1045
1046 static void nhi_remove(struct pci_dev *pdev)
1047 {
1048         struct tb *tb = pci_get_drvdata(pdev);
1049         struct tb_nhi *nhi = tb->nhi;
1050
1051         tb_domain_remove(tb);
1052         nhi_shutdown(nhi);
1053 }
1054
1055 /*
1056  * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1057  * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1058  * resume_noirq until we are done.
1059  */
1060 static const struct dev_pm_ops nhi_pm_ops = {
1061         .suspend_noirq = nhi_suspend_noirq,
1062         .resume_noirq = nhi_resume_noirq,
1063         .freeze_noirq = nhi_suspend_noirq, /*
1064                                             * we just disable hotplug, the
1065                                             * pci-tunnels stay alive.
1066                                             */
1067         .thaw_noirq = nhi_resume_noirq,
1068         .restore_noirq = nhi_resume_noirq,
1069         .suspend = nhi_suspend,
1070         .freeze = nhi_suspend,
1071         .poweroff = nhi_suspend,
1072         .complete = nhi_complete,
1073 };
1074
1075 static struct pci_device_id nhi_ids[] = {
1076         /*
1077          * We have to specify class, the TB bridges use the same device and
1078          * vendor (sub)id on gen 1 and gen 2 controllers.
1079          */
1080         {
1081                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1082                 .vendor = PCI_VENDOR_ID_INTEL,
1083                 .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
1084                 .subvendor = 0x2222, .subdevice = 0x1111,
1085         },
1086         {
1087                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1088                 .vendor = PCI_VENDOR_ID_INTEL,
1089                 .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
1090                 .subvendor = 0x2222, .subdevice = 0x1111,
1091         },
1092         {
1093                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1094                 .vendor = PCI_VENDOR_ID_INTEL,
1095                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
1096                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1097         },
1098         {
1099                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1100                 .vendor = PCI_VENDOR_ID_INTEL,
1101                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
1102                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1103         },
1104
1105         /* Thunderbolt 3 */
1106         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
1107         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
1108         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
1109         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
1110         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
1111         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
1112         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
1113         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
1114         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI) },
1115         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI) },
1116
1117         { 0,}
1118 };
1119
1120 MODULE_DEVICE_TABLE(pci, nhi_ids);
1121 MODULE_LICENSE("GPL");
1122
1123 static struct pci_driver nhi_driver = {
1124         .name = "thunderbolt",
1125         .id_table = nhi_ids,
1126         .probe = nhi_probe,
1127         .remove = nhi_remove,
1128         .driver.pm = &nhi_pm_ops,
1129 };
1130
1131 static int __init nhi_init(void)
1132 {
1133         int ret;
1134
1135         ret = tb_domain_init();
1136         if (ret)
1137                 return ret;
1138         ret = pci_register_driver(&nhi_driver);
1139         if (ret)
1140                 tb_domain_exit();
1141         return ret;
1142 }
1143
1144 static void __exit nhi_unload(void)
1145 {
1146         pci_unregister_driver(&nhi_driver);
1147         tb_domain_exit();
1148 }
1149
1150 fs_initcall(nhi_init);
1151 module_exit(nhi_unload);