drivers/thunderbolt/nhi.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Thunderbolt driver - NHI driver
   4  *
   5  * The NHI (native host interface) is the pci device that allows us to send and
   6  * receive frames from the thunderbolt bus.
   7  *
   8  * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
   9  * Copyright (C) 2018, Intel Corporation
  10  */
  11
  12 #include <linux/pm_runtime.h>
  13 #include <linux/slab.h>
  14 #include <linux/errno.h>
  15 #include <linux/pci.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18 #include <linux/delay.h>
  19 #include <linux/property.h>
  20
  21 #include "nhi.h"
  22 #include "nhi_regs.h"
  23 #include "tb.h"
  24
  25 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
  26
  27 #define RING_FIRST_USABLE_HOPID 1
  28
  29 /*
  30  * Minimal number of vectors when we use MSI-X. Two for control channel
  31  * Rx/Tx and the rest four are for cross domain DMA paths.
  32  */
  33 #define MSIX_MIN_VECS           6
  34 #define MSIX_MAX_VECS           16
  35
  36 #define NHI_MAILBOX_TIMEOUT     500 /* ms */
  37
  38 static int ring_interrupt_index(struct tb_ring *ring)
  39 {
  40         int bit = ring->hop;
  41         if (!ring->is_tx)
  42                 bit += ring->nhi->hop_count;
  43         return bit;
  44 }
  45
  46 /**
  47  * ring_interrupt_active() - activate/deactivate interrupts for a single ring
  48  *
  49  * ring->nhi->lock must be held.
  50  */
  51 static void ring_interrupt_active(struct tb_ring *ring, bool active)
  52 {
  53         int reg = REG_RING_INTERRUPT_BASE +
  54                   ring_interrupt_index(ring) / 32 * 4;
  55         int bit = ring_interrupt_index(ring) & 31;
  56         int mask = 1 << bit;
  57         u32 old, new;
  58
  59         if (ring->irq > 0) {
  60                 u32 step, shift, ivr, misc;
  61                 void __iomem *ivr_base;
  62                 int index;
  63
  64                 if (ring->is_tx)
  65                         index = ring->hop;
  66                 else
  67                         index = ring->hop + ring->nhi->hop_count;
  68
  69                 /*
  70                  * Ask the hardware to clear interrupt status bits automatically
  71                  * since we already know which interrupt was triggered.
  72                  */
  73                 misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
  74                 if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
  75                         misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
  76                         iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
  77                 }
  78
  79                 ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
  80                 step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  81                 shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
  82                 ivr = ioread32(ivr_base + step);
  83                 ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
  84                 if (active)
  85                         ivr |= ring->vector << shift;
  86                 iowrite32(ivr, ivr_base + step);
  87         }
  88
  89         old = ioread32(ring->nhi->iobase + reg);
  90         if (active)
  91                 new = old | mask;
  92         else
  93                 new = old & ~mask;
  94
  95         dev_dbg(&ring->nhi->pdev->dev,
  96                 "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
  97                 active ? "enabling" : "disabling", reg, bit, old, new);
  98
  99         if (new == old)
 100                 dev_WARN(&ring->nhi->pdev->dev,
 101                                          "interrupt for %s %d is already %s\n",
 102                                          RING_TYPE(ring), ring->hop,
 103                                          active ? "enabled" : "disabled");
 104         iowrite32(new, ring->nhi->iobase + reg);
 105 }
 106
 107 /**
 108  * nhi_disable_interrupts() - disable interrupts for all rings
 109  *
 110  * Use only during init and shutdown.
 111  */
 112 static void nhi_disable_interrupts(struct tb_nhi *nhi)
 113 {
 114         int i = 0;
 115         /* disable interrupts */
 116         for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
 117                 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
 118
 119         /* clear interrupt status bits */
 120         for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
 121                 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
 122 }
 123
 124 /* ring helper methods */
 125
 126 static void __iomem *ring_desc_base(struct tb_ring *ring)
 127 {
 128         void __iomem *io = ring->nhi->iobase;
 129         io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
 130         io += ring->hop * 16;
 131         return io;
 132 }
 133
 134 static void __iomem *ring_options_base(struct tb_ring *ring)
 135 {
 136         void __iomem *io = ring->nhi->iobase;
 137         io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
 138         io += ring->hop * 32;
 139         return io;
 140 }
 141
 142 static void ring_iowrite_cons(struct tb_ring *ring, u16 cons)
 143 {
 144         /*
 145          * The other 16-bits in the register is read-only and writes to it
 146          * are ignored by the hardware so we can save one ioread32() by
 147          * filling the read-only bits with zeroes.
 148          */
 149         iowrite32(cons, ring_desc_base(ring) + 8);
 150 }
 151
 152 static void ring_iowrite_prod(struct tb_ring *ring, u16 prod)
 153 {
 154         /* See ring_iowrite_cons() above for explanation */
 155         iowrite32(prod << 16, ring_desc_base(ring) + 8);
 156 }
 157
 158 static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
 159 {
 160         iowrite32(value, ring_desc_base(ring) + offset);
 161 }
 162
 163 static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
 164 {
 165         iowrite32(value, ring_desc_base(ring) + offset);
 166         iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
 167 }
 168
 169 static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
 170 {
 171         iowrite32(value, ring_options_base(ring) + offset);
 172 }
 173
 174 static bool ring_full(struct tb_ring *ring)
 175 {
 176         return ((ring->head + 1) % ring->size) == ring->tail;
 177 }
 178
 179 static bool ring_empty(struct tb_ring *ring)
 180 {
 181         return ring->head == ring->tail;
 182 }
 183
 184 /**
 185  * ring_write_descriptors() - post frames from ring->queue to the controller
 186  *
 187  * ring->lock is held.
 188  */
 189 static void ring_write_descriptors(struct tb_ring *ring)
 190 {
 191         struct ring_frame *frame, *n;
 192         struct ring_desc *descriptor;
 193         list_for_each_entry_safe(frame, n, &ring->queue, list) {
 194                 if (ring_full(ring))
 195                         break;
 196                 list_move_tail(&frame->list, &ring->in_flight);
 197                 descriptor = &ring->descriptors[ring->head];
 198                 descriptor->phys = frame->buffer_phy;
 199                 descriptor->time = 0;
 200                 descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
 201                 if (ring->is_tx) {
 202                         descriptor->length = frame->size;
 203                         descriptor->eof = frame->eof;
 204                         descriptor->sof = frame->sof;
 205                 }
 206                 ring->head = (ring->head + 1) % ring->size;
 207                 if (ring->is_tx)
 208                         ring_iowrite_prod(ring, ring->head);
 209                 else
 210                         ring_iowrite_cons(ring, ring->head);
 211         }
 212 }
 213
 214 /**
 215  * ring_work() - progress completed frames
 216  *
 217  * If the ring is shutting down then all frames are marked as canceled and
 218  * their callbacks are invoked.
 219  *
 220  * Otherwise we collect all completed frame from the ring buffer, write new
 221  * frame to the ring buffer and invoke the callbacks for the completed frames.
 222  */
 223 static void ring_work(struct work_struct *work)
 224 {
 225         struct tb_ring *ring = container_of(work, typeof(*ring), work);
 226         struct ring_frame *frame;
 227         bool canceled = false;
 228         unsigned long flags;
 229         LIST_HEAD(done);
 230
 231         spin_lock_irqsave(&ring->lock, flags);
 232
 233         if (!ring->running) {
 234                 /*  Move all frames to done and mark them as canceled. */
 235                 list_splice_tail_init(&ring->in_flight, &done);
 236                 list_splice_tail_init(&ring->queue, &done);
 237                 canceled = true;
 238                 goto invoke_callback;
 239         }
 240
 241         while (!ring_empty(ring)) {
 242                 if (!(ring->descriptors[ring->tail].flags
 243                                 & RING_DESC_COMPLETED))
 244                         break;
 245                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 246                                          list);
 247                 list_move_tail(&frame->list, &done);
 248                 if (!ring->is_tx) {
 249                         frame->size = ring->descriptors[ring->tail].length;
 250                         frame->eof = ring->descriptors[ring->tail].eof;
 251                         frame->sof = ring->descriptors[ring->tail].sof;
 252                         frame->flags = ring->descriptors[ring->tail].flags;
 253                 }
 254                 ring->tail = (ring->tail + 1) % ring->size;
 255         }
 256         ring_write_descriptors(ring);
 257
 258 invoke_callback:
 259         /* allow callbacks to schedule new work */
 260         spin_unlock_irqrestore(&ring->lock, flags);
 261         while (!list_empty(&done)) {
 262                 frame = list_first_entry(&done, typeof(*frame), list);
 263                 /*
 264                  * The callback may reenqueue or delete frame.
 265                  * Do not hold on to it.
 266                  */
 267                 list_del_init(&frame->list);
 268                 if (frame->callback)
 269                         frame->callback(ring, frame, canceled);
 270         }
 271 }
 272
 273 int __tb_ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
 274 {
 275         unsigned long flags;
 276         int ret = 0;
 277
 278         spin_lock_irqsave(&ring->lock, flags);
 279         if (ring->running) {
 280                 list_add_tail(&frame->list, &ring->queue);
 281                 ring_write_descriptors(ring);
 282         } else {
 283                 ret = -ESHUTDOWN;
 284         }
 285         spin_unlock_irqrestore(&ring->lock, flags);
 286         return ret;
 287 }
 288 EXPORT_SYMBOL_GPL(__tb_ring_enqueue);
 289
 290 /**
 291  * tb_ring_poll() - Poll one completed frame from the ring
 292  * @ring: Ring to poll
 293  *
 294  * This function can be called when @start_poll callback of the @ring
 295  * has been called. It will read one completed frame from the ring and
 296  * return it to the caller. Returns %NULL if there is no more completed
 297  * frames.
 298  */
 299 struct ring_frame *tb_ring_poll(struct tb_ring *ring)
 300 {
 301         struct ring_frame *frame = NULL;
 302         unsigned long flags;
 303
 304         spin_lock_irqsave(&ring->lock, flags);
 305         if (!ring->running)
 306                 goto unlock;
 307         if (ring_empty(ring))
 308                 goto unlock;
 309
 310         if (ring->descriptors[ring->tail].flags & RING_DESC_COMPLETED) {
 311                 frame = list_first_entry(&ring->in_flight, typeof(*frame),
 312                                          list);
 313                 list_del_init(&frame->list);
 314
 315                 if (!ring->is_tx) {
 316                         frame->size = ring->descriptors[ring->tail].length;
 317                         frame->eof = ring->descriptors[ring->tail].eof;
 318                         frame->sof = ring->descriptors[ring->tail].sof;
 319                         frame->flags = ring->descriptors[ring->tail].flags;
 320                 }
 321
 322                 ring->tail = (ring->tail + 1) % ring->size;
 323         }
 324
 325 unlock:
 326         spin_unlock_irqrestore(&ring->lock, flags);
 327         return frame;
 328 }
 329 EXPORT_SYMBOL_GPL(tb_ring_poll);
 330
 331 static void __ring_interrupt_mask(struct tb_ring *ring, bool mask)
 332 {
 333         int idx = ring_interrupt_index(ring);
 334         int reg = REG_RING_INTERRUPT_BASE + idx / 32 * 4;
 335         int bit = idx % 32;
 336         u32 val;
 337
 338         val = ioread32(ring->nhi->iobase + reg);
 339         if (mask)
 340                 val &= ~BIT(bit);
 341         else
 342                 val |= BIT(bit);
 343         iowrite32(val, ring->nhi->iobase + reg);
 344 }
 345
 346 /* Both @nhi->lock and @ring->lock should be held */
 347 static void __ring_interrupt(struct tb_ring *ring)
 348 {
 349         if (!ring->running)
 350                 return;
 351
 352         if (ring->start_poll) {
 353                 __ring_interrupt_mask(ring, true);
 354                 ring->start_poll(ring->poll_data);
 355         } else {
 356                 schedule_work(&ring->work);
 357         }
 358 }
 359
 360 /**
 361  * tb_ring_poll_complete() - Re-start interrupt for the ring
 362  * @ring: Ring to re-start the interrupt
 363  *
 364  * This will re-start (unmask) the ring interrupt once the user is done
 365  * with polling.
 366  */
 367 void tb_ring_poll_complete(struct tb_ring *ring)
 368 {
 369         unsigned long flags;
 370
 371         spin_lock_irqsave(&ring->nhi->lock, flags);
 372         spin_lock(&ring->lock);
 373         if (ring->start_poll)
 374                 __ring_interrupt_mask(ring, false);
 375         spin_unlock(&ring->lock);
 376         spin_unlock_irqrestore(&ring->nhi->lock, flags);
 377 }
 378 EXPORT_SYMBOL_GPL(tb_ring_poll_complete);
 379
 380 static irqreturn_t ring_msix(int irq, void *data)
 381 {
 382         struct tb_ring *ring = data;
 383
 384         spin_lock(&ring->nhi->lock);
 385         spin_lock(&ring->lock);
 386         __ring_interrupt(ring);
 387         spin_unlock(&ring->lock);
 388         spin_unlock(&ring->nhi->lock);
 389
 390         return IRQ_HANDLED;
 391 }
 392
 393 static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
 394 {
 395         struct tb_nhi *nhi = ring->nhi;
 396         unsigned long irqflags;
 397         int ret;
 398
 399         if (!nhi->pdev->msix_enabled)
 400                 return 0;
 401
 402         ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
 403         if (ret < 0)
 404                 return ret;
 405
 406         ring->vector = ret;
 407
 408         ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector);
 409         if (ring->irq < 0)
 410                 return ring->irq;
 411
 412         irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
 413         return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
 414 }
 415
 416 static void ring_release_msix(struct tb_ring *ring)
 417 {
 418         if (ring->irq <= 0)
 419                 return;
 420
 421         free_irq(ring->irq, ring);
 422         ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
 423         ring->vector = 0;
 424         ring->irq = 0;
 425 }
 426
 427 static int nhi_alloc_hop(struct tb_nhi *nhi, struct tb_ring *ring)
 428 {
 429         int ret = 0;
 430
 431         spin_lock_irq(&nhi->lock);
 432
 433         if (ring->hop < 0) {
 434                 unsigned int i;
 435
 436                 /*
 437                  * Automatically allocate HopID from the non-reserved
 438                  * range 1 .. hop_count - 1.
 439                  */
 440                 for (i = RING_FIRST_USABLE_HOPID; i < nhi->hop_count; i++) {
 441                         if (ring->is_tx) {
 442                                 if (!nhi->tx_rings[i]) {
 443                                         ring->hop = i;
 444                                         break;
 445                                 }
 446                         } else {
 447                                 if (!nhi->rx_rings[i]) {
 448                                         ring->hop = i;
 449                                         break;
 450                                 }
 451                         }
 452                 }
 453         }
 454
 455         if (ring->hop < 0 || ring->hop >= nhi->hop_count) {
 456                 dev_warn(&nhi->pdev->dev, "invalid hop: %d\n", ring->hop);
 457                 ret = -EINVAL;
 458                 goto err_unlock;
 459         }
 460         if (ring->is_tx && nhi->tx_rings[ring->hop]) {
 461                 dev_warn(&nhi->pdev->dev, "TX hop %d already allocated\n",
 462                          ring->hop);
 463                 ret = -EBUSY;
 464                 goto err_unlock;
 465         } else if (!ring->is_tx && nhi->rx_rings[ring->hop]) {
 466                 dev_warn(&nhi->pdev->dev, "RX hop %d already allocated\n",
 467                          ring->hop);
 468                 ret = -EBUSY;
 469                 goto err_unlock;
 470         }
 471
 472         if (ring->is_tx)
 473                 nhi->tx_rings[ring->hop] = ring;
 474         else
 475                 nhi->rx_rings[ring->hop] = ring;
 476
 477 err_unlock:
 478         spin_unlock_irq(&nhi->lock);
 479
 480         return ret;
 481 }
 482
 483 static struct tb_ring *tb_ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
 484                                      bool transmit, unsigned int flags,
 485                                      u16 sof_mask, u16 eof_mask,
 486                                      void (*start_poll)(void *),
 487                                      void *poll_data)
 488 {
 489         struct tb_ring *ring = NULL;
 490
 491         dev_dbg(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
 492                 transmit ? "TX" : "RX", hop, size);
 493
 494         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
 495         if (!ring)
 496                 return NULL;
 497
 498         spin_lock_init(&ring->lock);
 499         INIT_LIST_HEAD(&ring->queue);
 500         INIT_LIST_HEAD(&ring->in_flight);
 501         INIT_WORK(&ring->work, ring_work);
 502
 503         ring->nhi = nhi;
 504         ring->hop = hop;
 505         ring->is_tx = transmit;
 506         ring->size = size;
 507         ring->flags = flags;
 508         ring->sof_mask = sof_mask;
 509         ring->eof_mask = eof_mask;
 510         ring->head = 0;
 511         ring->tail = 0;
 512         ring->running = false;
 513         ring->start_poll = start_poll;
 514         ring->poll_data = poll_data;
 515
 516         ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
 517                         size * sizeof(*ring->descriptors),
 518                         &ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
 519         if (!ring->descriptors)
 520                 goto err_free_ring;
 521
 522         if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
 523                 goto err_free_descs;
 524
 525         if (nhi_alloc_hop(nhi, ring))
 526                 goto err_release_msix;
 527
 528         return ring;
 529
 530 err_release_msix:
 531         ring_release_msix(ring);
 532 err_free_descs:
 533         dma_free_coherent(&ring->nhi->pdev->dev,
 534                           ring->size * sizeof(*ring->descriptors),
 535                           ring->descriptors, ring->descriptors_dma);
 536 err_free_ring:
 537         kfree(ring);
 538
 539         return NULL;
 540 }
 541
 542 /**
 543  * tb_ring_alloc_tx() - Allocate DMA ring for transmit
 544  * @nhi: Pointer to the NHI the ring is to be allocated
 545  * @hop: HopID (ring) to allocate
 546  * @size: Number of entries in the ring
 547  * @flags: Flags for the ring
 548  */
 549 struct tb_ring *tb_ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
 550                                  unsigned int flags)
 551 {
 552         return tb_ring_alloc(nhi, hop, size, true, flags, 0, 0, NULL, NULL);
 553 }
 554 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx);
 555
 556 /**
 557  * tb_ring_alloc_rx() - Allocate DMA ring for receive
 558  * @nhi: Pointer to the NHI the ring is to be allocated
 559  * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
 560  * @size: Number of entries in the ring
 561  * @flags: Flags for the ring
 562  * @sof_mask: Mask of PDF values that start a frame
 563  * @eof_mask: Mask of PDF values that end a frame
 564  * @start_poll: If not %NULL the ring will call this function when an
 565  *              interrupt is triggered and masked, instead of callback
 566  *              in each Rx frame.
 567  * @poll_data: Optional data passed to @start_poll
 568  */
 569 struct tb_ring *tb_ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
 570                                  unsigned int flags, u16 sof_mask, u16 eof_mask,
 571                                  void (*start_poll)(void *), void *poll_data)
 572 {
 573         return tb_ring_alloc(nhi, hop, size, false, flags, sof_mask, eof_mask,
 574                              start_poll, poll_data);
 575 }
 576 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx);
 577
 578 /**
 579  * tb_ring_start() - enable a ring
 580  *
 581  * Must not be invoked in parallel with tb_ring_stop().
 582  */
 583 void tb_ring_start(struct tb_ring *ring)
 584 {
 585         u16 frame_size;
 586         u32 flags;
 587
 588         spin_lock_irq(&ring->nhi->lock);
 589         spin_lock(&ring->lock);
 590         if (ring->nhi->going_away)
 591                 goto err;
 592         if (ring->running) {
 593                 dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
 594                 goto err;
 595         }
 596         dev_dbg(&ring->nhi->pdev->dev, "starting %s %d\n",
 597                 RING_TYPE(ring), ring->hop);
 598
 599         if (ring->flags & RING_FLAG_FRAME) {
 600                 /* Means 4096 */
 601                 frame_size = 0;
 602                 flags = RING_FLAG_ENABLE;
 603         } else {
 604                 frame_size = TB_FRAME_SIZE;
 605                 flags = RING_FLAG_ENABLE | RING_FLAG_RAW;
 606         }
 607
 608         ring_iowrite64desc(ring, ring->descriptors_dma, 0);
 609         if (ring->is_tx) {
 610                 ring_iowrite32desc(ring, ring->size, 12);
 611                 ring_iowrite32options(ring, 0, 4); /* time releated ? */
 612                 ring_iowrite32options(ring, flags, 0);
 613         } else {
 614                 u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
 615
 616                 ring_iowrite32desc(ring, (frame_size << 16) | ring->size, 12);
 617                 ring_iowrite32options(ring, sof_eof_mask, 4);
 618                 ring_iowrite32options(ring, flags, 0);
 619         }
 620         ring_interrupt_active(ring, true);
 621         ring->running = true;
 622 err:
 623         spin_unlock(&ring->lock);
 624         spin_unlock_irq(&ring->nhi->lock);
 625 }
 626 EXPORT_SYMBOL_GPL(tb_ring_start);
 627
 628 /**
 629  * tb_ring_stop() - shutdown a ring
 630  *
 631  * Must not be invoked from a callback.
 632  *
 633  * This method will disable the ring. Further calls to
 634  * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
 635  * called.
 636  *
 637  * All enqueued frames will be canceled and their callbacks will be executed
 638  * with frame->canceled set to true (on the callback thread). This method
 639  * returns only after all callback invocations have finished.
 640  */
 641 void tb_ring_stop(struct tb_ring *ring)
 642 {
 643         spin_lock_irq(&ring->nhi->lock);
 644         spin_lock(&ring->lock);
 645         dev_dbg(&ring->nhi->pdev->dev, "stopping %s %d\n",
 646                 RING_TYPE(ring), ring->hop);
 647         if (ring->nhi->going_away)
 648                 goto err;
 649         if (!ring->running) {
 650                 dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
 651                          RING_TYPE(ring), ring->hop);
 652                 goto err;
 653         }
 654         ring_interrupt_active(ring, false);
 655
 656         ring_iowrite32options(ring, 0, 0);
 657         ring_iowrite64desc(ring, 0, 0);
 658         ring_iowrite32desc(ring, 0, 8);
 659         ring_iowrite32desc(ring, 0, 12);
 660         ring->head = 0;
 661         ring->tail = 0;
 662         ring->running = false;
 663
 664 err:
 665         spin_unlock(&ring->lock);
 666         spin_unlock_irq(&ring->nhi->lock);
 667
 668         /*
 669          * schedule ring->work to invoke callbacks on all remaining frames.
 670          */
 671         schedule_work(&ring->work);
 672         flush_work(&ring->work);
 673 }
 674 EXPORT_SYMBOL_GPL(tb_ring_stop);
 675
 676 /*
 677  * tb_ring_free() - free ring
 678  *
 679  * When this method returns all invocations of ring->callback will have
 680  * finished.
 681  *
 682  * Ring must be stopped.
 683  *
 684  * Must NOT be called from ring_frame->callback!
 685  */
 686 void tb_ring_free(struct tb_ring *ring)
 687 {
 688         spin_lock_irq(&ring->nhi->lock);
 689         /*
 690          * Dissociate the ring from the NHI. This also ensures that
 691          * nhi_interrupt_work cannot reschedule ring->work.
 692          */
 693         if (ring->is_tx)
 694                 ring->nhi->tx_rings[ring->hop] = NULL;
 695         else
 696                 ring->nhi->rx_rings[ring->hop] = NULL;
 697
 698         if (ring->running) {
 699                 dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
 700                          RING_TYPE(ring), ring->hop);
 701         }
 702         spin_unlock_irq(&ring->nhi->lock);
 703
 704         ring_release_msix(ring);
 705
 706         dma_free_coherent(&ring->nhi->pdev->dev,
 707                           ring->size * sizeof(*ring->descriptors),
 708                           ring->descriptors, ring->descriptors_dma);
 709
 710         ring->descriptors = NULL;
 711         ring->descriptors_dma = 0;
 712
 713
 714         dev_dbg(&ring->nhi->pdev->dev, "freeing %s %d\n", RING_TYPE(ring),
 715                 ring->hop);
 716
 717         /**
 718          * ring->work can no longer be scheduled (it is scheduled only
 719          * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
 720          * to finish before freeing the ring.
 721          */
 722         flush_work(&ring->work);
 723         kfree(ring);
 724 }
 725 EXPORT_SYMBOL_GPL(tb_ring_free);
 726
 727 /**
 728  * nhi_mailbox_cmd() - Send a command through NHI mailbox
 729  * @nhi: Pointer to the NHI structure
 730  * @cmd: Command to send
 731  * @data: Data to be send with the command
 732  *
 733  * Sends mailbox command to the firmware running on NHI. Returns %0 in
 734  * case of success and negative errno in case of failure.
 735  */
 736 int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
 737 {
 738         ktime_t timeout;
 739         u32 val;
 740
 741         iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
 742
 743         val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 744         val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
 745         val |= REG_INMAIL_OP_REQUEST | cmd;
 746         iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
 747
 748         timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
 749         do {
 750                 val = ioread32(nhi->iobase + REG_INMAIL_CMD);
 751                 if (!(val & REG_INMAIL_OP_REQUEST))
 752                         break;
 753                 usleep_range(10, 20);
 754         } while (ktime_before(ktime_get(), timeout));
 755
 756         if (val & REG_INMAIL_OP_REQUEST)
 757                 return -ETIMEDOUT;
 758         if (val & REG_INMAIL_ERROR)
 759                 return -EIO;
 760
 761         return 0;
 762 }
 763
 764 /**
 765  * nhi_mailbox_mode() - Return current firmware operation mode
 766  * @nhi: Pointer to the NHI structure
 767  *
 768  * The function reads current firmware operation mode using NHI mailbox
 769  * registers and returns it to the caller.
 770  */
 771 enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
 772 {
 773         u32 val;
 774
 775         val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
 776         val &= REG_OUTMAIL_CMD_OPMODE_MASK;
 777         val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
 778
 779         return (enum nhi_fw_mode)val;
 780 }
 781
 782 static void nhi_interrupt_work(struct work_struct *work)
 783 {
 784         struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
 785         int value = 0; /* Suppress uninitialized usage warning. */
 786         int bit;
 787         int hop = -1;
 788         int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
 789         struct tb_ring *ring;
 790
 791         spin_lock_irq(&nhi->lock);
 792
 793         /*
 794          * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
 795          * (TX, RX, RX overflow). We iterate over the bits and read a new
 796          * dwords as required. The registers are cleared on read.
 797          */
 798         for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
 799                 if (bit % 32 == 0)
 800                         value = ioread32(nhi->iobase
 801                                          + REG_RING_NOTIFY_BASE
 802                                          + 4 * (bit / 32));
 803                 if (++hop == nhi->hop_count) {
 804                         hop = 0;
 805                         type++;
 806                 }
 807                 if ((value & (1 << (bit % 32))) == 0)
 808                         continue;
 809                 if (type == 2) {
 810                         dev_warn(&nhi->pdev->dev,
 811                                  "RX overflow for ring %d\n",
 812                                  hop);
 813                         continue;
 814                 }
 815                 if (type == 0)
 816                         ring = nhi->tx_rings[hop];
 817                 else
 818                         ring = nhi->rx_rings[hop];
 819                 if (ring == NULL) {
 820                         dev_warn(&nhi->pdev->dev,
 821                                  "got interrupt for inactive %s ring %d\n",
 822                                  type ? "RX" : "TX",
 823                                  hop);
 824                         continue;
 825                 }
 826
 827                 spin_lock(&ring->lock);
 828                 __ring_interrupt(ring);
 829                 spin_unlock(&ring->lock);
 830         }
 831         spin_unlock_irq(&nhi->lock);
 832 }
 833
 834 static irqreturn_t nhi_msi(int irq, void *data)
 835 {
 836         struct tb_nhi *nhi = data;
 837         schedule_work(&nhi->interrupt_work);
 838         return IRQ_HANDLED;
 839 }
 840
 841 static int __nhi_suspend_noirq(struct device *dev, bool wakeup)
 842 {
 843         struct pci_dev *pdev = to_pci_dev(dev);
 844         struct tb *tb = pci_get_drvdata(pdev);
 845         struct tb_nhi *nhi = tb->nhi;
 846         int ret;
 847
 848         ret = tb_domain_suspend_noirq(tb);
 849         if (ret)
 850                 return ret;
 851
 852         if (nhi->ops && nhi->ops->suspend_noirq) {
 853                 ret = nhi->ops->suspend_noirq(tb->nhi, wakeup);
 854                 if (ret)
 855                         return ret;
 856         }
 857
 858         return 0;
 859 }
 860
 861 static int nhi_suspend_noirq(struct device *dev)
 862 {
 863         return __nhi_suspend_noirq(dev, device_may_wakeup(dev));
 864 }
 865
 866 static bool nhi_wake_supported(struct pci_dev *pdev)
 867 {
 868         u8 val;
 869
 870         /*
 871          * If power rails are sustainable for wakeup from S4 this
 872          * property is set by the BIOS.
 873          */
 874         if (device_property_read_u8(&pdev->dev, "WAKE_SUPPORTED", &val))
 875                 return !!val;
 876
 877         return true;
 878 }
 879
 880 static int nhi_poweroff_noirq(struct device *dev)
 881 {
 882         struct pci_dev *pdev = to_pci_dev(dev);
 883         bool wakeup;
 884
 885         wakeup = device_may_wakeup(dev) && nhi_wake_supported(pdev);
 886         return __nhi_suspend_noirq(dev, wakeup);
 887 }
 888
 889 static void nhi_enable_int_throttling(struct tb_nhi *nhi)
 890 {
 891         /* Throttling is specified in 256ns increments */
 892         u32 throttle = DIV_ROUND_UP(128 * NSEC_PER_USEC, 256);
 893         unsigned int i;
 894
 895         /*
 896          * Configure interrupt throttling for all vectors even if we
 897          * only use few.
 898          */
 899         for (i = 0; i < MSIX_MAX_VECS; i++) {
 900                 u32 reg = REG_INT_THROTTLING_RATE + i * 4;
 901                 iowrite32(throttle, nhi->iobase + reg);
 902         }
 903 }
 904
 905 static int nhi_resume_noirq(struct device *dev)
 906 {
 907         struct pci_dev *pdev = to_pci_dev(dev);
 908         struct tb *tb = pci_get_drvdata(pdev);
 909         struct tb_nhi *nhi = tb->nhi;
 910         int ret;
 911
 912         /*
 913          * Check that the device is still there. It may be that the user
 914          * unplugged last device which causes the host controller to go
 915          * away on PCs.
 916          */
 917         if (!pci_device_is_present(pdev)) {
 918                 nhi->going_away = true;
 919         } else {
 920                 if (nhi->ops && nhi->ops->resume_noirq) {
 921                         ret = nhi->ops->resume_noirq(nhi);
 922                         if (ret)
 923                                 return ret;
 924                 }
 925                 nhi_enable_int_throttling(tb->nhi);
 926         }
 927
 928         return tb_domain_resume_noirq(tb);
 929 }
 930
 931 static int nhi_suspend(struct device *dev)
 932 {
 933         struct pci_dev *pdev = to_pci_dev(dev);
 934         struct tb *tb = pci_get_drvdata(pdev);
 935
 936         return tb_domain_suspend(tb);
 937 }
 938
 939 static void nhi_complete(struct device *dev)
 940 {
 941         struct pci_dev *pdev = to_pci_dev(dev);
 942         struct tb *tb = pci_get_drvdata(pdev);
 943
 944         /*
 945          * If we were runtime suspended when system suspend started,
 946          * schedule runtime resume now. It should bring the domain back
 947          * to functional state.
 948          */
 949         if (pm_runtime_suspended(&pdev->dev))
 950                 pm_runtime_resume(&pdev->dev);
 951         else
 952                 tb_domain_complete(tb);
 953 }
 954
 955 static int nhi_runtime_suspend(struct device *dev)
 956 {
 957         struct pci_dev *pdev = to_pci_dev(dev);
 958         struct tb *tb = pci_get_drvdata(pdev);
 959         struct tb_nhi *nhi = tb->nhi;
 960         int ret;
 961
 962         ret = tb_domain_runtime_suspend(tb);
 963         if (ret)
 964                 return ret;
 965
 966         if (nhi->ops && nhi->ops->runtime_suspend) {
 967                 ret = nhi->ops->runtime_suspend(tb->nhi);
 968                 if (ret)
 969                         return ret;
 970         }
 971         return 0;
 972 }
 973
 974 static int nhi_runtime_resume(struct device *dev)
 975 {
 976         struct pci_dev *pdev = to_pci_dev(dev);
 977         struct tb *tb = pci_get_drvdata(pdev);
 978         struct tb_nhi *nhi = tb->nhi;
 979         int ret;
 980
 981         if (nhi->ops && nhi->ops->runtime_resume) {
 982                 ret = nhi->ops->runtime_resume(nhi);
 983                 if (ret)
 984                         return ret;
 985         }
 986
 987         nhi_enable_int_throttling(nhi);
 988         return tb_domain_runtime_resume(tb);
 989 }
 990
 991 static void nhi_shutdown(struct tb_nhi *nhi)
 992 {
 993         int i;
 994
 995         dev_dbg(&nhi->pdev->dev, "shutdown\n");
 996
 997         for (i = 0; i < nhi->hop_count; i++) {
 998                 if (nhi->tx_rings[i])
 999                         dev_WARN(&nhi->pdev->dev,
1000                                  "TX ring %d is still active\n", i);
1001                 if (nhi->rx_rings[i])
1002                         dev_WARN(&nhi->pdev->dev,
1003                                  "RX ring %d is still active\n", i);
1004         }
1005         nhi_disable_interrupts(nhi);
1006         /*
1007          * We have to release the irq before calling flush_work. Otherwise an
1008          * already executing IRQ handler could call schedule_work again.
1009          */
1010         if (!nhi->pdev->msix_enabled) {
1011                 devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
1012                 flush_work(&nhi->interrupt_work);
1013         }
1014         ida_destroy(&nhi->msix_ida);
1015
1016         if (nhi->ops && nhi->ops->shutdown)
1017                 nhi->ops->shutdown(nhi);
1018 }
1019
1020 static int nhi_init_msi(struct tb_nhi *nhi)
1021 {
1022         struct pci_dev *pdev = nhi->pdev;
1023         int res, irq, nvec;
1024
1025         /* In case someone left them on. */
1026         nhi_disable_interrupts(nhi);
1027
1028         nhi_enable_int_throttling(nhi);
1029
1030         ida_init(&nhi->msix_ida);
1031
1032         /*
1033          * The NHI has 16 MSI-X vectors or a single MSI. We first try to
1034          * get all MSI-X vectors and if we succeed, each ring will have
1035          * one MSI-X. If for some reason that does not work out, we
1036          * fallback to a single MSI.
1037          */
1038         nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
1039                                      PCI_IRQ_MSIX);
1040         if (nvec < 0) {
1041                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1042                 if (nvec < 0)
1043                         return nvec;
1044
1045                 INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
1046
1047                 irq = pci_irq_vector(nhi->pdev, 0);
1048                 if (irq < 0)
1049                         return irq;
1050
1051                 res = devm_request_irq(&pdev->dev, irq, nhi_msi,
1052                                        IRQF_NO_SUSPEND, "thunderbolt", nhi);
1053                 if (res) {
1054                         dev_err(&pdev->dev, "request_irq failed, aborting\n");
1055                         return res;
1056                 }
1057         }
1058
1059         return 0;
1060 }
1061
1062 static bool nhi_imr_valid(struct pci_dev *pdev)
1063 {
1064         u8 val;
1065
1066         if (!device_property_read_u8(&pdev->dev, "IMR_VALID", &val))
1067                 return !!val;
1068
1069         return true;
1070 }
1071
1072 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1073 {
1074         struct tb_nhi *nhi;
1075         struct tb *tb;
1076         int res;
1077
1078         if (!nhi_imr_valid(pdev)) {
1079                 dev_warn(&pdev->dev, "firmware image not valid, aborting\n");
1080                 return -ENODEV;
1081         }
1082
1083         res = pcim_enable_device(pdev);
1084         if (res) {
1085                 dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
1086                 return res;
1087         }
1088
1089         res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
1090         if (res) {
1091                 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
1092                 return res;
1093         }
1094
1095         nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
1096         if (!nhi)
1097                 return -ENOMEM;
1098
1099         nhi->pdev = pdev;
1100         nhi->ops = (const struct tb_nhi_ops *)id->driver_data;
1101         /* cannot fail - table is allocated bin pcim_iomap_regions */
1102         nhi->iobase = pcim_iomap_table(pdev)[0];
1103         nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
1104         dev_dbg(&pdev->dev, "total paths: %d\n", nhi->hop_count);
1105
1106         nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1107                                      sizeof(*nhi->tx_rings), GFP_KERNEL);
1108         nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
1109                                      sizeof(*nhi->rx_rings), GFP_KERNEL);
1110         if (!nhi->tx_rings || !nhi->rx_rings)
1111                 return -ENOMEM;
1112
1113         res = nhi_init_msi(nhi);
1114         if (res) {
1115                 dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
1116                 return res;
1117         }
1118
1119         spin_lock_init(&nhi->lock);
1120
1121         res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1122         if (res)
1123                 res = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1124         if (res) {
1125                 dev_err(&pdev->dev, "failed to set DMA mask\n");
1126                 return res;
1127         }
1128
1129         pci_set_master(pdev);
1130
1131         if (nhi->ops && nhi->ops->init) {
1132                 res = nhi->ops->init(nhi);
1133                 if (res)
1134                         return res;
1135         }
1136
1137         tb = icm_probe(nhi);
1138         if (!tb)
1139                 tb = tb_probe(nhi);
1140         if (!tb) {
1141                 dev_err(&nhi->pdev->dev,
1142                         "failed to determine connection manager, aborting\n");
1143                 return -ENODEV;
1144         }
1145
1146         dev_dbg(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
1147
1148         res = tb_domain_add(tb);
1149         if (res) {
1150                 /*
1151                  * At this point the RX/TX rings might already have been
1152                  * activated. Do a proper shutdown.
1153                  */
1154                 tb_domain_put(tb);
1155                 nhi_shutdown(nhi);
1156                 return res;
1157         }
1158         pci_set_drvdata(pdev, tb);
1159
1160         pm_runtime_allow(&pdev->dev);
1161         pm_runtime_set_autosuspend_delay(&pdev->dev, TB_AUTOSUSPEND_DELAY);
1162         pm_runtime_use_autosuspend(&pdev->dev);
1163         pm_runtime_put_autosuspend(&pdev->dev);
1164
1165         return 0;
1166 }
1167
1168 static void nhi_remove(struct pci_dev *pdev)
1169 {
1170         struct tb *tb = pci_get_drvdata(pdev);
1171         struct tb_nhi *nhi = tb->nhi;
1172
1173         pm_runtime_get_sync(&pdev->dev);
1174         pm_runtime_dont_use_autosuspend(&pdev->dev);
1175         pm_runtime_forbid(&pdev->dev);
1176
1177         tb_domain_remove(tb);
1178         nhi_shutdown(nhi);
1179 }
1180
1181 /*
1182  * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1183  * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1184  * resume_noirq until we are done.
1185  */
1186 static const struct dev_pm_ops nhi_pm_ops = {
1187         .suspend_noirq = nhi_suspend_noirq,
1188         .resume_noirq = nhi_resume_noirq,
1189         .freeze_noirq = nhi_suspend_noirq, /*
1190                                             * we just disable hotplug, the
1191                                             * pci-tunnels stay alive.
1192                                             */
1193         .thaw_noirq = nhi_resume_noirq,
1194         .restore_noirq = nhi_resume_noirq,
1195         .suspend = nhi_suspend,
1196         .freeze = nhi_suspend,
1197         .poweroff_noirq = nhi_poweroff_noirq,
1198         .poweroff = nhi_suspend,
1199         .complete = nhi_complete,
1200         .runtime_suspend = nhi_runtime_suspend,
1201         .runtime_resume = nhi_runtime_resume,
1202 };
1203
1204 static struct pci_device_id nhi_ids[] = {
1205         /*
1206          * We have to specify class, the TB bridges use the same device and
1207          * vendor (sub)id on gen 1 and gen 2 controllers.
1208          */
1209         {
1210                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1211                 .vendor = PCI_VENDOR_ID_INTEL,
1212                 .device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
1213                 .subvendor = 0x2222, .subdevice = 0x1111,
1214         },
1215         {
1216                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1217                 .vendor = PCI_VENDOR_ID_INTEL,
1218                 .device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
1219                 .subvendor = 0x2222, .subdevice = 0x1111,
1220         },
1221         {
1222                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1223                 .vendor = PCI_VENDOR_ID_INTEL,
1224                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
1225                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1226         },
1227         {
1228                 .class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
1229                 .vendor = PCI_VENDOR_ID_INTEL,
1230                 .device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
1231                 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
1232         },
1233
1234         /* Thunderbolt 3 */
1235         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
1236         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
1237         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
1238         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
1239         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
1240         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
1241         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
1242         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
1243         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI) },
1244         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI) },
1245         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICL_NHI0),
1246           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1247         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ICL_NHI1),
1248           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1249         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_NHI0),
1250           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1251         { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_NHI1),
1252           .driver_data = (kernel_ulong_t)&icl_nhi_ops },
1253
1254         /* Any USB4 compliant host */
1255         { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_USB4, ~0) },
1256
1257         { 0,}
1258 };
1259
1260 MODULE_DEVICE_TABLE(pci, nhi_ids);
1261 MODULE_LICENSE("GPL");
1262
1263 static struct pci_driver nhi_driver = {
1264         .name = "thunderbolt",
1265         .id_table = nhi_ids,
1266         .probe = nhi_probe,
1267         .remove = nhi_remove,
1268         .shutdown = nhi_remove,
1269         .driver.pm = &nhi_pm_ops,
1270 };
1271
1272 static int __init nhi_init(void)
1273 {
1274         int ret;
1275
1276         ret = tb_domain_init();
1277         if (ret)
1278                 return ret;
1279         ret = pci_register_driver(&nhi_driver);
1280         if (ret)
1281                 tb_domain_exit();
1282         return ret;
1283 }
1284
1285 static void __exit nhi_unload(void)
1286 {
1287         pci_unregister_driver(&nhi_driver);
1288         tb_domain_exit();
1289 }
1290
1291 rootfs_initcall(nhi_init);
1292 module_exit(nhi_unload);