1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - eeprom access
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2018, Intel Corporation
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
11 #include <linux/property.h>
12 #include <linux/slab.h>
16 * tb_eeprom_ctl_write() - write control word
18 static int tb_eeprom_ctl_write(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
20 return tb_sw_write(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
24 * tb_eeprom_ctl_write() - read control word
26 static int tb_eeprom_ctl_read(struct tb_switch *sw, struct tb_eeprom_ctl *ctl)
28 return tb_sw_read(sw, ctl, TB_CFG_SWITCH, sw->cap_plug_events + 4, 1);
31 enum tb_eeprom_transfer {
37 * tb_eeprom_active - enable rom access
39 * WARNING: Always disable access after usage. Otherwise the controller will
42 static int tb_eeprom_active(struct tb_switch *sw, bool enable)
44 struct tb_eeprom_ctl ctl;
45 int res = tb_eeprom_ctl_read(sw, &ctl);
50 res = tb_eeprom_ctl_write(sw, &ctl);
54 return tb_eeprom_ctl_write(sw, &ctl);
57 res = tb_eeprom_ctl_write(sw, &ctl);
61 return tb_eeprom_ctl_write(sw, &ctl);
66 * tb_eeprom_transfer - transfer one bit
68 * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in.
69 * If TB_EEPROM_OUT is passed, then ctl->data_out will be written.
71 static int tb_eeprom_transfer(struct tb_switch *sw, struct tb_eeprom_ctl *ctl,
72 enum tb_eeprom_transfer direction)
75 if (direction == TB_EEPROM_OUT) {
76 res = tb_eeprom_ctl_write(sw, ctl);
81 res = tb_eeprom_ctl_write(sw, ctl);
84 if (direction == TB_EEPROM_IN) {
85 res = tb_eeprom_ctl_read(sw, ctl);
90 return tb_eeprom_ctl_write(sw, ctl);
94 * tb_eeprom_out - write one byte to the bus
96 static int tb_eeprom_out(struct tb_switch *sw, u8 val)
98 struct tb_eeprom_ctl ctl;
100 int res = tb_eeprom_ctl_read(sw, &ctl);
103 for (i = 0; i < 8; i++) {
104 ctl.data_out = val & 0x80;
105 res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_OUT);
114 * tb_eeprom_in - read one byte from the bus
116 static int tb_eeprom_in(struct tb_switch *sw, u8 *val)
118 struct tb_eeprom_ctl ctl;
120 int res = tb_eeprom_ctl_read(sw, &ctl);
124 for (i = 0; i < 8; i++) {
126 res = tb_eeprom_transfer(sw, &ctl, TB_EEPROM_IN);
135 * tb_eeprom_get_drom_offset - get drom offset within eeprom
137 static int tb_eeprom_get_drom_offset(struct tb_switch *sw, u16 *offset)
139 struct tb_cap_plug_events cap;
142 if (!sw->cap_plug_events) {
143 tb_sw_warn(sw, "no TB_CAP_PLUG_EVENTS, cannot read eeprom\n");
146 res = tb_sw_read(sw, &cap, TB_CFG_SWITCH, sw->cap_plug_events,
151 if (!cap.eeprom_ctl.present || cap.eeprom_ctl.not_present) {
152 tb_sw_warn(sw, "no NVM\n");
156 if (cap.drom_offset > 0xffff) {
157 tb_sw_warn(sw, "drom offset is larger than 0xffff: %#x\n",
161 *offset = cap.drom_offset;
166 * tb_eeprom_read_n - read count bytes from offset into val
168 static int tb_eeprom_read_n(struct tb_switch *sw, u16 offset, u8 *val,
174 res = tb_eeprom_get_drom_offset(sw, &drom_offset);
178 offset += drom_offset;
180 res = tb_eeprom_active(sw, true);
183 res = tb_eeprom_out(sw, 3);
186 res = tb_eeprom_out(sw, offset >> 8);
189 res = tb_eeprom_out(sw, offset);
192 for (i = 0; i < count; i++) {
193 res = tb_eeprom_in(sw, val + i);
197 return tb_eeprom_active(sw, false);
200 static u8 tb_crc8(u8 *data, int len)
204 for (i = 0; i < len; i++) {
206 for (j = 0; j < 8; j++)
207 val = (val << 1) ^ ((val & 0x80) ? 7 : 0);
212 static u32 tb_crc32(void *data, size_t len)
214 return ~__crc32c_le(~0, data, len);
217 #define TB_DROM_DATA_START 13
218 struct tb_drom_header {
220 u8 uid_crc8; /* checksum for uid */
224 u32 data_crc32; /* checksum for data_len bytes starting at byte 13 */
226 u8 device_rom_revision; /* should be <= 1 */
236 enum tb_drom_entry_type {
237 /* force unsigned to prevent "one-bit signed bitfield" warning */
238 TB_DROM_ENTRY_GENERIC = 0U,
242 struct tb_drom_entry_header {
245 bool port_disabled:1; /* only valid if type is TB_DROM_ENTRY_PORT */
246 enum tb_drom_entry_type type:1;
249 struct tb_drom_entry_generic {
250 struct tb_drom_entry_header header;
254 struct tb_drom_entry_port {
256 struct tb_drom_entry_header header;
258 u8 dual_link_port_rid:4;
261 bool has_dual_link_port:1;
264 u8 dual_link_port_nr:6;
267 /* BYTES 4 - 5 TODO decode */
272 /* BYTES 6-7, TODO: verify (find hardware that has these set) */
275 bool has_peer_port:1;
282 * tb_drom_read_uid_only() - Read UID directly from DROM
283 * @sw: Router whose UID to read
284 * @uid: UID is placed here
286 * Does not use the cached copy in sw->drom. Used during resume to check switch
289 int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid)
296 res = tb_eeprom_read_n(sw, 0, data, 9);
300 crc = tb_crc8(data + 1, 8);
301 if (crc != data[0]) {
302 tb_sw_warn(sw, "uid crc8 mismatch (expected: %#x, got: %#x)\n",
307 *uid = *(u64 *)(data+1);
311 static int tb_drom_parse_entry_generic(struct tb_switch *sw,
312 struct tb_drom_entry_header *header)
314 const struct tb_drom_entry_generic *entry =
315 (const struct tb_drom_entry_generic *)header;
317 switch (header->index) {
319 /* Length includes 2 bytes header so remove it before copy */
320 sw->vendor_name = kstrndup(entry->data,
321 header->len - sizeof(*header), GFP_KERNEL);
322 if (!sw->vendor_name)
327 sw->device_name = kstrndup(entry->data,
328 header->len - sizeof(*header), GFP_KERNEL);
329 if (!sw->device_name)
337 static int tb_drom_parse_entry_port(struct tb_switch *sw,
338 struct tb_drom_entry_header *header)
340 struct tb_port *port;
342 enum tb_port_type type;
345 * Some DROMs list more ports than the controller actually has
346 * so we skip those but allow the parser to continue.
348 if (header->index > sw->config.max_port_number) {
349 dev_info_once(&sw->dev, "ignoring unnecessary extra entries in DROM\n");
353 port = &sw->ports[header->index];
354 port->disabled = header->port_disabled;
358 res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1);
363 if (type == TB_TYPE_PORT) {
364 struct tb_drom_entry_port *entry = (void *) header;
365 if (header->len != sizeof(*entry)) {
367 "port entry has size %#x (expected %#zx)\n",
368 header->len, sizeof(struct tb_drom_entry_port));
371 port->link_nr = entry->link_nr;
372 if (entry->has_dual_link_port)
373 port->dual_link_port =
374 &port->sw->ports[entry->dual_link_port_nr];
380 * tb_drom_parse_entries - parse the linked list of drom entries
382 * Drom must have been copied to sw->drom.
384 static int tb_drom_parse_entries(struct tb_switch *sw)
386 struct tb_drom_header *header = (void *) sw->drom;
387 u16 pos = sizeof(*header);
388 u16 drom_size = header->data_len + TB_DROM_DATA_START;
391 while (pos < drom_size) {
392 struct tb_drom_entry_header *entry = (void *) (sw->drom + pos);
393 if (pos + 1 == drom_size || pos + entry->len > drom_size
395 tb_sw_warn(sw, "DROM buffer overrun\n");
399 switch (entry->type) {
400 case TB_DROM_ENTRY_GENERIC:
401 res = tb_drom_parse_entry_generic(sw, entry);
403 case TB_DROM_ENTRY_PORT:
404 res = tb_drom_parse_entry_port(sw, entry);
416 * tb_drom_copy_efi - copy drom supplied by EFI to sw->drom if present
418 static int tb_drom_copy_efi(struct tb_switch *sw, u16 *size)
420 struct device *dev = &sw->tb->nhi->pdev->dev;
423 len = device_property_count_u8(dev, "ThunderboltDROM");
424 if (len < 0 || len < sizeof(struct tb_drom_header))
427 sw->drom = kmalloc(len, GFP_KERNEL);
431 res = device_property_read_u8_array(dev, "ThunderboltDROM", sw->drom,
436 *size = ((struct tb_drom_header *)sw->drom)->data_len +
449 static int tb_drom_copy_nvm(struct tb_switch *sw, u16 *size)
457 ret = tb_sw_read(sw, &drom_offset, TB_CFG_SWITCH,
458 sw->cap_plug_events + 12, 1);
465 ret = dma_port_flash_read(sw->dma_port, drom_offset + 14, size,
470 /* Size includes CRC8 + UID + CRC32 */
472 sw->drom = kzalloc(*size, GFP_KERNEL);
476 ret = dma_port_flash_read(sw->dma_port, drom_offset, sw->drom, *size);
481 * Read UID from the minimal DROM because the one in NVM is just
484 tb_drom_read_uid_only(sw, &sw->uid);
493 static int usb4_copy_host_drom(struct tb_switch *sw, u16 *size)
497 ret = usb4_switch_drom_read(sw, 14, size, sizeof(*size));
501 /* Size includes CRC8 + UID + CRC32 */
503 sw->drom = kzalloc(*size, GFP_KERNEL);
507 ret = usb4_switch_drom_read(sw, 0, sw->drom, *size);
516 static int tb_drom_read_n(struct tb_switch *sw, u16 offset, u8 *val,
519 if (tb_switch_is_usb4(sw))
520 return usb4_switch_drom_read(sw, offset, val, count);
521 return tb_eeprom_read_n(sw, offset, val, count);
525 * tb_drom_read() - Copy DROM to sw->drom and parse it
526 * @sw: Router whose DROM to read and parse
528 * This function reads router DROM and if successful parses the entries and
529 * populates the fields in @sw accordingly. Can be called for any router
532 * Returns %0 in case of success and negative errno otherwise.
534 int tb_drom_read(struct tb_switch *sw)
538 struct tb_drom_header *header;
539 int res, retries = 1;
544 if (tb_route(sw) == 0) {
546 * Apple's NHI EFI driver supplies a DROM for the root switch
547 * in a device property. Use it if available.
549 if (tb_drom_copy_efi(sw, &size) == 0)
552 /* Non-Apple hardware has the DROM as part of NVM */
553 if (tb_drom_copy_nvm(sw, &size) == 0)
557 * USB4 hosts may support reading DROM through router
560 if (tb_switch_is_usb4(sw)) {
561 usb4_switch_read_uid(sw, &sw->uid);
562 if (!usb4_copy_host_drom(sw, &size))
566 * The root switch contains only a dummy drom
567 * (header only, no entries). Hardcode the
568 * configuration here.
570 tb_drom_read_uid_only(sw, &sw->uid);
576 res = tb_drom_read_n(sw, 14, (u8 *) &size, 2);
580 size += TB_DROM_DATA_START;
581 tb_sw_dbg(sw, "reading drom (length: %#x)\n", size);
582 if (size < sizeof(*header)) {
583 tb_sw_warn(sw, "drom too small, aborting\n");
587 sw->drom = kzalloc(size, GFP_KERNEL);
590 res = tb_drom_read_n(sw, 0, sw->drom, size);
595 header = (void *) sw->drom;
597 if (header->data_len + TB_DROM_DATA_START != size) {
598 tb_sw_warn(sw, "drom size mismatch, aborting\n");
602 crc = tb_crc8((u8 *) &header->uid, 8);
603 if (crc != header->uid_crc8) {
605 "drom uid crc8 mismatch (expected: %#x, got: %#x), aborting\n",
606 header->uid_crc8, crc);
610 sw->uid = header->uid;
611 sw->vendor = header->vendor_id;
612 sw->device = header->model_id;
615 crc = tb_crc32(sw->drom + TB_DROM_DATA_START, header->data_len);
616 if (crc != header->data_crc32) {
618 "drom data crc32 mismatch (expected: %#x, got: %#x), continuing\n",
619 header->data_crc32, crc);
622 if (header->device_rom_revision > 2)
623 tb_sw_warn(sw, "drom device_rom_revision %#x unknown\n",
624 header->device_rom_revision);
626 res = tb_drom_parse_entries(sw);
627 /* If the DROM parsing fails, wait a moment and retry once */
628 if (res == -EILSEQ && retries--) {
629 tb_sw_warn(sw, "parsing DROM failed, retrying\n");
631 res = tb_drom_read_n(sw, 0, sw->drom, size);