drivers/thermal/rcar_gen3_thermal.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  R-Car Gen3 THS thermal sensor driver
   4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
   5  *
   6  * Copyright (C) 2016 Renesas Electronics Corporation.
   7  * Copyright (C) 2016 Sang Engineering
   8  */
   9 #include <linux/delay.h>
  10 #include <linux/err.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/module.h>
  14 #include <linux/of_device.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/sys_soc.h>
  18 #include <linux/thermal.h>
  19
  20 #include "thermal_core.h"
  21 #include "thermal_hwmon.h"
  22
  23 /* Register offsets */
  24 #define REG_GEN3_IRQSTR         0x04
  25 #define REG_GEN3_IRQMSK         0x08
  26 #define REG_GEN3_IRQCTL         0x0C
  27 #define REG_GEN3_IRQEN          0x10
  28 #define REG_GEN3_IRQTEMP1       0x14
  29 #define REG_GEN3_IRQTEMP2       0x18
  30 #define REG_GEN3_IRQTEMP3       0x1C
  31 #define REG_GEN3_CTSR           0x20
  32 #define REG_GEN3_THCTR          0x20
  33 #define REG_GEN3_TEMP           0x28
  34 #define REG_GEN3_THCODE1        0x50
  35 #define REG_GEN3_THCODE2        0x54
  36 #define REG_GEN3_THCODE3        0x58
  37
  38 /* IRQ{STR,MSK,EN} bits */
  39 #define IRQ_TEMP1               BIT(0)
  40 #define IRQ_TEMP2               BIT(1)
  41 #define IRQ_TEMP3               BIT(2)
  42 #define IRQ_TEMPD1              BIT(3)
  43 #define IRQ_TEMPD2              BIT(4)
  44 #define IRQ_TEMPD3              BIT(5)
  45
  46 /* CTSR bits */
  47 #define CTSR_PONM       BIT(8)
  48 #define CTSR_AOUT       BIT(7)
  49 #define CTSR_THBGR      BIT(5)
  50 #define CTSR_VMEN       BIT(4)
  51 #define CTSR_VMST       BIT(1)
  52 #define CTSR_THSST      BIT(0)
  53
  54 /* THCTR bits */
  55 #define THCTR_PONM      BIT(6)
  56 #define THCTR_THSST     BIT(0)
  57
  58 #define CTEMP_MASK      0xFFF
  59
  60 #define MCELSIUS(temp)  ((temp) * 1000)
  61 #define GEN3_FUSE_MASK  0xFFF
  62
  63 #define TSC_MAX_NUM     4
  64
  65 /* default THCODE values if FUSEs are missing */
  66 static const int thcodes[TSC_MAX_NUM][3] = {
  67         { 3397, 2800, 2221 },
  68         { 3393, 2795, 2216 },
  69         { 3389, 2805, 2237 },
  70         { 3415, 2694, 2195 },
  71 };
  72
  73 /* Structure for thermal temperature calculation */
  74 struct equation_coefs {
  75         int a1;
  76         int b1;
  77         int a2;
  78         int b2;
  79 };
  80
  81 struct rcar_gen3_thermal_tsc {
  82         void __iomem *base;
  83         struct thermal_zone_device *zone;
  84         struct equation_coefs coef;
  85         int tj_t;
  86         int id; /* thermal channel id */
  87 };
  88
  89 struct rcar_gen3_thermal_priv {
  90         struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
  91         unsigned int num_tscs;
  92         void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
  93 };
  94
  95 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
  96                                          u32 reg)
  97 {
  98         return ioread32(tsc->base + reg);
  99 }
 100
 101 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
 102                                            u32 reg, u32 data)
 103 {
 104         iowrite32(data, tsc->base + reg);
 105 }
 106
 107 /*
 108  * Linear approximation for temperature
 109  *
 110  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 111  *
 112  * The constants a and b are calculated using two triplets of int values PTAT
 113  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 114  * coded values from driver. The formula to calculate a and b are taken from
 115  * BSP and sparsely documented and understood.
 116  *
 117  * Examining the linear formula and the formula used to calculate constants a
 118  * and b while knowing that the span for PTAT and THCODE values are between
 119  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 120  * Integer also needs to be signed so that leaves 7 bits for binary
 121  * fixed point scaling.
 122  */
 123
 124 #define FIXPT_SHIFT 7
 125 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
 126 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
 127 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
 128 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
 129
 130 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
 131
 132 /* no idea where these constants come from */
 133 #define TJ_3 -41
 134
 135 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
 136                                          int *ptat, const int *thcode,
 137                                          int ths_tj_1)
 138 {
 139         /* TODO: Find documentation and document constant calculation formula */
 140
 141         /*
 142          * Division is not scaled in BSP and if scaled it might overflow
 143          * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
 144          */
 145         tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
 146                      / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
 147
 148         tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
 149                                  tsc->tj_t - FIXPT_INT(TJ_3));
 150         tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
 151
 152         tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
 153                                  tsc->tj_t - FIXPT_INT(ths_tj_1));
 154         tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
 155 }
 156
 157 static int rcar_gen3_thermal_round(int temp)
 158 {
 159         int result, round_offs;
 160
 161         round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
 162                 -RCAR3_THERMAL_GRAN / 2;
 163         result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
 164         return result * RCAR3_THERMAL_GRAN;
 165 }
 166
 167 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
 168 {
 169         struct rcar_gen3_thermal_tsc *tsc = devdata;
 170         int mcelsius, val;
 171         int reg;
 172
 173         /* Read register and convert to mili Celsius */
 174         reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
 175
 176         if (reg <= thcodes[tsc->id][1])
 177                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
 178                                 tsc->coef.a1);
 179         else
 180                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
 181                                 tsc->coef.a2);
 182         mcelsius = FIXPT_TO_MCELSIUS(val);
 183
 184         /* Guaranteed operating range is -40C to 125C. */
 185
 186         /* Round value to device granularity setting */
 187         *temp = rcar_gen3_thermal_round(mcelsius);
 188
 189         return 0;
 190 }
 191
 192 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
 193         .get_temp       = rcar_gen3_thermal_get_temp,
 194 };
 195
 196 static const struct soc_device_attribute r8a7795es1[] = {
 197         { .soc_id = "r8a7795", .revision = "ES1.*" },
 198         { /* sentinel */ }
 199 };
 200
 201 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
 202 {
 203         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
 204         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
 205
 206         usleep_range(1000, 2000);
 207
 208         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
 209
 210         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
 211         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
 212
 213         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
 214                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
 215
 216         usleep_range(100, 200);
 217
 218         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
 219                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
 220                                 CTSR_VMST | CTSR_THSST);
 221
 222         usleep_range(1000, 2000);
 223 }
 224
 225 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
 226 {
 227         u32 reg_val;
 228
 229         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
 230         reg_val &= ~THCTR_PONM;
 231         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
 232
 233         usleep_range(1000, 2000);
 234
 235         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
 236         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
 237
 238         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
 239         reg_val |= THCTR_THSST;
 240         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
 241
 242         usleep_range(1000, 2000);
 243 }
 244
 245 static const int rcar_gen3_ths_tj_1 = 126;
 246 static const int rcar_gen3_ths_tj_1_m3_w = 116;
 247 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
 248         {
 249                 .compatible = "renesas,r8a774a1-thermal",
 250                 .data = &rcar_gen3_ths_tj_1_m3_w,
 251         },
 252         {
 253                 .compatible = "renesas,r8a774b1-thermal",
 254                 .data = &rcar_gen3_ths_tj_1,
 255         },
 256         {
 257                 .compatible = "renesas,r8a774e1-thermal",
 258                 .data = &rcar_gen3_ths_tj_1,
 259         },
 260         {
 261                 .compatible = "renesas,r8a7795-thermal",
 262                 .data = &rcar_gen3_ths_tj_1,
 263         },
 264         {
 265                 .compatible = "renesas,r8a7796-thermal",
 266                 .data = &rcar_gen3_ths_tj_1_m3_w,
 267         },
 268         {
 269                 .compatible = "renesas,r8a77961-thermal",
 270                 .data = &rcar_gen3_ths_tj_1_m3_w,
 271         },
 272         {
 273                 .compatible = "renesas,r8a77965-thermal",
 274                 .data = &rcar_gen3_ths_tj_1,
 275         },
 276         {
 277                 .compatible = "renesas,r8a77980-thermal",
 278                 .data = &rcar_gen3_ths_tj_1,
 279         },
 280         {
 281                 .compatible = "renesas,r8a779a0-thermal",
 282                 .data = &rcar_gen3_ths_tj_1,
 283         },
 284         {},
 285 };
 286 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
 287
 288 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
 289 {
 290         struct device *dev = &pdev->dev;
 291
 292         pm_runtime_put(dev);
 293         pm_runtime_disable(dev);
 294
 295         return 0;
 296 }
 297
 298 static void rcar_gen3_hwmon_action(void *data)
 299 {
 300         struct thermal_zone_device *zone = data;
 301
 302         thermal_remove_hwmon_sysfs(zone);
 303 }
 304
 305 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
 306 {
 307         struct rcar_gen3_thermal_priv *priv;
 308         struct device *dev = &pdev->dev;
 309         const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev);
 310         struct resource *res;
 311         struct thermal_zone_device *zone;
 312         int ret, i;
 313
 314         /* default values if FUSEs are missing */
 315         /* TODO: Read values from hardware on supported platforms */
 316         int ptat[3] = { 2631, 1509, 435 };
 317
 318         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 319         if (!priv)
 320                 return -ENOMEM;
 321
 322         priv->thermal_init = rcar_gen3_thermal_init;
 323         if (soc_device_match(r8a7795es1))
 324                 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
 325
 326         platform_set_drvdata(pdev, priv);
 327
 328         pm_runtime_enable(dev);
 329         pm_runtime_get_sync(dev);
 330
 331         for (i = 0; i < TSC_MAX_NUM; i++) {
 332                 struct rcar_gen3_thermal_tsc *tsc;
 333
 334                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
 335                 if (!res)
 336                         break;
 337
 338                 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
 339                 if (!tsc) {
 340                         ret = -ENOMEM;
 341                         goto error_unregister;
 342                 }
 343
 344                 tsc->base = devm_ioremap_resource(dev, res);
 345                 if (IS_ERR(tsc->base)) {
 346                         ret = PTR_ERR(tsc->base);
 347                         goto error_unregister;
 348                 }
 349                 tsc->id = i;
 350
 351                 priv->tscs[i] = tsc;
 352
 353                 priv->thermal_init(tsc);
 354                 rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i],
 355                                              *rcar_gen3_ths_tj_1);
 356
 357                 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
 358                                                             &rcar_gen3_tz_of_ops);
 359                 if (IS_ERR(zone)) {
 360                         dev_err(dev, "Can't register thermal zone\n");
 361                         ret = PTR_ERR(zone);
 362                         goto error_unregister;
 363                 }
 364                 tsc->zone = zone;
 365
 366                 tsc->zone->tzp->no_hwmon = false;
 367                 ret = thermal_add_hwmon_sysfs(tsc->zone);
 368                 if (ret)
 369                         goto error_unregister;
 370
 371                 ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
 372                 if (ret)
 373                         goto error_unregister;
 374
 375                 ret = of_thermal_get_ntrips(tsc->zone);
 376                 if (ret < 0)
 377                         goto error_unregister;
 378
 379                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
 380         }
 381
 382         priv->num_tscs = i;
 383
 384         if (!priv->num_tscs) {
 385                 ret = -ENODEV;
 386                 goto error_unregister;
 387         }
 388
 389         return 0;
 390
 391 error_unregister:
 392         rcar_gen3_thermal_remove(pdev);
 393
 394         return ret;
 395 }
 396
 397 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
 398 {
 399         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
 400         unsigned int i;
 401
 402         for (i = 0; i < priv->num_tscs; i++) {
 403                 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
 404
 405                 priv->thermal_init(tsc);
 406         }
 407
 408         return 0;
 409 }
 410
 411 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
 412                          rcar_gen3_thermal_resume);
 413
 414 static struct platform_driver rcar_gen3_thermal_driver = {
 415         .driver = {
 416                 .name   = "rcar_gen3_thermal",
 417                 .pm = &rcar_gen3_thermal_pm_ops,
 418                 .of_match_table = rcar_gen3_thermal_dt_ids,
 419         },
 420         .probe          = rcar_gen3_thermal_probe,
 421         .remove         = rcar_gen3_thermal_remove,
 422 };
 423 module_platform_driver(rcar_gen3_thermal_driver);
 424
 425 MODULE_LICENSE("GPL v2");
 426 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
 427 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");