1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen3 THS thermal sensor driver
4 * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
6 * Copyright (C) 2016 Renesas Electronics Corporation.
7 * Copyright (C) 2016 Sang Engineering
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
20 #include "thermal_hwmon.h"
22 /* Register offsets */
23 #define REG_GEN3_IRQSTR 0x04
24 #define REG_GEN3_IRQMSK 0x08
25 #define REG_GEN3_IRQCTL 0x0C
26 #define REG_GEN3_IRQEN 0x10
27 #define REG_GEN3_IRQTEMP1 0x14
28 #define REG_GEN3_IRQTEMP2 0x18
29 #define REG_GEN3_IRQTEMP3 0x1C
30 #define REG_GEN3_CTSR 0x20
31 #define REG_GEN3_THCTR 0x20
32 #define REG_GEN3_TEMP 0x28
33 #define REG_GEN3_THCODE1 0x50
34 #define REG_GEN3_THCODE2 0x54
35 #define REG_GEN3_THCODE3 0x58
36 #define REG_GEN3_PTAT1 0x5c
37 #define REG_GEN3_PTAT2 0x60
38 #define REG_GEN3_PTAT3 0x64
39 #define REG_GEN3_THSCP 0x68
41 /* IRQ{STR,MSK,EN} bits */
42 #define IRQ_TEMP1 BIT(0)
43 #define IRQ_TEMP2 BIT(1)
44 #define IRQ_TEMP3 BIT(2)
45 #define IRQ_TEMPD1 BIT(3)
46 #define IRQ_TEMPD2 BIT(4)
47 #define IRQ_TEMPD3 BIT(5)
50 #define CTSR_PONM BIT(8)
51 #define CTSR_AOUT BIT(7)
52 #define CTSR_THBGR BIT(5)
53 #define CTSR_VMEN BIT(4)
54 #define CTSR_VMST BIT(1)
55 #define CTSR_THSST BIT(0)
58 #define THCTR_PONM BIT(6)
59 #define THCTR_THSST BIT(0)
62 #define THSCP_COR_PARA_VLD (BIT(15) | BIT(14))
64 #define CTEMP_MASK 0xFFF
66 #define MCELSIUS(temp) ((temp) * 1000)
67 #define GEN3_FUSE_MASK 0xFFF
71 /* Structure for thermal temperature calculation */
72 struct equation_coefs {
79 struct rcar_gen3_thermal_tsc {
81 struct thermal_zone_device *zone;
82 struct equation_coefs coef;
87 struct rcar_gen3_thermal_priv {
88 struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
89 struct thermal_zone_device_ops ops;
90 unsigned int num_tscs;
91 void (*thermal_init)(struct rcar_gen3_thermal_priv *priv,
92 struct rcar_gen3_thermal_tsc *tsc);
96 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
99 return ioread32(tsc->base + reg);
102 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
105 iowrite32(data, tsc->base + reg);
109 * Linear approximation for temperature
111 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
113 * The constants a and b are calculated using two triplets of int values PTAT
114 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
115 * coded values from driver. The formula to calculate a and b are taken from
116 * BSP and sparsely documented and understood.
118 * Examining the linear formula and the formula used to calculate constants a
119 * and b while knowing that the span for PTAT and THCODE values are between
120 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
121 * Integer also needs to be signed so that leaves 7 bits for binary
122 * fixed point scaling.
125 #define FIXPT_SHIFT 7
126 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
127 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
128 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
129 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
131 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
133 /* no idea where these constants come from */
136 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
137 struct rcar_gen3_thermal_tsc *tsc,
140 /* TODO: Find documentation and document constant calculation formula */
143 * Division is not scaled in BSP and if scaled it might overflow
144 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
146 tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
147 / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
149 tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
150 tsc->tj_t - FIXPT_INT(TJ_3));
151 tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
153 tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
154 tsc->tj_t - FIXPT_INT(ths_tj_1));
155 tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
158 static int rcar_gen3_thermal_round(int temp)
160 int result, round_offs;
162 round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
163 -RCAR3_THERMAL_GRAN / 2;
164 result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
165 return result * RCAR3_THERMAL_GRAN;
168 static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
170 struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
174 /* Read register and convert to mili Celsius */
175 reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
177 if (reg <= tsc->thcode[1])
178 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
181 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
183 mcelsius = FIXPT_TO_MCELSIUS(val);
185 /* Guaranteed operating range is -40C to 125C. */
187 /* Round value to device granularity setting */
188 *temp = rcar_gen3_thermal_round(mcelsius);
193 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
198 celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
199 if (celsius <= INT_FIXPT(tsc->tj_t))
200 val = celsius * tsc->coef.a1 + tsc->coef.b1;
202 val = celsius * tsc->coef.a2 + tsc->coef.b2;
204 return INT_FIXPT(val);
207 static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
209 struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
212 if (low != -INT_MAX) {
213 irqmsk |= IRQ_TEMPD1;
214 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
215 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
218 if (high != INT_MAX) {
220 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
221 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
224 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
229 static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
230 .get_temp = rcar_gen3_thermal_get_temp,
231 .set_trips = rcar_gen3_thermal_set_trips,
234 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
236 struct rcar_gen3_thermal_priv *priv = data;
240 for (i = 0; i < priv->num_tscs; i++) {
241 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
242 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
243 if (status && priv->tscs[i]->zone)
244 thermal_zone_device_update(priv->tscs[i]->zone,
245 THERMAL_EVENT_UNSPECIFIED);
251 static const struct soc_device_attribute r8a7795es1[] = {
252 { .soc_id = "r8a7795", .revision = "ES1.*" },
256 static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
261 /* If fuses are not set, fallback to pseudo values. */
262 thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
263 if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
264 /* Default THCODE values in case FUSEs are not set. */
265 static const int thcodes[TSC_MAX_NUM][3] = {
266 { 3397, 2800, 2221 },
267 { 3393, 2795, 2216 },
268 { 3389, 2805, 2237 },
269 { 3415, 2694, 2195 },
270 { 3356, 2724, 2244 },
273 priv->ptat[0] = 2631;
274 priv->ptat[1] = 1509;
277 for (i = 0; i < priv->num_tscs; i++) {
278 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
280 tsc->thcode[0] = thcodes[i][0];
281 tsc->thcode[1] = thcodes[i][1];
282 tsc->thcode[2] = thcodes[i][2];
289 * Set the pseudo calibration points with fused values.
290 * PTAT is shared between all TSCs but only fused for the first
291 * TSC while THCODEs are fused for each TSC.
293 priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
295 priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
297 priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
300 for (i = 0; i < priv->num_tscs; i++) {
301 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
303 tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
305 tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
307 tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
314 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_priv *priv,
315 struct rcar_gen3_thermal_tsc *tsc)
317 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
318 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
320 usleep_range(1000, 2000);
322 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
324 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
325 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
326 if (priv->ops.set_trips)
327 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
328 IRQ_TEMPD1 | IRQ_TEMP2);
330 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
331 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
333 usleep_range(100, 200);
335 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
336 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
337 CTSR_VMST | CTSR_THSST);
339 usleep_range(1000, 2000);
342 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
343 struct rcar_gen3_thermal_tsc *tsc)
347 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
348 reg_val &= ~THCTR_PONM;
349 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
351 usleep_range(1000, 2000);
353 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
354 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
355 if (priv->ops.set_trips)
356 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
357 IRQ_TEMPD1 | IRQ_TEMP2);
359 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
360 reg_val |= THCTR_THSST;
361 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
363 usleep_range(1000, 2000);
366 static const int rcar_gen3_ths_tj_1 = 126;
367 static const int rcar_gen3_ths_tj_1_m3_w = 116;
368 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
370 .compatible = "renesas,r8a774a1-thermal",
371 .data = &rcar_gen3_ths_tj_1_m3_w,
374 .compatible = "renesas,r8a774b1-thermal",
375 .data = &rcar_gen3_ths_tj_1,
378 .compatible = "renesas,r8a774e1-thermal",
379 .data = &rcar_gen3_ths_tj_1,
382 .compatible = "renesas,r8a7795-thermal",
383 .data = &rcar_gen3_ths_tj_1,
386 .compatible = "renesas,r8a7796-thermal",
387 .data = &rcar_gen3_ths_tj_1_m3_w,
390 .compatible = "renesas,r8a77961-thermal",
391 .data = &rcar_gen3_ths_tj_1_m3_w,
394 .compatible = "renesas,r8a77965-thermal",
395 .data = &rcar_gen3_ths_tj_1,
398 .compatible = "renesas,r8a77980-thermal",
399 .data = &rcar_gen3_ths_tj_1,
402 .compatible = "renesas,r8a779a0-thermal",
403 .data = &rcar_gen3_ths_tj_1,
406 .compatible = "renesas,r8a779f0-thermal",
407 .data = &rcar_gen3_ths_tj_1,
410 .compatible = "renesas,r8a779g0-thermal",
411 .data = &rcar_gen3_ths_tj_1,
415 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
417 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
419 struct device *dev = &pdev->dev;
422 pm_runtime_disable(dev);
427 static void rcar_gen3_hwmon_action(void *data)
429 struct thermal_zone_device *zone = data;
431 thermal_remove_hwmon_sysfs(zone);
434 static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
435 struct platform_device *pdev)
437 struct device *dev = &pdev->dev;
442 for (i = 0; i < 2; i++) {
443 irq = platform_get_irq_optional(pdev, i);
447 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
452 ret = devm_request_threaded_irq(dev, irq, NULL,
453 rcar_gen3_thermal_irq,
454 IRQF_ONESHOT, irqname, priv);
462 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
464 struct rcar_gen3_thermal_priv *priv;
465 struct device *dev = &pdev->dev;
466 const int *ths_tj_1 = of_device_get_match_data(dev);
467 struct resource *res;
468 struct thermal_zone_device *zone;
472 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
476 priv->ops = rcar_gen3_tz_of_ops;
477 priv->thermal_init = rcar_gen3_thermal_init;
478 if (soc_device_match(r8a7795es1))
479 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
481 platform_set_drvdata(pdev, priv);
483 if (rcar_gen3_thermal_request_irqs(priv, pdev))
484 priv->ops.set_trips = NULL;
486 pm_runtime_enable(dev);
487 pm_runtime_get_sync(dev);
489 for (i = 0; i < TSC_MAX_NUM; i++) {
490 struct rcar_gen3_thermal_tsc *tsc;
492 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
496 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
499 goto error_unregister;
502 tsc->base = devm_ioremap_resource(dev, res);
503 if (IS_ERR(tsc->base)) {
504 ret = PTR_ERR(tsc->base);
505 goto error_unregister;
513 if (!rcar_gen3_thermal_read_fuses(priv))
514 dev_info(dev, "No calibration values fused, fallback to driver values\n");
516 for (i = 0; i < priv->num_tscs; i++) {
517 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
519 priv->thermal_init(priv, tsc);
520 rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
522 zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
524 dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
526 goto error_unregister;
530 tsc->zone->tzp->no_hwmon = false;
531 ret = thermal_add_hwmon_sysfs(tsc->zone);
533 goto error_unregister;
535 ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
537 goto error_unregister;
539 ret = thermal_zone_get_num_trips(tsc->zone);
541 goto error_unregister;
543 dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
546 if (!priv->num_tscs) {
548 goto error_unregister;
554 rcar_gen3_thermal_remove(pdev);
559 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
561 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
564 for (i = 0; i < priv->num_tscs; i++) {
565 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
567 priv->thermal_init(priv, tsc);
573 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
574 rcar_gen3_thermal_resume);
576 static struct platform_driver rcar_gen3_thermal_driver = {
578 .name = "rcar_gen3_thermal",
579 .pm = &rcar_gen3_thermal_pm_ops,
580 .of_match_table = rcar_gen3_thermal_dt_ids,
582 .probe = rcar_gen3_thermal_probe,
583 .remove = rcar_gen3_thermal_remove,
585 module_platform_driver(rcar_gen3_thermal_driver);
587 MODULE_LICENSE("GPL v2");
588 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
589 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");