s390/qeth: cache max number of available buffer elements
[linux-2.6-microblaze.git] / drivers / thermal / rcar_gen3_thermal.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  R-Car Gen3 THS thermal sensor driver
4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
5  *
6  * Copyright (C) 2016 Renesas Electronics Corporation.
7  * Copyright (C) 2016 Sang Engineering
8  */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/spinlock.h>
18 #include <linux/sys_soc.h>
19 #include <linux/thermal.h>
20
21 #include "thermal_core.h"
22 #include "thermal_hwmon.h"
23
24 /* Register offsets */
25 #define REG_GEN3_IRQSTR         0x04
26 #define REG_GEN3_IRQMSK         0x08
27 #define REG_GEN3_IRQCTL         0x0C
28 #define REG_GEN3_IRQEN          0x10
29 #define REG_GEN3_IRQTEMP1       0x14
30 #define REG_GEN3_IRQTEMP2       0x18
31 #define REG_GEN3_IRQTEMP3       0x1C
32 #define REG_GEN3_CTSR           0x20
33 #define REG_GEN3_THCTR          0x20
34 #define REG_GEN3_TEMP           0x28
35 #define REG_GEN3_THCODE1        0x50
36 #define REG_GEN3_THCODE2        0x54
37 #define REG_GEN3_THCODE3        0x58
38
39 /* IRQ{STR,MSK,EN} bits */
40 #define IRQ_TEMP1               BIT(0)
41 #define IRQ_TEMP2               BIT(1)
42 #define IRQ_TEMP3               BIT(2)
43 #define IRQ_TEMPD1              BIT(3)
44 #define IRQ_TEMPD2              BIT(4)
45 #define IRQ_TEMPD3              BIT(5)
46
47 /* CTSR bits */
48 #define CTSR_PONM       BIT(8)
49 #define CTSR_AOUT       BIT(7)
50 #define CTSR_THBGR      BIT(5)
51 #define CTSR_VMEN       BIT(4)
52 #define CTSR_VMST       BIT(1)
53 #define CTSR_THSST      BIT(0)
54
55 /* THCTR bits */
56 #define THCTR_PONM      BIT(6)
57 #define THCTR_THSST     BIT(0)
58
59 #define CTEMP_MASK      0xFFF
60
61 #define MCELSIUS(temp)  ((temp) * 1000)
62 #define GEN3_FUSE_MASK  0xFFF
63
64 #define TSC_MAX_NUM     3
65
66 /* Structure for thermal temperature calculation */
67 struct equation_coefs {
68         int a1;
69         int b1;
70         int a2;
71         int b2;
72 };
73
74 struct rcar_gen3_thermal_tsc {
75         void __iomem *base;
76         struct thermal_zone_device *zone;
77         struct equation_coefs coef;
78         int low;
79         int high;
80 };
81
82 struct rcar_gen3_thermal_priv {
83         struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
84         unsigned int num_tscs;
85         spinlock_t lock; /* Protect interrupts on and off */
86         void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
87 };
88
89 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
90                                          u32 reg)
91 {
92         return ioread32(tsc->base + reg);
93 }
94
95 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
96                                            u32 reg, u32 data)
97 {
98         iowrite32(data, tsc->base + reg);
99 }
100
101 /*
102  * Linear approximation for temperature
103  *
104  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
105  *
106  * The constants a and b are calculated using two triplets of int values PTAT
107  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
108  * coded values from driver. The formula to calculate a and b are taken from
109  * BSP and sparsely documented and understood.
110  *
111  * Examining the linear formula and the formula used to calculate constants a
112  * and b while knowing that the span for PTAT and THCODE values are between
113  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
114  * Integer also needs to be signed so that leaves 7 bits for binary
115  * fixed point scaling.
116  */
117
118 #define FIXPT_SHIFT 7
119 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
120 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
121 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
122 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
123
124 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
125
126 /* no idea where these constants come from */
127 #define TJ_1 116
128 #define TJ_3 -41
129
130 static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
131                                          int *ptat, int *thcode)
132 {
133         int tj_2;
134
135         /* TODO: Find documentation and document constant calculation formula */
136
137         /*
138          * Division is not scaled in BSP and if scaled it might overflow
139          * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
140          */
141         tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
142                 / (ptat[0] - ptat[2])) - FIXPT_INT(41);
143
144         coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
145                              tj_2 - FIXPT_INT(TJ_3));
146         coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
147
148         coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
149                              tj_2 - FIXPT_INT(TJ_1));
150         coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
151 }
152
153 static int rcar_gen3_thermal_round(int temp)
154 {
155         int result, round_offs;
156
157         round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
158                 -RCAR3_THERMAL_GRAN / 2;
159         result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
160         return result * RCAR3_THERMAL_GRAN;
161 }
162
163 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
164 {
165         struct rcar_gen3_thermal_tsc *tsc = devdata;
166         int mcelsius, val1, val2;
167         u32 reg;
168
169         /* Read register and convert to mili Celsius */
170         reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
171
172         val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
173         val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
174         mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
175
176         /* Make sure we are inside specifications */
177         if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
178                 return -EIO;
179
180         /* Round value to device granularity setting */
181         *temp = rcar_gen3_thermal_round(mcelsius);
182
183         return 0;
184 }
185
186 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
187                                               int mcelsius)
188 {
189         int celsius, val1, val2;
190
191         celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
192         val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
193         val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
194
195         return INT_FIXPT((val1 + val2) / 2);
196 }
197
198 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
199 {
200         struct rcar_gen3_thermal_tsc *tsc = devdata;
201
202         low = clamp_val(low, -40000, 120000);
203         high = clamp_val(high, -40000, 120000);
204
205         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
206                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
207
208         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
209                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
210
211         tsc->low = low;
212         tsc->high = high;
213
214         return 0;
215 }
216
217 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
218         .get_temp       = rcar_gen3_thermal_get_temp,
219         .set_trips      = rcar_gen3_thermal_set_trips,
220 };
221
222 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
223 {
224         unsigned int i;
225         u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
226
227         for (i = 0; i < priv->num_tscs; i++)
228                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
229 }
230
231 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
232 {
233         struct rcar_gen3_thermal_priv *priv = data;
234         u32 status;
235         int i, ret = IRQ_HANDLED;
236
237         spin_lock(&priv->lock);
238         for (i = 0; i < priv->num_tscs; i++) {
239                 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
240                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
241                 if (status)
242                         ret = IRQ_WAKE_THREAD;
243         }
244
245         if (ret == IRQ_WAKE_THREAD)
246                 rcar_thermal_irq_set(priv, false);
247
248         spin_unlock(&priv->lock);
249
250         return ret;
251 }
252
253 static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
254 {
255         struct rcar_gen3_thermal_priv *priv = data;
256         unsigned long flags;
257         int i;
258
259         for (i = 0; i < priv->num_tscs; i++)
260                 thermal_zone_device_update(priv->tscs[i]->zone,
261                                            THERMAL_EVENT_UNSPECIFIED);
262
263         spin_lock_irqsave(&priv->lock, flags);
264         rcar_thermal_irq_set(priv, true);
265         spin_unlock_irqrestore(&priv->lock, flags);
266
267         return IRQ_HANDLED;
268 }
269
270 static const struct soc_device_attribute r8a7795es1[] = {
271         { .soc_id = "r8a7795", .revision = "ES1.*" },
272         { /* sentinel */ }
273 };
274
275 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
276 {
277         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
278         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
279
280         usleep_range(1000, 2000);
281
282         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
283
284         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
285         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
286         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
287
288         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
289                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
290
291         usleep_range(100, 200);
292
293         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
294                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
295                                 CTSR_VMST | CTSR_THSST);
296
297         usleep_range(1000, 2000);
298 }
299
300 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
301 {
302         u32 reg_val;
303
304         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
305         reg_val &= ~THCTR_PONM;
306         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
307
308         usleep_range(1000, 2000);
309
310         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
311         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
312         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
313
314         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
315         reg_val |= THCTR_THSST;
316         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
317
318         usleep_range(1000, 2000);
319 }
320
321 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
322         { .compatible = "renesas,r8a774a1-thermal", },
323         { .compatible = "renesas,r8a7795-thermal", },
324         { .compatible = "renesas,r8a7796-thermal", },
325         { .compatible = "renesas,r8a77965-thermal", },
326         { .compatible = "renesas,r8a77980-thermal", },
327         {},
328 };
329 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
330
331 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
332 {
333         struct device *dev = &pdev->dev;
334
335         pm_runtime_put(dev);
336         pm_runtime_disable(dev);
337
338         return 0;
339 }
340
341 static void rcar_gen3_hwmon_action(void *data)
342 {
343         struct thermal_zone_device *zone = data;
344
345         thermal_remove_hwmon_sysfs(zone);
346 }
347
348 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
349 {
350         struct rcar_gen3_thermal_priv *priv;
351         struct device *dev = &pdev->dev;
352         struct resource *res;
353         struct thermal_zone_device *zone;
354         int ret, irq, i;
355         char *irqname;
356
357         /* default values if FUSEs are missing */
358         /* TODO: Read values from hardware on supported platforms */
359         int ptat[3] = { 2631, 1509, 435 };
360         int thcode[TSC_MAX_NUM][3] = {
361                 { 3397, 2800, 2221 },
362                 { 3393, 2795, 2216 },
363                 { 3389, 2805, 2237 },
364         };
365
366         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
367         if (!priv)
368                 return -ENOMEM;
369
370         priv->thermal_init = rcar_gen3_thermal_init;
371         if (soc_device_match(r8a7795es1))
372                 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
373
374         spin_lock_init(&priv->lock);
375
376         platform_set_drvdata(pdev, priv);
377
378         /*
379          * Request 2 (of the 3 possible) IRQs, the driver only needs to
380          * to trigger on the low and high trip points of the current
381          * temp window at this point.
382          */
383         for (i = 0; i < 2; i++) {
384                 irq = platform_get_irq(pdev, i);
385                 if (irq < 0)
386                         return irq;
387
388                 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
389                                          dev_name(dev), i);
390                 if (!irqname)
391                         return -ENOMEM;
392
393                 ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
394                                                 rcar_gen3_thermal_irq_thread,
395                                                 IRQF_SHARED, irqname, priv);
396                 if (ret)
397                         return ret;
398         }
399
400         pm_runtime_enable(dev);
401         pm_runtime_get_sync(dev);
402
403         for (i = 0; i < TSC_MAX_NUM; i++) {
404                 struct rcar_gen3_thermal_tsc *tsc;
405
406                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
407                 if (!res)
408                         break;
409
410                 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
411                 if (!tsc) {
412                         ret = -ENOMEM;
413                         goto error_unregister;
414                 }
415
416                 tsc->base = devm_ioremap_resource(dev, res);
417                 if (IS_ERR(tsc->base)) {
418                         ret = PTR_ERR(tsc->base);
419                         goto error_unregister;
420                 }
421
422                 priv->tscs[i] = tsc;
423
424                 priv->thermal_init(tsc);
425                 rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
426
427                 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
428                                                             &rcar_gen3_tz_of_ops);
429                 if (IS_ERR(zone)) {
430                         dev_err(dev, "Can't register thermal zone\n");
431                         ret = PTR_ERR(zone);
432                         goto error_unregister;
433                 }
434                 tsc->zone = zone;
435
436                 ret = of_thermal_get_ntrips(tsc->zone);
437                 if (ret < 0)
438                         goto error_unregister;
439
440                 tsc->zone->tzp->no_hwmon = false;
441                 ret = thermal_add_hwmon_sysfs(tsc->zone);
442                 if (ret)
443                         goto error_unregister;
444
445                 ret = devm_add_action(dev, rcar_gen3_hwmon_action, zone);
446                 if (ret) {
447                         rcar_gen3_hwmon_action(zone);
448                         goto error_unregister;
449                 }
450
451                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
452         }
453
454         priv->num_tscs = i;
455
456         if (!priv->num_tscs) {
457                 ret = -ENODEV;
458                 goto error_unregister;
459         }
460
461         rcar_thermal_irq_set(priv, true);
462
463         return 0;
464
465 error_unregister:
466         rcar_gen3_thermal_remove(pdev);
467
468         return ret;
469 }
470
471 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
472 {
473         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
474
475         rcar_thermal_irq_set(priv, false);
476
477         return 0;
478 }
479
480 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
481 {
482         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
483         unsigned int i;
484
485         for (i = 0; i < priv->num_tscs; i++) {
486                 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
487
488                 priv->thermal_init(tsc);
489                 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
490         }
491
492         rcar_thermal_irq_set(priv, true);
493
494         return 0;
495 }
496
497 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
498                          rcar_gen3_thermal_resume);
499
500 static struct platform_driver rcar_gen3_thermal_driver = {
501         .driver = {
502                 .name   = "rcar_gen3_thermal",
503                 .pm = &rcar_gen3_thermal_pm_ops,
504                 .of_match_table = rcar_gen3_thermal_dt_ids,
505         },
506         .probe          = rcar_gen3_thermal_probe,
507         .remove         = rcar_gen3_thermal_remove,
508 };
509 module_platform_driver(rcar_gen3_thermal_driver);
510
511 MODULE_LICENSE("GPL v2");
512 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
513 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");