drivers/thermal/rcar_gen3_thermal.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  R-Car Gen3 THS thermal sensor driver
   4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
   5  *
   6  * Copyright (C) 2016 Renesas Electronics Corporation.
   7  * Copyright (C) 2016 Sang Engineering
   8  */
   9 #include <linux/delay.h>
  10 #include <linux/err.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/module.h>
  14 #include <linux/of_device.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pm_runtime.h>
  17 #include <linux/sys_soc.h>
  18 #include <linux/thermal.h>
  19
  20 #include "thermal_core.h"
  21 #include "thermal_hwmon.h"
  22
  23 /* Register offsets */
  24 #define REG_GEN3_IRQSTR         0x04
  25 #define REG_GEN3_IRQMSK         0x08
  26 #define REG_GEN3_IRQCTL         0x0C
  27 #define REG_GEN3_IRQEN          0x10
  28 #define REG_GEN3_IRQTEMP1       0x14
  29 #define REG_GEN3_IRQTEMP2       0x18
  30 #define REG_GEN3_IRQTEMP3       0x1C
  31 #define REG_GEN3_CTSR           0x20
  32 #define REG_GEN3_THCTR          0x20
  33 #define REG_GEN3_TEMP           0x28
  34 #define REG_GEN3_THCODE1        0x50
  35 #define REG_GEN3_THCODE2        0x54
  36 #define REG_GEN3_THCODE3        0x58
  37
  38 /* IRQ{STR,MSK,EN} bits */
  39 #define IRQ_TEMP1               BIT(0)
  40 #define IRQ_TEMP2               BIT(1)
  41 #define IRQ_TEMP3               BIT(2)
  42 #define IRQ_TEMPD1              BIT(3)
  43 #define IRQ_TEMPD2              BIT(4)
  44 #define IRQ_TEMPD3              BIT(5)
  45
  46 /* CTSR bits */
  47 #define CTSR_PONM       BIT(8)
  48 #define CTSR_AOUT       BIT(7)
  49 #define CTSR_THBGR      BIT(5)
  50 #define CTSR_VMEN       BIT(4)
  51 #define CTSR_VMST       BIT(1)
  52 #define CTSR_THSST      BIT(0)
  53
  54 /* THCTR bits */
  55 #define THCTR_PONM      BIT(6)
  56 #define THCTR_THSST     BIT(0)
  57
  58 #define CTEMP_MASK      0xFFF
  59
  60 #define MCELSIUS(temp)  ((temp) * 1000)
  61 #define GEN3_FUSE_MASK  0xFFF
  62
  63 #define TSC_MAX_NUM     3
  64
  65 /* default THCODE values if FUSEs are missing */
  66 static const int thcodes[TSC_MAX_NUM][3] = {
  67         { 3397, 2800, 2221 },
  68         { 3393, 2795, 2216 },
  69         { 3389, 2805, 2237 },
  70 };
  71
  72 /* Structure for thermal temperature calculation */
  73 struct equation_coefs {
  74         int a1;
  75         int b1;
  76         int a2;
  77         int b2;
  78 };
  79
  80 struct rcar_gen3_thermal_tsc {
  81         void __iomem *base;
  82         struct thermal_zone_device *zone;
  83         struct equation_coefs coef;
  84         int tj_t;
  85         int id; /* thermal channel id */
  86 };
  87
  88 struct rcar_gen3_thermal_priv {
  89         struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
  90         unsigned int num_tscs;
  91         void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
  92 };
  93
  94 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
  95                                          u32 reg)
  96 {
  97         return ioread32(tsc->base + reg);
  98 }
  99
 100 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
 101                                            u32 reg, u32 data)
 102 {
 103         iowrite32(data, tsc->base + reg);
 104 }
 105
 106 /*
 107  * Linear approximation for temperature
 108  *
 109  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 110  *
 111  * The constants a and b are calculated using two triplets of int values PTAT
 112  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 113  * coded values from driver. The formula to calculate a and b are taken from
 114  * BSP and sparsely documented and understood.
 115  *
 116  * Examining the linear formula and the formula used to calculate constants a
 117  * and b while knowing that the span for PTAT and THCODE values are between
 118  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 119  * Integer also needs to be signed so that leaves 7 bits for binary
 120  * fixed point scaling.
 121  */
 122
 123 #define FIXPT_SHIFT 7
 124 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
 125 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
 126 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
 127 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
 128
 129 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
 130
 131 /* no idea where these constants come from */
 132 #define TJ_3 -41
 133
 134 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
 135                                          int *ptat, const int *thcode,
 136                                          int ths_tj_1)
 137 {
 138         /* TODO: Find documentation and document constant calculation formula */
 139
 140         /*
 141          * Division is not scaled in BSP and if scaled it might overflow
 142          * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
 143          */
 144         tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
 145                      / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
 146
 147         tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
 148                                  tsc->tj_t - FIXPT_INT(TJ_3));
 149         tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
 150
 151         tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
 152                                  tsc->tj_t - FIXPT_INT(ths_tj_1));
 153         tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
 154 }
 155
 156 static int rcar_gen3_thermal_round(int temp)
 157 {
 158         int result, round_offs;
 159
 160         round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
 161                 -RCAR3_THERMAL_GRAN / 2;
 162         result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
 163         return result * RCAR3_THERMAL_GRAN;
 164 }
 165
 166 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
 167 {
 168         struct rcar_gen3_thermal_tsc *tsc = devdata;
 169         int mcelsius, val;
 170         u32 reg;
 171
 172         /* Read register and convert to mili Celsius */
 173         reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
 174
 175         if (reg <= thcodes[tsc->id][1])
 176                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
 177                                 tsc->coef.a1);
 178         else
 179                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
 180                                 tsc->coef.a2);
 181         mcelsius = FIXPT_TO_MCELSIUS(val);
 182
 183         /* Guaranteed operating range is -40C to 125C. */
 184
 185         /* Round value to device granularity setting */
 186         *temp = rcar_gen3_thermal_round(mcelsius);
 187
 188         return 0;
 189 }
 190
 191 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
 192                                               int mcelsius)
 193 {
 194         int celsius, val;
 195
 196         celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
 197         if (celsius <= INT_FIXPT(tsc->tj_t))
 198                 val = celsius * tsc->coef.a1 + tsc->coef.b1;
 199         else
 200                 val = celsius * tsc->coef.a2 + tsc->coef.b2;
 201
 202         return INT_FIXPT(val);
 203 }
 204
 205 static int rcar_gen3_thermal_update_range(struct rcar_gen3_thermal_tsc *tsc)
 206 {
 207         int temperature, low, high;
 208
 209         rcar_gen3_thermal_get_temp(tsc, &temperature);
 210
 211         low = temperature - MCELSIUS(1);
 212         high = temperature + MCELSIUS(1);
 213
 214         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
 215                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
 216
 217         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
 218                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
 219
 220         return 0;
 221 }
 222
 223 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
 224         .get_temp       = rcar_gen3_thermal_get_temp,
 225 };
 226
 227 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
 228 {
 229         unsigned int i;
 230         u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
 231
 232         for (i = 0; i < priv->num_tscs; i++)
 233                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
 234 }
 235
 236 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
 237 {
 238         struct rcar_gen3_thermal_priv *priv = data;
 239         u32 status;
 240         int i;
 241
 242         for (i = 0; i < priv->num_tscs; i++) {
 243                 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
 244                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
 245                 if (status) {
 246                         rcar_gen3_thermal_update_range(priv->tscs[i]);
 247                         thermal_zone_device_update(priv->tscs[i]->zone,
 248                                                    THERMAL_EVENT_UNSPECIFIED);
 249                 }
 250         }
 251
 252         return IRQ_HANDLED;
 253 }
 254
 255 static const struct soc_device_attribute r8a7795es1[] = {
 256         { .soc_id = "r8a7795", .revision = "ES1.*" },
 257         { /* sentinel */ }
 258 };
 259
 260 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
 261 {
 262         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
 263         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
 264
 265         usleep_range(1000, 2000);
 266
 267         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
 268
 269         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
 270         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
 271         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
 272
 273         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
 274                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
 275
 276         usleep_range(100, 200);
 277
 278         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
 279                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
 280                                 CTSR_VMST | CTSR_THSST);
 281
 282         usleep_range(1000, 2000);
 283 }
 284
 285 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
 286 {
 287         u32 reg_val;
 288
 289         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
 290         reg_val &= ~THCTR_PONM;
 291         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
 292
 293         usleep_range(1000, 2000);
 294
 295         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
 296         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
 297         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
 298
 299         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
 300         reg_val |= THCTR_THSST;
 301         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
 302
 303         usleep_range(1000, 2000);
 304 }
 305
 306 static const int rcar_gen3_ths_tj_1 = 126;
 307 static const int rcar_gen3_ths_tj_1_m3_w = 116;
 308 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
 309         {
 310                 .compatible = "renesas,r8a774a1-thermal",
 311                 .data = &rcar_gen3_ths_tj_1_m3_w,
 312         },
 313         {
 314                 .compatible = "renesas,r8a774b1-thermal",
 315                 .data = &rcar_gen3_ths_tj_1,
 316         },
 317         {
 318                 .compatible = "renesas,r8a774e1-thermal",
 319                 .data = &rcar_gen3_ths_tj_1,
 320         },
 321         {
 322                 .compatible = "renesas,r8a7795-thermal",
 323                 .data = &rcar_gen3_ths_tj_1,
 324         },
 325         {
 326                 .compatible = "renesas,r8a7796-thermal",
 327                 .data = &rcar_gen3_ths_tj_1_m3_w,
 328         },
 329         {
 330                 .compatible = "renesas,r8a77961-thermal",
 331                 .data = &rcar_gen3_ths_tj_1_m3_w,
 332         },
 333         {
 334                 .compatible = "renesas,r8a77965-thermal",
 335                 .data = &rcar_gen3_ths_tj_1,
 336         },
 337         {
 338                 .compatible = "renesas,r8a77980-thermal",
 339                 .data = &rcar_gen3_ths_tj_1,
 340         },
 341         {},
 342 };
 343 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
 344
 345 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
 346 {
 347         struct device *dev = &pdev->dev;
 348         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
 349
 350         rcar_thermal_irq_set(priv, false);
 351
 352         pm_runtime_put(dev);
 353         pm_runtime_disable(dev);
 354
 355         return 0;
 356 }
 357
 358 static void rcar_gen3_hwmon_action(void *data)
 359 {
 360         struct thermal_zone_device *zone = data;
 361
 362         thermal_remove_hwmon_sysfs(zone);
 363 }
 364
 365 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
 366 {
 367         struct rcar_gen3_thermal_priv *priv;
 368         struct device *dev = &pdev->dev;
 369         const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev);
 370         struct resource *res;
 371         struct thermal_zone_device *zone;
 372         int ret, irq, i;
 373         char *irqname;
 374
 375         /* default values if FUSEs are missing */
 376         /* TODO: Read values from hardware on supported platforms */
 377         int ptat[3] = { 2631, 1509, 435 };
 378
 379         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 380         if (!priv)
 381                 return -ENOMEM;
 382
 383         priv->thermal_init = rcar_gen3_thermal_init;
 384         if (soc_device_match(r8a7795es1))
 385                 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
 386
 387         platform_set_drvdata(pdev, priv);
 388
 389         /*
 390          * Request 2 (of the 3 possible) IRQs, the driver only needs to
 391          * to trigger on the low and high trip points of the current
 392          * temp window at this point.
 393          */
 394         for (i = 0; i < 2; i++) {
 395                 irq = platform_get_irq(pdev, i);
 396                 if (irq < 0)
 397                         return irq;
 398
 399                 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
 400                                          dev_name(dev), i);
 401                 if (!irqname)
 402                         return -ENOMEM;
 403
 404                 ret = devm_request_threaded_irq(dev, irq, NULL,
 405                                                 rcar_gen3_thermal_irq,
 406                                                 IRQF_ONESHOT, irqname, priv);
 407                 if (ret)
 408                         return ret;
 409         }
 410
 411         pm_runtime_enable(dev);
 412         pm_runtime_get_sync(dev);
 413
 414         for (i = 0; i < TSC_MAX_NUM; i++) {
 415                 struct rcar_gen3_thermal_tsc *tsc;
 416
 417                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
 418                 if (!res)
 419                         break;
 420
 421                 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
 422                 if (!tsc) {
 423                         ret = -ENOMEM;
 424                         goto error_unregister;
 425                 }
 426
 427                 tsc->base = devm_ioremap_resource(dev, res);
 428                 if (IS_ERR(tsc->base)) {
 429                         ret = PTR_ERR(tsc->base);
 430                         goto error_unregister;
 431                 }
 432                 tsc->id = i;
 433
 434                 priv->tscs[i] = tsc;
 435
 436                 priv->thermal_init(tsc);
 437                 rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i],
 438                                              *rcar_gen3_ths_tj_1);
 439
 440                 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
 441                                                             &rcar_gen3_tz_of_ops);
 442                 if (IS_ERR(zone)) {
 443                         dev_err(dev, "Can't register thermal zone\n");
 444                         ret = PTR_ERR(zone);
 445                         goto error_unregister;
 446                 }
 447                 tsc->zone = zone;
 448
 449                 tsc->zone->tzp->no_hwmon = false;
 450                 ret = thermal_add_hwmon_sysfs(tsc->zone);
 451                 if (ret)
 452                         goto error_unregister;
 453
 454                 ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
 455                 if (ret)
 456                         goto error_unregister;
 457
 458                 ret = of_thermal_get_ntrips(tsc->zone);
 459                 if (ret < 0)
 460                         goto error_unregister;
 461
 462                 rcar_gen3_thermal_update_range(tsc);
 463
 464                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
 465         }
 466
 467         priv->num_tscs = i;
 468
 469         if (!priv->num_tscs) {
 470                 ret = -ENODEV;
 471                 goto error_unregister;
 472         }
 473
 474         rcar_thermal_irq_set(priv, true);
 475
 476         return 0;
 477
 478 error_unregister:
 479         rcar_gen3_thermal_remove(pdev);
 480
 481         return ret;
 482 }
 483
 484 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
 485 {
 486         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
 487
 488         rcar_thermal_irq_set(priv, false);
 489
 490         return 0;
 491 }
 492
 493 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
 494 {
 495         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
 496         unsigned int i;
 497
 498         for (i = 0; i < priv->num_tscs; i++) {
 499                 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
 500
 501                 priv->thermal_init(tsc);
 502                 rcar_gen3_thermal_update_range(tsc);
 503         }
 504
 505         rcar_thermal_irq_set(priv, true);
 506
 507         return 0;
 508 }
 509
 510 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
 511                          rcar_gen3_thermal_resume);
 512
 513 static struct platform_driver rcar_gen3_thermal_driver = {
 514         .driver = {
 515                 .name   = "rcar_gen3_thermal",
 516                 .pm = &rcar_gen3_thermal_pm_ops,
 517                 .of_match_table = rcar_gen3_thermal_dt_ids,
 518         },
 519         .probe          = rcar_gen3_thermal_probe,
 520         .remove         = rcar_gen3_thermal_remove,
 521 };
 522 module_platform_driver(rcar_gen3_thermal_driver);
 523
 524 MODULE_LICENSE("GPL v2");
 525 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
 526 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");