Merge tag 'for-5.6/io_uring-vfs-2020-01-29' of git://git.kernel.dk/linux-block
[linux-2.6-microblaze.git] / drivers / thermal / rcar_gen3_thermal.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  R-Car Gen3 THS thermal sensor driver
4  *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
5  *
6  * Copyright (C) 2016 Renesas Electronics Corporation.
7  * Copyright (C) 2016 Sang Engineering
8  */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
19
20 #include "thermal_core.h"
21 #include "thermal_hwmon.h"
22
23 /* Register offsets */
24 #define REG_GEN3_IRQSTR         0x04
25 #define REG_GEN3_IRQMSK         0x08
26 #define REG_GEN3_IRQCTL         0x0C
27 #define REG_GEN3_IRQEN          0x10
28 #define REG_GEN3_IRQTEMP1       0x14
29 #define REG_GEN3_IRQTEMP2       0x18
30 #define REG_GEN3_IRQTEMP3       0x1C
31 #define REG_GEN3_CTSR           0x20
32 #define REG_GEN3_THCTR          0x20
33 #define REG_GEN3_TEMP           0x28
34 #define REG_GEN3_THCODE1        0x50
35 #define REG_GEN3_THCODE2        0x54
36 #define REG_GEN3_THCODE3        0x58
37
38 /* IRQ{STR,MSK,EN} bits */
39 #define IRQ_TEMP1               BIT(0)
40 #define IRQ_TEMP2               BIT(1)
41 #define IRQ_TEMP3               BIT(2)
42 #define IRQ_TEMPD1              BIT(3)
43 #define IRQ_TEMPD2              BIT(4)
44 #define IRQ_TEMPD3              BIT(5)
45
46 /* CTSR bits */
47 #define CTSR_PONM       BIT(8)
48 #define CTSR_AOUT       BIT(7)
49 #define CTSR_THBGR      BIT(5)
50 #define CTSR_VMEN       BIT(4)
51 #define CTSR_VMST       BIT(1)
52 #define CTSR_THSST      BIT(0)
53
54 /* THCTR bits */
55 #define THCTR_PONM      BIT(6)
56 #define THCTR_THSST     BIT(0)
57
58 #define CTEMP_MASK      0xFFF
59
60 #define MCELSIUS(temp)  ((temp) * 1000)
61 #define GEN3_FUSE_MASK  0xFFF
62
63 #define TSC_MAX_NUM     3
64
65 /* default THCODE values if FUSEs are missing */
66 static const int thcode[TSC_MAX_NUM][3] = {
67         { 3397, 2800, 2221 },
68         { 3393, 2795, 2216 },
69         { 3389, 2805, 2237 },
70 };
71
72 /* Structure for thermal temperature calculation */
73 struct equation_coefs {
74         int a1;
75         int b1;
76         int a2;
77         int b2;
78 };
79
80 struct rcar_gen3_thermal_tsc {
81         void __iomem *base;
82         struct thermal_zone_device *zone;
83         struct equation_coefs coef;
84         int low;
85         int high;
86         int tj_t;
87         int id; /* thermal channel id */
88 };
89
90 struct rcar_gen3_thermal_priv {
91         struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
92         unsigned int num_tscs;
93         void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
94 };
95
96 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
97                                          u32 reg)
98 {
99         return ioread32(tsc->base + reg);
100 }
101
102 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
103                                            u32 reg, u32 data)
104 {
105         iowrite32(data, tsc->base + reg);
106 }
107
108 /*
109  * Linear approximation for temperature
110  *
111  * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
112  *
113  * The constants a and b are calculated using two triplets of int values PTAT
114  * and THCODE. PTAT and THCODE can either be read from hardware or use hard
115  * coded values from driver. The formula to calculate a and b are taken from
116  * BSP and sparsely documented and understood.
117  *
118  * Examining the linear formula and the formula used to calculate constants a
119  * and b while knowing that the span for PTAT and THCODE values are between
120  * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
121  * Integer also needs to be signed so that leaves 7 bits for binary
122  * fixed point scaling.
123  */
124
125 #define FIXPT_SHIFT 7
126 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
127 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
128 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
129 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
130
131 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
132
133 /* no idea where these constants come from */
134 #define TJ_3 -41
135
136 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc,
137                                          int *ptat, const int *thcode,
138                                          int ths_tj_1)
139 {
140         /* TODO: Find documentation and document constant calculation formula */
141
142         /*
143          * Division is not scaled in BSP and if scaled it might overflow
144          * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
145          */
146         tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
147                      / (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
148
149         tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
150                                  tsc->tj_t - FIXPT_INT(TJ_3));
151         tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3;
152
153         tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
154                                  tsc->tj_t - FIXPT_INT(ths_tj_1));
155         tsc->coef.b2 = FIXPT_INT(thcode[0]) - tsc->coef.a2 * ths_tj_1;
156 }
157
158 static int rcar_gen3_thermal_round(int temp)
159 {
160         int result, round_offs;
161
162         round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
163                 -RCAR3_THERMAL_GRAN / 2;
164         result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
165         return result * RCAR3_THERMAL_GRAN;
166 }
167
168 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
169 {
170         struct rcar_gen3_thermal_tsc *tsc = devdata;
171         int mcelsius, val;
172         u32 reg;
173
174         /* Read register and convert to mili Celsius */
175         reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
176
177         if (reg <= thcode[tsc->id][1])
178                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
179                                 tsc->coef.a1);
180         else
181                 val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
182                                 tsc->coef.a2);
183         mcelsius = FIXPT_TO_MCELSIUS(val);
184
185         /* Guaranteed operating range is -40C to 125C. */
186
187         /* Round value to device granularity setting */
188         *temp = rcar_gen3_thermal_round(mcelsius);
189
190         return 0;
191 }
192
193 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
194                                               int mcelsius)
195 {
196         int celsius, val;
197
198         celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
199         if (celsius <= INT_FIXPT(tsc->tj_t))
200                 val = celsius * tsc->coef.a1 + tsc->coef.b1;
201         else
202                 val = celsius * tsc->coef.a2 + tsc->coef.b2;
203
204         return INT_FIXPT(val);
205 }
206
207 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
208 {
209         struct rcar_gen3_thermal_tsc *tsc = devdata;
210
211         low = clamp_val(low, -40000, 120000);
212         high = clamp_val(high, -40000, 120000);
213
214         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
215                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
216
217         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
218                                 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
219
220         tsc->low = low;
221         tsc->high = high;
222
223         return 0;
224 }
225
226 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
227         .get_temp       = rcar_gen3_thermal_get_temp,
228         .set_trips      = rcar_gen3_thermal_set_trips,
229 };
230
231 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
232 {
233         unsigned int i;
234         u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
235
236         for (i = 0; i < priv->num_tscs; i++)
237                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
238 }
239
240 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
241 {
242         struct rcar_gen3_thermal_priv *priv = data;
243         u32 status;
244         int i;
245
246         for (i = 0; i < priv->num_tscs; i++) {
247                 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
248                 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
249                 if (status)
250                         thermal_zone_device_update(priv->tscs[i]->zone,
251                                                    THERMAL_EVENT_UNSPECIFIED);
252         }
253
254         return IRQ_HANDLED;
255 }
256
257 static const struct soc_device_attribute r8a7795es1[] = {
258         { .soc_id = "r8a7795", .revision = "ES1.*" },
259         { /* sentinel */ }
260 };
261
262 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
263 {
264         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
265         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);
266
267         usleep_range(1000, 2000);
268
269         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
270
271         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
272         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
273         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
274
275         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
276                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
277
278         usleep_range(100, 200);
279
280         rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
281                                 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
282                                 CTSR_VMST | CTSR_THSST);
283
284         usleep_range(1000, 2000);
285 }
286
287 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
288 {
289         u32 reg_val;
290
291         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
292         reg_val &= ~THCTR_PONM;
293         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
294
295         usleep_range(1000, 2000);
296
297         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
298         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
299         rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
300
301         reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
302         reg_val |= THCTR_THSST;
303         rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
304
305         usleep_range(1000, 2000);
306 }
307
308 static const int rcar_gen3_ths_tj_1 = 126;
309 static const int rcar_gen3_ths_tj_1_m3_w = 116;
310 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
311         {
312                 .compatible = "renesas,r8a774a1-thermal",
313                 .data = &rcar_gen3_ths_tj_1_m3_w,
314         },
315         {
316                 .compatible = "renesas,r8a774b1-thermal",
317                 .data = &rcar_gen3_ths_tj_1,
318         },
319         {
320                 .compatible = "renesas,r8a7795-thermal",
321                 .data = &rcar_gen3_ths_tj_1,
322         },
323         {
324                 .compatible = "renesas,r8a7796-thermal",
325                 .data = &rcar_gen3_ths_tj_1_m3_w,
326         },
327         {
328                 .compatible = "renesas,r8a77965-thermal",
329                 .data = &rcar_gen3_ths_tj_1,
330         },
331         {
332                 .compatible = "renesas,r8a77980-thermal",
333                 .data = &rcar_gen3_ths_tj_1,
334         },
335         {},
336 };
337 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
338
339 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
340 {
341         struct device *dev = &pdev->dev;
342         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
343
344         rcar_thermal_irq_set(priv, false);
345
346         pm_runtime_put(dev);
347         pm_runtime_disable(dev);
348
349         return 0;
350 }
351
352 static void rcar_gen3_hwmon_action(void *data)
353 {
354         struct thermal_zone_device *zone = data;
355
356         thermal_remove_hwmon_sysfs(zone);
357 }
358
359 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
360 {
361         struct rcar_gen3_thermal_priv *priv;
362         struct device *dev = &pdev->dev;
363         const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev);
364         struct resource *res;
365         struct thermal_zone_device *zone;
366         int ret, irq, i;
367         char *irqname;
368
369         /* default values if FUSEs are missing */
370         /* TODO: Read values from hardware on supported platforms */
371         int ptat[3] = { 2631, 1509, 435 };
372
373         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
374         if (!priv)
375                 return -ENOMEM;
376
377         priv->thermal_init = rcar_gen3_thermal_init;
378         if (soc_device_match(r8a7795es1))
379                 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
380
381         platform_set_drvdata(pdev, priv);
382
383         /*
384          * Request 2 (of the 3 possible) IRQs, the driver only needs to
385          * to trigger on the low and high trip points of the current
386          * temp window at this point.
387          */
388         for (i = 0; i < 2; i++) {
389                 irq = platform_get_irq(pdev, i);
390                 if (irq < 0)
391                         return irq;
392
393                 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
394                                          dev_name(dev), i);
395                 if (!irqname)
396                         return -ENOMEM;
397
398                 ret = devm_request_threaded_irq(dev, irq, NULL,
399                                                 rcar_gen3_thermal_irq,
400                                                 IRQF_ONESHOT, irqname, priv);
401                 if (ret)
402                         return ret;
403         }
404
405         pm_runtime_enable(dev);
406         pm_runtime_get_sync(dev);
407
408         for (i = 0; i < TSC_MAX_NUM; i++) {
409                 struct rcar_gen3_thermal_tsc *tsc;
410
411                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
412                 if (!res)
413                         break;
414
415                 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
416                 if (!tsc) {
417                         ret = -ENOMEM;
418                         goto error_unregister;
419                 }
420
421                 tsc->base = devm_ioremap_resource(dev, res);
422                 if (IS_ERR(tsc->base)) {
423                         ret = PTR_ERR(tsc->base);
424                         goto error_unregister;
425                 }
426                 tsc->id = i;
427
428                 priv->tscs[i] = tsc;
429
430                 priv->thermal_init(tsc);
431                 rcar_gen3_thermal_calc_coefs(tsc, ptat, thcode[i],
432                                              *rcar_gen3_ths_tj_1);
433
434                 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
435                                                             &rcar_gen3_tz_of_ops);
436                 if (IS_ERR(zone)) {
437                         dev_err(dev, "Can't register thermal zone\n");
438                         ret = PTR_ERR(zone);
439                         goto error_unregister;
440                 }
441                 tsc->zone = zone;
442
443                 tsc->zone->tzp->no_hwmon = false;
444                 ret = thermal_add_hwmon_sysfs(tsc->zone);
445                 if (ret)
446                         goto error_unregister;
447
448                 ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
449                 if (ret) {
450                         goto error_unregister;
451                 }
452
453                 ret = of_thermal_get_ntrips(tsc->zone);
454                 if (ret < 0)
455                         goto error_unregister;
456
457                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
458         }
459
460         priv->num_tscs = i;
461
462         if (!priv->num_tscs) {
463                 ret = -ENODEV;
464                 goto error_unregister;
465         }
466
467         rcar_thermal_irq_set(priv, true);
468
469         return 0;
470
471 error_unregister:
472         rcar_gen3_thermal_remove(pdev);
473
474         return ret;
475 }
476
477 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
478 {
479         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
480
481         rcar_thermal_irq_set(priv, false);
482
483         return 0;
484 }
485
486 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
487 {
488         struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
489         unsigned int i;
490
491         for (i = 0; i < priv->num_tscs; i++) {
492                 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
493
494                 priv->thermal_init(tsc);
495                 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
496         }
497
498         rcar_thermal_irq_set(priv, true);
499
500         return 0;
501 }
502
503 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
504                          rcar_gen3_thermal_resume);
505
506 static struct platform_driver rcar_gen3_thermal_driver = {
507         .driver = {
508                 .name   = "rcar_gen3_thermal",
509                 .pm = &rcar_gen3_thermal_pm_ops,
510                 .of_match_table = rcar_gen3_thermal_dt_ids,
511         },
512         .probe          = rcar_gen3_thermal_probe,
513         .remove         = rcar_gen3_thermal_remove,
514 };
515 module_platform_driver(rcar_gen3_thermal_driver);
516
517 MODULE_LICENSE("GPL v2");
518 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
519 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");