1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
6 #include <linux/debugfs.h>
9 #include <linux/nvmem-consumer.h>
10 #include <linux/of_address.h>
11 #include <linux/of_platform.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
17 * struct tsens_irq_data - IRQ status and temperature violations
18 * @up_viol: upper threshold violated
19 * @up_thresh: upper threshold temperature value
20 * @up_irq_mask: mask register for upper threshold irqs
21 * @up_irq_clear: clear register for uppper threshold irqs
22 * @low_viol: lower threshold violated
23 * @low_thresh: lower threshold temperature value
24 * @low_irq_mask: mask register for lower threshold irqs
25 * @low_irq_clear: clear register for lower threshold irqs
27 * Structure containing data about temperature threshold settings and
28 * irq status if they were violated.
30 struct tsens_irq_data {
41 char *qfprom_read(struct device *dev, const char *cname)
43 struct nvmem_cell *cell;
47 cell = nvmem_cell_get(dev, cname);
49 return ERR_CAST(cell);
51 ret = nvmem_cell_read(cell, &data);
58 * Use this function on devices where slope and offset calculations
59 * depend on calibration data read from qfprom. On others the slope
60 * and offset values are derived from tz->tzp->slope and tz->tzp->offset
63 void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
69 for (i = 0; i < priv->num_sensors; i++) {
71 "%s: sensor%d - data_point1:%#x data_point2:%#x\n",
72 __func__, i, p1[i], p2[i]);
74 priv->sensor[i].slope = SLOPE_DEFAULT;
75 if (mode == TWO_PT_CALIB) {
77 * slope (m) = adc_code2 - adc_code1 (y2 - y1)/
78 * temp_120_degc - temp_30_degc (x2 - x1)
82 den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
83 priv->sensor[i].slope = num / den;
86 priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
88 priv->sensor[i].slope);
89 dev_dbg(priv->dev, "%s: offset:%d\n", __func__, priv->sensor[i].offset);
93 static inline u32 degc_to_code(int degc, const struct tsens_sensor *s)
95 u64 code = div_u64(((u64)degc * s->slope + s->offset), SLOPE_FACTOR);
97 pr_debug("%s: raw_code: 0x%llx, degc:%d\n", __func__, code, degc);
98 return clamp_val(code, THRESHOLD_MIN_ADC_CODE, THRESHOLD_MAX_ADC_CODE);
101 static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
105 num = (adc_code * SLOPE_FACTOR) - s->offset;
109 degc = num + (den / 2);
111 degc = num - (den / 2);
121 * tsens_hw_to_mC - Return sign-extended temperature in mCelsius.
122 * @s: Pointer to sensor struct
123 * @field: Index into regmap_field array pointing to temperature data
125 * This function handles temperature returned in ADC code or deciCelsius
126 * depending on IP version.
128 * Return: Temperature in milliCelsius on success, a negative errno will
129 * be returned in error cases
131 static int tsens_hw_to_mC(struct tsens_sensor *s, int field)
133 struct tsens_priv *priv = s->priv;
138 resolution = priv->fields[LAST_TEMP_0].msb -
139 priv->fields[LAST_TEMP_0].lsb;
141 ret = regmap_field_read(priv->rf[field], &temp);
145 /* Convert temperature from ADC code to milliCelsius */
147 return code_to_degc(temp, s) * 1000;
149 /* deciCelsius -> milliCelsius along with sign extension */
150 return sign_extend32(temp, resolution) * 100;
154 * tsens_mC_to_hw - Convert temperature to hardware register value
155 * @s: Pointer to sensor struct
156 * @temp: temperature in milliCelsius to be programmed to hardware
158 * This function outputs the value to be written to hardware in ADC code
159 * or deciCelsius depending on IP version.
161 * Return: ADC code or temperature in deciCelsius.
163 static int tsens_mC_to_hw(struct tsens_sensor *s, int temp)
165 struct tsens_priv *priv = s->priv;
167 /* milliC to adc code */
169 return degc_to_code(temp / 1000, s);
171 /* milliC to deciC */
175 static inline enum tsens_ver tsens_version(struct tsens_priv *priv)
177 return priv->feat->ver_major;
180 static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
181 enum tsens_irq_type irq_type, bool enable)
187 index = UP_INT_CLEAR_0 + hw_id;
190 index = LOW_INT_CLEAR_0 + hw_id;
193 regmap_field_write(priv->rf[index], enable ? 0 : 1);
196 static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,
197 enum tsens_irq_type irq_type, bool enable)
199 u32 index_mask = 0, index_clear = 0;
202 * To enable the interrupt flag for a sensor:
203 * - clear the mask bit
204 * To disable the interrupt flag for a sensor:
205 * - Mask further interrupts for this sensor
206 * - Write 1 followed by 0 to clear the interrupt
210 index_mask = UP_INT_MASK_0 + hw_id;
211 index_clear = UP_INT_CLEAR_0 + hw_id;
214 index_mask = LOW_INT_MASK_0 + hw_id;
215 index_clear = LOW_INT_CLEAR_0 + hw_id;
220 regmap_field_write(priv->rf[index_mask], 0);
222 regmap_field_write(priv->rf[index_mask], 1);
223 regmap_field_write(priv->rf[index_clear], 1);
224 regmap_field_write(priv->rf[index_clear], 0);
229 * tsens_set_interrupt - Set state of an interrupt
230 * @priv: Pointer to tsens controller private data
231 * @hw_id: Hardware ID aka. sensor number
232 * @irq_type: irq_type from enum tsens_irq_type
233 * @enable: false = disable, true = enable
235 * Call IP-specific function to set state of an interrupt
239 static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id,
240 enum tsens_irq_type irq_type, bool enable)
242 dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
243 irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
244 enable ? "en" : "dis");
245 if (tsens_version(priv) > VER_1_X)
246 tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
248 tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
252 * tsens_threshold_violated - Check if a sensor temperature violated a preset threshold
253 * @priv: Pointer to tsens controller private data
254 * @hw_id: Hardware ID aka. sensor number
255 * @d: Pointer to irq state data
257 * Return: 0 if threshold was not violated, 1 if it was violated and negative
258 * errno in case of errors
260 static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,
261 struct tsens_irq_data *d)
265 ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);
268 ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);
271 if (d->up_viol || d->low_viol)
277 static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,
278 struct tsens_sensor *s, struct tsens_irq_data *d)
282 ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);
285 ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
288 if (tsens_version(priv) > VER_1_X) {
289 ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
292 ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
296 /* No mask register on older TSENS */
301 d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);
302 d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);
304 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u) | clr(%u|%u) | mask(%u|%u)\n",
305 hw_id, __func__, (d->up_viol || d->low_viol) ? "(V)" : "",
306 d->low_viol, d->up_viol, d->low_irq_clear, d->up_irq_clear,
307 d->low_irq_mask, d->up_irq_mask);
308 dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d)\n", hw_id, __func__,
309 (d->up_viol || d->low_viol) ? "(violation)" : "",
310 d->low_thresh, d->up_thresh);
315 static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
318 return mask & (1 << hw_id);
320 /* v1, v0.1 don't have a irq mask register */
325 * tsens_irq_thread - Threaded interrupt handler for uplow interrupts
327 * @data: tsens controller private data
329 * Check all sensors to find ones that violated their threshold limits. If the
330 * temperature is still outside the limits, call thermal_zone_device_update() to
331 * update the thresholds, else re-enable the interrupts.
333 * The level-triggered interrupt might deassert if the temperature returned to
334 * within the threshold limits by the time the handler got scheduled. We
335 * consider the irq to have been handled in that case.
337 * Return: IRQ_HANDLED
339 irqreturn_t tsens_irq_thread(int irq, void *data)
341 struct tsens_priv *priv = data;
342 struct tsens_irq_data d;
343 bool enable = true, disable = false;
347 for (i = 0; i < priv->num_sensors; i++) {
348 bool trigger = false;
349 struct tsens_sensor *s = &priv->sensor[i];
350 u32 hw_id = s->hw_id;
352 if (IS_ERR(priv->sensor[i].tzd))
354 if (!tsens_threshold_violated(priv, hw_id, &d))
356 ret = get_temp_tsens_valid(s, &temp);
358 dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);
362 spin_lock_irqsave(&priv->ul_lock, flags);
364 tsens_read_irq_state(priv, hw_id, s, &d);
367 !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) {
368 tsens_set_interrupt(priv, hw_id, UPPER, disable);
369 if (d.up_thresh > temp) {
370 dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
371 priv->sensor[i].hw_id, __func__);
372 tsens_set_interrupt(priv, hw_id, UPPER, enable);
375 /* Keep irq masked */
377 } else if (d.low_viol &&
378 !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) {
379 tsens_set_interrupt(priv, hw_id, LOWER, disable);
380 if (d.low_thresh < temp) {
381 dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
382 priv->sensor[i].hw_id, __func__);
383 tsens_set_interrupt(priv, hw_id, LOWER, enable);
386 /* Keep irq masked */
390 spin_unlock_irqrestore(&priv->ul_lock, flags);
393 dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
394 hw_id, __func__, temp);
395 thermal_zone_device_update(priv->sensor[i].tzd,
396 THERMAL_EVENT_UNSPECIFIED);
398 dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
399 hw_id, __func__, temp);
406 int tsens_set_trips(void *_sensor, int low, int high)
408 struct tsens_sensor *s = _sensor;
409 struct tsens_priv *priv = s->priv;
410 struct device *dev = priv->dev;
411 struct tsens_irq_data d;
413 int high_val, low_val, cl_high, cl_low;
414 u32 hw_id = s->hw_id;
416 dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
417 hw_id, __func__, low, high);
419 cl_high = clamp_val(high, -40000, 120000);
420 cl_low = clamp_val(low, -40000, 120000);
422 high_val = tsens_mC_to_hw(s, cl_high);
423 low_val = tsens_mC_to_hw(s, cl_low);
425 spin_lock_irqsave(&priv->ul_lock, flags);
427 tsens_read_irq_state(priv, hw_id, s, &d);
429 /* Write the new thresholds and clear the status */
430 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);
431 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);
432 tsens_set_interrupt(priv, hw_id, LOWER, true);
433 tsens_set_interrupt(priv, hw_id, UPPER, true);
435 spin_unlock_irqrestore(&priv->ul_lock, flags);
437 dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
438 s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
443 int tsens_enable_irq(struct tsens_priv *priv)
446 int val = tsens_version(priv) > VER_1_X ? 7 : 1;
448 ret = regmap_field_write(priv->rf[INT_EN], val);
450 dev_err(priv->dev, "%s: failed to enable interrupts\n", __func__);
455 void tsens_disable_irq(struct tsens_priv *priv)
457 regmap_field_write(priv->rf[INT_EN], 0);
460 int get_temp_tsens_valid(struct tsens_sensor *s, int *temp)
462 struct tsens_priv *priv = s->priv;
463 int hw_id = s->hw_id;
464 u32 temp_idx = LAST_TEMP_0 + hw_id;
465 u32 valid_idx = VALID_0 + hw_id;
469 ret = regmap_field_read(priv->rf[valid_idx], &valid);
473 /* Valid bit is 0 for 6 AHB clock cycles.
474 * At 19.2MHz, 1 AHB clock is ~60ns.
475 * We should enter this loop very, very rarely.
478 ret = regmap_field_read(priv->rf[valid_idx], &valid);
483 /* Valid bit is set, OK to read the temperature */
484 *temp = tsens_hw_to_mC(s, temp_idx);
489 int get_temp_common(struct tsens_sensor *s, int *temp)
491 struct tsens_priv *priv = s->priv;
492 int hw_id = s->hw_id;
493 int last_temp = 0, ret;
495 ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
499 *temp = code_to_degc(last_temp, s) * 1000;
504 #ifdef CONFIG_DEBUG_FS
505 static int dbg_sensors_show(struct seq_file *s, void *data)
507 struct platform_device *pdev = s->private;
508 struct tsens_priv *priv = platform_get_drvdata(pdev);
511 seq_printf(s, "max: %2d\nnum: %2d\n\n",
512 priv->feat->max_sensors, priv->num_sensors);
514 seq_puts(s, " id slope offset\n--------------------------\n");
515 for (i = 0; i < priv->num_sensors; i++) {
516 seq_printf(s, "%8d %8d %8d\n", priv->sensor[i].hw_id,
517 priv->sensor[i].slope, priv->sensor[i].offset);
523 static int dbg_version_show(struct seq_file *s, void *data)
525 struct platform_device *pdev = s->private;
526 struct tsens_priv *priv = platform_get_drvdata(pdev);
527 u32 maj_ver, min_ver, step_ver;
530 if (tsens_version(priv) > VER_0_1) {
531 ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);
534 ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver);
537 ret = regmap_field_read(priv->rf[VER_STEP], &step_ver);
540 seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
542 seq_puts(s, "0.1.0\n");
548 DEFINE_SHOW_ATTRIBUTE(dbg_version);
549 DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
551 static void tsens_debug_init(struct platform_device *pdev)
553 struct tsens_priv *priv = platform_get_drvdata(pdev);
554 struct dentry *root, *file;
556 root = debugfs_lookup("tsens", NULL);
558 priv->debug_root = debugfs_create_dir("tsens", NULL);
560 priv->debug_root = root;
562 file = debugfs_lookup("version", priv->debug_root);
564 debugfs_create_file("version", 0444, priv->debug_root,
565 pdev, &dbg_version_fops);
567 /* A directory for each instance of the TSENS IP */
568 priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
569 debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
572 static inline void tsens_debug_init(struct platform_device *pdev) {}
575 static const struct regmap_config tsens_config = {
582 static const struct regmap_config tsens_srot_config = {
589 int __init init_common(struct tsens_priv *priv)
591 void __iomem *tm_base, *srot_base;
592 struct device *dev = priv->dev;
593 struct resource *res;
596 struct platform_device *op = of_find_device_by_node(priv->dev->of_node);
601 if (op->num_resources > 1) {
602 /* DT with separate SROT and TM address space */
604 res = platform_get_resource(op, IORESOURCE_MEM, 1);
605 srot_base = devm_ioremap_resource(&op->dev, res);
606 if (IS_ERR(srot_base)) {
607 ret = PTR_ERR(srot_base);
611 priv->srot_map = devm_regmap_init_mmio(dev, srot_base,
613 if (IS_ERR(priv->srot_map)) {
614 ret = PTR_ERR(priv->srot_map);
618 /* old DTs where SROT and TM were in a contiguous 2K block */
619 priv->tm_offset = 0x1000;
622 res = platform_get_resource(op, IORESOURCE_MEM, 0);
623 tm_base = devm_ioremap_resource(&op->dev, res);
624 if (IS_ERR(tm_base)) {
625 ret = PTR_ERR(tm_base);
629 priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
630 if (IS_ERR(priv->tm_map)) {
631 ret = PTR_ERR(priv->tm_map);
635 if (tsens_version(priv) > VER_0_1) {
636 for (i = VER_MAJOR; i <= VER_STEP; i++) {
637 priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
639 if (IS_ERR(priv->rf[i]))
640 return PTR_ERR(priv->rf[i]);
644 priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
645 priv->fields[TSENS_EN]);
646 if (IS_ERR(priv->rf[TSENS_EN])) {
647 ret = PTR_ERR(priv->rf[TSENS_EN]);
650 ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
654 dev_err(dev, "%s: device not enabled\n", __func__);
659 priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
660 priv->fields[SENSOR_EN]);
661 if (IS_ERR(priv->rf[SENSOR_EN])) {
662 ret = PTR_ERR(priv->rf[SENSOR_EN]);
665 priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,
666 priv->fields[INT_EN]);
667 if (IS_ERR(priv->rf[INT_EN])) {
668 ret = PTR_ERR(priv->rf[INT_EN]);
672 /* This loop might need changes if enum regfield_ids is reordered */
673 for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
674 for (i = 0; i < priv->feat->max_sensors; i++) {
677 priv->rf[idx] = devm_regmap_field_alloc(dev, priv->tm_map,
679 if (IS_ERR(priv->rf[idx])) {
680 ret = PTR_ERR(priv->rf[idx]);
686 spin_lock_init(&priv->ul_lock);
687 tsens_enable_irq(priv);
688 tsens_debug_init(op);
693 put_device(&op->dev);