1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
6 #include <linux/bitops.h>
7 #include <linux/delay.h>
9 #include <linux/iio/consumer.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
13 #include <linux/of_device.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 #include <linux/thermal.h>
18 #include "../thermal_hwmon.h"
20 #define QPNP_TM_REG_DIG_MAJOR 0x01
21 #define QPNP_TM_REG_TYPE 0x04
22 #define QPNP_TM_REG_SUBTYPE 0x05
23 #define QPNP_TM_REG_STATUS 0x08
24 #define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
25 #define QPNP_TM_REG_ALARM_CTRL 0x46
27 #define QPNP_TM_TYPE 0x09
28 #define QPNP_TM_SUBTYPE_GEN1 0x08
29 #define QPNP_TM_SUBTYPE_GEN2 0x09
31 #define STATUS_GEN1_STAGE_MASK GENMASK(1, 0)
32 #define STATUS_GEN2_STATE_MASK GENMASK(6, 4)
33 #define STATUS_GEN2_STATE_SHIFT 4
35 #define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6)
36 #define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0)
38 #define SHUTDOWN_CTRL1_RATE_25HZ BIT(3)
40 #define ALARM_CTRL_FORCE_ENABLE BIT(7)
42 #define THRESH_COUNT 4
45 /* Over-temperature trip point values in mC */
46 static const long temp_map_gen1[THRESH_COUNT][STAGE_COUNT] = {
47 { 105000, 125000, 145000 },
48 { 110000, 130000, 150000 },
49 { 115000, 135000, 155000 },
50 { 120000, 140000, 160000 },
53 static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
54 { 90000, 110000, 140000 },
55 { 95000, 115000, 145000 },
56 { 100000, 120000, 150000 },
57 { 105000, 125000, 155000 },
60 #define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */
65 #define TEMP_STAGE_HYSTERESIS 2000
67 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
68 #define DEFAULT_TEMP 37000
73 struct thermal_zone_device *tz_dev;
78 unsigned int prev_stage;
80 /* protects .thresh, .stage and chip registers */
84 struct iio_channel *adc;
85 const long (*temp_map)[THRESH_COUNT][STAGE_COUNT];
88 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
89 static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3};
91 static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data)
96 ret = regmap_read(chip->map, chip->base + addr, &val);
104 static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data)
106 return regmap_write(chip->map, chip->base + addr, data);
110 * qpnp_tm_decode_temp() - return temperature in mC corresponding to the
111 * specified over-temperature stage
112 * @chip: Pointer to the qpnp_tm chip
113 * @stage: Over-temperature stage
115 * Return: temperature in mC
117 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage)
119 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 ||
123 return (*chip->temp_map)[chip->thresh][stage - 1];
127 * qpnp_tm_get_temp_stage() - return over-temperature stage
128 * @chip: Pointer to the qpnp_tm chip
130 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
132 static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip)
137 ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®);
141 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1)
142 ret = reg & STATUS_GEN1_STAGE_MASK;
144 ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT;
150 * This function updates the internal temp value based on the
151 * current thermal stage and threshold as well as the previous stage
153 static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
155 unsigned int stage, stage_new, stage_old;
158 WARN_ON(!mutex_is_locked(&chip->lock));
160 ret = qpnp_tm_get_temp_stage(chip);
165 if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) {
167 stage_old = chip->stage;
169 stage_new = alarm_state_map[stage];
170 stage_old = alarm_state_map[chip->stage];
173 if (stage_new > stage_old) {
174 /* increasing stage, use lower bound */
175 chip->temp = qpnp_tm_decode_temp(chip, stage_new)
176 + TEMP_STAGE_HYSTERESIS;
177 } else if (stage_new < stage_old) {
178 /* decreasing stage, use upper bound */
179 chip->temp = qpnp_tm_decode_temp(chip, stage_new + 1)
180 - TEMP_STAGE_HYSTERESIS;
188 static int qpnp_tm_get_temp(struct thermal_zone_device *tz, int *temp)
190 struct qpnp_tm_chip *chip = tz->devdata;
191 int ret, mili_celsius;
196 if (!chip->initialized) {
197 *temp = DEFAULT_TEMP;
202 mutex_lock(&chip->lock);
203 ret = qpnp_tm_update_temp_no_adc(chip);
204 mutex_unlock(&chip->lock);
208 ret = iio_read_channel_processed(chip->adc, &mili_celsius);
212 chip->temp = mili_celsius;
220 static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
223 long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1];
224 long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1];
225 bool disable_s2_shutdown = false;
228 WARN_ON(!mutex_is_locked(&chip->lock));
231 * Default: S2 and S3 shutdown enabled, thresholds at
232 * lowest threshold set, monitoring at 25Hz
234 reg = SHUTDOWN_CTRL1_RATE_25HZ;
236 if (temp == THERMAL_TEMP_INVALID ||
237 temp < stage2_threshold_min) {
238 chip->thresh = THRESH_MIN;
242 if (temp <= stage2_threshold_max) {
243 chip->thresh = THRESH_MAX -
244 ((stage2_threshold_max - temp) /
246 disable_s2_shutdown = true;
248 chip->thresh = THRESH_MAX;
251 disable_s2_shutdown = true;
254 "No ADC is configured and critical temperature %d mC is above the maximum stage 2 threshold of %ld mC! Configuring stage 2 shutdown at %ld mC.\n",
255 temp, stage2_threshold_max, stage2_threshold_max);
260 if (disable_s2_shutdown)
261 reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
263 return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
266 static int qpnp_tm_set_trip_temp(struct thermal_zone_device *tz, int trip_id, int temp)
268 struct qpnp_tm_chip *chip = tz->devdata;
269 struct thermal_trip trip;
272 ret = __thermal_zone_get_trip(chip->tz_dev, trip_id, &trip);
276 if (trip.type != THERMAL_TRIP_CRITICAL)
279 mutex_lock(&chip->lock);
280 ret = qpnp_tm_update_critical_trip_temp(chip, temp);
281 mutex_unlock(&chip->lock);
286 static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = {
287 .get_temp = qpnp_tm_get_temp,
288 .set_trip_temp = qpnp_tm_set_trip_temp,
291 static irqreturn_t qpnp_tm_isr(int irq, void *data)
293 struct qpnp_tm_chip *chip = data;
295 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
300 static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip)
302 struct thermal_trip trip;
305 for (i = 0; i < thermal_zone_get_num_trips(chip->tz_dev); i++) {
307 ret = thermal_zone_get_trip(chip->tz_dev, i, &trip);
311 if (trip.type == THERMAL_TRIP_CRITICAL)
312 return trip.temperature;
315 return THERMAL_TEMP_INVALID;
319 * This function initializes the internal temp value based on only the
320 * current thermal stage and threshold. Setup threshold control and
321 * disable shutdown override.
323 static int qpnp_tm_init(struct qpnp_tm_chip *chip)
330 mutex_lock(&chip->lock);
332 ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®);
336 chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
337 chip->temp = DEFAULT_TEMP;
339 ret = qpnp_tm_get_temp_stage(chip);
344 stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1
345 ? chip->stage : alarm_state_map[chip->stage];
348 chip->temp = qpnp_tm_decode_temp(chip, stage);
350 mutex_unlock(&chip->lock);
352 crit_temp = qpnp_tm_get_critical_trip_temp(chip);
354 mutex_lock(&chip->lock);
356 ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp);
360 /* Enable the thermal alarm PMIC module in always-on mode. */
361 reg = ALARM_CTRL_FORCE_ENABLE;
362 ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg);
364 chip->initialized = true;
367 mutex_unlock(&chip->lock);
371 static int qpnp_tm_probe(struct platform_device *pdev)
373 struct qpnp_tm_chip *chip;
374 struct device_node *node;
375 u8 type, subtype, dig_major;
379 node = pdev->dev.of_node;
381 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
385 dev_set_drvdata(&pdev->dev, chip);
386 chip->dev = &pdev->dev;
388 mutex_init(&chip->lock);
390 chip->map = dev_get_regmap(pdev->dev.parent, NULL);
394 ret = of_property_read_u32(node, "reg", &res);
398 irq = platform_get_irq(pdev, 0);
402 /* ADC based measurements are optional */
403 chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
404 if (IS_ERR(chip->adc)) {
405 ret = PTR_ERR(chip->adc);
407 if (ret == -EPROBE_DEFER)
413 ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type);
415 dev_err(&pdev->dev, "could not read type\n");
419 ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype);
421 dev_err(&pdev->dev, "could not read subtype\n");
425 ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MAJOR, &dig_major);
427 dev_err(&pdev->dev, "could not read dig_major\n");
431 if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
432 && subtype != QPNP_TM_SUBTYPE_GEN2)) {
433 dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
438 chip->subtype = subtype;
439 if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
440 chip->temp_map = &temp_map_gen2_v1;
442 chip->temp_map = &temp_map_gen1;
445 * Register the sensor before initializing the hardware to be able to
446 * read the trip points. get_temp() returns the default temperature
447 * before the hardware initialization is completed.
449 chip->tz_dev = devm_thermal_of_zone_register(
450 &pdev->dev, 0, chip, &qpnp_tm_sensor_ops);
451 if (IS_ERR(chip->tz_dev)) {
452 dev_err(&pdev->dev, "failed to register sensor\n");
453 return PTR_ERR(chip->tz_dev);
456 ret = qpnp_tm_init(chip);
458 dev_err(&pdev->dev, "init failed\n");
462 if (devm_thermal_add_hwmon_sysfs(chip->tz_dev))
464 "Failed to add hwmon sysfs attributes\n");
466 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr,
467 IRQF_ONESHOT, node->name, chip);
471 thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED);
476 static const struct of_device_id qpnp_tm_match_table[] = {
477 { .compatible = "qcom,spmi-temp-alarm" },
480 MODULE_DEVICE_TABLE(of, qpnp_tm_match_table);
482 static struct platform_driver qpnp_tm_driver = {
484 .name = "spmi-temp-alarm",
485 .of_match_table = qpnp_tm_match_table,
487 .probe = qpnp_tm_probe,
489 module_platform_driver(qpnp_tm_driver);
491 MODULE_ALIAS("platform:spmi-temp-alarm");
492 MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
493 MODULE_LICENSE("GPL v2");