1 /* SPDX-License-Identifier: Apache-2.0 */
3 * WFx hardware interface definitions
5 * Copyright (c) 2018-2020, Silicon Laboratories Inc.
8 #ifndef WFX_HIF_API_MIB_H
9 #define WFX_HIF_API_MIB_H
11 #include "hif_api_general.h"
13 #define HIF_API_IPV4_ADDRESS_SIZE 4
14 #define HIF_API_IPV6_ADDRESS_SIZE 16
17 HIF_MIB_ID_GL_OPERATIONAL_POWER_MODE = 0x2000,
18 HIF_MIB_ID_GL_BLOCK_ACK_INFO = 0x2001,
19 HIF_MIB_ID_GL_SET_MULTI_MSG = 0x2002,
20 HIF_MIB_ID_CCA_CONFIG = 0x2003,
21 HIF_MIB_ID_ETHERTYPE_DATAFRAME_CONDITION = 0x2010,
22 HIF_MIB_ID_PORT_DATAFRAME_CONDITION = 0x2011,
23 HIF_MIB_ID_MAGIC_DATAFRAME_CONDITION = 0x2012,
24 HIF_MIB_ID_MAC_ADDR_DATAFRAME_CONDITION = 0x2013,
25 HIF_MIB_ID_IPV4_ADDR_DATAFRAME_CONDITION = 0x2014,
26 HIF_MIB_ID_IPV6_ADDR_DATAFRAME_CONDITION = 0x2015,
27 HIF_MIB_ID_UC_MC_BC_DATAFRAME_CONDITION = 0x2016,
28 HIF_MIB_ID_CONFIG_DATA_FILTER = 0x2017,
29 HIF_MIB_ID_SET_DATA_FILTERING = 0x2018,
30 HIF_MIB_ID_ARP_IP_ADDRESSES_TABLE = 0x2019,
31 HIF_MIB_ID_NS_IP_ADDRESSES_TABLE = 0x201A,
32 HIF_MIB_ID_RX_FILTER = 0x201B,
33 HIF_MIB_ID_BEACON_FILTER_TABLE = 0x201C,
34 HIF_MIB_ID_BEACON_FILTER_ENABLE = 0x201D,
35 HIF_MIB_ID_GRP_SEQ_COUNTER = 0x2030,
36 HIF_MIB_ID_TSF_COUNTER = 0x2031,
37 HIF_MIB_ID_STATISTICS_TABLE = 0x2032,
38 HIF_MIB_ID_COUNTERS_TABLE = 0x2033,
39 HIF_MIB_ID_MAX_TX_POWER_LEVEL = 0x2034,
40 HIF_MIB_ID_EXTENDED_COUNTERS_TABLE = 0x2035,
41 HIF_MIB_ID_DOT11_MAC_ADDRESS = 0x2040,
42 HIF_MIB_ID_DOT11_MAX_TRANSMIT_MSDU_LIFETIME = 0x2041,
43 HIF_MIB_ID_DOT11_MAX_RECEIVE_LIFETIME = 0x2042,
44 HIF_MIB_ID_DOT11_WEP_DEFAULT_KEY_ID = 0x2043,
45 HIF_MIB_ID_DOT11_RTS_THRESHOLD = 0x2044,
46 HIF_MIB_ID_SLOT_TIME = 0x2045,
47 HIF_MIB_ID_CURRENT_TX_POWER_LEVEL = 0x2046,
48 HIF_MIB_ID_NON_ERP_PROTECTION = 0x2047,
49 HIF_MIB_ID_TEMPLATE_FRAME = 0x2048,
50 HIF_MIB_ID_BEACON_WAKEUP_PERIOD = 0x2049,
51 HIF_MIB_ID_RCPI_RSSI_THRESHOLD = 0x204A,
52 HIF_MIB_ID_BLOCK_ACK_POLICY = 0x204B,
53 HIF_MIB_ID_OVERRIDE_INTERNAL_TX_RATE = 0x204C,
54 HIF_MIB_ID_SET_ASSOCIATION_MODE = 0x204D,
55 HIF_MIB_ID_SET_UAPSD_INFORMATION = 0x204E,
56 HIF_MIB_ID_SET_TX_RATE_RETRY_POLICY = 0x204F,
57 HIF_MIB_ID_PROTECTED_MGMT_POLICY = 0x2050,
58 HIF_MIB_ID_SET_HT_PROTECTION = 0x2051,
59 HIF_MIB_ID_KEEP_ALIVE_PERIOD = 0x2052,
60 HIF_MIB_ID_ARP_KEEP_ALIVE_PERIOD = 0x2053,
61 HIF_MIB_ID_INACTIVITY_TIMER = 0x2054,
62 HIF_MIB_ID_INTERFACE_PROTECTION = 0x2055,
63 HIF_MIB_ID_BEACON_STATS = 0x2056,
66 enum hif_op_power_mode {
67 HIF_OP_POWER_MODE_ACTIVE = 0x0,
68 HIF_OP_POWER_MODE_DOZE = 0x1,
69 HIF_OP_POWER_MODE_QUIESCENT = 0x2
72 struct hif_mib_gl_operational_power_mode {
75 u8 wup_ind_activation:1;
79 struct hif_mib_gl_set_multi_msg {
80 u8 enable_multi_tx_conf:1;
85 enum hif_arp_ns_frame_treatment {
86 HIF_ARP_NS_FILTERING_DISABLE = 0x0,
87 HIF_ARP_NS_FILTERING_ENABLE = 0x1,
88 HIF_ARP_NS_REPLY_ENABLE = 0x2
91 struct hif_mib_arp_ip_addr_table {
95 u8 ipv4_address[HIF_API_IPV4_ADDRESS_SIZE];
98 struct hif_mib_rx_filter {
103 u8 keep_alive_filter:1;
108 struct hif_ie_table_entry {
119 struct hif_mib_bcn_filter_table {
120 __le32 num_of_info_elmts;
121 struct hif_ie_table_entry ie_table[];
124 enum hif_beacon_filter {
125 HIF_BEACON_FILTER_DISABLE = 0x0,
126 HIF_BEACON_FILTER_ENABLE = 0x1,
127 HIF_BEACON_FILTER_AUTO_ERP = 0x2
130 struct hif_mib_bcn_filter_enable {
135 struct hif_mib_extended_count_table {
136 __le32 count_plcp_errors;
137 __le32 count_fcs_errors;
138 __le32 count_tx_packets;
139 __le32 count_rx_packets;
140 __le32 count_rx_packet_errors;
141 __le32 count_rx_decryption_failures;
142 __le32 count_rx_mic_failures;
143 __le32 count_rx_no_key_failures;
144 __le32 count_tx_multicast_frames;
145 __le32 count_tx_frames_success;
146 __le32 count_tx_frame_failures;
147 __le32 count_tx_frames_retried;
148 __le32 count_tx_frames_multi_retried;
149 __le32 count_rx_frame_duplicates;
150 __le32 count_rts_success;
151 __le32 count_rts_failures;
152 __le32 count_ack_failures;
153 __le32 count_rx_multicast_frames;
154 __le32 count_rx_frames_success;
155 __le32 count_rx_cmacicv_errors;
156 __le32 count_rx_cmac_replays;
157 __le32 count_rx_mgmt_ccmp_replays;
158 __le32 count_rx_bipmic_errors;
159 __le32 count_rx_beacon;
160 __le32 count_miss_beacon;
164 struct hif_mib_count_table {
165 __le32 count_plcp_errors;
166 __le32 count_fcs_errors;
167 __le32 count_tx_packets;
168 __le32 count_rx_packets;
169 __le32 count_rx_packet_errors;
170 __le32 count_rx_decryption_failures;
171 __le32 count_rx_mic_failures;
172 __le32 count_rx_no_key_failures;
173 __le32 count_tx_multicast_frames;
174 __le32 count_tx_frames_success;
175 __le32 count_tx_frame_failures;
176 __le32 count_tx_frames_retried;
177 __le32 count_tx_frames_multi_retried;
178 __le32 count_rx_frame_duplicates;
179 __le32 count_rts_success;
180 __le32 count_rts_failures;
181 __le32 count_ack_failures;
182 __le32 count_rx_multicast_frames;
183 __le32 count_rx_frames_success;
184 __le32 count_rx_cmacicv_errors;
185 __le32 count_rx_cmac_replays;
186 __le32 count_rx_mgmt_ccmp_replays;
187 __le32 count_rx_bipmic_errors;
190 struct hif_mib_mac_address {
191 u8 mac_addr[ETH_ALEN];
195 struct hif_mib_wep_default_key_id {
196 u8 wep_default_key_id;
200 struct hif_mib_dot11_rts_threshold {
204 struct hif_mib_slot_time {
208 struct hif_mib_current_tx_power_level {
209 __le32 power_level; // signed value
212 struct hif_mib_non_erp_protection {
213 u8 use_cts_to_self:1;
219 HIF_TMPLT_PRBREQ = 0x0,
221 HIF_TMPLT_NULL = 0x2,
222 HIF_TMPLT_QOSNUL = 0x3,
223 HIF_TMPLT_PSPOLL = 0x4,
224 HIF_TMPLT_PRBRES = 0x5,
229 #define HIF_API_MAX_TEMPLATE_FRAME_SIZE 700
231 struct hif_mib_template_frame {
239 struct hif_mib_beacon_wake_up_period {
240 u8 wakeup_period_min;
243 u8 wakeup_period_max;
247 struct hif_mib_rcpi_rssi_threshold {
255 u8 rolling_average_count;
258 #define DEFAULT_BA_MAX_RX_BUFFER_SIZE 16
260 struct hif_mib_block_ack_policy {
261 u8 block_ack_tx_tid_policy;
263 u8 block_ack_rx_tid_policy;
264 u8 block_ack_rx_max_buffer_size;
267 enum hif_mpdu_start_spacing {
268 HIF_MPDU_START_SPACING_NO_RESTRIC = 0x0,
269 HIF_MPDU_START_SPACING_QUARTER = 0x1,
270 HIF_MPDU_START_SPACING_HALF = 0x2,
271 HIF_MPDU_START_SPACING_ONE = 0x3,
272 HIF_MPDU_START_SPACING_TWO = 0x4,
273 HIF_MPDU_START_SPACING_FOUR = 0x5,
274 HIF_MPDU_START_SPACING_EIGHT = 0x6,
275 HIF_MPDU_START_SPACING_SIXTEEN = 0x7
278 struct hif_mib_set_association_mode {
288 u8 mpdu_start_spacing;
289 __le32 basic_rate_set;
292 struct hif_mib_set_uapsd_information {
303 __le16 min_auto_trigger_interval;
304 __le16 max_auto_trigger_interval;
305 __le16 auto_trigger_step;
308 struct hif_tx_rate_retry_policy {
310 u8 short_retry_count;
316 u8 rate_recovery_count;
321 #define HIF_TX_RETRY_POLICY_MAX 15
322 #define HIF_TX_RETRY_POLICY_INVALID HIF_TX_RETRY_POLICY_MAX
324 struct hif_mib_set_tx_rate_retry_policy {
325 u8 num_tx_rate_policies;
327 struct hif_tx_rate_retry_policy tx_rate_retry_policy[];
330 struct hif_mib_protected_mgmt_policy {
333 u8 host_enc_auth_frames:1;
338 struct hif_mib_keep_alive_period {
339 __le16 keep_alive_period;