drivers/staging/wfx/hif_api_mib.h

   1 /* SPDX-License-Identifier: Apache-2.0 */
   2 /*
   3  * WFx hardware interface definitions
   4  *
   5  * Copyright (c) 2018-2019, Silicon Laboratories Inc.
   6  */
   7
   8 #ifndef WFX_HIF_API_MIB_H
   9 #define WFX_HIF_API_MIB_H
  10
  11 #include "hif_api_general.h"
  12
  13 #define HIF_API_IPV4_ADDRESS_SIZE 4
  14 #define HIF_API_IPV6_ADDRESS_SIZE 16
  15
  16 enum hif_mib_ids {
  17         HIF_MIB_ID_GL_OPERATIONAL_POWER_MODE        = 0x2000,
  18         HIF_MIB_ID_GL_BLOCK_ACK_INFO                = 0x2001,
  19         HIF_MIB_ID_GL_SET_MULTI_MSG                 = 0x2002,
  20         HIF_MIB_ID_CCA_CONFIG                       = 0x2003,
  21         HIF_MIB_ID_ETHERTYPE_DATAFRAME_CONDITION    = 0x2010,
  22         HIF_MIB_ID_PORT_DATAFRAME_CONDITION         = 0x2011,
  23         HIF_MIB_ID_MAGIC_DATAFRAME_CONDITION        = 0x2012,
  24         HIF_MIB_ID_MAC_ADDR_DATAFRAME_CONDITION     = 0x2013,
  25         HIF_MIB_ID_IPV4_ADDR_DATAFRAME_CONDITION    = 0x2014,
  26         HIF_MIB_ID_IPV6_ADDR_DATAFRAME_CONDITION    = 0x2015,
  27         HIF_MIB_ID_UC_MC_BC_DATAFRAME_CONDITION     = 0x2016,
  28         HIF_MIB_ID_CONFIG_DATA_FILTER               = 0x2017,
  29         HIF_MIB_ID_SET_DATA_FILTERING               = 0x2018,
  30         HIF_MIB_ID_ARP_IP_ADDRESSES_TABLE           = 0x2019,
  31         HIF_MIB_ID_NS_IP_ADDRESSES_TABLE            = 0x201A,
  32         HIF_MIB_ID_RX_FILTER                        = 0x201B,
  33         HIF_MIB_ID_BEACON_FILTER_TABLE              = 0x201C,
  34         HIF_MIB_ID_BEACON_FILTER_ENABLE             = 0x201D,
  35         HIF_MIB_ID_GRP_SEQ_COUNTER                  = 0x2030,
  36         HIF_MIB_ID_TSF_COUNTER                      = 0x2031,
  37         HIF_MIB_ID_STATISTICS_TABLE                 = 0x2032,
  38         HIF_MIB_ID_COUNTERS_TABLE                   = 0x2033,
  39         HIF_MIB_ID_MAX_TX_POWER_LEVEL               = 0x2034,
  40         HIF_MIB_ID_EXTENDED_COUNTERS_TABLE          = 0x2035,
  41         HIF_MIB_ID_DOT11_MAC_ADDRESS                = 0x2040,
  42         HIF_MIB_ID_DOT11_MAX_TRANSMIT_MSDU_LIFETIME = 0x2041,
  43         HIF_MIB_ID_DOT11_MAX_RECEIVE_LIFETIME       = 0x2042,
  44         HIF_MIB_ID_DOT11_WEP_DEFAULT_KEY_ID         = 0x2043,
  45         HIF_MIB_ID_DOT11_RTS_THRESHOLD              = 0x2044,
  46         HIF_MIB_ID_SLOT_TIME                        = 0x2045,
  47         HIF_MIB_ID_CURRENT_TX_POWER_LEVEL           = 0x2046,
  48         HIF_MIB_ID_NON_ERP_PROTECTION               = 0x2047,
  49         HIF_MIB_ID_TEMPLATE_FRAME                   = 0x2048,
  50         HIF_MIB_ID_BEACON_WAKEUP_PERIOD             = 0x2049,
  51         HIF_MIB_ID_RCPI_RSSI_THRESHOLD              = 0x204A,
  52         HIF_MIB_ID_BLOCK_ACK_POLICY                 = 0x204B,
  53         HIF_MIB_ID_OVERRIDE_INTERNAL_TX_RATE        = 0x204C,
  54         HIF_MIB_ID_SET_ASSOCIATION_MODE             = 0x204D,
  55         HIF_MIB_ID_SET_UAPSD_INFORMATION            = 0x204E,
  56         HIF_MIB_ID_SET_TX_RATE_RETRY_POLICY         = 0x204F,
  57         HIF_MIB_ID_PROTECTED_MGMT_POLICY            = 0x2050,
  58         HIF_MIB_ID_SET_HT_PROTECTION                = 0x2051,
  59         HIF_MIB_ID_KEEP_ALIVE_PERIOD                = 0x2052,
  60         HIF_MIB_ID_ARP_KEEP_ALIVE_PERIOD            = 0x2053,
  61         HIF_MIB_ID_INACTIVITY_TIMER                 = 0x2054,
  62         HIF_MIB_ID_INTERFACE_PROTECTION             = 0x2055,
  63         HIF_MIB_ID_BEACON_STATS                     = 0x2056,
  64 };
  65
  66 enum hif_op_power_mode {
  67         HIF_OP_POWER_MODE_ACTIVE    = 0x0,
  68         HIF_OP_POWER_MODE_DOZE      = 0x1,
  69         HIF_OP_POWER_MODE_QUIESCENT = 0x2
  70 };
  71
  72 struct hif_mib_gl_operational_power_mode {
  73         u8     power_mode:4;
  74         u8     reserved1:3;
  75         u8     wup_ind_activation:1;
  76         u8     reserved2[3];
  77 } __packed;
  78
  79 struct hif_mib_gl_set_multi_msg {
  80         u8     enable_multi_tx_conf:1;
  81         u8     reserved1:7;
  82         u8     reserved2[3];
  83 } __packed;
  84
  85 enum hif_mac_addr_type {
  86         HIF_MAC_ADDR_A1 = 0x0,
  87         HIF_MAC_ADDR_A2 = 0x1,
  88         HIF_MAC_ADDR_A3 = 0x2
  89 };
  90
  91 struct hif_mib_mac_addr_data_frame_condition {
  92         u8     condition_idx;
  93         u8     address_type;
  94         u8     mac_address[ETH_ALEN];
  95 } __packed;
  96
  97 #define HIF_FILTER_UNICAST   0x1
  98 #define HIF_FILTER_MULTICAST 0x2
  99 #define HIF_FILTER_BROADCAST 0x4
 100
 101 struct hif_mib_uc_mc_bc_data_frame_condition {
 102         u8     condition_idx;
 103         u8     allowed_frames;
 104         u8     reserved[2];
 105 } __packed;
 106
 107 struct hif_mib_config_data_filter {
 108         u8     filter_idx;
 109         u8     enable;
 110         u8     reserved1[2];
 111         u8     eth_type_cond;
 112         u8     port_cond;
 113         u8     magic_cond;
 114         u8     mac_cond;
 115         u8     ipv4_cond;
 116         u8     ipv6_cond;
 117         u8     uc_mc_bc_cond;
 118         u8     reserved2;
 119 } __packed;
 120
 121 struct hif_mib_set_data_filtering {
 122         u8     invert_matching:1;
 123         u8     reserved1:7;
 124         u8     enable:1;
 125         u8     reserved2:7;
 126         u8     reserved3[2];
 127 } __packed;
 128
 129 enum hif_arp_ns_frame_treatment {
 130         HIF_ARP_NS_FILTERING_DISABLE = 0x0,
 131         HIF_ARP_NS_FILTERING_ENABLE  = 0x1,
 132         HIF_ARP_NS_REPLY_ENABLE      = 0x2
 133 };
 134
 135 struct hif_mib_arp_ip_addr_table {
 136         u8     condition_idx;
 137         u8     arp_enable;
 138         u8     reserved[2];
 139         u8     ipv4_address[HIF_API_IPV4_ADDRESS_SIZE];
 140 } __packed;
 141
 142 struct hif_mib_rx_filter {
 143         u8     reserved1:1;
 144         u8     bssid_filter:1;
 145         u8     reserved2:1;
 146         u8     fwd_probe_req:1;
 147         u8     keep_alive_filter:1;
 148         u8     reserved3:3;
 149         u8     reserved4[3];
 150 } __packed;
 151
 152 struct hif_ie_table_entry {
 153         u8     ie_id;
 154         u8     has_changed:1;
 155         u8     no_longer:1;
 156         u8     has_appeared:1;
 157         u8     reserved:1;
 158         u8     num_match_data:4;
 159         u8     oui[3];
 160         u8     match_data[3];
 161 } __packed;
 162
 163 struct hif_mib_bcn_filter_table {
 164         __le32 num_of_info_elmts;
 165         struct hif_ie_table_entry ie_table[];
 166 } __packed;
 167
 168 enum hif_beacon_filter {
 169         HIF_BEACON_FILTER_DISABLE  = 0x0,
 170         HIF_BEACON_FILTER_ENABLE   = 0x1,
 171         HIF_BEACON_FILTER_AUTO_ERP = 0x2
 172 };
 173
 174 struct hif_mib_bcn_filter_enable {
 175         __le32 enable;
 176         __le32 bcn_count;
 177 } __packed;
 178
 179 struct hif_mib_extended_count_table {
 180         __le32 count_plcp_errors;
 181         __le32 count_fcs_errors;
 182         __le32 count_tx_packets;
 183         __le32 count_rx_packets;
 184         __le32 count_rx_packet_errors;
 185         __le32 count_rx_decryption_failures;
 186         __le32 count_rx_mic_failures;
 187         __le32 count_rx_no_key_failures;
 188         __le32 count_tx_multicast_frames;
 189         __le32 count_tx_frames_success;
 190         __le32 count_tx_frame_failures;
 191         __le32 count_tx_frames_retried;
 192         __le32 count_tx_frames_multi_retried;
 193         __le32 count_rx_frame_duplicates;
 194         __le32 count_rts_success;
 195         __le32 count_rts_failures;
 196         __le32 count_ack_failures;
 197         __le32 count_rx_multicast_frames;
 198         __le32 count_rx_frames_success;
 199         __le32 count_rx_cmacicv_errors;
 200         __le32 count_rx_cmac_replays;
 201         __le32 count_rx_mgmt_ccmp_replays;
 202         __le32 count_rx_bipmic_errors;
 203         __le32 count_rx_beacon;
 204         __le32 count_miss_beacon;
 205         __le32 reserved[15];
 206 } __packed;
 207
 208 struct hif_mib_count_table {
 209         __le32 count_plcp_errors;
 210         __le32 count_fcs_errors;
 211         __le32 count_tx_packets;
 212         __le32 count_rx_packets;
 213         __le32 count_rx_packet_errors;
 214         __le32 count_rx_decryption_failures;
 215         __le32 count_rx_mic_failures;
 216         __le32 count_rx_no_key_failures;
 217         __le32 count_tx_multicast_frames;
 218         __le32 count_tx_frames_success;
 219         __le32 count_tx_frame_failures;
 220         __le32 count_tx_frames_retried;
 221         __le32 count_tx_frames_multi_retried;
 222         __le32 count_rx_frame_duplicates;
 223         __le32 count_rts_success;
 224         __le32 count_rts_failures;
 225         __le32 count_ack_failures;
 226         __le32 count_rx_multicast_frames;
 227         __le32 count_rx_frames_success;
 228         __le32 count_rx_cmacicv_errors;
 229         __le32 count_rx_cmac_replays;
 230         __le32 count_rx_mgmt_ccmp_replays;
 231         __le32 count_rx_bipmic_errors;
 232 } __packed;
 233
 234 struct hif_mib_mac_address {
 235         u8     mac_addr[ETH_ALEN];
 236         __le16 reserved;
 237 } __packed;
 238
 239 struct hif_mib_wep_default_key_id {
 240         u8     wep_default_key_id;
 241         u8     reserved[3];
 242 } __packed;
 243
 244 struct hif_mib_dot11_rts_threshold {
 245         __le32 threshold;
 246 } __packed;
 247
 248 struct hif_mib_slot_time {
 249         __le32 slot_time;
 250 } __packed;
 251
 252 struct hif_mib_current_tx_power_level {
 253         __le32 power_level; // signed value
 254 } __packed;
 255
 256 struct hif_mib_non_erp_protection {
 257         u8     use_cts_to_self:1;
 258         u8     reserved1:7;
 259         u8     reserved2[3];
 260 } __packed;
 261
 262 enum hif_tmplt {
 263         HIF_TMPLT_PRBREQ = 0x0,
 264         HIF_TMPLT_BCN    = 0x1,
 265         HIF_TMPLT_NULL   = 0x2,
 266         HIF_TMPLT_QOSNUL = 0x3,
 267         HIF_TMPLT_PSPOLL = 0x4,
 268         HIF_TMPLT_PRBRES = 0x5,
 269         HIF_TMPLT_ARP    = 0x6,
 270         HIF_TMPLT_NA     = 0x7
 271 };
 272
 273 #define HIF_API_MAX_TEMPLATE_FRAME_SIZE 700
 274
 275 struct hif_mib_template_frame {
 276         u8     frame_type;
 277         u8     init_rate:7;
 278         u8     mode:1;
 279         __le16 frame_length;
 280         u8     frame[];
 281 } __packed;
 282
 283 struct hif_mib_beacon_wake_up_period {
 284         u8     wakeup_period_min;
 285         u8     receive_dtim:1;
 286         u8     reserved1:7;
 287         u8     wakeup_period_max;
 288         u8     reserved2;
 289 } __packed;
 290
 291 struct hif_mib_rcpi_rssi_threshold {
 292         u8     detection:1;
 293         u8     rcpi_rssi:1;
 294         u8     upperthresh:1;
 295         u8     lowerthresh:1;
 296         u8     reserved:4;
 297         u8     lower_threshold;
 298         u8     upper_threshold;
 299         u8     rolling_average_count;
 300 } __packed;
 301
 302 #define DEFAULT_BA_MAX_RX_BUFFER_SIZE 16
 303
 304 struct hif_mib_block_ack_policy {
 305         u8     block_ack_tx_tid_policy;
 306         u8     reserved1;
 307         u8     block_ack_rx_tid_policy;
 308         u8     block_ack_rx_max_buffer_size;
 309 } __packed;
 310
 311 enum hif_mpdu_start_spacing {
 312         HIF_MPDU_START_SPACING_NO_RESTRIC = 0x0,
 313         HIF_MPDU_START_SPACING_QUARTER    = 0x1,
 314         HIF_MPDU_START_SPACING_HALF       = 0x2,
 315         HIF_MPDU_START_SPACING_ONE        = 0x3,
 316         HIF_MPDU_START_SPACING_TWO        = 0x4,
 317         HIF_MPDU_START_SPACING_FOUR       = 0x5,
 318         HIF_MPDU_START_SPACING_EIGHT      = 0x6,
 319         HIF_MPDU_START_SPACING_SIXTEEN    = 0x7
 320 };
 321
 322 struct hif_mib_set_association_mode {
 323         u8     preambtype_use:1;
 324         u8     mode:1;
 325         u8     rateset:1;
 326         u8     spacing:1;
 327         u8     reserved1:4;
 328         u8     short_preamble:1;
 329         u8     reserved2:7;
 330         u8     greenfield:1;
 331         u8     reserved3:7;
 332         u8     mpdu_start_spacing;
 333         __le32 basic_rate_set;
 334 } __packed;
 335
 336 struct hif_mib_set_uapsd_information {
 337         u8     trig_bckgrnd:1;
 338         u8     trig_be:1;
 339         u8     trig_video:1;
 340         u8     trig_voice:1;
 341         u8     reserved1:4;
 342         u8     deliv_bckgrnd:1;
 343         u8     deliv_be:1;
 344         u8     deliv_video:1;
 345         u8     deliv_voice:1;
 346         u8     reserved2:4;
 347         __le16 min_auto_trigger_interval;
 348         __le16 max_auto_trigger_interval;
 349         __le16 auto_trigger_step;
 350 } __packed;
 351
 352 struct hif_mib_tx_rate_retry_policy {
 353         u8     policy_index;
 354         u8     short_retry_count;
 355         u8     long_retry_count;
 356         u8     first_rate_sel:2;
 357         u8     terminate:1;
 358         u8     count_init:1;
 359         u8     reserved1:4;
 360         u8     rate_recovery_count;
 361         u8     reserved2[3];
 362         u8     rates[12];
 363 } __packed;
 364
 365 #define HIF_TX_RETRY_POLICY_MAX     15
 366 #define HIF_TX_RETRY_POLICY_INVALID HIF_TX_RETRY_POLICY_MAX
 367
 368 struct hif_mib_set_tx_rate_retry_policy {
 369         u8     num_tx_rate_policies;
 370         u8     reserved[3];
 371         struct hif_mib_tx_rate_retry_policy tx_rate_retry_policy[];
 372 } __packed;
 373
 374 struct hif_mib_protected_mgmt_policy {
 375         u8     pmf_enable:1;
 376         u8     unpmf_allowed:1;
 377         u8     host_enc_auth_frames:1;
 378         u8     reserved1:5;
 379         u8     reserved2[3];
 380 } __packed;
 381
 382 struct hif_mib_keep_alive_period {
 383         __le16 keep_alive_period;
 384         u8     reserved[2];
 385 } __packed;
 386
 387 #endif