drivers/staging/vt6656/rf.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   4  * All rights reserved.
   5  *
   6  * File: rf.c
   7  *
   8  * Purpose: rf function code
   9  *
  10  * Author: Jerry Chen
  11  *
  12  * Date: Feb. 19, 2004
  13  *
  14  * Functions:
  15  *      vnt_rf_write_embedded   - Embedded write RF register via MAC
  16  *
  17  * Revision History:
  18  *      RF_VT3226: RobertYu:20051111, VT3226C0 and before
  19  *      RF_VT3226D0: RobertYu:20051228
  20  *      RF_VT3342A0: RobertYu:20060609
  21  *
  22  */
  23
  24 #include <linux/errno.h>
  25 #include "mac.h"
  26 #include "rf.h"
  27 #include "baseband.h"
  28 #include "usbpipe.h"
  29
  30 #define CB_AL2230_INIT_SEQ    15
  31 #define CB_AL7230_INIT_SEQ    16
  32 #define CB_VT3226_INIT_SEQ    11
  33 #define CB_VT3342_INIT_SEQ    13
  34
  35 static u8 al2230_init_table[CB_AL2230_INIT_SEQ][3] = {
  36         {0x03, 0xf7, 0x90},
  37         {0x03, 0x33, 0x31},
  38         {0x01, 0xb8, 0x02},
  39         {0x00, 0xff, 0xf3},
  40         {0x00, 0x05, 0xa4},
  41         {0x0f, 0x4d, 0xc5},
  42         {0x08, 0x05, 0xb6},
  43         {0x01, 0x47, 0xc7},
  44         {0x00, 0x06, 0x88},
  45         {0x04, 0x03, 0xb9},
  46         {0x00, 0xdb, 0xba},
  47         {0x00, 0x09, 0x9b},
  48         {0x0b, 0xdf, 0xfc},
  49         {0x00, 0x00, 0x0d},
  50         {0x00, 0x58, 0x0f}
  51 };
  52
  53 static u8 al2230_channel_table0[CB_MAX_CHANNEL_24G][3] = {
  54         {0x03, 0xf7, 0x90},
  55         {0x03, 0xf7, 0x90},
  56         {0x03, 0xe7, 0x90},
  57         {0x03, 0xe7, 0x90},
  58         {0x03, 0xf7, 0xa0},
  59         {0x03, 0xf7, 0xa0},
  60         {0x03, 0xe7, 0xa0},
  61         {0x03, 0xe7, 0xa0},
  62         {0x03, 0xf7, 0xb0},
  63         {0x03, 0xf7, 0xb0},
  64         {0x03, 0xe7, 0xb0},
  65         {0x03, 0xe7, 0xb0},
  66         {0x03, 0xf7, 0xc0},
  67         {0x03, 0xe7, 0xc0}
  68 };
  69
  70 static u8 al2230_channel_table1[CB_MAX_CHANNEL_24G][3] = {
  71         {0x03, 0x33, 0x31},
  72         {0x0b, 0x33, 0x31},
  73         {0x03, 0x33, 0x31},
  74         {0x0b, 0x33, 0x31},
  75         {0x03, 0x33, 0x31},
  76         {0x0b, 0x33, 0x31},
  77         {0x03, 0x33, 0x31},
  78         {0x0b, 0x33, 0x31},
  79         {0x03, 0x33, 0x31},
  80         {0x0b, 0x33, 0x31},
  81         {0x03, 0x33, 0x31},
  82         {0x0b, 0x33, 0x31},
  83         {0x03, 0x33, 0x31},
  84         {0x06, 0x66, 0x61}
  85 };
  86
  87 static u8 al7230_init_table[CB_AL7230_INIT_SEQ][3] = {
  88         {0x20, 0x37, 0x90},
  89         {0x13, 0x33, 0x31},
  90         {0x84, 0x1f, 0xf2},
  91         {0x3f, 0xdf, 0xa3},
  92         {0x7f, 0xd7, 0x84},
  93         {0x80, 0x2b, 0x55},
  94         {0x56, 0xaf, 0x36},
  95         {0xce, 0x02, 0x07},
  96         {0x6e, 0xbc, 0x98},
  97         {0x22, 0x1b, 0xb9},
  98         {0xe0, 0x00, 0x0a},
  99         {0x08, 0x03, 0x1b},
 100         {0x00, 0x0a, 0x3c},
 101         {0xff, 0xff, 0xfd},
 102         {0x00, 0x00, 0x0e},
 103         {0x1a, 0xba, 0x8f}
 104 };
 105
 106 static u8 al7230_init_table_amode[CB_AL7230_INIT_SEQ][3] = {
 107         {0x2f, 0xf5, 0x20},
 108         {0x00, 0x00, 0x01},
 109         {0x45, 0x1f, 0xe2},
 110         {0x5f, 0xdf, 0xa3},
 111         {0x6f, 0xd7, 0x84},
 112         {0x85, 0x3f, 0x55},
 113         {0x56, 0xaf, 0x36},
 114         {0xce, 0x02, 0x07},
 115         {0x6e, 0xbc, 0x98},
 116         {0x22, 0x1b, 0xb9},
 117         {0xe0, 0x60, 0x0a},
 118         {0x08, 0x03, 0x1b},
 119         {0x00, 0x14, 0x7c},
 120         {0xff, 0xff, 0xfd},
 121         {0x00, 0x00, 0x0e},
 122         {0x12, 0xba, 0xcf}
 123 };
 124
 125 static u8 al7230_channel_table0[CB_MAX_CHANNEL][3] = {
 126         {0x20, 0x37, 0x90},
 127         {0x20, 0x37, 0x90},
 128         {0x20, 0x37, 0x90},
 129         {0x20, 0x37, 0x90},
 130         {0x20, 0x37, 0xa0},
 131         {0x20, 0x37, 0xa0},
 132         {0x20, 0x37, 0xa0},
 133         {0x20, 0x37, 0xa0},
 134         {0x20, 0x37, 0xb0},
 135         {0x20, 0x37, 0xb0},
 136         {0x20, 0x37, 0xb0},
 137         {0x20, 0x37, 0xb0},
 138         {0x20, 0x37, 0xc0},
 139         {0x20, 0x37, 0xc0},
 140         {0x0f, 0xf5, 0x20}, /* channel 15 Tf = 4915MHz */
 141         {0x2f, 0xf5, 0x20},
 142         {0x0f, 0xf5, 0x20},
 143         {0x0f, 0xf5, 0x20},
 144         {0x2f, 0xf5, 0x20},
 145         {0x0f, 0xf5, 0x20},
 146         {0x2f, 0xf5, 0x30},
 147         {0x2f, 0xf5, 0x30},
 148         {0x0f, 0xf5, 0x40},
 149         {0x2f, 0xf5, 0x40},
 150         {0x0f, 0xf5, 0x40},
 151         {0x0f, 0xf5, 0x40},
 152         {0x2f, 0xf5, 0x40},
 153         {0x2f, 0xf5, 0x50},
 154         {0x2f, 0xf5, 0x60},
 155         {0x2f, 0xf5, 0x60},
 156         {0x2f, 0xf5, 0x70},
 157         {0x2f, 0xf5, 0x70},
 158         {0x2f, 0xf5, 0x70},
 159         {0x2f, 0xf5, 0x70},
 160         {0x2f, 0xf5, 0x70},
 161         {0x2f, 0xf5, 0x70},
 162         {0x2f, 0xf5, 0x80},
 163         {0x2f, 0xf5, 0x80},
 164         {0x2f, 0xf5, 0x80},
 165         {0x2f, 0xf5, 0x90},
 166         {0x2f, 0xf5, 0xc0},
 167         {0x2f, 0xf5, 0xc0},
 168         {0x2f, 0xf5, 0xc0},
 169         {0x2f, 0xf5, 0xd0},
 170         {0x2f, 0xf5, 0xd0},
 171         {0x2f, 0xf5, 0xd0},
 172         {0x2f, 0xf5, 0xe0},
 173         {0x2f, 0xf5, 0xe0},
 174         {0x2f, 0xf5, 0xe0},
 175         {0x2f, 0xf5, 0xf0},
 176         {0x2f, 0xf5, 0xf0},
 177         {0x2f, 0xf6, 0x00},
 178         {0x2f, 0xf6, 0x00},
 179         {0x2f, 0xf6, 0x00},
 180         {0x2f, 0xf6, 0x10},
 181         {0x2f, 0xf6, 0x10}
 182 };
 183
 184 static u8 al7230_channel_table1[CB_MAX_CHANNEL][3] = {
 185         {0x13, 0x33, 0x31},
 186         {0x1b, 0x33, 0x31},
 187         {0x03, 0x33, 0x31},
 188         {0x0b, 0x33, 0x31},
 189         {0x13, 0x33, 0x31},
 190         {0x1b, 0x33, 0x31},
 191         {0x03, 0x33, 0x31},
 192         {0x0b, 0x33, 0x31},
 193         {0x13, 0x33, 0x31},
 194         {0x1b, 0x33, 0x31},
 195         {0x03, 0x33, 0x31},
 196         {0x0b, 0x33, 0x31},
 197         {0x13, 0x33, 0x31},
 198         {0x06, 0x66, 0x61},
 199         {0x1d, 0x55, 0x51}, /* channel = 15, Tf = 4915MHz */
 200         {0x00, 0x00, 0x01},
 201         {0x02, 0xaa, 0xa1},
 202         {0x08, 0x00, 0x01},
 203         {0x0a, 0xaa, 0xa1},
 204         {0x0d, 0x55, 0x51},
 205         {0x15, 0x55, 0x51},
 206         {0x00, 0x00, 0x01},
 207         {0x1d, 0x55, 0x51},
 208         {0x00, 0x00, 0x01},
 209         {0x02, 0xaa, 0xa1},
 210         {0x08, 0x00, 0x01},
 211         {0x0a, 0xaa, 0xa1},
 212         {0x15, 0x55, 0x51},
 213         {0x05, 0x55, 0x51},
 214         {0x0a, 0xaa, 0xa1},
 215         {0x10, 0x00, 0x01},
 216         {0x15, 0x55, 0x51},
 217         {0x1a, 0xaa, 0xa1},
 218         {0x00, 0x00, 0x01},
 219         {0x05, 0x55, 0x51},
 220         {0x0a, 0xaa, 0xa1},
 221         {0x15, 0x55, 0x51},
 222         {0x00, 0x00, 0x01},
 223         {0x0a, 0xaa, 0xa1},
 224         {0x15, 0x55, 0x51},
 225         {0x15, 0x55, 0x51},
 226         {0x00, 0x00, 0x01},
 227         {0x0a, 0xaa, 0xa1},
 228         {0x15, 0x55, 0x51},
 229         {0x00, 0x00, 0x01},
 230         {0x0a, 0xaa, 0xa1},
 231         {0x15, 0x55, 0x51},
 232         {0x00, 0x00, 0x01},
 233         {0x0a, 0xaa, 0xa1},
 234         {0x15, 0x55, 0x51},
 235         {0x00, 0x00, 0x01},
 236         {0x18, 0x00, 0x01},
 237         {0x02, 0xaa, 0xa1},
 238         {0x0d, 0x55, 0x51},
 239         {0x18, 0x00, 0x01},
 240         {0x02, 0xaa, 0xb1}
 241 };
 242
 243 static u8 al7230_channel_table2[CB_MAX_CHANNEL][3] = {
 244         {0x7f, 0xd7, 0x84},
 245         {0x7f, 0xd7, 0x84},
 246         {0x7f, 0xd7, 0x84},
 247         {0x7f, 0xd7, 0x84},
 248         {0x7f, 0xd7, 0x84},
 249         {0x7f, 0xd7, 0x84},
 250         {0x7f, 0xd7, 0x84},
 251         {0x7f, 0xd7, 0x84},
 252         {0x7f, 0xd7, 0x84},
 253         {0x7f, 0xd7, 0x84},
 254         {0x7f, 0xd7, 0x84},
 255         {0x7f, 0xd7, 0x84},
 256         {0x7f, 0xd7, 0x84},
 257         {0x7f, 0xd7, 0x84},
 258         {0x7f, 0xd7, 0x84}, /* channel = 15 Tf = 4915MHz */
 259         {0x6f, 0xd7, 0x84},
 260         {0x7f, 0xd7, 0x84},
 261         {0x7f, 0xd7, 0x84},
 262         {0x7f, 0xd7, 0x84},
 263         {0x7f, 0xd7, 0x84},
 264         {0x7f, 0xd7, 0x84},
 265         {0x6f, 0xd7, 0x84},
 266         {0x7f, 0xd7, 0x84},
 267         {0x6f, 0xd7, 0x84},
 268         {0x7f, 0xd7, 0x84},
 269         {0x7f, 0xd7, 0x84},
 270         {0x7f, 0xd7, 0x84},
 271         {0x7f, 0xd7, 0x84},
 272         {0x7f, 0xd7, 0x84},
 273         {0x7f, 0xd7, 0x84},
 274         {0x7f, 0xd7, 0x84},
 275         {0x7f, 0xd7, 0x84},
 276         {0x7f, 0xd7, 0x84},
 277         {0x6f, 0xd7, 0x84},
 278         {0x7f, 0xd7, 0x84},
 279         {0x7f, 0xd7, 0x84},
 280         {0x7f, 0xd7, 0x84},
 281         {0x6f, 0xd7, 0x84},
 282         {0x7f, 0xd7, 0x84},
 283         {0x7f, 0xd7, 0x84},
 284         {0x7f, 0xd7, 0x84},
 285         {0x6f, 0xd7, 0x84},
 286         {0x7f, 0xd7, 0x84},
 287         {0x7f, 0xd7, 0x84},
 288         {0x6f, 0xd7, 0x84},
 289         {0x7f, 0xd7, 0x84},
 290         {0x7f, 0xd7, 0x84},
 291         {0x6f, 0xd7, 0x84},
 292         {0x7f, 0xd7, 0x84},
 293         {0x7f, 0xd7, 0x84},
 294         {0x6f, 0xd7, 0x84},
 295         {0x7f, 0xd7, 0x84},
 296         {0x7f, 0xd7, 0x84},
 297         {0x7f, 0xd7, 0x84},
 298         {0x7f, 0xd7, 0x84},
 299         {0x7f, 0xd7, 0x84}
 300 };
 301
 302 static u8 vt3226_init_table[CB_VT3226_INIT_SEQ][3] = {
 303         {0x03, 0xff, 0x80},
 304         {0x02, 0x82, 0xa1},
 305         {0x03, 0xc6, 0xa2},
 306         {0x01, 0x97, 0x93},
 307         {0x03, 0x66, 0x64},
 308         {0x00, 0x61, 0xa5},
 309         {0x01, 0x7b, 0xd6},
 310         {0x00, 0x80, 0x17},
 311         {0x03, 0xf8, 0x08},
 312         {0x00, 0x02, 0x39},
 313         {0x02, 0x00, 0x2a}
 314 };
 315
 316 static u8 vt3226d0_init_table[CB_VT3226_INIT_SEQ][3] = {
 317         {0x03, 0xff, 0x80},
 318         {0x03, 0x02, 0x21},
 319         {0x03, 0xc6, 0xa2},
 320         {0x01, 0x97, 0x93},
 321         {0x03, 0x66, 0x64},
 322         {0x00, 0x71, 0xa5},
 323         {0x01, 0x15, 0xc6},
 324         {0x01, 0x2e, 0x07},
 325         {0x00, 0x58, 0x08},
 326         {0x00, 0x02, 0x79},
 327         {0x02, 0x01, 0xaa}
 328 };
 329
 330 static u8 vt3226_channel_table0[CB_MAX_CHANNEL_24G][3] = {
 331         {0x01, 0x97, 0x83},
 332         {0x01, 0x97, 0x83},
 333         {0x01, 0x97, 0x93},
 334         {0x01, 0x97, 0x93},
 335         {0x01, 0x97, 0x93},
 336         {0x01, 0x97, 0x93},
 337         {0x01, 0x97, 0xa3},
 338         {0x01, 0x97, 0xa3},
 339         {0x01, 0x97, 0xa3},
 340         {0x01, 0x97, 0xa3},
 341         {0x01, 0x97, 0xb3},
 342         {0x01, 0x97, 0xb3},
 343         {0x01, 0x97, 0xb3},
 344         {0x03, 0x37, 0xc3}
 345 };
 346
 347 static u8 vt3226_channel_table1[CB_MAX_CHANNEL_24G][3] = {
 348         {0x02, 0x66, 0x64},
 349         {0x03, 0x66, 0x64},
 350         {0x00, 0x66, 0x64},
 351         {0x01, 0x66, 0x64},
 352         {0x02, 0x66, 0x64},
 353         {0x03, 0x66, 0x64},
 354         {0x00, 0x66, 0x64},
 355         {0x01, 0x66, 0x64},
 356         {0x02, 0x66, 0x64},
 357         {0x03, 0x66, 0x64},
 358         {0x00, 0x66, 0x64},
 359         {0x01, 0x66, 0x64},
 360         {0x02, 0x66, 0x64},
 361         {0x00, 0xcc, 0xc4}
 362 };
 363
 364 static const u32 vt3226d0_lo_current_table[CB_MAX_CHANNEL_24G] = {
 365         0x0135c600,
 366         0x0135c600,
 367         0x0235c600,
 368         0x0235c600,
 369         0x0235c600,
 370         0x0335c600,
 371         0x0335c600,
 372         0x0335c600,
 373         0x0335c600,
 374         0x0335c600,
 375         0x0335c600,
 376         0x0335c600,
 377         0x0335c600,
 378         0x0135c600
 379 };
 380
 381 static u8 vt3342a0_init_table[CB_VT3342_INIT_SEQ][3] = { /* 11b/g mode */
 382         {0x03, 0xff, 0x80},
 383         {0x02, 0x08, 0x81},
 384         {0x00, 0xc6, 0x02},
 385         {0x03, 0xc5, 0x13},
 386         {0x00, 0xee, 0xe4},
 387         {0x00, 0x71, 0xa5},
 388         {0x01, 0x75, 0x46},
 389         {0x01, 0x40, 0x27},
 390         {0x01, 0x54, 0x08},
 391         {0x00, 0x01, 0x69},
 392         {0x02, 0x00, 0xaa},
 393         {0x00, 0x08, 0xcb},
 394         {0x01, 0x70, 0x0c}
 395 };
 396
 397 static u8 vt3342_channel_table0[CB_MAX_CHANNEL][3] = {
 398         {0x02, 0x05, 0x03},
 399         {0x01, 0x15, 0x03},
 400         {0x03, 0xc5, 0x03},
 401         {0x02, 0x65, 0x03},
 402         {0x01, 0x15, 0x13},
 403         {0x03, 0xc5, 0x13},
 404         {0x02, 0x05, 0x13},
 405         {0x01, 0x15, 0x13},
 406         {0x03, 0xc5, 0x13},
 407         {0x02, 0x65, 0x13},
 408         {0x01, 0x15, 0x23},
 409         {0x03, 0xc5, 0x23},
 410         {0x02, 0x05, 0x23},
 411         {0x00, 0xd5, 0x23},
 412         {0x01, 0x15, 0x13}, /* channel = 15 Tf = 4915MHz */
 413         {0x01, 0x15, 0x13},
 414         {0x01, 0x15, 0x13},
 415         {0x01, 0x15, 0x13},
 416         {0x01, 0x15, 0x13},
 417         {0x01, 0x15, 0x13},
 418         {0x01, 0x15, 0x13},
 419         {0x01, 0x15, 0x13},
 420         {0x01, 0x15, 0x13},
 421         {0x01, 0x15, 0x13},
 422         {0x01, 0x15, 0x13},
 423         {0x01, 0x15, 0x13},
 424         {0x01, 0x15, 0x13},
 425         {0x01, 0x15, 0x13},
 426         {0x01, 0x15, 0x13},
 427         {0x01, 0x55, 0x63},
 428         {0x01, 0x55, 0x63},
 429         {0x02, 0xa5, 0x63},
 430         {0x02, 0xa5, 0x63},
 431         {0x00, 0x05, 0x73},
 432         {0x00, 0x05, 0x73},
 433         {0x01, 0x55, 0x73},
 434         {0x02, 0xa5, 0x73},
 435         {0x00, 0x05, 0x83},
 436         {0x01, 0x55, 0x83},
 437         {0x02, 0xa5, 0x83},
 438         {0x02, 0xa5, 0x83},
 439         {0x02, 0xa5, 0x83},
 440         {0x02, 0xa5, 0x83},
 441         {0x02, 0xa5, 0x83},
 442         {0x02, 0xa5, 0x83},
 443         {0x02, 0xa5, 0x83},
 444         {0x02, 0xa5, 0x83},
 445         {0x02, 0xa5, 0x83},
 446         {0x02, 0xa5, 0x83},
 447         {0x02, 0xa5, 0x83},
 448         {0x02, 0xa5, 0x83},
 449         {0x00, 0x05, 0xF3},
 450         {0x01, 0x56, 0x03},
 451         {0x02, 0xa6, 0x03},
 452         {0x00, 0x06, 0x03},
 453         {0x00, 0x06, 0x03}
 454 };
 455
 456 static u8 vt3342_channel_table1[CB_MAX_CHANNEL][3] = {
 457         {0x01, 0x99, 0x94},
 458         {0x02, 0x44, 0x44},
 459         {0x02, 0xee, 0xe4},
 460         {0x03, 0x99, 0x94},
 461         {0x00, 0x44, 0x44},
 462         {0x00, 0xee, 0xe4},
 463         {0x01, 0x99, 0x94},
 464         {0x02, 0x44, 0x44},
 465         {0x02, 0xee, 0xe4},
 466         {0x03, 0x99, 0x94},
 467         {0x00, 0x44, 0x44},
 468         {0x00, 0xee, 0xe4},
 469         {0x01, 0x99, 0x94},
 470         {0x03, 0x33, 0x34},
 471         {0x00, 0x44, 0x44}, /* channel = 15 Tf = 4915MHz */
 472         {0x00, 0x44, 0x44},
 473         {0x00, 0x44, 0x44},
 474         {0x00, 0x44, 0x44},
 475         {0x00, 0x44, 0x44},
 476         {0x00, 0x44, 0x44},
 477         {0x00, 0x44, 0x44},
 478         {0x00, 0x44, 0x44},
 479         {0x00, 0x44, 0x44},
 480         {0x00, 0x44, 0x44},
 481         {0x00, 0x44, 0x44},
 482         {0x00, 0x44, 0x44},
 483         {0x00, 0x44, 0x44},
 484         {0x00, 0x44, 0x44},
 485         {0x00, 0x44, 0x44},
 486         {0x01, 0x55, 0x54},
 487         {0x01, 0x55, 0x54},
 488         {0x02, 0xaa, 0xa4},
 489         {0x02, 0xaa, 0xa4},
 490         {0x00, 0x00, 0x04},
 491         {0x00, 0x00, 0x04},
 492         {0x01, 0x55, 0x54},
 493         {0x02, 0xaa, 0xa4},
 494         {0x00, 0x00, 0x04},
 495         {0x01, 0x55, 0x54},
 496         {0x02, 0xaa, 0xa4},
 497         {0x02, 0xaa, 0xa4},
 498         {0x02, 0xaa, 0xa4},
 499         {0x02, 0xaa, 0xa4},
 500         {0x02, 0xaa, 0xa4},
 501         {0x02, 0xaa, 0xa4},
 502         {0x02, 0xaa, 0xa4},
 503         {0x02, 0xaa, 0xa4},
 504         {0x02, 0xaa, 0xa4},
 505         {0x02, 0xaa, 0xa4},
 506         {0x02, 0xaa, 0xa4},
 507         {0x02, 0xaa, 0xa4},
 508         {0x03, 0x00, 0x04},
 509         {0x00, 0x55, 0x54},
 510         {0x01, 0xaa, 0xa4},
 511         {0x03, 0x00, 0x04},
 512         {0x03, 0x00, 0x04}
 513 };
 514
 515 enum {
 516         VNT_TABLE_INIT = 0,
 517         VNT_TABLE_INIT_2 = 0,
 518         VNT_TABLE_0 = 1,
 519         VNT_TABLE_1 = 2,
 520         VNT_TABLE_2 = 1
 521 };
 522
 523 struct vnt_table_info {
 524         u8 *addr;
 525         int length;
 526 };
 527
 528 static const struct vnt_table_info vnt_table_seq[][3] = {
 529         {       /* RF_AL2230, RF_AL2230S init table, channel table 0 and 1 */
 530                 {&al2230_init_table[0][0], CB_AL2230_INIT_SEQ * 3},
 531                 {&al2230_channel_table0[0][0], CB_MAX_CHANNEL_24G * 3},
 532                 {&al2230_channel_table1[0][0], CB_MAX_CHANNEL_24G * 3}
 533         }, {    /* RF_AIROHA7230 init table, channel table 0 and 1 */
 534                 {&al7230_init_table[0][0], CB_AL7230_INIT_SEQ * 3},
 535                 {&al7230_channel_table0[0][0], CB_MAX_CHANNEL * 3},
 536                 {&al7230_channel_table1[0][0], CB_MAX_CHANNEL * 3}
 537         }, {    /* RF_VT3226 init table, channel table 0 and 1 */
 538                 {&vt3226_init_table[0][0], CB_VT3226_INIT_SEQ * 3},
 539                 {&vt3226_channel_table0[0][0], CB_MAX_CHANNEL_24G * 3},
 540                 {&vt3226_channel_table1[0][0], CB_MAX_CHANNEL_24G * 3}
 541         }, {    /* RF_VT3226D0 init table, channel table 0 and 1 */
 542                 {&vt3226d0_init_table[0][0], CB_VT3226_INIT_SEQ * 3},
 543                 {&vt3226_channel_table0[0][0], CB_MAX_CHANNEL_24G * 3},
 544                 {&vt3226_channel_table1[0][0], CB_MAX_CHANNEL_24G * 3}
 545         }, {    /* RF_VT3342A0 init table, channel table 0 and 1 */
 546                 {&vt3342a0_init_table[0][0], CB_VT3342_INIT_SEQ * 3},
 547                 {&vt3342_channel_table0[0][0], CB_MAX_CHANNEL * 3},
 548                 {&vt3342_channel_table1[0][0], CB_MAX_CHANNEL * 3}
 549         }, {    /* RF_AIROHA7230 init table 2 and channel table 2 */
 550                 {&al7230_init_table_amode[0][0], CB_AL7230_INIT_SEQ * 3},
 551                 {&al7230_channel_table2[0][0], CB_MAX_CHANNEL * 3},
 552                 {NULL, 0}
 553         }
 554 };
 555
 556 /*
 557  * Description: Write to IF/RF, by embedded programming
 558  */
 559 int vnt_rf_write_embedded(struct vnt_private *priv, u32 data)
 560 {
 561         u8 reg_data[4];
 562
 563         data |= (VNT_RF_REG_LEN << 3) | IFREGCTL_REGW;
 564
 565         reg_data[0] = (u8)data;
 566         reg_data[1] = (u8)(data >> 8);
 567         reg_data[2] = (u8)(data >> 16);
 568         reg_data[3] = (u8)(data >> 24);
 569
 570         return vnt_control_out(priv, MESSAGE_TYPE_WRITE_IFRF, 0, 0,
 571                                ARRAY_SIZE(reg_data), reg_data);
 572 }
 573
 574 static u8 vnt_rf_addpower(struct vnt_private *priv)
 575 {
 576         int base;
 577         s32 rssi = -priv->current_rssi;
 578
 579         if (!rssi)
 580                 return 7;
 581
 582         if (priv->rf_type == RF_VT3226D0)
 583                 base = -60;
 584         else
 585                 base = -70;
 586
 587         if (rssi < base)
 588                 return ((rssi - base + 1) / -5) * 2 + 5;
 589
 590         return 0;
 591 }
 592
 593 /* Set Tx power by power level and rate */
 594 static int vnt_rf_set_txpower(struct vnt_private *priv, u8 power,
 595                               struct ieee80211_channel *ch)
 596 {
 597         u32 power_setting = 0;
 598         int ret = 0;
 599
 600         power += vnt_rf_addpower(priv);
 601         if (power > VNT_RF_MAX_POWER)
 602                 power = VNT_RF_MAX_POWER;
 603
 604         if (priv->power == power)
 605                 return 0;
 606
 607         priv->power = power;
 608
 609         switch (priv->rf_type) {
 610         case RF_AL2230:
 611                 power_setting = 0x0404090 | (power << 12);
 612
 613                 ret = vnt_rf_write_embedded(priv, power_setting);
 614                 if (ret)
 615                         return ret;
 616
 617                 if (ch->flags & IEEE80211_CHAN_NO_OFDM)
 618                         ret = vnt_rf_write_embedded(priv, 0x0001b400);
 619                 else
 620                         ret = vnt_rf_write_embedded(priv, 0x0005a400);
 621
 622                 break;
 623         case RF_AL2230S:
 624                 power_setting = 0x0404090 | (power << 12);
 625
 626                 ret = vnt_rf_write_embedded(priv, power_setting);
 627                 if (ret)
 628                         return ret;
 629
 630                 if (ch->flags & IEEE80211_CHAN_NO_OFDM) {
 631                         ret = vnt_rf_write_embedded(priv, 0x040c1400);
 632                         if (ret)
 633                                 return ret;
 634
 635                         ret = vnt_rf_write_embedded(priv, 0x00299b00);
 636                 } else {
 637                         ret = vnt_rf_write_embedded(priv, 0x0005a400);
 638                         if (ret)
 639                                 return ret;
 640
 641                         ret = vnt_rf_write_embedded(priv, 0x00099b00);
 642                 }
 643
 644                 break;
 645
 646         case RF_AIROHA7230:
 647                 if (ch->flags & IEEE80211_CHAN_NO_OFDM)
 648                         ret = vnt_rf_write_embedded(priv, 0x111bb900);
 649                 else
 650                         ret = vnt_rf_write_embedded(priv, 0x221bb900);
 651
 652                 if (ret)
 653                         return ret;
 654
 655                 /*
 656                  * 0x080F1B00 for 3 wire control TxGain(D10)
 657                  * and 0x31 as TX Gain value
 658                  */
 659                 power_setting = 0x080c0b00 | (power << 12);
 660
 661                 ret = vnt_rf_write_embedded(priv, power_setting);
 662                 break;
 663
 664         case RF_VT3226:
 665                 power_setting = ((0x3f - power) << 20) | (0x17 << 8);
 666
 667                 ret = vnt_rf_write_embedded(priv, power_setting);
 668                 break;
 669         case RF_VT3226D0:
 670                 if (ch->flags & IEEE80211_CHAN_NO_OFDM) {
 671                         u16 hw_value = ch->hw_value;
 672
 673                         power_setting = ((0x3f - power) << 20) | (0xe07 << 8);
 674
 675                         ret = vnt_rf_write_embedded(priv, power_setting);
 676                         if (ret)
 677                                 return ret;
 678
 679                         ret = vnt_rf_write_embedded(priv, 0x03c6a200);
 680                         if (ret)
 681                                 return ret;
 682
 683                         dev_dbg(&priv->usb->dev,
 684                                 "%s 11b channel [%d]\n", __func__, hw_value);
 685
 686                         hw_value--;
 687
 688                         if (hw_value < ARRAY_SIZE(vt3226d0_lo_current_table)) {
 689                                 ret = vnt_rf_write_embedded(priv,
 690                                         vt3226d0_lo_current_table[hw_value]);
 691                                 if (ret)
 692                                         return ret;
 693                         }
 694
 695                         ret = vnt_rf_write_embedded(priv, 0x015C0800);
 696                 } else {
 697                         dev_dbg(&priv->usb->dev,
 698                                 "@@@@ %s> 11G mode\n", __func__);
 699
 700                         power_setting = ((0x3f - power) << 20) | (0x7 << 8);
 701
 702                         ret = vnt_rf_write_embedded(priv, power_setting);
 703                         if (ret)
 704                                 return ret;
 705
 706                         ret = vnt_rf_write_embedded(priv, 0x00C6A200);
 707                         if (ret)
 708                                 return ret;
 709
 710                         ret = vnt_rf_write_embedded(priv, 0x016BC600);
 711                         if (ret)
 712                                 return ret;
 713
 714                         ret = vnt_rf_write_embedded(priv, 0x00900800);
 715                 }
 716
 717                 break;
 718
 719         case RF_VT3342A0:
 720                 power_setting =  ((0x3f - power) << 20) | (0x27 << 8);
 721
 722                 ret = vnt_rf_write_embedded(priv, power_setting);
 723                 break;
 724         default:
 725                 break;
 726         }
 727         return ret;
 728 }
 729
 730 /* Set Tx power by channel number type */
 731 int vnt_rf_setpower(struct vnt_private *priv,
 732                     struct ieee80211_channel *ch)
 733 {
 734         u16 channel;
 735         u8 power = priv->cck_pwr;
 736
 737         if (!ch)
 738                 return -EINVAL;
 739
 740         /* set channel number to array number */
 741         channel = ch->hw_value - 1;
 742
 743         if (ch->flags & IEEE80211_CHAN_NO_OFDM) {
 744                 if (channel < ARRAY_SIZE(priv->cck_pwr_tbl))
 745                         power = priv->cck_pwr_tbl[channel];
 746         } else if (ch->band == NL80211_BAND_5GHZ) {
 747                 /* remove 14 channels to array size */
 748                 channel -= 14;
 749
 750                 if (channel < ARRAY_SIZE(priv->ofdm_a_pwr_tbl))
 751                         power = priv->ofdm_a_pwr_tbl[channel];
 752         } else {
 753                 if (channel < ARRAY_SIZE(priv->ofdm_pwr_tbl))
 754                         power = priv->ofdm_pwr_tbl[channel];
 755         }
 756
 757         return vnt_rf_set_txpower(priv, power, ch);
 758 }
 759
 760 /* Convert rssi to dbm */
 761 void vnt_rf_rssi_to_dbm(struct vnt_private *priv, u8 rssi, long *dbm)
 762 {
 763         u8 idx = ((rssi & 0xc0) >> 6) & 0x03;
 764         long b = rssi & 0x3f;
 765         long a = 0;
 766         u8 airoharf[4] = {0, 18, 0, 40};
 767
 768         switch (priv->rf_type) {
 769         case RF_AL2230:
 770         case RF_AL2230S:
 771         case RF_AIROHA7230:
 772         case RF_VT3226:
 773         case RF_VT3226D0:
 774         case RF_VT3342A0:
 775                 a = airoharf[idx];
 776                 break;
 777         default:
 778                 break;
 779         }
 780
 781         *dbm = -1 * (a + b * 2);
 782 }
 783
 784 int vnt_rf_table_download(struct vnt_private *priv)
 785 {
 786         int ret;
 787         int idx = -1;
 788         const struct vnt_table_info *table_seq;
 789
 790         switch (priv->rf_type) {
 791         case RF_AL2230:
 792         case RF_AL2230S:
 793                 idx = 0;
 794                 break;
 795         case RF_AIROHA7230:
 796                 idx = 1;
 797                 break;
 798         case RF_VT3226:
 799                 idx = 2;
 800                 break;
 801         case RF_VT3226D0:
 802                 idx = 3;
 803                 break;
 804         case RF_VT3342A0:
 805                 idx = 4;
 806                 break;
 807         }
 808
 809         if (idx < 0)
 810                 return 0;
 811
 812         table_seq = &vnt_table_seq[idx][0];
 813
 814         /* Init Table */
 815         ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
 816                               MESSAGE_REQUEST_RF_INIT,
 817                               table_seq[VNT_TABLE_INIT].length,
 818                               table_seq[VNT_TABLE_INIT].addr);
 819         if (ret)
 820                 return ret;
 821
 822         /* Channel Table 0 */
 823         ret = vnt_control_out_blocks(priv, VNT_REG_BLOCK_SIZE,
 824                                      MESSAGE_REQUEST_RF_CH0,
 825                                      table_seq[VNT_TABLE_0].length,
 826                                      table_seq[VNT_TABLE_0].addr);
 827         if (ret)
 828                 return ret;
 829
 830         /* Channel Table 1 */
 831         ret = vnt_control_out_blocks(priv, VNT_REG_BLOCK_SIZE,
 832                                      MESSAGE_REQUEST_RF_CH1,
 833                                      table_seq[VNT_TABLE_1].length,
 834                                      table_seq[VNT_TABLE_1].addr);
 835
 836         if (priv->rf_type == RF_AIROHA7230) {
 837                 table_seq = &vnt_table_seq[5][0];
 838
 839                 /* Init Table 2 */
 840                 ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
 841                                       MESSAGE_REQUEST_RF_INIT2,
 842                                       table_seq[VNT_TABLE_INIT_2].length,
 843                                       table_seq[VNT_TABLE_INIT_2].addr);
 844                 if (ret)
 845                         return ret;
 846
 847                 /* Channel Table 2 */
 848                 ret = vnt_control_out_blocks(priv, VNT_REG_BLOCK_SIZE,
 849                                              MESSAGE_REQUEST_RF_CH2,
 850                                              table_seq[VNT_TABLE_2].length,
 851                                              table_seq[VNT_TABLE_2].addr);
 852         }
 853
 854         return ret;
 855 }