2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: Implement functions to access baseband
29 * BBuGetFrameTime - Calculate data frame transmitting time
30 * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
31 * BBbReadEmbedded - Embedded read baseband register via MAC
32 * BBbWriteEmbedded - Embedded write baseband register via MAC
33 * BBbVT3253Init - VIA VT3253 baseband chip init code
36 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
37 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
38 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCalculateParameter().
39 * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
41 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
42 * Modified BBvLoopbackOn & BBvLoopbackOff().
53 /*--------------------- Static Classes ----------------------------*/
55 /*--------------------- Static Variables --------------------------*/
57 /*--------------------- Static Functions --------------------------*/
59 /*--------------------- Export Variables --------------------------*/
61 /*--------------------- Static Definitions -------------------------*/
63 /*--------------------- Static Classes ----------------------------*/
65 /*--------------------- Static Variables --------------------------*/
67 #define CB_VT3253_INIT_FOR_RFMD 446
68 static unsigned char byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
517 #define CB_VT3253B0_INIT_FOR_RFMD 256
518 static unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
777 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
779 static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
977 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
979 static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
1088 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1238 #define CB_VT3253B0_INIT_FOR_UW2451 256
1240 static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1349 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1499 #define CB_VT3253B0_AGC 193
1501 static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1697 static const unsigned short awcFrameTime[MAX_RATE] = {
1698 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
1701 /*--------------------- Static Functions --------------------------*/
1705 s_ulGetRatio(struct vnt_private *priv);
1710 struct vnt_private *priv
1716 struct vnt_private *priv
1719 if (priv->dwRxAntennaSel == 0) {
1720 priv->dwRxAntennaSel = 1;
1721 if (priv->bTxRxAntInv == true)
1722 BBvSetRxAntennaMode(priv, ANT_A);
1724 BBvSetRxAntennaMode(priv, ANT_B);
1726 priv->dwRxAntennaSel = 0;
1727 if (priv->bTxRxAntInv == true)
1728 BBvSetRxAntennaMode(priv, ANT_B);
1730 BBvSetRxAntennaMode(priv, ANT_A);
1732 if (priv->dwTxAntennaSel == 0) {
1733 priv->dwTxAntennaSel = 1;
1734 BBvSetTxAntennaMode(priv, ANT_B);
1736 priv->dwTxAntennaSel = 0;
1737 BBvSetTxAntennaMode(priv, ANT_A);
1741 /*--------------------- Export Variables --------------------------*/
1743 * Description: Calculate data frame transmitting time
1747 * byPreambleType - Preamble Type
1748 * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1749 * cbFrameLength - Baseband Type
1753 * Return Value: FrameTime
1758 unsigned char byPreambleType,
1759 unsigned char byPktType,
1760 unsigned int cbFrameLength,
1761 unsigned short wRate
1764 unsigned int uFrameTime;
1765 unsigned int uPreamble;
1767 unsigned int uRateIdx = (unsigned int) wRate;
1768 unsigned int uRate = 0;
1770 if (uRateIdx > RATE_54M) {
1775 uRate = (unsigned int)awcFrameTime[uRateIdx];
1777 if (uRateIdx <= 3) { /* CCK mode */
1778 if (byPreambleType == 1) /* Short */
1783 uFrameTime = (cbFrameLength * 80) / uRate; /* ????? */
1784 uTmp = (uFrameTime * uRate) / 80;
1785 if (cbFrameLength != uTmp)
1788 return uPreamble + uFrameTime;
1790 uFrameTime = (cbFrameLength * 8 + 22) / uRate; /* ???????? */
1791 uTmp = ((uFrameTime * uRate) - 22) / 8;
1792 if (cbFrameLength != uTmp)
1795 uFrameTime = uFrameTime * 4; /* ??????? */
1796 if (byPktType != PK_TYPE_11A)
1797 uFrameTime += 6; /* ?????? */
1799 return 20 + uFrameTime; /* ?????? */
1803 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
1807 * priv - Device Structure
1808 * frame_length - Tx Frame Length
1811 * struct vnt_phy_field *phy
1812 * - pointer to Phy Length field
1813 * - pointer to Phy Service field
1814 * - pointer to Phy Signal field
1816 * Return Value: none
1819 void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
1820 u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
1826 u8 preamble_type = priv->byPreambleType;
1828 bit_count = frame_length * 8;
1839 count = bit_count / 2;
1841 if (preamble_type == 1)
1848 count = (bit_count * 10) / 55;
1849 tmp = (count * 55) / 10;
1851 if (tmp != bit_count)
1854 if (preamble_type == 1)
1861 count = bit_count / 11;
1864 if (tmp != bit_count) {
1867 if ((bit_count - tmp) <= 3)
1871 if (preamble_type == 1)
1878 if (pkt_type == PK_TYPE_11A)
1885 if (pkt_type == PK_TYPE_11A)
1892 if (pkt_type == PK_TYPE_11A)
1899 if (pkt_type == PK_TYPE_11A)
1906 if (pkt_type == PK_TYPE_11A)
1913 if (pkt_type == PK_TYPE_11A)
1920 if (pkt_type == PK_TYPE_11A)
1927 if (pkt_type == PK_TYPE_11A)
1933 if (pkt_type == PK_TYPE_11A)
1940 if (pkt_type == PK_TYPE_11B) {
1941 phy->service = 0x00;
1943 phy->service |= 0x80;
1944 phy->len = cpu_to_le16((u16)count);
1946 phy->service = 0x00;
1947 phy->len = cpu_to_le16((u16)frame_length);
1952 * Description: Read a byte from BASEBAND, by embedded programming
1956 * dwIoBase - I/O base address
1957 * byBBAddr - address of register in Baseband
1959 * pbyData - data read
1961 * Return Value: true if succeeded; false if failed.
1964 bool BBbReadEmbedded(struct vnt_private *priv,
1965 unsigned char byBBAddr, unsigned char *pbyData)
1967 void __iomem *dwIoBase = priv->PortOffset;
1969 unsigned char byValue;
1972 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
1975 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
1976 /* W_MAX_TIMEOUT is the timeout period */
1977 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1978 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
1979 if (byValue & BBREGCTL_DONE)
1984 VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
1986 if (ww == W_MAX_TIMEOUT) {
1988 pr_debug(" DBG_PORT80(0x30)\n");
1995 * Description: Write a Byte to BASEBAND, by embedded programming
1999 * dwIoBase - I/O base address
2000 * byBBAddr - address of register in Baseband
2001 * byData - data to write
2005 * Return Value: true if succeeded; false if failed.
2008 bool BBbWriteEmbedded(struct vnt_private *priv,
2009 unsigned char byBBAddr, unsigned char byData)
2011 void __iomem *dwIoBase = priv->PortOffset;
2013 unsigned char byValue;
2016 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2018 VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2020 /* turn on BBREGCTL_REGW */
2021 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2022 /* W_MAX_TIMEOUT is the timeout period */
2023 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2024 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2025 if (byValue & BBREGCTL_DONE)
2029 if (ww == W_MAX_TIMEOUT) {
2031 pr_debug(" DBG_PORT80(0x31)\n");
2038 * Description: VIA VT3253 Baseband chip init function
2042 * dwIoBase - I/O base address
2043 * byRevId - Revision ID
2044 * byRFType - RF type
2048 * Return Value: true if succeeded; false if failed.
2052 bool BBbVT3253Init(struct vnt_private *priv)
2054 bool bResult = true;
2056 void __iomem *dwIoBase = priv->PortOffset;
2057 unsigned char byRFType = priv->byRFType;
2058 unsigned char byLocalID = priv->byLocalID;
2060 if (byRFType == RF_RFMD2959) {
2061 if (byLocalID <= REV_ID_VT3253_A1) {
2062 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
2063 bResult &= BBbWriteEmbedded(priv, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]);
2066 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
2067 bResult &= BBbWriteEmbedded(priv, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]);
2069 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
2070 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]);
2072 VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2073 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
2075 priv->abyBBVGA[0] = 0x18;
2076 priv->abyBBVGA[1] = 0x0A;
2077 priv->abyBBVGA[2] = 0x0;
2078 priv->abyBBVGA[3] = 0x0;
2079 priv->ldBmThreshold[0] = -70;
2080 priv->ldBmThreshold[1] = -50;
2081 priv->ldBmThreshold[2] = 0;
2082 priv->ldBmThreshold[3] = 0;
2083 } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
2084 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2085 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2087 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2088 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2090 priv->abyBBVGA[0] = 0x1C;
2091 priv->abyBBVGA[1] = 0x10;
2092 priv->abyBBVGA[2] = 0x0;
2093 priv->abyBBVGA[3] = 0x0;
2094 priv->ldBmThreshold[0] = -70;
2095 priv->ldBmThreshold[1] = -48;
2096 priv->ldBmThreshold[2] = 0;
2097 priv->ldBmThreshold[3] = 0;
2098 } else if (byRFType == RF_UW2451) {
2099 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2100 bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
2102 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2103 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2105 VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2106 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
2108 priv->abyBBVGA[0] = 0x14;
2109 priv->abyBBVGA[1] = 0x0A;
2110 priv->abyBBVGA[2] = 0x0;
2111 priv->abyBBVGA[3] = 0x0;
2112 priv->ldBmThreshold[0] = -60;
2113 priv->ldBmThreshold[1] = -50;
2114 priv->ldBmThreshold[2] = 0;
2115 priv->ldBmThreshold[3] = 0;
2116 } else if (byRFType == RF_UW2452) {
2117 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2118 bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
2120 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2121 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2122 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2123 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2124 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2125 bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);
2127 /* {{RobertYu:20050125, request by Jack */
2128 bResult &= BBbWriteEmbedded(priv, 0x90, 0x20);
2129 bResult &= BBbWriteEmbedded(priv, 0x97, 0xeb);
2132 /* {{RobertYu:20050221, request by Jack */
2133 bResult &= BBbWriteEmbedded(priv, 0xa6, 0x00);
2134 bResult &= BBbWriteEmbedded(priv, 0xa8, 0x30);
2136 bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);
2138 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2139 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2141 priv->abyBBVGA[0] = 0x14;
2142 priv->abyBBVGA[1] = 0x0A;
2143 priv->abyBBVGA[2] = 0x0;
2144 priv->abyBBVGA[3] = 0x0;
2145 priv->ldBmThreshold[0] = -60;
2146 priv->ldBmThreshold[1] = -50;
2147 priv->ldBmThreshold[2] = 0;
2148 priv->ldBmThreshold[3] = 0;
2151 } else if (byRFType == RF_VT3226) {
2152 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2153 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2155 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2156 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2158 priv->abyBBVGA[0] = 0x1C;
2159 priv->abyBBVGA[1] = 0x10;
2160 priv->abyBBVGA[2] = 0x0;
2161 priv->abyBBVGA[3] = 0x0;
2162 priv->ldBmThreshold[0] = -70;
2163 priv->ldBmThreshold[1] = -48;
2164 priv->ldBmThreshold[2] = 0;
2165 priv->ldBmThreshold[3] = 0;
2166 /* Fix VT3226 DFC system timing issue */
2167 MACvSetRFLE_LatchBase(dwIoBase);
2168 /* {{ RobertYu: 20050104 */
2169 } else if (byRFType == RF_AIROHA7230) {
2170 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2171 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2174 /* {{ RobertYu:20050223, request by JerryChung */
2175 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2176 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2177 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2178 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2179 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2180 bResult &= BBbWriteEmbedded(dwIoBase, 0xd7, 0x06);
2183 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2184 bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2186 priv->abyBBVGA[0] = 0x1C;
2187 priv->abyBBVGA[1] = 0x10;
2188 priv->abyBBVGA[2] = 0x0;
2189 priv->abyBBVGA[3] = 0x0;
2190 priv->ldBmThreshold[0] = -70;
2191 priv->ldBmThreshold[1] = -48;
2192 priv->ldBmThreshold[2] = 0;
2193 priv->ldBmThreshold[3] = 0;
2196 /* No VGA Table now */
2197 priv->bUpdateBBVGA = false;
2198 priv->abyBBVGA[0] = 0x1C;
2201 if (byLocalID > REV_ID_VT3253_A1) {
2202 BBbWriteEmbedded(priv, 0x04, 0x7F);
2203 BBbWriteEmbedded(priv, 0x0D, 0x01);
2210 * Description: Set ShortSlotTime mode
2214 * priv - Device Structure
2218 * Return Value: none
2222 BBvSetShortSlotTime(struct vnt_private *priv)
2224 unsigned char byBBRxConf = 0;
2225 unsigned char byBBVGA = 0;
2227 BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2229 if (priv->bShortSlotTime)
2230 byBBRxConf &= 0xDF; /* 1101 1111 */
2232 byBBRxConf |= 0x20; /* 0010 0000 */
2234 /* patch for 3253B0 Baseband with Cardbus module */
2235 BBbReadEmbedded(priv, 0xE7, &byBBVGA);
2236 if (byBBVGA == priv->abyBBVGA[0])
2237 byBBRxConf |= 0x20; /* 0010 0000 */
2239 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2242 void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData)
2244 unsigned char byBBRxConf = 0;
2246 BBbWriteEmbedded(priv, 0xE7, byData);
2248 BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2249 /* patch for 3253B0 Baseband with Cardbus module */
2250 if (byData == priv->abyBBVGA[0])
2251 byBBRxConf |= 0x20; /* 0010 0000 */
2252 else if (priv->bShortSlotTime)
2253 byBBRxConf &= 0xDF; /* 1101 1111 */
2255 byBBRxConf |= 0x20; /* 0010 0000 */
2256 priv->byBBVGACurrent = byData;
2257 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2261 * Description: Baseband SoftwareReset
2265 * dwIoBase - I/O base address
2269 * Return Value: none
2273 BBvSoftwareReset(struct vnt_private *priv)
2275 BBbWriteEmbedded(priv, 0x50, 0x40);
2276 BBbWriteEmbedded(priv, 0x50, 0);
2277 BBbWriteEmbedded(priv, 0x9C, 0x01);
2278 BBbWriteEmbedded(priv, 0x9C, 0);
2282 * Description: Baseband Power Save Mode ON
2286 * dwIoBase - I/O base address
2290 * Return Value: none
2294 BBvPowerSaveModeON(struct vnt_private *priv)
2296 unsigned char byOrgData;
2298 BBbReadEmbedded(priv, 0x0D, &byOrgData);
2299 byOrgData |= BIT(0);
2300 BBbWriteEmbedded(priv, 0x0D, byOrgData);
2304 * Description: Baseband Power Save Mode OFF
2308 * dwIoBase - I/O base address
2312 * Return Value: none
2316 BBvPowerSaveModeOFF(struct vnt_private *priv)
2318 unsigned char byOrgData;
2320 BBbReadEmbedded(priv, 0x0D, &byOrgData);
2321 byOrgData &= ~(BIT(0));
2322 BBbWriteEmbedded(priv, 0x0D, byOrgData);
2326 * Description: Set Tx Antenna mode
2330 * priv - Device Structure
2331 * byAntennaMode - Antenna Mode
2335 * Return Value: none
2340 BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)
2342 unsigned char byBBTxConf;
2344 BBbReadEmbedded(priv, 0x09, &byBBTxConf); /* CR09 */
2345 if (byAntennaMode == ANT_DIVERSITY) {
2346 /* bit 1 is diversity */
2348 } else if (byAntennaMode == ANT_A) {
2349 /* bit 2 is ANTSEL */
2350 byBBTxConf &= 0xF9; /* 1111 1001 */
2351 } else if (byAntennaMode == ANT_B) {
2352 byBBTxConf &= 0xFD; /* 1111 1101 */
2355 BBbWriteEmbedded(priv, 0x09, byBBTxConf); /* CR09 */
2359 * Description: Set Rx Antenna mode
2363 * priv - Device Structure
2364 * byAntennaMode - Antenna Mode
2368 * Return Value: none
2373 BBvSetRxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)
2375 unsigned char byBBRxConf;
2377 BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2378 if (byAntennaMode == ANT_DIVERSITY) {
2381 } else if (byAntennaMode == ANT_A) {
2382 byBBRxConf &= 0xFC; /* 1111 1100 */
2383 } else if (byAntennaMode == ANT_B) {
2384 byBBRxConf &= 0xFE; /* 1111 1110 */
2387 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2391 * Description: BBvSetDeepSleep
2395 * priv - Device Structure
2399 * Return Value: none
2403 BBvSetDeepSleep(struct vnt_private *priv, unsigned char byLocalID)
2405 BBbWriteEmbedded(priv, 0x0C, 0x17); /* CR12 */
2406 BBbWriteEmbedded(priv, 0x0D, 0xB9); /* CR13 */
2410 BBvExitDeepSleep(struct vnt_private *priv, unsigned char byLocalID)
2412 BBbWriteEmbedded(priv, 0x0C, 0x00); /* CR12 */
2413 BBbWriteEmbedded(priv, 0x0D, 0x01); /* CR13 */
2418 s_ulGetRatio(struct vnt_private *priv)
2420 unsigned long ulRatio = 0;
2421 unsigned long ulMaxPacket;
2422 unsigned long ulPacketNum;
2424 /* This is a thousand-ratio */
2425 ulMaxPacket = priv->uNumSQ3[RATE_54M];
2426 if (priv->uNumSQ3[RATE_54M] != 0) {
2427 ulPacketNum = priv->uNumSQ3[RATE_54M];
2428 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2429 ulRatio += TOP_RATE_54M;
2431 if (priv->uNumSQ3[RATE_48M] > ulMaxPacket) {
2432 ulPacketNum = priv->uNumSQ3[RATE_54M] + priv->uNumSQ3[RATE_48M];
2433 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2434 ulRatio += TOP_RATE_48M;
2435 ulMaxPacket = priv->uNumSQ3[RATE_48M];
2437 if (priv->uNumSQ3[RATE_36M] > ulMaxPacket) {
2438 ulPacketNum = priv->uNumSQ3[RATE_54M] + priv->uNumSQ3[RATE_48M] +
2439 priv->uNumSQ3[RATE_36M];
2440 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2441 ulRatio += TOP_RATE_36M;
2442 ulMaxPacket = priv->uNumSQ3[RATE_36M];
2444 if (priv->uNumSQ3[RATE_24M] > ulMaxPacket) {
2445 ulPacketNum = priv->uNumSQ3[RATE_54M] + priv->uNumSQ3[RATE_48M] +
2446 priv->uNumSQ3[RATE_36M] + priv->uNumSQ3[RATE_24M];
2447 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2448 ulRatio += TOP_RATE_24M;
2449 ulMaxPacket = priv->uNumSQ3[RATE_24M];
2451 if (priv->uNumSQ3[RATE_18M] > ulMaxPacket) {
2452 ulPacketNum = priv->uNumSQ3[RATE_54M] + priv->uNumSQ3[RATE_48M] +
2453 priv->uNumSQ3[RATE_36M] + priv->uNumSQ3[RATE_24M] +
2454 priv->uNumSQ3[RATE_18M];
2455 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2456 ulRatio += TOP_RATE_18M;
2457 ulMaxPacket = priv->uNumSQ3[RATE_18M];
2459 if (priv->uNumSQ3[RATE_12M] > ulMaxPacket) {
2460 ulPacketNum = priv->uNumSQ3[RATE_54M] + priv->uNumSQ3[RATE_48M] +
2461 priv->uNumSQ3[RATE_36M] + priv->uNumSQ3[RATE_24M] +
2462 priv->uNumSQ3[RATE_18M] + priv->uNumSQ3[RATE_12M];
2463 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2464 ulRatio += TOP_RATE_12M;
2465 ulMaxPacket = priv->uNumSQ3[RATE_12M];
2467 if (priv->uNumSQ3[RATE_11M] > ulMaxPacket) {
2468 ulPacketNum = priv->uDiversityCnt - priv->uNumSQ3[RATE_1M] -
2469 priv->uNumSQ3[RATE_2M] - priv->uNumSQ3[RATE_5M] -
2470 priv->uNumSQ3[RATE_6M] - priv->uNumSQ3[RATE_9M];
2471 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2472 ulRatio += TOP_RATE_11M;
2473 ulMaxPacket = priv->uNumSQ3[RATE_11M];
2475 if (priv->uNumSQ3[RATE_9M] > ulMaxPacket) {
2476 ulPacketNum = priv->uDiversityCnt - priv->uNumSQ3[RATE_1M] -
2477 priv->uNumSQ3[RATE_2M] - priv->uNumSQ3[RATE_5M] -
2478 priv->uNumSQ3[RATE_6M];
2479 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2480 ulRatio += TOP_RATE_9M;
2481 ulMaxPacket = priv->uNumSQ3[RATE_9M];
2483 if (priv->uNumSQ3[RATE_6M] > ulMaxPacket) {
2484 ulPacketNum = priv->uDiversityCnt - priv->uNumSQ3[RATE_1M] -
2485 priv->uNumSQ3[RATE_2M] - priv->uNumSQ3[RATE_5M];
2486 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2487 ulRatio += TOP_RATE_6M;
2488 ulMaxPacket = priv->uNumSQ3[RATE_6M];
2490 if (priv->uNumSQ3[RATE_5M] > ulMaxPacket) {
2491 ulPacketNum = priv->uDiversityCnt - priv->uNumSQ3[RATE_1M] -
2492 priv->uNumSQ3[RATE_2M];
2493 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2494 ulRatio += TOP_RATE_55M;
2495 ulMaxPacket = priv->uNumSQ3[RATE_5M];
2497 if (priv->uNumSQ3[RATE_2M] > ulMaxPacket) {
2498 ulPacketNum = priv->uDiversityCnt - priv->uNumSQ3[RATE_1M];
2499 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2500 ulRatio += TOP_RATE_2M;
2501 ulMaxPacket = priv->uNumSQ3[RATE_2M];
2503 if (priv->uNumSQ3[RATE_1M] > ulMaxPacket) {
2504 ulPacketNum = priv->uDiversityCnt;
2505 ulRatio = (ulPacketNum * 1000 / priv->uDiversityCnt);
2506 ulRatio += TOP_RATE_1M;
2513 BBvClearAntDivSQ3Value(struct vnt_private *priv)
2517 priv->uDiversityCnt = 0;
2518 for (ii = 0; ii < MAX_RATE; ii++)
2519 priv->uNumSQ3[ii] = 0;
2523 * Description: Antenna Diversity
2527 * priv - Device Structure
2528 * byRSR - RSR from received packet
2529 * bySQ3 - SQ3 value from received packet
2533 * Return Value: none
2537 void BBvAntennaDiversity(struct vnt_private *priv,
2538 unsigned char byRxRate, unsigned char bySQ3)
2540 if ((byRxRate >= MAX_RATE) || (priv->wAntDiversityMaxRate >= MAX_RATE))
2543 priv->uDiversityCnt++;
2545 priv->uNumSQ3[byRxRate]++;
2547 if (priv->byAntennaState == 0) {
2548 if (priv->uDiversityCnt > priv->ulDiversityNValue) {
2549 pr_debug("ulDiversityNValue=[%d],54M-[%d]\n",
2550 (int)priv->ulDiversityNValue,
2551 (int)priv->uNumSQ3[(int)priv->wAntDiversityMaxRate]);
2553 if (priv->uNumSQ3[priv->wAntDiversityMaxRate] < priv->uDiversityCnt/2) {
2554 priv->ulRatio_State0 = s_ulGetRatio(priv);
2555 pr_debug("SQ3_State0, rate = [%08x]\n",
2556 (int)priv->ulRatio_State0);
2558 if (priv->byTMax == 0)
2560 pr_debug("1.[%08x], uNumSQ3[%d]=%d, %d\n",
2561 (int)priv->ulRatio_State0,
2562 (int)priv->wAntDiversityMaxRate,
2563 (int)priv->uNumSQ3[(int)priv->wAntDiversityMaxRate],
2564 (int)priv->uDiversityCnt);
2566 s_vChangeAntenna(priv);
2567 priv->byAntennaState = 1;
2568 del_timer(&priv->TimerSQ3Tmax3);
2569 del_timer(&priv->TimerSQ3Tmax2);
2570 priv->TimerSQ3Tmax1.expires = RUN_AT(priv->byTMax * HZ);
2571 add_timer(&priv->TimerSQ3Tmax1);
2574 priv->TimerSQ3Tmax3.expires = RUN_AT(priv->byTMax3 * HZ);
2575 add_timer(&priv->TimerSQ3Tmax3);
2577 BBvClearAntDivSQ3Value(priv);
2580 } else { /* byAntennaState == 1 */
2582 if (priv->uDiversityCnt > priv->ulDiversityMValue) {
2583 del_timer(&priv->TimerSQ3Tmax1);
2585 priv->ulRatio_State1 = s_ulGetRatio(priv);
2586 pr_debug("RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2587 (int)priv->ulRatio_State0,
2588 (int)priv->ulRatio_State1);
2590 if (priv->ulRatio_State1 < priv->ulRatio_State0) {
2591 pr_debug("2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2592 (int)priv->ulRatio_State0,
2593 (int)priv->ulRatio_State1,
2594 (int)priv->wAntDiversityMaxRate,
2595 (int)priv->uNumSQ3[(int)priv->wAntDiversityMaxRate],
2596 (int)priv->uDiversityCnt);
2598 s_vChangeAntenna(priv);
2599 priv->TimerSQ3Tmax3.expires = RUN_AT(priv->byTMax3 * HZ);
2600 priv->TimerSQ3Tmax2.expires = RUN_AT(priv->byTMax2 * HZ);
2601 add_timer(&priv->TimerSQ3Tmax3);
2602 add_timer(&priv->TimerSQ3Tmax2);
2604 priv->byAntennaState = 0;
2605 BBvClearAntDivSQ3Value(priv);
2607 } /* byAntennaState */
2613 * Timer for SQ3 antenna diversity
2620 * Return Value: none
2629 struct vnt_private *priv = (struct vnt_private *)data;
2630 unsigned long flags;
2632 pr_debug("TimerSQ3CallBack...\n");
2634 spin_lock_irqsave(&priv->lock, flags);
2636 pr_debug("3.[%08x][%08x], %d\n",
2637 (int)priv->ulRatio_State0, (int)priv->ulRatio_State1,
2638 (int)priv->uDiversityCnt);
2640 s_vChangeAntenna(priv);
2641 priv->byAntennaState = 0;
2642 BBvClearAntDivSQ3Value(priv);
2644 priv->TimerSQ3Tmax3.expires = RUN_AT(priv->byTMax3 * HZ);
2645 priv->TimerSQ3Tmax2.expires = RUN_AT(priv->byTMax2 * HZ);
2646 add_timer(&priv->TimerSQ3Tmax3);
2647 add_timer(&priv->TimerSQ3Tmax2);
2649 spin_unlock_irqrestore(&priv->lock, flags);
2655 * Timer for SQ3 antenna diversity
2660 * hDeviceContext - Pointer to the adapter
2666 * Return Value: none
2671 TimerState1CallBack(
2675 struct vnt_private *priv = (struct vnt_private *)data;
2676 unsigned long flags;
2678 pr_debug("TimerState1CallBack...\n");
2680 spin_lock_irqsave(&priv->lock, flags);
2682 if (priv->uDiversityCnt < priv->ulDiversityMValue/100) {
2683 s_vChangeAntenna(priv);
2684 priv->TimerSQ3Tmax3.expires = RUN_AT(priv->byTMax3 * HZ);
2685 priv->TimerSQ3Tmax2.expires = RUN_AT(priv->byTMax2 * HZ);
2686 add_timer(&priv->TimerSQ3Tmax3);
2687 add_timer(&priv->TimerSQ3Tmax2);
2689 priv->ulRatio_State1 = s_ulGetRatio(priv);
2690 pr_debug("SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2691 (int)priv->ulRatio_State0,
2692 (int)priv->ulRatio_State1);
2694 if (priv->ulRatio_State1 < priv->ulRatio_State0) {
2695 pr_debug("2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2696 (int)priv->ulRatio_State0,
2697 (int)priv->ulRatio_State1,
2698 (int)priv->wAntDiversityMaxRate,
2699 (int)priv->uNumSQ3[(int)priv->wAntDiversityMaxRate],
2700 (int)priv->uDiversityCnt);
2702 s_vChangeAntenna(priv);
2704 priv->TimerSQ3Tmax3.expires = RUN_AT(priv->byTMax3 * HZ);
2705 priv->TimerSQ3Tmax2.expires = RUN_AT(priv->byTMax2 * HZ);
2706 add_timer(&priv->TimerSQ3Tmax3);
2707 add_timer(&priv->TimerSQ3Tmax2);
2710 priv->byAntennaState = 0;
2711 BBvClearAntDivSQ3Value(priv);
2713 spin_unlock_irqrestore(&priv->lock, flags);