2 * Silicon Motion SM7XX frame buffer device
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/module.h>
28 #include <linux/console.h>
29 #include <linux/screen_info.h>
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
59 void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
60 void __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
62 static struct fb_var_screeninfo smtcfb_var = {
71 .activate = FB_ACTIVATE_NOW,
74 .vmode = FB_VMODE_NONINTERLACED,
76 .accel_flags = FB_ACCELF_TEXT,
79 static struct fb_fix_screeninfo smtcfb_fix = {
81 .type = FB_TYPE_PACKED_PIXELS,
82 .visual = FB_VISUAL_TRUECOLOR,
83 .line_length = 800 * 3,
84 .accel = FB_ACCEL_SMI_LYNX,
98 static struct vesa_mode vesa_mode_table[] = {
99 {"0x301", 640, 480, 8},
100 {"0x303", 800, 600, 8},
101 {"0x305", 1024, 768, 8},
102 {"0x307", 1280, 1024, 8},
104 {"0x311", 640, 480, 16},
105 {"0x314", 800, 600, 16},
106 {"0x317", 1024, 768, 16},
107 {"0x31A", 1280, 1024, 16},
109 {"0x312", 640, 480, 24},
110 {"0x315", 800, 600, 24},
111 {"0x318", 1024, 768, 24},
112 {"0x31B", 1280, 1024, 24},
115 struct screen_info smtc_scr_info;
117 /* process command line options, get vga parameter */
118 static int __init sm7xx_vga_setup(char *options)
122 if (!options || !*options)
125 smtc_scr_info.lfb_width = 0;
126 smtc_scr_info.lfb_height = 0;
127 smtc_scr_info.lfb_depth = 0;
129 pr_debug("sm7xx_vga_setup = %s\n", options);
131 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
132 if (strstr(options, vesa_mode_table[i].index)) {
133 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
134 smtc_scr_info.lfb_height = vesa_mode_table[i].lfb_height;
135 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
142 __setup("vga=", sm7xx_vga_setup);
144 static void sm712_setpalette(int regno, unsigned red, unsigned green,
145 unsigned blue, struct fb_info *info)
147 /* set bit 5:4 = 01 (write LCD RAM only) */
148 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
150 smtc_mmiowb(regno, dac_reg);
151 smtc_mmiowb(red >> 10, dac_val);
152 smtc_mmiowb(green >> 10, dac_val);
153 smtc_mmiowb(blue >> 10, dac_val);
158 * convert a colour value into a field position
163 static inline unsigned int chan_to_field(unsigned int chan,
164 struct fb_bitfield *bf)
167 chan >>= 16 - bf->length;
168 return chan << bf->offset;
171 static int smtc_blank(int blank_mode, struct fb_info *info)
173 /* clear DPMS setting */
174 switch (blank_mode) {
175 case FB_BLANK_UNBLANK:
176 /* Screen On: HSync: On, VSync : On */
177 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
178 smtc_seqw(0x6a, 0x16);
179 smtc_seqw(0x6b, 0x02);
180 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
181 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
182 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
183 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
184 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
186 case FB_BLANK_NORMAL:
187 /* Screen Off: HSync: On, VSync : On Soft blank */
188 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
189 smtc_seqw(0x6a, 0x16);
190 smtc_seqw(0x6b, 0x02);
191 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
192 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
193 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
194 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
196 case FB_BLANK_VSYNC_SUSPEND:
197 /* Screen On: HSync: On, VSync : Off */
198 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
199 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
200 smtc_seqw(0x6a, 0x0c);
201 smtc_seqw(0x6b, 0x02);
202 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
203 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
204 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
205 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
206 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
207 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
209 case FB_BLANK_HSYNC_SUSPEND:
210 /* Screen On: HSync: Off, VSync : On */
211 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
212 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
213 smtc_seqw(0x6a, 0x0c);
214 smtc_seqw(0x6b, 0x02);
215 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
216 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
217 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
218 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
219 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
220 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
222 case FB_BLANK_POWERDOWN:
223 /* Screen On: HSync: Off, VSync : Off */
224 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
225 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
226 smtc_seqw(0x6a, 0x0c);
227 smtc_seqw(0x6b, 0x02);
228 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
229 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
230 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
231 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
232 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
233 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
242 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
243 unsigned blue, unsigned trans, struct fb_info *info)
245 struct smtcfb_info *sfb;
253 switch (sfb->fb.fix.visual) {
254 case FB_VISUAL_DIRECTCOLOR:
255 case FB_VISUAL_TRUECOLOR:
257 * 16/32 bit true-colour, use pseudo-palette for 16 base color
260 if (sfb->fb.var.bits_per_pixel == 16) {
261 u32 *pal = sfb->fb.pseudo_palette;
262 val = chan_to_field(red, &sfb->fb.var.red);
263 val |= chan_to_field(green, \
265 val |= chan_to_field(blue, &sfb->fb.var.blue);
268 ((red & 0xf800) >> 8) |
269 ((green & 0xe000) >> 13) |
270 ((green & 0x1c00) << 3) |
271 ((blue & 0xf800) >> 3);
276 u32 *pal = sfb->fb.pseudo_palette;
277 val = chan_to_field(red, &sfb->fb.var.red);
278 val |= chan_to_field(green, \
280 val |= chan_to_field(blue, &sfb->fb.var.blue);
283 (val & 0xff00ff00 >> 8) |
284 (val & 0x00ff00ff << 8);
291 case FB_VISUAL_PSEUDOCOLOR:
292 /* color depth 8 bit */
293 sm712_setpalette(regno, red, green, blue, info);
297 return 1; /* unknown type */
305 static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
308 unsigned long p = *ppos;
312 int c, i, cnt = 0, err = 0;
313 unsigned long total_size;
315 if (!info || !info->screen_base)
318 if (info->state != FBINFO_STATE_RUNNING)
321 total_size = info->screen_size;
324 total_size = info->fix.smem_len;
329 if (count >= total_size)
332 if (count + p > total_size)
333 count = total_size - p;
335 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
339 src = (u32 __iomem *) (info->screen_base + p);
341 if (info->fbops->fb_sync)
342 info->fbops->fb_sync(info);
345 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
347 for (i = c >> 2; i--;) {
348 *dst = fb_readl(src++);
350 (*dst & 0xff00ff00 >> 8) |
351 (*dst & 0x00ff00ff << 8);
355 u8 *dst8 = (u8 *) dst;
356 u8 __iomem *src8 = (u8 __iomem *) src;
358 for (i = c & 3; i--;) {
360 *dst8++ = fb_readb(++src8);
362 *dst8++ = fb_readb(--src8);
366 src = (u32 __iomem *) src8;
369 if (copy_to_user(buf, buffer, c)) {
381 return (err) ? err : cnt;
385 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
388 unsigned long p = *ppos;
392 int c, i, cnt = 0, err = 0;
393 unsigned long total_size;
395 if (!info || !info->screen_base)
398 if (info->state != FBINFO_STATE_RUNNING)
401 total_size = info->screen_size;
404 total_size = info->fix.smem_len;
409 if (count > total_size) {
414 if (count + p > total_size) {
418 count = total_size - p;
421 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
425 dst = (u32 __iomem *) (info->screen_base + p);
427 if (info->fbops->fb_sync)
428 info->fbops->fb_sync(info);
431 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
434 if (copy_from_user(src, buf, c)) {
439 for (i = c >> 2; i--;) {
440 fb_writel((*src & 0xff00ff00 >> 8) |
441 (*src & 0x00ff00ff << 8), dst++);
445 u8 *src8 = (u8 *) src;
446 u8 __iomem *dst8 = (u8 __iomem *) dst;
448 for (i = c & 3; i--;) {
450 fb_writeb(*src8++, ++dst8);
452 fb_writeb(*src8++, --dst8);
456 dst = (u32 __iomem *) dst8;
467 return (cnt) ? cnt : err;
469 #endif /* ! __BIG_ENDIAN */
471 static void sm7xx_set_timing(struct smtcfb_info *sfb)
476 dev_dbg(&sfb->pdev->dev,
477 "sfb->width=%d sfb->height=%d "
478 "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
479 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
481 for (j = 0; j < numVGAModes; j++) {
482 if (VGAMode[j].mmSizeX == sfb->width &&
483 VGAMode[j].mmSizeY == sfb->height &&
484 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
485 VGAMode[j].hz == sfb->hz) {
487 dev_dbg(&sfb->pdev->dev,
488 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
489 "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
490 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
491 VGAMode[j].bpp, VGAMode[j].hz);
493 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
495 smtc_mmiowb(0x0, 0x3c6);
499 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
501 /* init SEQ register SR00 - SR04 */
502 for (i = 0; i < SIZE_SR00_SR04; i++)
503 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
505 /* init SEQ register SR10 - SR24 */
506 for (i = 0; i < SIZE_SR10_SR24; i++)
508 VGAMode[j].Init_SR10_SR24[i]);
510 /* init SEQ register SR30 - SR75 */
511 for (i = 0; i < SIZE_SR30_SR75; i++)
512 if (((i + 0x30) != 0x62) \
513 && ((i + 0x30) != 0x6a) \
514 && ((i + 0x30) != 0x6b))
516 VGAMode[j].Init_SR30_SR75[i]);
518 /* init SEQ register SR80 - SR93 */
519 for (i = 0; i < SIZE_SR80_SR93; i++)
521 VGAMode[j].Init_SR80_SR93[i]);
523 /* init SEQ register SRA0 - SRAF */
524 for (i = 0; i < SIZE_SRA0_SRAF; i++)
526 VGAMode[j].Init_SRA0_SRAF[i]);
528 /* init Graphic register GR00 - GR08 */
529 for (i = 0; i < SIZE_GR00_GR08; i++)
530 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
532 /* init Attribute register AR00 - AR14 */
533 for (i = 0; i < SIZE_AR00_AR14; i++)
534 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
536 /* init CRTC register CR00 - CR18 */
537 for (i = 0; i < SIZE_CR00_CR18; i++)
538 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
540 /* init CRTC register CR30 - CR4D */
541 for (i = 0; i < SIZE_CR30_CR4D; i++)
543 VGAMode[j].Init_CR30_CR4D[i]);
545 /* init CRTC register CR90 - CRA7 */
546 for (i = 0; i < SIZE_CR90_CRA7; i++)
548 VGAMode[j].Init_CR90_CRA7[i]);
551 smtc_mmiowb(0x67, 0x3c2);
553 /* set VPR registers */
554 writel(0x0, sfb->vp_regs + 0x0C);
555 writel(0x0, sfb->vp_regs + 0x40);
559 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
560 switch (sfb->fb.var.bits_per_pixel) {
562 writel(0x0, sfb->vp_regs + 0x0);
565 writel(0x00020000, sfb->vp_regs + 0x0);
568 writel(0x00040000, sfb->vp_regs + 0x0);
571 writel(0x00030000, sfb->vp_regs + 0x0);
574 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
575 sfb->vp_regs + 0x10);
579 static void smtc_set_timing(struct smtcfb_info *sfb)
581 switch (sfb->chip_id) {
585 sm7xx_set_timing(sfb);
590 void smtcfb_setmode(struct smtcfb_info *sfb)
592 switch (sfb->fb.var.bits_per_pixel) {
594 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
595 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
596 sfb->fb.var.red.length = 8;
597 sfb->fb.var.green.length = 8;
598 sfb->fb.var.blue.length = 8;
599 sfb->fb.var.red.offset = 16;
600 sfb->fb.var.green.offset = 8;
601 sfb->fb.var.blue.offset = 0;
604 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
605 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
606 sfb->fb.var.red.length = 8;
607 sfb->fb.var.green.length = 8;
608 sfb->fb.var.blue.length = 8;
609 sfb->fb.var.red.offset = 16;
610 sfb->fb.var.green.offset = 8;
611 sfb->fb.var.blue.offset = 0;
614 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
615 sfb->fb.fix.line_length = sfb->fb.var.xres;
616 sfb->fb.var.red.length = 3;
617 sfb->fb.var.green.length = 3;
618 sfb->fb.var.blue.length = 2;
619 sfb->fb.var.red.offset = 5;
620 sfb->fb.var.green.offset = 2;
621 sfb->fb.var.blue.offset = 0;
625 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
626 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
627 sfb->fb.var.red.length = 5;
628 sfb->fb.var.green.length = 6;
629 sfb->fb.var.blue.length = 5;
630 sfb->fb.var.red.offset = 11;
631 sfb->fb.var.green.offset = 5;
632 sfb->fb.var.blue.offset = 0;
636 sfb->width = sfb->fb.var.xres;
637 sfb->height = sfb->fb.var.yres;
639 smtc_set_timing(sfb);
642 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
645 if (var->xres_virtual < var->xres)
646 var->xres_virtual = var->xres;
648 if (var->yres_virtual < var->yres)
649 var->yres_virtual = var->yres;
651 /* set valid default bpp */
652 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
653 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
654 var->bits_per_pixel = 16;
659 static int smtc_set_par(struct fb_info *info)
661 smtcfb_setmode(info->par);
666 static struct fb_ops smtcfb_ops = {
667 .owner = THIS_MODULE,
668 .fb_check_var = smtc_check_var,
669 .fb_set_par = smtc_set_par,
670 .fb_setcolreg = smtc_setcolreg,
671 .fb_blank = smtc_blank,
672 .fb_fillrect = cfb_fillrect,
673 .fb_imageblit = cfb_imageblit,
674 .fb_copyarea = cfb_copyarea,
676 .fb_read = smtcfb_read,
677 .fb_write = smtcfb_write,
682 * alloc struct smtcfb_info and assign default values
684 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
686 struct smtcfb_info *sfb;
688 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
695 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
696 sfb->fb.fbops = &smtcfb_ops;
697 sfb->fb.fix = smtcfb_fix;
698 sfb->fb.var = smtcfb_var;
699 sfb->fb.pseudo_palette = sfb->colreg;
706 * free struct smtcfb_info
708 static void smtc_free_fb_info(struct smtcfb_info *sfb)
714 * Unmap in the memory mapped IO registers
717 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
719 if (sfb && smtc_RegBaseAddress)
720 smtc_RegBaseAddress = NULL;
724 * Map in the screen memory
727 static int smtc_map_smem(struct smtcfb_info *sfb,
728 struct pci_dev *pdev, u_long smem_len)
731 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
734 if (sfb->fb.var.bits_per_pixel == 32)
735 sfb->fb.fix.smem_start += 0x800000;
738 sfb->fb.fix.smem_len = smem_len;
740 sfb->fb.screen_base = smtc_VRAMBaseAddress;
742 if (!sfb->fb.screen_base) {
744 "%s: unable to map screen memory\n", sfb->fb.fix.id);
752 * Unmap in the screen memory
755 static void smtc_unmap_smem(struct smtcfb_info *sfb)
757 if (sfb && sfb->fb.screen_base) {
758 iounmap(sfb->fb.screen_base);
759 sfb->fb.screen_base = NULL;
764 * We need to wake up the device and make sure its in linear memory mode.
766 static inline void sm7xx_init_hw(void)
772 static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
773 const struct pci_device_id *ent)
775 struct smtcfb_info *sfb;
776 u_long smem_size = 0x00800000; /* default 8MB */
778 unsigned long pFramebufferPhysical;
780 dev_info(&pdev->dev, "Silicon Motion display driver.");
782 err = pci_enable_device(pdev); /* enable SMTC chip */
786 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
788 sfb = smtc_alloc_fb_info(pdev);
795 sfb->chip_id = ent->device;
797 pci_set_drvdata(pdev, sfb);
801 /* get mode parameter from smtc_scr_info */
802 if (smtc_scr_info.lfb_width != 0) {
803 sfb->fb.var.xres = smtc_scr_info.lfb_width;
804 sfb->fb.var.yres = smtc_scr_info.lfb_height;
805 sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
807 /* default resolution 1024x600 16bit mode */
808 sfb->fb.var.xres = SCREEN_X_RES;
809 sfb->fb.var.yres = SCREEN_Y_RES;
810 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
814 if (sfb->fb.var.bits_per_pixel == 24)
815 sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
817 /* Map address and memory detection */
818 pFramebufferPhysical = pci_resource_start(pdev, 0);
819 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
821 switch (sfb->chip_id) {
824 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
825 sfb->fb.fix.mmio_len = 0x00400000;
826 smem_size = SM712_VIDEOMEMORYSIZE;
828 sfb->lfb = (smtc_VRAMBaseAddress =
829 ioremap(pFramebufferPhysical, 0x00c00000));
831 sfb->lfb = (smtc_VRAMBaseAddress =
832 ioremap(pFramebufferPhysical, 0x00800000));
834 sfb->mmio = (smtc_RegBaseAddress =
835 smtc_VRAMBaseAddress + 0x00700000);
836 sfb->dp_regs = smtc_VRAMBaseAddress + 0x00408000;
837 sfb->vp_regs = sfb->lfb + 0x0040c000;
839 if (sfb->fb.var.bits_per_pixel == 32) {
840 smtc_VRAMBaseAddress += 0x800000;
841 sfb->lfb += 0x800000;
843 "smtc_VRAMBaseAddress=%p sfb->lfb=%p",
844 smtc_VRAMBaseAddress, sfb->lfb);
847 if (!smtc_RegBaseAddress) {
849 "%s: unable to map memory mapped IO!",
855 /* set MCLK = 14.31818 * (0x16 / 0x2) */
856 smtc_seqw(0x6a, 0x16);
857 smtc_seqw(0x6b, 0x02);
858 smtc_seqw(0x62, 0x3e);
859 /* enable PCI burst */
860 smtc_seqw(0x17, 0x20);
861 /* enable word swap */
863 if (sfb->fb.var.bits_per_pixel == 32)
864 smtc_seqw(0x17, 0x30);
868 sfb->fb.fix.mmio_start = pFramebufferPhysical;
869 sfb->fb.fix.mmio_len = 0x00200000;
870 smem_size = SM722_VIDEOMEMORYSIZE;
871 sfb->dp_regs = ioremap(pFramebufferPhysical, 0x00a00000);
872 sfb->lfb = (smtc_VRAMBaseAddress =
873 sfb->dp_regs + 0x00200000);
874 sfb->mmio = (smtc_RegBaseAddress =
875 sfb->dp_regs + 0x000c0000);
876 sfb->vp_regs = sfb->dp_regs + 0x800;
878 smtc_seqw(0x62, 0xff);
879 smtc_seqw(0x6a, 0x0d);
880 smtc_seqw(0x6b, 0x02);
884 "No valid Silicon Motion display chip was detected!");
889 /* can support 32 bpp */
890 if (15 == sfb->fb.var.bits_per_pixel)
891 sfb->fb.var.bits_per_pixel = 16;
893 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
894 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
895 err = smtc_map_smem(sfb, pdev, smem_size);
901 err = register_framebuffer(&sfb->fb);
906 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
907 sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
908 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
913 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
915 smtc_unmap_smem(sfb);
916 smtc_unmap_mmio(sfb);
918 smtc_free_fb_info(sfb);
921 pci_disable_device(pdev);
929 * 0x720 (Lynx3DM, Lynx3DM+)
931 static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
932 { PCI_DEVICE(0x126f, 0x710), },
933 { PCI_DEVICE(0x126f, 0x712), },
934 { PCI_DEVICE(0x126f, 0x720), },
938 static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
940 struct smtcfb_info *sfb;
942 sfb = pci_get_drvdata(pdev);
943 pci_set_drvdata(pdev, NULL);
944 smtc_unmap_smem(sfb);
945 smtc_unmap_mmio(sfb);
946 unregister_framebuffer(&sfb->fb);
947 smtc_free_fb_info(sfb);
951 static int smtcfb_pci_suspend(struct device *device)
953 struct pci_dev *pdev = to_pci_dev(device);
954 struct smtcfb_info *sfb;
956 sfb = pci_get_drvdata(pdev);
958 /* set the hw in sleep mode use external clock and self memory refresh
959 * so that we can turn off internal PLLs later on
961 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
962 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
965 fb_set_suspend(&sfb->fb, 1);
968 /* additionally turn off all function blocks including internal PLLs */
969 smtc_seqw(0x21, 0xff);
974 static int smtcfb_pci_resume(struct device *device)
976 struct pci_dev *pdev = to_pci_dev(device);
977 struct smtcfb_info *sfb;
979 sfb = pci_get_drvdata(pdev);
981 /* reinit hardware */
983 switch (sfb->chip_id) {
986 /* set MCLK = 14.31818 * (0x16 / 0x2) */
987 smtc_seqw(0x6a, 0x16);
988 smtc_seqw(0x6b, 0x02);
989 smtc_seqw(0x62, 0x3e);
990 /* enable PCI burst */
991 smtc_seqw(0x17, 0x20);
993 if (sfb->fb.var.bits_per_pixel == 32)
994 smtc_seqw(0x17, 0x30);
998 smtc_seqw(0x62, 0xff);
999 smtc_seqw(0x6a, 0x0d);
1000 smtc_seqw(0x6b, 0x02);
1004 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1005 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1007 smtcfb_setmode(sfb);
1010 fb_set_suspend(&sfb->fb, 0);
1016 static const struct dev_pm_ops sm7xx_pm_ops = {
1017 .suspend = smtcfb_pci_suspend,
1018 .resume = smtcfb_pci_resume,
1019 .freeze = smtcfb_pci_suspend,
1020 .thaw = smtcfb_pci_resume,
1021 .poweroff = smtcfb_pci_suspend,
1022 .restore = smtcfb_pci_resume,
1025 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1027 #else /* !CONFIG_PM */
1029 #define SM7XX_PM_OPS NULL
1031 #endif /* !CONFIG_PM */
1033 static struct pci_driver smtcfb_driver = {
1035 .id_table = smtcfb_pci_table,
1036 .probe = smtcfb_pci_probe,
1037 .remove = __devexit_p(smtcfb_pci_remove),
1038 .driver.pm = SM7XX_PM_OPS,
1041 module_pci_driver(smtcfb_driver);
1043 MODULE_AUTHOR("Siliconmotion ");
1044 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1045 MODULE_LICENSE("GPL");