1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Realtek PCI-Express card reader
5 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
8 * Wei WANG (wei_wang@realsil.com.cn)
9 * Micky Ching (micky_ching@realsil.com.cn)
12 #include <linux/blkdev.h>
13 #include <linux/kthread.h>
14 #include <linux/sched.h>
15 #include <linux/vmalloc.h>
20 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
22 struct ms_info *ms_card = &chip->ms_card;
24 ms_card->err_code = err_code;
27 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
29 struct ms_info *ms_card = &chip->ms_card;
31 return (ms_card->err_code == err_code);
34 static int ms_parse_err_code(struct rtsx_chip *chip)
39 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
40 u8 tpc, u8 cnt, u8 cfg)
42 struct ms_info *ms_card = &chip->ms_card;
46 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
50 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
51 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
52 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
53 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
54 0x01, PINGPONG_BUFFER);
56 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
57 0xFF, MS_TRANSFER_START | trans_mode);
58 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
59 MS_TRANSFER_END, MS_TRANSFER_END);
61 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
63 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
65 rtsx_clear_ms_error(chip);
66 ms_set_err_code(chip, MS_TO_ERROR);
67 return ms_parse_err_code(chip);
70 ptr = rtsx_get_cmd_data(chip) + 1;
72 if (!(tpc & 0x08)) { /* Read Packet */
73 if (*ptr & MS_CRC16_ERR) {
74 ms_set_err_code(chip, MS_CRC16_ERROR);
75 return ms_parse_err_code(chip);
77 } else { /* Write Packet */
78 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
79 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
80 ms_set_err_code(chip, MS_CMD_NK);
81 return ms_parse_err_code(chip);
86 if (*ptr & MS_RDY_TIMEOUT) {
87 rtsx_clear_ms_error(chip);
88 ms_set_err_code(chip, MS_TO_ERROR);
89 return ms_parse_err_code(chip);
92 return STATUS_SUCCESS;
95 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
96 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
97 int use_sg, void *buf, int buf_len)
100 u8 val, err_code = 0;
101 enum dma_data_direction dir;
103 if (!buf || !buf_len)
106 if (trans_mode == MS_TM_AUTO_READ) {
107 dir = DMA_FROM_DEVICE;
108 err_code = MS_FLASH_READ_ERROR;
109 } else if (trans_mode == MS_TM_AUTO_WRITE) {
111 err_code = MS_FLASH_WRITE_ERROR;
118 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
119 rtsx_add_cmd(chip, WRITE_REG_CMD,
120 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
121 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
122 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
125 rtsx_add_cmd(chip, WRITE_REG_CMD,
126 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
128 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
131 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
133 rtsx_add_cmd(chip, WRITE_REG_CMD,
134 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
135 rtsx_add_cmd(chip, CHECK_REG_CMD,
136 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
138 rtsx_send_cmd_no_wait(chip);
140 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
141 use_sg, dir, chip->mspro_timeout);
143 ms_set_err_code(chip, err_code);
144 if (retval == -ETIMEDOUT)
145 retval = STATUS_TIMEDOUT;
147 retval = STATUS_FAIL;
152 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
156 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
159 return STATUS_SUCCESS;
162 static int ms_write_bytes(struct rtsx_chip *chip,
163 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
165 struct ms_info *ms_card = &chip->ms_card;
168 if (!data || (data_len < cnt))
173 for (i = 0; i < cnt; i++) {
174 rtsx_add_cmd(chip, WRITE_REG_CMD,
175 PPBUF_BASE2 + i, 0xFF, data[i]);
178 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
180 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
181 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
182 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
183 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
184 0x01, PINGPONG_BUFFER);
186 rtsx_add_cmd(chip, WRITE_REG_CMD,
187 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
188 rtsx_add_cmd(chip, CHECK_REG_CMD,
189 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
191 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
195 rtsx_read_register(chip, MS_TRANS_CFG, &val);
196 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
198 rtsx_clear_ms_error(chip);
201 if (val & MS_CRC16_ERR) {
202 ms_set_err_code(chip, MS_CRC16_ERROR);
203 return ms_parse_err_code(chip);
206 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
207 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
208 ms_set_err_code(chip, MS_CMD_NK);
209 return ms_parse_err_code(chip);
214 if (val & MS_RDY_TIMEOUT) {
215 ms_set_err_code(chip, MS_TO_ERROR);
216 return ms_parse_err_code(chip);
219 ms_set_err_code(chip, MS_TO_ERROR);
220 return ms_parse_err_code(chip);
223 return STATUS_SUCCESS;
226 static int ms_read_bytes(struct rtsx_chip *chip,
227 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
229 struct ms_info *ms_card = &chip->ms_card;
238 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
239 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
240 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
241 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
242 0x01, PINGPONG_BUFFER);
244 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
245 MS_TRANSFER_START | MS_TM_READ_BYTES);
246 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
247 MS_TRANSFER_END, MS_TRANSFER_END);
249 for (i = 0; i < data_len - 1; i++)
250 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
253 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
255 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
258 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
262 rtsx_read_register(chip, MS_TRANS_CFG, &val);
263 rtsx_clear_ms_error(chip);
266 if (val & MS_CRC16_ERR) {
267 ms_set_err_code(chip, MS_CRC16_ERROR);
268 return ms_parse_err_code(chip);
271 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
272 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
273 ms_set_err_code(chip, MS_CMD_NK);
274 return ms_parse_err_code(chip);
279 if (val & MS_RDY_TIMEOUT) {
280 ms_set_err_code(chip, MS_TO_ERROR);
281 return ms_parse_err_code(chip);
284 ms_set_err_code(chip, MS_TO_ERROR);
285 return ms_parse_err_code(chip);
288 ptr = rtsx_get_cmd_data(chip) + 1;
290 for (i = 0; i < data_len; i++)
293 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
294 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
295 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
299 return STATUS_SUCCESS;
302 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
303 u8 read_cnt, u8 write_start, u8 write_cnt)
308 data[0] = read_start;
310 data[2] = write_start;
313 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
314 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
315 NO_WAIT_INT, data, 4);
316 if (retval == STATUS_SUCCESS)
317 return STATUS_SUCCESS;
318 rtsx_clear_ms_error(chip);
324 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
331 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
334 static int ms_set_init_para(struct rtsx_chip *chip)
336 struct ms_info *ms_card = &chip->ms_card;
339 if (CHK_HG8BIT(ms_card)) {
341 ms_card->ms_clock = chip->asic_ms_hg_clk;
343 ms_card->ms_clock = chip->fpga_ms_hg_clk;
345 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
347 ms_card->ms_clock = chip->asic_ms_4bit_clk;
349 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
353 ms_card->ms_clock = chip->asic_ms_1bit_clk;
355 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
358 retval = switch_clock(chip, ms_card->ms_clock);
359 if (retval != STATUS_SUCCESS)
362 retval = select_card(chip, MS_CARD);
363 if (retval != STATUS_SUCCESS)
366 return STATUS_SUCCESS;
369 static int ms_switch_clock(struct rtsx_chip *chip)
371 struct ms_info *ms_card = &chip->ms_card;
374 retval = select_card(chip, MS_CARD);
375 if (retval != STATUS_SUCCESS)
378 retval = switch_clock(chip, ms_card->ms_clock);
379 if (retval != STATUS_SUCCESS)
382 return STATUS_SUCCESS;
385 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
389 if (CHECK_PID(chip, 0x5208)) {
390 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
391 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
396 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
397 MS_D3_PD | MS_D0_PD | MS_BS_PD |
402 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
403 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
408 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
409 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
414 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
415 MS_INS_PU | SD_WP_PD | SD_CD_PU |
420 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
421 MS_D5_PD | MS_D4_PD);
425 } else if (CHECK_PID(chip, 0x5288)) {
426 if (CHECK_BARO_PKG(chip, QFN)) {
427 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
432 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
437 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
442 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
449 return STATUS_SUCCESS;
452 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
458 if (CHECK_PID(chip, 0x5208)) {
459 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
460 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
461 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
462 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
463 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
464 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
465 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
466 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
467 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
468 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
469 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
470 MS_D5_PD | MS_D4_PD);
471 } else if (CHECK_PID(chip, 0x5288)) {
472 if (CHECK_BARO_PKG(chip, QFN)) {
473 rtsx_add_cmd(chip, WRITE_REG_CMD,
474 CARD_PULL_CTL1, 0xFF, 0x55);
475 rtsx_add_cmd(chip, WRITE_REG_CMD,
476 CARD_PULL_CTL2, 0xFF, 0x45);
477 rtsx_add_cmd(chip, WRITE_REG_CMD,
478 CARD_PULL_CTL3, 0xFF, 0x4B);
479 rtsx_add_cmd(chip, WRITE_REG_CMD,
480 CARD_PULL_CTL4, 0xFF, 0x29);
484 retval = rtsx_send_cmd(chip, MS_CARD, 100);
488 return STATUS_SUCCESS;
491 static int ms_prepare_reset(struct rtsx_chip *chip)
493 struct ms_info *ms_card = &chip->ms_card;
497 ms_card->ms_type = 0;
498 ms_card->check_ms_flow = 0;
499 ms_card->switch_8bit_fail = 0;
500 ms_card->delay_write.delay_write_flag = 0;
502 ms_card->pro_under_formatting = 0;
504 retval = ms_power_off_card3v3(chip);
505 if (retval != STATUS_SUCCESS)
508 if (!chip->ft2_fast_mode)
511 retval = enable_card_clock(chip, MS_CARD);
512 if (retval != STATUS_SUCCESS)
515 if (chip->asic_code) {
516 retval = ms_pull_ctl_enable(chip);
517 if (retval != STATUS_SUCCESS)
520 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
521 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
526 if (!chip->ft2_fast_mode) {
527 retval = card_power_on(chip, MS_CARD);
528 if (retval != STATUS_SUCCESS)
534 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
535 oc_mask = MS_OC_NOW | MS_OC_EVER;
537 oc_mask = SD_OC_NOW | SD_OC_EVER;
539 if (chip->ocp_stat & oc_mask) {
540 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
547 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
552 if (chip->asic_code) {
553 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
562 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
563 SAMPLE_TIME_FALLING |
570 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
571 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
575 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
576 MS_STOP | MS_CLR_ERR);
580 retval = ms_set_init_para(chip);
581 if (retval != STATUS_SUCCESS)
584 return STATUS_SUCCESS;
587 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
589 struct ms_info *ms_card = &chip->ms_card;
593 retval = ms_set_rw_reg_addr(chip, PRO_STATUS_REG, 6, SYSTEM_PARAM, 1);
594 if (retval != STATUS_SUCCESS)
597 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
598 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
600 if (retval == STATUS_SUCCESS)
603 if (i == MS_MAX_RETRY_COUNT)
606 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
610 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
613 ms_card->check_ms_flow = 1;
618 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
622 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
624 ms_card->check_ms_flow = 1;
628 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
632 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
634 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
639 chip->card_wp |= MS_CARD;
641 chip->card_wp &= ~MS_CARD;
643 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
644 chip->card_wp |= MS_CARD;
646 ms_card->check_ms_flow = 1;
650 ms_card->ms_type |= TYPE_MSPRO;
652 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
656 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
658 ms_card->ms_type &= 0x0F;
659 } else if (val == 7) {
661 ms_card->ms_type |= MS_HG;
663 ms_card->ms_type &= 0x0F;
669 return STATUS_SUCCESS;
672 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
677 /* Confirm CPU StartUp */
680 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
681 ms_set_err_code(chip, MS_NO_CARD);
685 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
686 retval = ms_read_bytes(chip, GET_INT, 1,
687 NO_WAIT_INT, &val, 1);
688 if (retval == STATUS_SUCCESS)
691 if (i == MS_MAX_RETRY_COUNT)
699 } while (!(val & INT_REG_CED));
701 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
702 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
703 if (retval == STATUS_SUCCESS)
706 if (i == MS_MAX_RETRY_COUNT)
709 if (val & INT_REG_ERR) {
710 if (val & INT_REG_CMDNK)
711 chip->card_wp |= (MS_CARD);
715 /* -- end confirm CPU startup */
717 return STATUS_SUCCESS;
720 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
725 data[0] = PARALLEL_4BIT_IF;
727 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
728 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
730 if (retval == STATUS_SUCCESS)
733 if (retval != STATUS_SUCCESS)
736 return STATUS_SUCCESS;
739 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
741 struct ms_info *ms_card = &chip->ms_card;
745 data[0] = PARALLEL_8BIT_IF;
747 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
748 retval = ms_write_bytes(chip, WRITE_REG, 1,
749 NO_WAIT_INT, data, 2);
750 if (retval == STATUS_SUCCESS)
753 if (retval != STATUS_SUCCESS)
756 retval = rtsx_write_register(chip, MS_CFG, 0x98,
757 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
761 ms_card->ms_type |= MS_8BIT;
762 retval = ms_set_init_para(chip);
763 if (retval != STATUS_SUCCESS)
766 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
769 if (retval != STATUS_SUCCESS)
773 return STATUS_SUCCESS;
776 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
778 struct ms_info *ms_card = &chip->ms_card;
781 for (i = 0; i < 3; i++) {
782 retval = ms_prepare_reset(chip);
783 if (retval != STATUS_SUCCESS)
786 retval = ms_identify_media_type(chip, switch_8bit_bus);
787 if (retval != STATUS_SUCCESS)
790 retval = ms_confirm_cpu_startup(chip);
791 if (retval != STATUS_SUCCESS)
794 retval = ms_switch_parallel_bus(chip);
795 if (retval != STATUS_SUCCESS) {
796 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
797 ms_set_err_code(chip, MS_NO_CARD);
806 if (retval != STATUS_SUCCESS)
809 /* Switch MS-PRO into Parallel mode */
810 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
814 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
819 retval = ms_set_init_para(chip);
820 if (retval != STATUS_SUCCESS)
823 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
824 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
825 retval = ms_switch_8bit_bus(chip);
826 if (retval != STATUS_SUCCESS) {
827 ms_card->switch_8bit_fail = 1;
832 return STATUS_SUCCESS;
836 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
841 ms_cleanup_work(chip);
843 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
844 if (retval != STATUS_SUCCESS)
854 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
855 if (retval != STATUS_SUCCESS)
858 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
859 if (retval != STATUS_SUCCESS)
862 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
866 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
869 return STATUS_SUCCESS;
873 static int ms_read_attribute_info(struct rtsx_chip *chip)
875 struct ms_info *ms_card = &chip->ms_card;
877 u8 val, *buf, class_code, device_type, sub_class, data[16];
878 u16 total_blk = 0, blk_size = 0;
880 u32 xc_total_blk = 0, xc_blk_size = 0;
882 u32 sys_info_addr = 0, sys_info_size;
883 #ifdef SUPPORT_PCGL_1P18
884 u32 model_name_addr = 0, model_name_size;
885 int found_sys_info = 0, found_model_name = 0;
888 retval = ms_set_rw_reg_addr(chip, PRO_INT_REG, 2, PRO_SYSTEM_PARAM, 7);
889 if (retval != STATUS_SUCCESS)
892 if (CHK_MS8BIT(ms_card))
893 data[0] = PARALLEL_8BIT_IF;
895 data[0] = PARALLEL_4BIT_IF;
906 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
907 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
909 if (retval == STATUS_SUCCESS)
912 if (retval != STATUS_SUCCESS)
915 buf = kmalloc(64 * 512, GFP_KERNEL);
919 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
920 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
921 if (retval != STATUS_SUCCESS)
924 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
925 if (retval != STATUS_SUCCESS) {
929 if (!(val & MS_INT_BREQ)) {
933 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
934 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
935 0, 0, buf, 64 * 512);
936 if (retval == STATUS_SUCCESS)
939 rtsx_clear_ms_error(chip);
941 if (retval != STATUS_SUCCESS) {
948 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
949 if (retval != STATUS_SUCCESS) {
954 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
957 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
958 PRO_READ_LONG_DATA, 0, WAIT_INT);
959 if (retval != STATUS_SUCCESS) {
967 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
968 /* Signature code is wrong */
973 if ((buf[4] < 1) || (buf[4] > 12)) {
978 for (i = 0; i < buf[4]; i++) {
979 int cur_addr_off = 16 + i * 12;
982 if ((buf[cur_addr_off + 8] == 0x10) ||
983 (buf[cur_addr_off + 8] == 0x13)) {
985 if (buf[cur_addr_off + 8] == 0x10) {
987 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
988 ((u32)buf[cur_addr_off + 1] << 16) |
989 ((u32)buf[cur_addr_off + 2] << 8) |
990 buf[cur_addr_off + 3];
991 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
992 ((u32)buf[cur_addr_off + 5] << 16) |
993 ((u32)buf[cur_addr_off + 6] << 8) |
994 buf[cur_addr_off + 7];
995 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
996 sys_info_addr, sys_info_size);
997 if (sys_info_size != 96) {
1001 if (sys_info_addr < 0x1A0) {
1005 if ((sys_info_size + sys_info_addr) > 0x8000) {
1011 if (buf[cur_addr_off + 8] == 0x13)
1012 ms_card->ms_type |= MS_XC;
1014 #ifdef SUPPORT_PCGL_1P18
1020 #ifdef SUPPORT_PCGL_1P18
1021 if (buf[cur_addr_off + 8] == 0x15) {
1022 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1023 ((u32)buf[cur_addr_off + 1] << 16) |
1024 ((u32)buf[cur_addr_off + 2] << 8) |
1025 buf[cur_addr_off + 3];
1026 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1027 ((u32)buf[cur_addr_off + 5] << 16) |
1028 ((u32)buf[cur_addr_off + 6] << 8) |
1029 buf[cur_addr_off + 7];
1030 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1031 model_name_addr, model_name_size);
1032 if (model_name_size != 48) {
1036 if (model_name_addr < 0x1A0) {
1040 if ((model_name_size + model_name_addr) > 0x8000) {
1045 found_model_name = 1;
1048 if (found_sys_info && found_model_name)
1058 class_code = buf[sys_info_addr + 0];
1059 device_type = buf[sys_info_addr + 56];
1060 sub_class = buf[sys_info_addr + 46];
1062 if (CHK_MSXC(ms_card)) {
1063 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1064 ((u32)buf[sys_info_addr + 7] << 16) |
1065 ((u32)buf[sys_info_addr + 8] << 8) |
1066 buf[sys_info_addr + 9];
1067 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1068 ((u32)buf[sys_info_addr + 33] << 16) |
1069 ((u32)buf[sys_info_addr + 34] << 8) |
1070 buf[sys_info_addr + 35];
1071 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1072 xc_total_blk, xc_blk_size);
1074 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1075 buf[sys_info_addr + 7];
1076 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1077 buf[sys_info_addr + 3];
1078 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1079 total_blk, blk_size);
1082 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1083 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1084 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1085 total_blk, blk_size);
1088 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1089 class_code, device_type, sub_class);
1091 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1092 #ifdef SUPPORT_PCGL_1P18
1093 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1099 if (CHK_MSXC(ms_card)) {
1100 if (class_code != 0x03)
1103 if (class_code != 0x02)
1107 if (class_code != 0x02)
1111 if (device_type != 0x00) {
1112 if ((device_type == 0x01) || (device_type == 0x02) ||
1113 (device_type == 0x03)) {
1114 chip->card_wp |= MS_CARD;
1120 if (sub_class & 0xC0)
1123 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1124 class_code, device_type, sub_class);
1127 if (CHK_MSXC(ms_card)) {
1128 chip->capacity[chip->card2lun[MS_CARD]] =
1129 ms_card->capacity = xc_total_blk * xc_blk_size;
1131 chip->capacity[chip->card2lun[MS_CARD]] =
1132 ms_card->capacity = total_blk * blk_size;
1135 ms_card->capacity = total_blk * blk_size;
1136 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1139 return STATUS_SUCCESS;
1142 #ifdef SUPPORT_MAGIC_GATE
1143 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1144 int type, u8 mg_entry_num);
1147 static int reset_ms_pro(struct rtsx_chip *chip)
1149 struct ms_info *ms_card = &chip->ms_card;
1151 #ifdef XC_POWERCLASS
1152 u8 change_power_class;
1154 if (chip->ms_power_class_en & 0x02)
1155 change_power_class = 2;
1156 else if (chip->ms_power_class_en & 0x01)
1157 change_power_class = 1;
1159 change_power_class = 0;
1162 #ifdef XC_POWERCLASS
1165 retval = ms_pro_reset_flow(chip, 1);
1166 if (retval != STATUS_SUCCESS) {
1167 if (ms_card->switch_8bit_fail) {
1168 retval = ms_pro_reset_flow(chip, 0);
1169 if (retval != STATUS_SUCCESS)
1176 retval = ms_read_attribute_info(chip);
1177 if (retval != STATUS_SUCCESS)
1180 #ifdef XC_POWERCLASS
1181 if (CHK_HG8BIT(ms_card))
1182 change_power_class = 0;
1184 if (change_power_class && CHK_MSXC(ms_card)) {
1185 u8 power_class_en = chip->ms_power_class_en;
1187 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1189 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1190 change_power_class);
1192 if (change_power_class)
1193 power_class_en &= (1 << (change_power_class - 1));
1197 if (power_class_en) {
1198 u8 power_class_mode =
1199 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1200 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1202 if (change_power_class > power_class_mode)
1203 change_power_class = power_class_mode;
1204 if (change_power_class) {
1205 retval = msxc_change_power(chip,
1206 change_power_class);
1207 if (retval != STATUS_SUCCESS) {
1208 change_power_class--;
1216 #ifdef SUPPORT_MAGIC_GATE
1217 retval = mg_set_tpc_para_sub(chip, 0, 0);
1218 if (retval != STATUS_SUCCESS)
1222 if (CHK_HG8BIT(ms_card))
1223 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1225 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1227 return STATUS_SUCCESS;
1230 static int ms_read_status_reg(struct rtsx_chip *chip)
1235 retval = ms_set_rw_reg_addr(chip, STATUS_REG0, 2, 0, 0);
1236 if (retval != STATUS_SUCCESS)
1239 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1240 if (retval != STATUS_SUCCESS)
1243 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1244 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1248 return STATUS_SUCCESS;
1251 static int ms_read_extra_data(struct rtsx_chip *chip,
1252 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1254 struct ms_info *ms_card = &chip->ms_card;
1258 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1260 if (retval != STATUS_SUCCESS)
1263 if (CHK_MS4BIT(ms_card)) {
1264 /* Parallel interface */
1267 /* Serial interface */
1271 data[2] = (u8)(block_addr >> 8);
1272 data[3] = (u8)block_addr;
1276 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1277 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1279 if (retval == STATUS_SUCCESS)
1282 if (i == MS_MAX_RETRY_COUNT)
1285 ms_set_err_code(chip, MS_NO_ERROR);
1287 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1288 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1289 if (retval == STATUS_SUCCESS)
1292 if (i == MS_MAX_RETRY_COUNT)
1295 ms_set_err_code(chip, MS_NO_ERROR);
1296 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1297 if (retval != STATUS_SUCCESS)
1300 if (val & INT_REG_CMDNK) {
1301 ms_set_err_code(chip, MS_CMD_NK);
1304 if (val & INT_REG_CED) {
1305 if (val & INT_REG_ERR) {
1306 retval = ms_read_status_reg(chip);
1307 if (retval != STATUS_SUCCESS)
1310 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1311 MS_EXTRA_SIZE, SYSTEM_PARAM,
1313 if (retval != STATUS_SUCCESS)
1318 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1319 data, MS_EXTRA_SIZE);
1320 if (retval != STATUS_SUCCESS)
1323 if (buf && buf_len) {
1324 if (buf_len > MS_EXTRA_SIZE)
1325 buf_len = MS_EXTRA_SIZE;
1326 memcpy(buf, data, buf_len);
1329 return STATUS_SUCCESS;
1332 static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1333 u8 page_num, u8 *buf, int buf_len)
1335 struct ms_info *ms_card = &chip->ms_card;
1339 if (!buf || (buf_len < MS_EXTRA_SIZE))
1342 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1343 SYSTEM_PARAM, 6 + MS_EXTRA_SIZE);
1344 if (retval != STATUS_SUCCESS)
1347 if (CHK_MS4BIT(ms_card))
1353 data[2] = (u8)(block_addr >> 8);
1354 data[3] = (u8)block_addr;
1358 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1359 data[i] = buf[i - 6];
1361 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1362 NO_WAIT_INT, data, 16);
1363 if (retval != STATUS_SUCCESS)
1366 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1367 if (retval != STATUS_SUCCESS)
1370 ms_set_err_code(chip, MS_NO_ERROR);
1371 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1372 if (retval != STATUS_SUCCESS)
1375 if (val & INT_REG_CMDNK) {
1376 ms_set_err_code(chip, MS_CMD_NK);
1379 if (val & INT_REG_CED) {
1380 if (val & INT_REG_ERR) {
1381 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1386 return STATUS_SUCCESS;
1389 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1391 struct ms_info *ms_card = &chip->ms_card;
1395 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1397 if (retval != STATUS_SUCCESS)
1400 if (CHK_MS4BIT(ms_card))
1406 data[2] = (u8)(block_addr >> 8);
1407 data[3] = (u8)block_addr;
1411 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1412 if (retval != STATUS_SUCCESS)
1415 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1416 if (retval != STATUS_SUCCESS)
1419 ms_set_err_code(chip, MS_NO_ERROR);
1420 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1421 if (retval != STATUS_SUCCESS)
1424 if (val & INT_REG_CMDNK) {
1425 ms_set_err_code(chip, MS_CMD_NK);
1429 if (val & INT_REG_CED) {
1430 if (val & INT_REG_ERR) {
1431 if (!(val & INT_REG_BREQ)) {
1432 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1435 retval = ms_read_status_reg(chip);
1436 if (retval != STATUS_SUCCESS)
1437 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1440 if (!(val & INT_REG_BREQ)) {
1441 ms_set_err_code(chip, MS_BREQ_ERROR);
1447 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1449 if (retval != STATUS_SUCCESS)
1452 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
1455 return STATUS_SUCCESS;
1458 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1460 struct ms_info *ms_card = &chip->ms_card;
1462 u8 val, data[8], extra[MS_EXTRA_SIZE];
1464 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1465 if (retval != STATUS_SUCCESS)
1468 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1470 if (retval != STATUS_SUCCESS)
1473 ms_set_err_code(chip, MS_NO_ERROR);
1475 if (CHK_MS4BIT(ms_card))
1481 data[2] = (u8)(phy_blk >> 8);
1482 data[3] = (u8)phy_blk;
1485 data[6] = extra[0] & 0x7F;
1488 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1489 if (retval != STATUS_SUCCESS)
1492 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1493 if (retval != STATUS_SUCCESS)
1496 ms_set_err_code(chip, MS_NO_ERROR);
1497 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1498 if (retval != STATUS_SUCCESS)
1501 if (val & INT_REG_CMDNK) {
1502 ms_set_err_code(chip, MS_CMD_NK);
1506 if (val & INT_REG_CED) {
1507 if (val & INT_REG_ERR) {
1508 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1513 return STATUS_SUCCESS;
1516 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1518 struct ms_info *ms_card = &chip->ms_card;
1522 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1524 if (retval != STATUS_SUCCESS)
1527 ms_set_err_code(chip, MS_NO_ERROR);
1529 if (CHK_MS4BIT(ms_card))
1535 data[2] = (u8)(phy_blk >> 8);
1536 data[3] = (u8)phy_blk;
1540 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1541 if (retval != STATUS_SUCCESS)
1545 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1546 if (retval != STATUS_SUCCESS)
1549 ms_set_err_code(chip, MS_NO_ERROR);
1550 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1551 if (retval != STATUS_SUCCESS)
1554 if (val & INT_REG_CMDNK) {
1560 ms_set_err_code(chip, MS_CMD_NK);
1561 ms_set_bad_block(chip, phy_blk);
1565 if (val & INT_REG_CED) {
1566 if (val & INT_REG_ERR) {
1567 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1572 return STATUS_SUCCESS;
1575 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1577 if (!extra || (extra_len < MS_EXTRA_SIZE))
1580 memset(extra, 0xFF, MS_EXTRA_SIZE);
1582 if (type == set_PS_NG) {
1583 /* set page status as 1:NG,and block status keep 1:OK */
1586 /* set page status as 0:Data Error,and block status keep 1:OK */
1590 extra[2] = (u8)(log_blk >> 8);
1591 extra[3] = (u8)log_blk;
1594 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1595 u8 start_page, u8 end_page)
1598 u8 extra[MS_EXTRA_SIZE], i;
1600 memset(extra, 0xff, MS_EXTRA_SIZE);
1602 extra[0] = 0xf8; /* Block, page OK, data erased */
1604 extra[2] = (u8)(log_blk >> 8);
1605 extra[3] = (u8)log_blk;
1607 for (i = start_page; i < end_page; i++) {
1608 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1609 ms_set_err_code(chip, MS_NO_CARD);
1613 retval = ms_write_extra_data(chip, phy_blk, i,
1614 extra, MS_EXTRA_SIZE);
1615 if (retval != STATUS_SUCCESS)
1619 return STATUS_SUCCESS;
1622 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1623 u16 log_blk, u8 start_page, u8 end_page)
1625 struct ms_info *ms_card = &chip->ms_card;
1626 bool uncorrect_flag = false;
1627 int retval, rty_cnt;
1628 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1630 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1631 old_blk, new_blk, log_blk);
1632 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1633 start_page, end_page);
1635 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1636 if (retval != STATUS_SUCCESS)
1639 retval = ms_read_status_reg(chip);
1640 if (retval != STATUS_SUCCESS)
1643 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1647 if (val & BUF_FULL) {
1648 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1649 if (retval != STATUS_SUCCESS)
1652 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1653 if (retval != STATUS_SUCCESS)
1656 if (!(val & INT_REG_CED)) {
1657 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1662 for (i = start_page; i < end_page; i++) {
1663 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1664 ms_set_err_code(chip, MS_NO_CARD);
1668 retval = ms_read_extra_data(chip, old_blk, i, extra,
1670 if (retval != STATUS_SUCCESS)
1673 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1674 MS_EXTRA_SIZE, SYSTEM_PARAM, 6);
1675 if (retval != STATUS_SUCCESS)
1678 ms_set_err_code(chip, MS_NO_ERROR);
1680 if (CHK_MS4BIT(ms_card))
1686 data[2] = (u8)(old_blk >> 8);
1687 data[3] = (u8)old_blk;
1691 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1693 if (retval != STATUS_SUCCESS)
1696 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1697 if (retval != STATUS_SUCCESS)
1700 ms_set_err_code(chip, MS_NO_ERROR);
1701 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1702 if (retval != STATUS_SUCCESS)
1705 if (val & INT_REG_CMDNK) {
1706 ms_set_err_code(chip, MS_CMD_NK);
1710 if (val & INT_REG_CED) {
1711 if (val & INT_REG_ERR) {
1712 retval = ms_read_status_reg(chip);
1713 if (retval != STATUS_SUCCESS) {
1714 uncorrect_flag = true;
1715 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1717 uncorrect_flag = false;
1720 retval = ms_transfer_tpc(chip,
1724 if (retval != STATUS_SUCCESS)
1727 if (uncorrect_flag) {
1728 ms_set_page_status(log_blk, set_PS_NG,
1734 ms_write_extra_data(chip, old_blk, i,
1737 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1739 MS_SET_BAD_BLOCK_FLG(ms_card);
1741 ms_set_page_status(log_blk,
1742 set_PS_error, extra,
1744 ms_write_extra_data(chip, new_blk, i,
1750 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
1752 retval = ms_transfer_tpc(
1757 if (retval == STATUS_SUCCESS)
1760 if (rty_cnt == MS_MAX_RETRY_COUNT)
1764 if (!(val & INT_REG_BREQ)) {
1765 ms_set_err_code(chip, MS_BREQ_ERROR);
1770 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1771 SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
1773 ms_set_err_code(chip, MS_NO_ERROR);
1775 if (CHK_MS4BIT(ms_card))
1781 data[2] = (u8)(new_blk >> 8);
1782 data[3] = (u8)new_blk;
1786 if ((extra[0] & 0x60) != 0x60)
1792 data[6 + 2] = (u8)(log_blk >> 8);
1793 data[6 + 3] = (u8)log_blk;
1795 for (j = 4; j <= MS_EXTRA_SIZE; j++)
1798 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1799 NO_WAIT_INT, data, 16);
1800 if (retval != STATUS_SUCCESS)
1803 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1804 if (retval != STATUS_SUCCESS)
1807 ms_set_err_code(chip, MS_NO_ERROR);
1808 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1809 if (retval != STATUS_SUCCESS)
1812 if (val & INT_REG_CMDNK) {
1813 ms_set_err_code(chip, MS_CMD_NK);
1817 if (val & INT_REG_CED) {
1818 if (val & INT_REG_ERR) {
1819 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1825 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1826 MS_EXTRA_SIZE, SYSTEM_PARAM,
1828 if (retval != STATUS_SUCCESS)
1831 ms_set_err_code(chip, MS_NO_ERROR);
1833 if (CHK_MS4BIT(ms_card))
1839 data[2] = (u8)(old_blk >> 8);
1840 data[3] = (u8)old_blk;
1846 retval = ms_write_bytes(chip, WRITE_REG, 7,
1847 NO_WAIT_INT, data, 8);
1848 if (retval != STATUS_SUCCESS)
1851 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1852 if (retval != STATUS_SUCCESS)
1855 ms_set_err_code(chip, MS_NO_ERROR);
1856 retval = ms_read_bytes(chip, GET_INT, 1,
1857 NO_WAIT_INT, &val, 1);
1858 if (retval != STATUS_SUCCESS)
1861 if (val & INT_REG_CMDNK) {
1862 ms_set_err_code(chip, MS_CMD_NK);
1866 if (val & INT_REG_CED) {
1867 if (val & INT_REG_ERR) {
1868 ms_set_err_code(chip,
1869 MS_FLASH_WRITE_ERROR);
1876 return STATUS_SUCCESS;
1879 static int reset_ms(struct rtsx_chip *chip)
1881 struct ms_info *ms_card = &chip->ms_card;
1883 u16 i, reg_addr, block_size;
1884 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1885 #ifndef SUPPORT_MAGIC_GATE
1889 retval = ms_prepare_reset(chip);
1890 if (retval != STATUS_SUCCESS)
1893 ms_card->ms_type |= TYPE_MS;
1895 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1896 if (retval != STATUS_SUCCESS)
1899 retval = ms_read_status_reg(chip);
1900 if (retval != STATUS_SUCCESS)
1903 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1907 if (val & WRT_PRTCT)
1908 chip->card_wp |= MS_CARD;
1910 chip->card_wp &= ~MS_CARD;
1915 /* Search Boot Block */
1916 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1917 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1918 ms_set_err_code(chip, MS_NO_CARD);
1922 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1923 if (retval != STATUS_SUCCESS) {
1928 if (extra[0] & BLOCK_OK) {
1929 if (!(extra[1] & NOT_BOOT_BLOCK)) {
1930 ms_card->boot_block = i;
1937 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1938 dev_dbg(rtsx_dev(chip), "No boot block found!");
1942 for (j = 0; j < 3; j++) {
1943 retval = ms_read_page(chip, ms_card->boot_block, j);
1944 if (retval != STATUS_SUCCESS) {
1945 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1946 i = ms_card->boot_block + 1;
1947 ms_set_err_code(chip, MS_NO_ERROR);
1953 retval = ms_read_page(chip, ms_card->boot_block, 0);
1954 if (retval != STATUS_SUCCESS)
1957 /* Read MS system information as sys_info */
1958 rtsx_init_cmd(chip);
1960 for (i = 0; i < 96; i++)
1961 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1963 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1967 ptr = rtsx_get_cmd_data(chip);
1968 memcpy(ms_card->raw_sys_info, ptr, 96);
1970 /* Read useful block contents */
1971 rtsx_init_cmd(chip);
1973 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1974 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1976 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
1978 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1980 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
1981 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1983 rtsx_add_cmd(chip, READ_REG_CMD, MS_device_type, 0, 0);
1984 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_support, 0, 0);
1986 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1990 ptr = rtsx_get_cmd_data(chip);
1992 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
1993 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
1996 * HEADER_ID0, HEADER_ID1
1998 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1999 i = ms_card->boot_block + 1;
2004 * PAGE_SIZE_0, PAGE_SIZE_1
2006 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2007 i = ms_card->boot_block + 1;
2011 if ((ptr[14] == 1) || (ptr[14] == 3))
2012 chip->card_wp |= MS_CARD;
2014 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2015 block_size = ((u16)ptr[6] << 8) | ptr[7];
2016 if (block_size == 0x0010) {
2017 /* Block size 16KB */
2018 ms_card->block_shift = 5;
2019 ms_card->page_off = 0x1F;
2020 } else if (block_size == 0x0008) {
2021 /* Block size 8KB */
2022 ms_card->block_shift = 4;
2023 ms_card->page_off = 0x0F;
2026 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2027 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2029 #ifdef SUPPORT_MAGIC_GATE
2032 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2033 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2034 ms_card->capacity = 0x1EE0;
2035 } else { /* Effective block for 8MB: 0x3E0 */
2036 ms_card->capacity = 0x3DE0;
2038 } else { /* 16MB, 32MB, 64MB or 128MB */
2039 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2040 ms_card->capacity = 0x7BC0;
2041 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2042 ms_card->capacity = 0xF7C0;
2043 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2044 ms_card->capacity = 0x1EF80;
2045 } else { /* Effective block for 128MB: 0x1F00 */
2046 ms_card->capacity = 0x3DF00;
2050 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2051 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2053 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2056 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2058 /* Switch I/F Mode */
2060 retval = ms_set_rw_reg_addr(chip, 0, 0, SYSTEM_PARAM, 1);
2061 if (retval != STATUS_SUCCESS)
2064 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2068 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2072 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2074 if (retval != STATUS_SUCCESS)
2077 retval = rtsx_write_register(chip, MS_CFG,
2078 0x58 | MS_NO_CHECK_INT,
2085 ms_card->ms_type |= MS_4BIT;
2088 if (CHK_MS4BIT(ms_card))
2089 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2091 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2093 return STATUS_SUCCESS;
2096 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2098 struct ms_info *ms_card = &chip->ms_card;
2099 int size, i, seg_no, retval;
2100 u16 defect_block, reg_addr;
2103 ms_card->segment_cnt = ms_card->total_block >> 9;
2104 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2105 ms_card->segment_cnt);
2107 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2108 ms_card->segment = vzalloc(size);
2109 if (!ms_card->segment)
2112 retval = ms_read_page(chip, ms_card->boot_block, 1);
2113 if (retval != STATUS_SUCCESS)
2116 reg_addr = PPBUF_BASE2;
2117 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2120 retval = rtsx_read_register(chip, reg_addr++, &val1);
2121 if (retval != STATUS_SUCCESS)
2124 retval = rtsx_read_register(chip, reg_addr++, &val2);
2125 if (retval != STATUS_SUCCESS)
2128 defect_block = ((u16)val1 << 8) | val2;
2129 if (defect_block == 0xFFFF)
2132 seg_no = defect_block / 512;
2134 block_no = ms_card->segment[seg_no].disable_count++;
2135 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2138 for (i = 0; i < ms_card->segment_cnt; i++) {
2139 ms_card->segment[i].build_flag = 0;
2140 ms_card->segment[i].l2p_table = NULL;
2141 ms_card->segment[i].free_table = NULL;
2142 ms_card->segment[i].get_index = 0;
2143 ms_card->segment[i].set_index = 0;
2144 ms_card->segment[i].unused_blk_cnt = 0;
2146 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2147 i, ms_card->segment[i].disable_count);
2150 return STATUS_SUCCESS;
2153 vfree(ms_card->segment);
2154 ms_card->segment = NULL;
2159 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2161 struct ms_info *ms_card = &chip->ms_card;
2162 struct zone_entry *segment;
2164 if (!ms_card->segment)
2167 segment = &ms_card->segment[seg_no];
2169 if (segment->l2p_table)
2170 return segment->l2p_table[log_off];
2175 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2176 int seg_no, u16 log_off, u16 phy_blk)
2178 struct ms_info *ms_card = &chip->ms_card;
2179 struct zone_entry *segment;
2181 if (!ms_card->segment)
2184 segment = &ms_card->segment[seg_no];
2185 if (segment->l2p_table)
2186 segment->l2p_table[log_off] = phy_blk;
2189 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2191 struct ms_info *ms_card = &chip->ms_card;
2192 struct zone_entry *segment;
2195 seg_no = (int)phy_blk >> 9;
2196 segment = &ms_card->segment[seg_no];
2198 segment->free_table[segment->set_index++] = phy_blk;
2199 if (segment->set_index >= MS_FREE_TABLE_CNT)
2200 segment->set_index = 0;
2202 segment->unused_blk_cnt++;
2205 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2207 struct ms_info *ms_card = &chip->ms_card;
2208 struct zone_entry *segment;
2211 segment = &ms_card->segment[seg_no];
2213 if (segment->unused_blk_cnt <= 0)
2216 phy_blk = segment->free_table[segment->get_index];
2217 segment->free_table[segment->get_index++] = 0xFFFF;
2218 if (segment->get_index >= MS_FREE_TABLE_CNT)
2219 segment->get_index = 0;
2221 segment->unused_blk_cnt--;
2226 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2227 2974, 3470, 3966, 4462, 4958,
2228 5454, 5950, 6446, 6942, 7438,
2231 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2232 u16 log_off, u8 us1, u8 us2)
2234 struct ms_info *ms_card = &chip->ms_card;
2235 struct zone_entry *segment;
2239 seg_no = (int)phy_blk >> 9;
2240 segment = &ms_card->segment[seg_no];
2241 tmp_blk = segment->l2p_table[log_off];
2245 if (!(chip->card_wp & MS_CARD))
2246 ms_erase_block(chip, tmp_blk);
2248 ms_set_unused_block(chip, tmp_blk);
2249 segment->l2p_table[log_off] = phy_blk;
2251 if (!(chip->card_wp & MS_CARD))
2252 ms_erase_block(chip, phy_blk);
2254 ms_set_unused_block(chip, phy_blk);
2257 if (phy_blk < tmp_blk) {
2258 if (!(chip->card_wp & MS_CARD))
2259 ms_erase_block(chip, phy_blk);
2261 ms_set_unused_block(chip, phy_blk);
2263 if (!(chip->card_wp & MS_CARD))
2264 ms_erase_block(chip, tmp_blk);
2266 ms_set_unused_block(chip, tmp_blk);
2267 segment->l2p_table[log_off] = phy_blk;
2271 return STATUS_SUCCESS;
2274 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2276 struct ms_info *ms_card = &chip->ms_card;
2277 struct zone_entry *segment;
2279 int retval, table_size, disable_cnt, i;
2280 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2281 u8 extra[MS_EXTRA_SIZE], us1, us2;
2283 dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
2285 if (!ms_card->segment) {
2286 retval = ms_init_l2p_tbl(chip);
2287 if (retval != STATUS_SUCCESS)
2291 if (ms_card->segment[seg_no].build_flag) {
2292 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2294 return STATUS_SUCCESS;
2302 segment = &ms_card->segment[seg_no];
2304 if (!segment->l2p_table) {
2305 segment->l2p_table = vmalloc(array_size(table_size, 2));
2306 if (!segment->l2p_table)
2309 memset((u8 *)(segment->l2p_table), 0xff, array_size(table_size, 2));
2311 if (!segment->free_table) {
2312 segment->free_table = vmalloc(array_size(MS_FREE_TABLE_CNT, 2));
2313 if (!segment->free_table)
2316 memset((u8 *)(segment->free_table), 0xff, array_size(MS_FREE_TABLE_CNT, 2));
2318 start = (u16)seg_no << 9;
2319 end = (u16)(seg_no + 1) << 9;
2321 disable_cnt = segment->disable_count;
2323 segment->get_index = 0;
2324 segment->set_index = 0;
2325 segment->unused_blk_cnt = 0;
2327 for (phy_blk = start; phy_blk < end; phy_blk++) {
2329 defect_flag = false;
2330 for (i = 0; i < segment->disable_count; i++) {
2331 if (phy_blk == segment->defect_list[i]) {
2342 retval = ms_read_extra_data(chip, phy_blk, 0,
2343 extra, MS_EXTRA_SIZE);
2344 if (retval != STATUS_SUCCESS) {
2345 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2346 ms_set_bad_block(chip, phy_blk);
2350 if (seg_no == ms_card->segment_cnt - 1) {
2351 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2352 if (!(chip->card_wp & MS_CARD)) {
2353 retval = ms_erase_block(chip, phy_blk);
2354 if (retval != STATUS_SUCCESS)
2362 if (!(extra[0] & BLOCK_OK))
2364 if (!(extra[1] & NOT_BOOT_BLOCK))
2366 if ((extra[0] & PAGE_OK) != PAGE_OK)
2369 log_blk = ((u16)extra[2] << 8) | extra[3];
2371 if (log_blk == 0xFFFF) {
2372 if (!(chip->card_wp & MS_CARD)) {
2373 retval = ms_erase_block(chip, phy_blk);
2374 if (retval != STATUS_SUCCESS)
2377 ms_set_unused_block(chip, phy_blk);
2381 if ((log_blk < ms_start_idx[seg_no]) ||
2382 (log_blk >= ms_start_idx[seg_no + 1])) {
2383 if (!(chip->card_wp & MS_CARD)) {
2384 retval = ms_erase_block(chip, phy_blk);
2385 if (retval != STATUS_SUCCESS)
2388 ms_set_unused_block(chip, phy_blk);
2392 idx = log_blk - ms_start_idx[seg_no];
2394 if (segment->l2p_table[idx] == 0xFFFF) {
2395 segment->l2p_table[idx] = phy_blk;
2399 us1 = extra[0] & 0x10;
2400 tmp_blk = segment->l2p_table[idx];
2401 retval = ms_read_extra_data(chip, tmp_blk, 0,
2402 extra, MS_EXTRA_SIZE);
2403 if (retval != STATUS_SUCCESS)
2405 us2 = extra[0] & 0x10;
2407 (void)ms_arbitrate_l2p(chip, phy_blk,
2408 log_blk - ms_start_idx[seg_no], us1, us2);
2411 segment->build_flag = 1;
2413 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2414 segment->unused_blk_cnt);
2416 /* Logical Address Confirmation Process */
2417 if (seg_no == ms_card->segment_cnt - 1) {
2418 if (segment->unused_blk_cnt < 2)
2419 chip->card_wp |= MS_CARD;
2421 if (segment->unused_blk_cnt < 1)
2422 chip->card_wp |= MS_CARD;
2425 if (chip->card_wp & MS_CARD)
2426 return STATUS_SUCCESS;
2428 for (log_blk = ms_start_idx[seg_no];
2429 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2430 idx = log_blk - ms_start_idx[seg_no];
2431 if (segment->l2p_table[idx] == 0xFFFF) {
2432 phy_blk = ms_get_unused_block(chip, seg_no);
2433 if (phy_blk == 0xFFFF) {
2434 chip->card_wp |= MS_CARD;
2435 return STATUS_SUCCESS;
2437 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2438 if (retval != STATUS_SUCCESS)
2441 segment->l2p_table[idx] = phy_blk;
2442 if (seg_no == ms_card->segment_cnt - 1) {
2443 if (segment->unused_blk_cnt < 2) {
2444 chip->card_wp |= MS_CARD;
2445 return STATUS_SUCCESS;
2448 if (segment->unused_blk_cnt < 1) {
2449 chip->card_wp |= MS_CARD;
2450 return STATUS_SUCCESS;
2456 /* Make boot block be the first normal block */
2458 for (log_blk = 0; log_blk < 494; log_blk++) {
2459 tmp_blk = segment->l2p_table[log_blk];
2460 if (tmp_blk < ms_card->boot_block) {
2461 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2463 if (chip->card_wp & MS_CARD)
2466 phy_blk = ms_get_unused_block(chip, 0);
2467 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2469 ms_card->page_off + 1);
2470 if (retval != STATUS_SUCCESS)
2473 segment->l2p_table[log_blk] = phy_blk;
2475 retval = ms_set_bad_block(chip, tmp_blk);
2476 if (retval != STATUS_SUCCESS)
2482 return STATUS_SUCCESS;
2485 segment->build_flag = 0;
2486 vfree(segment->l2p_table);
2487 segment->l2p_table = NULL;
2488 vfree(segment->free_table);
2489 segment->free_table = NULL;
2494 int reset_ms_card(struct rtsx_chip *chip)
2496 struct ms_info *ms_card = &chip->ms_card;
2497 int seg_no = ms_card->total_block / 512 - 1;
2500 memset(ms_card, 0, sizeof(struct ms_info));
2502 retval = enable_card_clock(chip, MS_CARD);
2503 if (retval != STATUS_SUCCESS)
2506 retval = select_card(chip, MS_CARD);
2507 if (retval != STATUS_SUCCESS)
2510 ms_card->ms_type = 0;
2512 retval = reset_ms_pro(chip);
2513 if (retval != STATUS_SUCCESS) {
2514 if (ms_card->check_ms_flow) {
2515 retval = reset_ms(chip);
2516 if (retval != STATUS_SUCCESS)
2523 retval = ms_set_init_para(chip);
2524 if (retval != STATUS_SUCCESS)
2527 if (!CHK_MSPRO(ms_card)) {
2528 /* Build table for the last segment,
2529 * to check if L2P table block exists, erasing it
2531 retval = ms_build_l2p_tbl(chip, seg_no);
2532 if (retval != STATUS_SUCCESS)
2536 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2538 return STATUS_SUCCESS;
2541 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2542 u32 start_sec, u16 sec_cnt, u8 cmd)
2548 data[1] = (u8)(sec_cnt >> 8);
2549 data[2] = (u8)sec_cnt;
2550 data[3] = (u8)(start_sec >> 24);
2551 data[4] = (u8)(start_sec >> 16);
2552 data[5] = (u8)(start_sec >> 8);
2553 data[6] = (u8)start_sec;
2556 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2557 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2559 if (retval == STATUS_SUCCESS)
2562 if (i == MS_MAX_RETRY_COUNT)
2565 return STATUS_SUCCESS;
2568 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2570 struct ms_info *ms_card = &chip->ms_card;
2573 if (ms_card->seq_mode) {
2574 retval = ms_switch_clock(chip);
2575 if (retval != STATUS_SUCCESS)
2578 ms_card->seq_mode = 0;
2579 ms_card->total_sec_cnt = 0;
2580 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2582 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2586 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2588 struct ms_info *ms_card = &chip->ms_card;
2591 if (chip->asic_code) {
2592 if (ms_card->ms_clock > 30)
2593 ms_card->ms_clock -= 20;
2595 if (ms_card->ms_clock == CLK_80)
2596 ms_card->ms_clock = CLK_60;
2597 else if (ms_card->ms_clock == CLK_60)
2598 ms_card->ms_clock = CLK_40;
2601 retval = ms_switch_clock(chip);
2602 if (retval != STATUS_SUCCESS)
2605 return STATUS_SUCCESS;
2608 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2609 struct rtsx_chip *chip, u32 start_sector,
2612 struct ms_info *ms_card = &chip->ms_card;
2613 bool mode_2k = false;
2616 u8 val, trans_mode, rw_tpc, rw_cmd;
2618 ms_set_err_code(chip, MS_NO_ERROR);
2620 ms_card->cleanup_counter = 0;
2622 if (CHK_MSHG(ms_card)) {
2623 if ((start_sector % 4) || (sector_cnt % 4)) {
2624 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2625 rw_tpc = PRO_READ_LONG_DATA;
2626 rw_cmd = PRO_READ_DATA;
2628 rw_tpc = PRO_WRITE_LONG_DATA;
2629 rw_cmd = PRO_WRITE_DATA;
2632 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2633 rw_tpc = PRO_READ_QUAD_DATA;
2634 rw_cmd = PRO_READ_2K_DATA;
2636 rw_tpc = PRO_WRITE_QUAD_DATA;
2637 rw_cmd = PRO_WRITE_2K_DATA;
2642 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2643 rw_tpc = PRO_READ_LONG_DATA;
2644 rw_cmd = PRO_READ_DATA;
2646 rw_tpc = PRO_WRITE_LONG_DATA;
2647 rw_cmd = PRO_WRITE_DATA;
2651 retval = ms_switch_clock(chip);
2652 if (retval != STATUS_SUCCESS)
2655 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2656 trans_mode = MS_TM_AUTO_READ;
2658 trans_mode = MS_TM_AUTO_WRITE;
2660 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2664 if (ms_card->seq_mode) {
2665 if ((ms_card->pre_dir != srb->sc_data_direction) ||
2666 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
2668 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
2669 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
2670 !(val & MS_INT_BREQ) ||
2671 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2672 ms_card->seq_mode = 0;
2673 ms_card->total_sec_cnt = 0;
2674 if (val & MS_INT_BREQ) {
2675 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2676 if (retval != STATUS_SUCCESS)
2679 rtsx_write_register(chip, RBCTL, RB_FLUSH,
2685 if (!ms_card->seq_mode) {
2686 ms_card->total_sec_cnt = 0;
2687 if (sector_cnt >= SEQ_START_CRITERIA) {
2688 if ((ms_card->capacity - start_sector) > 0xFE00)
2691 count = (u16)(ms_card->capacity - start_sector);
2693 if (count > sector_cnt) {
2695 ms_card->seq_mode = MODE_2K_SEQ;
2697 ms_card->seq_mode = MODE_512_SEQ;
2702 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2703 if (retval != STATUS_SUCCESS) {
2704 ms_card->seq_mode = 0;
2709 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
2710 WAIT_INT, mode_2k, scsi_sg_count(srb),
2711 scsi_sglist(srb), scsi_bufflen(srb));
2712 if (retval != STATUS_SUCCESS) {
2713 ms_card->seq_mode = 0;
2714 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2715 rtsx_clear_ms_error(chip);
2717 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2718 chip->rw_need_retry = 0;
2719 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
2724 if (val & MS_INT_BREQ)
2725 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2727 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2728 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
2729 chip->rw_need_retry = 1;
2730 ms_auto_tune_clock(chip);
2736 if (ms_card->seq_mode) {
2737 ms_card->pre_sec_addr = start_sector;
2738 ms_card->pre_sec_cnt = sector_cnt;
2739 ms_card->pre_dir = srb->sc_data_direction;
2740 ms_card->total_sec_cnt += sector_cnt;
2743 return STATUS_SUCCESS;
2746 static int mspro_read_format_progress(struct rtsx_chip *chip,
2747 const int short_data_len)
2749 struct ms_info *ms_card = &chip->ms_card;
2751 u32 total_progress, cur_progress;
2755 dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
2758 retval = ms_switch_clock(chip);
2759 if (retval != STATUS_SUCCESS) {
2760 ms_card->format_status = FORMAT_FAIL;
2764 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2765 if (retval != STATUS_SUCCESS) {
2766 ms_card->format_status = FORMAT_FAIL;
2770 if (!(tmp & MS_INT_BREQ)) {
2771 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
2772 MS_INT_ERR)) == MS_INT_CED) {
2773 ms_card->format_status = FORMAT_SUCCESS;
2774 return STATUS_SUCCESS;
2776 ms_card->format_status = FORMAT_FAIL;
2780 if (short_data_len >= 256)
2783 cnt = (u8)short_data_len;
2785 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
2787 if (retval != STATUS_SUCCESS) {
2788 ms_card->format_status = FORMAT_FAIL;
2792 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
2794 if (retval != STATUS_SUCCESS) {
2795 ms_card->format_status = FORMAT_FAIL;
2799 total_progress = (data[0] << 24) | (data[1] << 16) |
2800 (data[2] << 8) | data[3];
2801 cur_progress = (data[4] << 24) | (data[5] << 16) |
2802 (data[6] << 8) | data[7];
2804 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
2805 total_progress, cur_progress);
2807 if (total_progress == 0) {
2808 ms_card->progress = 0;
2810 u64 ulltmp = (u64)cur_progress * (u64)65535;
2812 do_div(ulltmp, total_progress);
2813 ms_card->progress = (u16)ulltmp;
2815 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
2817 for (i = 0; i < 5000; i++) {
2818 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2819 if (retval != STATUS_SUCCESS) {
2820 ms_card->format_status = FORMAT_FAIL;
2823 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
2824 MS_INT_BREQ | MS_INT_ERR))
2830 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2831 if (retval != STATUS_SUCCESS) {
2832 ms_card->format_status = FORMAT_FAIL;
2837 ms_card->format_status = FORMAT_FAIL;
2841 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2842 ms_card->format_status = FORMAT_FAIL;
2846 if (tmp & MS_INT_CED) {
2847 ms_card->format_status = FORMAT_SUCCESS;
2848 ms_card->pro_under_formatting = 0;
2849 } else if (tmp & MS_INT_BREQ) {
2850 ms_card->format_status = FORMAT_IN_PROGRESS;
2852 ms_card->format_status = FORMAT_FAIL;
2853 ms_card->pro_under_formatting = 0;
2857 return STATUS_SUCCESS;
2860 void mspro_polling_format_status(struct rtsx_chip *chip)
2862 struct ms_info *ms_card = &chip->ms_card;
2865 if (ms_card->pro_under_formatting &&
2866 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2867 rtsx_set_stat(chip, RTSX_STAT_RUN);
2869 for (i = 0; i < 65535; i++) {
2870 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2871 if (ms_card->format_status != FORMAT_IN_PROGRESS)
2877 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
2878 int short_data_len, bool quick_format)
2880 struct ms_info *ms_card = &chip->ms_card;
2885 retval = ms_switch_clock(chip);
2886 if (retval != STATUS_SUCCESS)
2889 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, PRO_TPC_PARM, 0x01);
2890 if (retval != STATUS_SUCCESS)
2894 switch (short_data_len) {
2910 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2911 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
2912 NO_WAIT_INT, buf, 2);
2913 if (retval == STATUS_SUCCESS)
2916 if (i == MS_MAX_RETRY_COUNT)
2924 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2925 if (retval != STATUS_SUCCESS)
2928 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2932 if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
2935 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2936 ms_card->pro_under_formatting = 1;
2937 ms_card->progress = 0;
2938 ms_card->format_status = FORMAT_IN_PROGRESS;
2939 return STATUS_SUCCESS;
2942 if (tmp & MS_INT_CED) {
2943 ms_card->pro_under_formatting = 0;
2944 ms_card->progress = 0;
2945 ms_card->format_status = FORMAT_SUCCESS;
2946 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2947 return STATUS_SUCCESS;
2953 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
2954 u16 log_blk, u8 start_page, u8 end_page,
2955 u8 *buf, unsigned int *index,
2956 unsigned int *offset)
2958 struct ms_info *ms_card = &chip->ms_card;
2960 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2963 retval = ms_read_extra_data(chip, phy_blk, start_page,
2964 extra, MS_EXTRA_SIZE);
2965 if (retval == STATUS_SUCCESS) {
2966 if ((extra[1] & 0x30) != 0x30) {
2967 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2972 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
2974 if (retval != STATUS_SUCCESS)
2977 if (CHK_MS4BIT(ms_card))
2983 data[2] = (u8)(phy_blk >> 8);
2984 data[3] = (u8)phy_blk;
2986 data[5] = start_page;
2988 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2989 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
2991 if (retval == STATUS_SUCCESS)
2994 if (i == MS_MAX_RETRY_COUNT)
2997 ms_set_err_code(chip, MS_NO_ERROR);
2999 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3000 if (retval != STATUS_SUCCESS)
3005 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3006 ms_set_err_code(chip, MS_NO_ERROR);
3008 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3009 ms_set_err_code(chip, MS_NO_CARD);
3013 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3014 if (retval != STATUS_SUCCESS)
3017 if (val & INT_REG_CMDNK) {
3018 ms_set_err_code(chip, MS_CMD_NK);
3021 if (val & INT_REG_ERR) {
3022 if (val & INT_REG_BREQ) {
3023 retval = ms_read_status_reg(chip);
3024 if (retval != STATUS_SUCCESS) {
3025 if (!(chip->card_wp & MS_CARD)) {
3028 (log_blk, set_PS_NG,
3036 ms_set_err_code(chip,
3037 MS_FLASH_READ_ERROR);
3041 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3045 if (!(val & INT_REG_BREQ)) {
3046 ms_set_err_code(chip, MS_BREQ_ERROR);
3051 if (page_addr == (end_page - 1)) {
3052 if (!(val & INT_REG_CED)) {
3053 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3054 if (retval != STATUS_SUCCESS)
3058 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3060 if (retval != STATUS_SUCCESS)
3063 if (!(val & INT_REG_CED)) {
3064 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3068 trans_cfg = NO_WAIT_INT;
3070 trans_cfg = WAIT_INT;
3073 rtsx_init_cmd(chip);
3075 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3076 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3078 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3081 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3083 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3084 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3085 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3086 MS_TRANSFER_END, MS_TRANSFER_END);
3088 rtsx_send_cmd_no_wait(chip);
3090 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3091 scsi_sg_count(chip->srb),
3096 if (retval == -ETIMEDOUT) {
3097 ms_set_err_code(chip, MS_TO_ERROR);
3098 rtsx_clear_ms_error(chip);
3099 return STATUS_TIMEDOUT;
3102 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3103 if (retval != STATUS_SUCCESS) {
3104 ms_set_err_code(chip, MS_TO_ERROR);
3105 rtsx_clear_ms_error(chip);
3106 return STATUS_TIMEDOUT;
3108 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3109 ms_set_err_code(chip, MS_CRC16_ERROR);
3110 rtsx_clear_ms_error(chip);
3115 if (scsi_sg_count(chip->srb) == 0)
3119 return STATUS_SUCCESS;
3122 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3123 u16 new_blk, u16 log_blk, u8 start_page,
3124 u8 end_page, u8 *buf, unsigned int *index,
3125 unsigned int *offset)
3127 struct ms_info *ms_card = &chip->ms_card;
3129 u8 page_addr, val, data[16];
3133 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3135 if (retval != STATUS_SUCCESS)
3138 if (CHK_MS4BIT(ms_card))
3144 data[2] = (u8)(old_blk >> 8);
3145 data[3] = (u8)old_blk;
3151 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3153 if (retval != STATUS_SUCCESS)
3156 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3157 if (retval != STATUS_SUCCESS)
3160 ms_set_err_code(chip, MS_NO_ERROR);
3161 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3163 if (retval != STATUS_SUCCESS)
3167 retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3168 SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
3169 if (retval != STATUS_SUCCESS)
3172 ms_set_err_code(chip, MS_NO_ERROR);
3174 if (CHK_MS4BIT(ms_card))
3180 data[2] = (u8)(new_blk >> 8);
3181 data[3] = (u8)new_blk;
3182 if ((end_page - start_page) == 1)
3187 data[5] = start_page;
3190 data[8] = (u8)(log_blk >> 8);
3191 data[9] = (u8)log_blk;
3193 for (i = 0x0A; i < 0x10; i++)
3196 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3197 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3198 NO_WAIT_INT, data, 16);
3199 if (retval == STATUS_SUCCESS)
3202 if (i == MS_MAX_RETRY_COUNT)
3205 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3206 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3207 if (retval == STATUS_SUCCESS)
3210 if (i == MS_MAX_RETRY_COUNT)
3213 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3214 if (retval != STATUS_SUCCESS)
3218 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3219 ms_set_err_code(chip, MS_NO_ERROR);
3221 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3222 ms_set_err_code(chip, MS_NO_CARD);
3226 if (val & INT_REG_CMDNK) {
3227 ms_set_err_code(chip, MS_CMD_NK);
3230 if (val & INT_REG_ERR) {
3231 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3234 if (!(val & INT_REG_BREQ)) {
3235 ms_set_err_code(chip, MS_BREQ_ERROR);
3241 rtsx_init_cmd(chip);
3243 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3244 0xFF, WRITE_PAGE_DATA);
3245 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3247 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3250 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3252 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3253 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3254 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3255 MS_TRANSFER_END, MS_TRANSFER_END);
3257 rtsx_send_cmd_no_wait(chip);
3259 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3260 scsi_sg_count(chip->srb),
3265 ms_set_err_code(chip, MS_TO_ERROR);
3266 rtsx_clear_ms_error(chip);
3268 if (retval == -ETIMEDOUT)
3269 return STATUS_TIMEDOUT;
3273 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3274 if (retval != STATUS_SUCCESS)
3277 if ((end_page - start_page) == 1) {
3278 if (!(val & INT_REG_CED)) {
3279 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3283 if (page_addr == (end_page - 1)) {
3284 if (!(val & INT_REG_CED)) {
3285 retval = ms_send_cmd(chip, BLOCK_END,
3287 if (retval != STATUS_SUCCESS)
3291 retval = ms_read_bytes(chip, GET_INT, 1,
3292 NO_WAIT_INT, &val, 1);
3293 if (retval != STATUS_SUCCESS)
3297 if ((page_addr == (end_page - 1)) ||
3298 (page_addr == ms_card->page_off)) {
3299 if (!(val & INT_REG_CED)) {
3300 ms_set_err_code(chip,
3301 MS_FLASH_WRITE_ERROR);
3307 if (scsi_sg_count(chip->srb) == 0)
3311 return STATUS_SUCCESS;
3314 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3315 u16 log_blk, u8 page_off)
3317 struct ms_info *ms_card = &chip->ms_card;
3320 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3321 page_off, ms_card->page_off + 1);
3322 if (retval != STATUS_SUCCESS)
3325 seg_no = old_blk >> 9;
3327 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3328 MS_CLR_BAD_BLOCK_FLG(ms_card);
3329 ms_set_bad_block(chip, old_blk);
3331 retval = ms_erase_block(chip, old_blk);
3332 if (retval == STATUS_SUCCESS)
3333 ms_set_unused_block(chip, old_blk);
3336 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3338 return STATUS_SUCCESS;
3341 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3342 u16 log_blk, u8 start_page)
3347 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3349 if (retval != STATUS_SUCCESS)
3353 return STATUS_SUCCESS;
3356 #ifdef MS_DELAY_WRITE
3357 int ms_delay_write(struct rtsx_chip *chip)
3359 struct ms_info *ms_card = &chip->ms_card;
3360 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3363 if (delay_write->delay_write_flag) {
3364 retval = ms_set_init_para(chip);
3365 if (retval != STATUS_SUCCESS)
3368 delay_write->delay_write_flag = 0;
3369 retval = ms_finish_write(chip,
3370 delay_write->old_phyblock,
3371 delay_write->new_phyblock,
3372 delay_write->logblock,
3373 delay_write->pageoff);
3374 if (retval != STATUS_SUCCESS)
3378 return STATUS_SUCCESS;
3382 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3384 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3385 set_sense_type(chip, SCSI_LUN(srb),
3386 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3388 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3391 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3392 u32 start_sector, u16 sector_cnt)
3394 struct ms_info *ms_card = &chip->ms_card;
3395 unsigned int lun = SCSI_LUN(srb);
3397 unsigned int index = 0, offset = 0;
3398 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3399 u8 start_page, end_page = 0, page_cnt;
3401 #ifdef MS_DELAY_WRITE
3402 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3405 ms_set_err_code(chip, MS_NO_ERROR);
3407 ms_card->cleanup_counter = 0;
3409 ptr = (u8 *)scsi_sglist(srb);
3411 retval = ms_switch_clock(chip);
3412 if (retval != STATUS_SUCCESS) {
3413 ms_rw_fail(srb, chip);
3417 log_blk = (u16)(start_sector >> ms_card->block_shift);
3418 start_page = (u8)(start_sector & ms_card->page_off);
3420 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3421 if (log_blk < ms_start_idx[seg_no + 1])
3425 if (ms_card->segment[seg_no].build_flag == 0) {
3426 retval = ms_build_l2p_tbl(chip, seg_no);
3427 if (retval != STATUS_SUCCESS) {
3428 chip->card_fail |= MS_CARD;
3429 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3434 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3435 #ifdef MS_DELAY_WRITE
3436 if (delay_write->delay_write_flag &&
3437 (delay_write->logblock == log_blk) &&
3438 (start_page > delay_write->pageoff)) {
3439 delay_write->delay_write_flag = 0;
3440 retval = ms_copy_page(chip,
3441 delay_write->old_phyblock,
3442 delay_write->new_phyblock,
3444 delay_write->pageoff, start_page);
3445 if (retval != STATUS_SUCCESS) {
3446 set_sense_type(chip, lun,
3447 SENSE_TYPE_MEDIA_WRITE_ERR);
3450 old_blk = delay_write->old_phyblock;
3451 new_blk = delay_write->new_phyblock;
3452 } else if (delay_write->delay_write_flag &&
3453 (delay_write->logblock == log_blk) &&
3454 (start_page == delay_write->pageoff)) {
3455 delay_write->delay_write_flag = 0;
3456 old_blk = delay_write->old_phyblock;
3457 new_blk = delay_write->new_phyblock;
3459 retval = ms_delay_write(chip);
3460 if (retval != STATUS_SUCCESS) {
3461 set_sense_type(chip, lun,
3462 SENSE_TYPE_MEDIA_WRITE_ERR);
3466 old_blk = ms_get_l2p_tbl
3468 log_blk - ms_start_idx[seg_no]);
3469 new_blk = ms_get_unused_block(chip, seg_no);
3470 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3471 set_sense_type(chip, lun,
3472 SENSE_TYPE_MEDIA_WRITE_ERR);
3476 retval = ms_prepare_write(chip, old_blk, new_blk,
3477 log_blk, start_page);
3478 if (retval != STATUS_SUCCESS) {
3479 if (detect_card_cd(chip, MS_CARD) !=
3483 SENSE_TYPE_MEDIA_NOT_PRESENT);
3486 set_sense_type(chip, lun,
3487 SENSE_TYPE_MEDIA_WRITE_ERR);
3490 #ifdef MS_DELAY_WRITE
3494 #ifdef MS_DELAY_WRITE
3495 retval = ms_delay_write(chip);
3496 if (retval != STATUS_SUCCESS) {
3497 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3498 set_sense_type(chip, lun,
3499 SENSE_TYPE_MEDIA_NOT_PRESENT);
3502 set_sense_type(chip, lun,
3503 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3507 old_blk = ms_get_l2p_tbl(chip, seg_no,
3508 log_blk - ms_start_idx[seg_no]);
3509 if (old_blk == 0xFFFF) {
3510 set_sense_type(chip, lun,
3511 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3516 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3517 seg_no, old_blk, new_blk);
3519 while (total_sec_cnt) {
3520 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3521 end_page = ms_card->page_off + 1;
3523 end_page = start_page + (u8)total_sec_cnt;
3525 page_cnt = end_page - start_page;
3527 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3528 start_page, end_page, page_cnt);
3530 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3531 retval = ms_read_multiple_pages(chip,
3533 start_page, end_page,
3534 ptr, &index, &offset);
3536 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3537 log_blk, start_page,
3538 end_page, ptr, &index,
3542 if (retval != STATUS_SUCCESS) {
3543 toggle_gpio(chip, 1);
3544 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3545 set_sense_type(chip, lun,
3546 SENSE_TYPE_MEDIA_NOT_PRESENT);
3549 ms_rw_fail(srb, chip);
3553 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3554 if (end_page == (ms_card->page_off + 1)) {
3555 retval = ms_erase_block(chip, old_blk);
3556 if (retval == STATUS_SUCCESS)
3557 ms_set_unused_block(chip, old_blk);
3559 ms_set_l2p_tbl(chip, seg_no,
3560 log_blk - ms_start_idx[seg_no],
3565 total_sec_cnt -= page_cnt;
3566 if (scsi_sg_count(srb) == 0)
3567 ptr += page_cnt * 512;
3569 if (total_sec_cnt == 0)
3574 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3576 if (log_blk < ms_start_idx[seg_no + 1])
3580 if (ms_card->segment[seg_no].build_flag == 0) {
3581 retval = ms_build_l2p_tbl(chip, seg_no);
3582 if (retval != STATUS_SUCCESS) {
3583 chip->card_fail |= MS_CARD;
3584 set_sense_type(chip, lun,
3585 SENSE_TYPE_MEDIA_NOT_PRESENT);
3590 old_blk = ms_get_l2p_tbl(chip, seg_no,
3591 log_blk - ms_start_idx[seg_no]);
3592 if (old_blk == 0xFFFF) {
3593 ms_rw_fail(srb, chip);
3597 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3598 new_blk = ms_get_unused_block(chip, seg_no);
3599 if (new_blk == 0xFFFF) {
3600 ms_rw_fail(srb, chip);
3605 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3606 seg_no, old_blk, new_blk);
3611 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3612 if (end_page < (ms_card->page_off + 1)) {
3613 #ifdef MS_DELAY_WRITE
3614 delay_write->delay_write_flag = 1;
3615 delay_write->old_phyblock = old_blk;
3616 delay_write->new_phyblock = new_blk;
3617 delay_write->logblock = log_blk;
3618 delay_write->pageoff = end_page;
3620 retval = ms_finish_write(chip, old_blk, new_blk,
3622 if (retval != STATUS_SUCCESS) {
3623 if (detect_card_cd(chip, MS_CARD) !=
3627 SENSE_TYPE_MEDIA_NOT_PRESENT);
3631 ms_rw_fail(srb, chip);
3638 scsi_set_resid(srb, 0);
3640 return STATUS_SUCCESS;
3643 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3644 u32 start_sector, u16 sector_cnt)
3646 struct ms_info *ms_card = &chip->ms_card;
3649 if (CHK_MSPRO(ms_card))
3650 retval = mspro_rw_multi_sector(srb, chip, start_sector,
3653 retval = ms_rw_multi_sector(srb, chip, start_sector,
3659 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3661 struct ms_info *ms_card = &chip->ms_card;
3664 if (ms_card->segment) {
3665 for (i = 0; i < ms_card->segment_cnt; i++) {
3666 vfree(ms_card->segment[i].l2p_table);
3667 ms_card->segment[i].l2p_table = NULL;
3668 vfree(ms_card->segment[i].free_table);
3669 ms_card->segment[i].free_table = NULL;
3671 vfree(ms_card->segment);
3672 ms_card->segment = NULL;
3676 #ifdef SUPPORT_MAGIC_GATE
3678 #ifdef READ_BYTES_WAIT_INT
3679 static int ms_poll_int(struct rtsx_chip *chip)
3684 rtsx_init_cmd(chip);
3686 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3688 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3689 if (retval != STATUS_SUCCESS)
3692 val = *rtsx_get_cmd_data(chip);
3693 if (val & MS_INT_ERR)
3696 return STATUS_SUCCESS;
3700 #ifdef MS_SAMPLE_INT_ERR
3701 static int check_ms_err(struct rtsx_chip *chip)
3706 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3707 if (retval != STATUS_SUCCESS)
3709 if (val & MS_TRANSFER_ERR)
3712 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3713 if (retval != STATUS_SUCCESS)
3716 if (val & (MS_INT_ERR | MS_INT_CMDNK))
3722 static int check_ms_err(struct rtsx_chip *chip)
3727 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3728 if (retval != STATUS_SUCCESS)
3730 if (val & MS_TRANSFER_ERR)
3737 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3748 data[6] = entry_num;
3751 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3752 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
3754 if (retval == STATUS_SUCCESS)
3757 if (i == MS_MAX_RETRY_COUNT)
3760 if (check_ms_err(chip)) {
3761 rtsx_clear_ms_error(chip);
3765 return STATUS_SUCCESS;
3768 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
3775 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_TPC_PARM, 1);
3777 retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
3779 if (retval != STATUS_SUCCESS)
3788 buf[5] = mg_entry_num;
3790 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
3791 NO_WAIT_INT, buf, 6);
3792 if (retval != STATUS_SUCCESS)
3795 return STATUS_SUCCESS;
3798 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3802 unsigned int lun = SCSI_LUN(srb);
3803 u8 buf1[32], buf2[12];
3805 if (scsi_bufflen(srb) < 12) {
3806 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3810 ms_cleanup_work(chip);
3812 retval = ms_switch_clock(chip);
3813 if (retval != STATUS_SUCCESS)
3816 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3817 if (retval != STATUS_SUCCESS) {
3818 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3822 memset(buf1, 0, 32);
3823 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
3824 for (i = 0; i < 8; i++)
3825 buf1[8 + i] = buf2[4 + i];
3827 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3829 if (retval != STATUS_SUCCESS) {
3830 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3833 if (check_ms_err(chip)) {
3834 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3835 rtsx_clear_ms_error(chip);
3839 return STATUS_SUCCESS;
3842 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3846 unsigned int lun = SCSI_LUN(srb);
3849 ms_cleanup_work(chip);
3851 retval = ms_switch_clock(chip);
3852 if (retval != STATUS_SUCCESS)
3855 buf = kmalloc(1540, GFP_KERNEL);
3857 return STATUS_ERROR;
3864 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3865 if (retval != STATUS_SUCCESS) {
3866 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3870 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3871 3, WAIT_INT, 0, 0, buf + 4, 1536);
3872 if (retval != STATUS_SUCCESS) {
3873 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3874 rtsx_clear_ms_error(chip);
3877 if (check_ms_err(chip)) {
3878 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3879 rtsx_clear_ms_error(chip);
3880 retval = STATUS_FAIL;
3884 bufflen = min_t(int, 1052, scsi_bufflen(srb));
3885 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3892 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3894 struct ms_info *ms_card = &chip->ms_card;
3898 unsigned int lun = SCSI_LUN(srb);
3901 ms_cleanup_work(chip);
3903 retval = ms_switch_clock(chip);
3904 if (retval != STATUS_SUCCESS)
3907 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3908 if (retval != STATUS_SUCCESS) {
3909 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3913 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3915 if (retval != STATUS_SUCCESS) {
3916 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3919 if (check_ms_err(chip)) {
3920 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3921 rtsx_clear_ms_error(chip);
3925 memcpy(ms_card->magic_gate_id, buf, 16);
3927 #ifdef READ_BYTES_WAIT_INT
3928 retval = ms_poll_int(chip);
3929 if (retval != STATUS_SUCCESS) {
3930 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3935 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3936 if (retval != STATUS_SUCCESS) {
3937 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3941 bufflen = min_t(int, 12, scsi_bufflen(srb));
3942 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3944 for (i = 0; i < 8; i++)
3945 buf[i] = buf[4 + i];
3947 for (i = 0; i < 24; i++)
3950 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3951 32, WAIT_INT, buf, 32);
3952 if (retval != STATUS_SUCCESS) {
3953 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3956 if (check_ms_err(chip)) {
3957 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3958 rtsx_clear_ms_error(chip);
3962 ms_card->mg_auth = 0;
3964 return STATUS_SUCCESS;
3967 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3969 struct ms_info *ms_card = &chip->ms_card;
3972 unsigned int lun = SCSI_LUN(srb);
3973 u8 buf1[32], buf2[36];
3975 ms_cleanup_work(chip);
3977 retval = ms_switch_clock(chip);
3978 if (retval != STATUS_SUCCESS)
3981 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3982 if (retval != STATUS_SUCCESS) {
3983 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3987 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3989 if (retval != STATUS_SUCCESS) {
3990 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3993 if (check_ms_err(chip)) {
3994 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3995 rtsx_clear_ms_error(chip);
4004 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4005 memcpy(buf2 + 20, buf1, 16);
4007 bufflen = min_t(int, 36, scsi_bufflen(srb));
4008 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4010 #ifdef READ_BYTES_WAIT_INT
4011 retval = ms_poll_int(chip);
4012 if (retval != STATUS_SUCCESS) {
4013 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4018 return STATUS_SUCCESS;
4021 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4023 struct ms_info *ms_card = &chip->ms_card;
4027 unsigned int lun = SCSI_LUN(srb);
4030 ms_cleanup_work(chip);
4032 retval = ms_switch_clock(chip);
4033 if (retval != STATUS_SUCCESS)
4036 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4037 if (retval != STATUS_SUCCESS) {
4038 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4042 bufflen = min_t(int, 12, scsi_bufflen(srb));
4043 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4045 for (i = 0; i < 8; i++)
4046 buf[i] = buf[4 + i];
4048 for (i = 0; i < 24; i++)
4051 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4053 if (retval != STATUS_SUCCESS) {
4054 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4057 if (check_ms_err(chip)) {
4058 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4059 rtsx_clear_ms_error(chip);
4063 ms_card->mg_auth = 1;
4065 return STATUS_SUCCESS;
4068 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4070 struct ms_info *ms_card = &chip->ms_card;
4073 unsigned int lun = SCSI_LUN(srb);
4076 ms_cleanup_work(chip);
4078 retval = ms_switch_clock(chip);
4079 if (retval != STATUS_SUCCESS)
4082 buf = kmalloc(1028, GFP_KERNEL);
4084 return STATUS_ERROR;
4091 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4092 if (retval != STATUS_SUCCESS) {
4093 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4097 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4098 2, WAIT_INT, 0, 0, buf + 4, 1024);
4099 if (retval != STATUS_SUCCESS) {
4100 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4101 rtsx_clear_ms_error(chip);
4104 if (check_ms_err(chip)) {
4105 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4106 rtsx_clear_ms_error(chip);
4107 retval = STATUS_FAIL;
4111 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4112 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4119 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4121 struct ms_info *ms_card = &chip->ms_card;
4124 #ifdef MG_SET_ICV_SLOW
4127 unsigned int lun = SCSI_LUN(srb);
4130 ms_cleanup_work(chip);
4132 retval = ms_switch_clock(chip);
4133 if (retval != STATUS_SUCCESS)
4136 buf = kmalloc(1028, GFP_KERNEL);
4138 return STATUS_ERROR;
4140 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4141 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4143 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4144 if (retval != STATUS_SUCCESS) {
4145 if (ms_card->mg_auth == 0) {
4146 if ((buf[5] & 0xC0) != 0)
4149 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4151 set_sense_type(chip, lun,
4152 SENSE_TYPE_MG_WRITE_ERR);
4154 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4156 goto set_ICV_finish;
4159 #ifdef MG_SET_ICV_SLOW
4160 for (i = 0; i < 2; i++) {
4163 rtsx_init_cmd(chip);
4165 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4166 0xFF, PRO_WRITE_LONG_DATA);
4167 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4168 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4171 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4173 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4174 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4175 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4176 MS_TRANSFER_END, MS_TRANSFER_END);
4178 rtsx_send_cmd_no_wait(chip);
4180 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4181 512, 0, DMA_TO_DEVICE, 3000);
4182 if ((retval < 0) || check_ms_err(chip)) {
4183 rtsx_clear_ms_error(chip);
4184 if (ms_card->mg_auth == 0) {
4185 if ((buf[5] & 0xC0) != 0)
4188 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4190 set_sense_type(chip, lun,
4191 SENSE_TYPE_MG_WRITE_ERR);
4193 set_sense_type(chip, lun,
4194 SENSE_TYPE_MG_WRITE_ERR);
4196 retval = STATUS_FAIL;
4197 goto set_ICV_finish;
4201 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4202 2, WAIT_INT, 0, 0, buf + 4, 1024);
4203 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4204 rtsx_clear_ms_error(chip);
4205 if (ms_card->mg_auth == 0) {
4206 if ((buf[5] & 0xC0) != 0)
4209 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4211 set_sense_type(chip, lun,
4212 SENSE_TYPE_MG_WRITE_ERR);
4214 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4216 goto set_ICV_finish;
4225 #endif /* SUPPORT_MAGIC_GATE */
4227 void ms_cleanup_work(struct rtsx_chip *chip)
4229 struct ms_info *ms_card = &chip->ms_card;
4231 if (CHK_MSPRO(ms_card)) {
4232 if (ms_card->seq_mode) {
4233 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4234 mspro_stop_seq_mode(chip);
4235 ms_card->cleanup_counter = 0;
4237 if (CHK_MSHG(ms_card)) {
4238 rtsx_write_register(chip, MS_CFG,
4239 MS_2K_SECTOR_MODE, 0x00);
4242 #ifdef MS_DELAY_WRITE
4243 else if ((!CHK_MSPRO(ms_card)) &&
4244 ms_card->delay_write.delay_write_flag) {
4245 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4246 ms_delay_write(chip);
4247 ms_card->cleanup_counter = 0;
4252 int ms_power_off_card3v3(struct rtsx_chip *chip)
4256 retval = disable_card_clock(chip, MS_CARD);
4257 if (retval != STATUS_SUCCESS)
4260 if (chip->asic_code) {
4261 retval = ms_pull_ctl_disable(chip);
4262 if (retval != STATUS_SUCCESS)
4265 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4266 FPGA_MS_PULL_CTL_BIT | 0x20,
4267 FPGA_MS_PULL_CTL_BIT);
4271 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4275 if (!chip->ft2_fast_mode) {
4276 retval = card_power_off(chip, MS_CARD);
4277 if (retval != STATUS_SUCCESS)
4281 return STATUS_SUCCESS;
4284 int release_ms_card(struct rtsx_chip *chip)
4286 struct ms_info *ms_card = &chip->ms_card;
4289 #ifdef MS_DELAY_WRITE
4290 ms_card->delay_write.delay_write_flag = 0;
4292 ms_card->pro_under_formatting = 0;
4294 chip->card_ready &= ~MS_CARD;
4295 chip->card_fail &= ~MS_CARD;
4296 chip->card_wp &= ~MS_CARD;
4298 ms_free_l2p_tbl(chip);
4300 memset(ms_card->raw_sys_info, 0, 96);
4301 #ifdef SUPPORT_PCGL_1P18
4302 memset(ms_card->raw_model_name, 0, 48);
4305 retval = ms_power_off_card3v3(chip);
4306 if (retval != STATUS_SUCCESS)
4309 return STATUS_SUCCESS;