1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
31 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
33 struct ms_info *ms_card = &chip->ms_card;
35 ms_card->err_code = err_code;
38 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
40 struct ms_info *ms_card = &chip->ms_card;
42 return (ms_card->err_code == err_code);
45 static int ms_parse_err_code(struct rtsx_chip *chip)
51 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
54 struct ms_info *ms_card = &chip->ms_card;
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
80 return ms_parse_err_code(chip);
83 ptr = rtsx_get_cmd_data(chip) + 1;
85 if (!(tpc & 0x08)) { /* Read Packet */
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
89 return ms_parse_err_code(chip);
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
96 return ms_parse_err_code(chip);
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
105 return ms_parse_err_code(chip);
108 return STATUS_SUCCESS;
111 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
119 if (!buf || !buf_len) {
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
129 err_code = MS_FLASH_WRITE_ERROR;
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
157 rtsx_send_cmd_no_wait(chip);
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
166 retval = STATUS_FAIL;
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
182 return STATUS_SUCCESS;
185 static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
188 struct ms_info *ms_card = &chip->ms_card;
191 if (!data || (data_len < cnt)) {
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
223 rtsx_clear_ms_error(chip);
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
229 return ms_parse_err_code(chip);
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
236 return ms_parse_err_code(chip);
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
244 return ms_parse_err_code(chip);
247 ms_set_err_code(chip, MS_TO_ERROR);
249 return ms_parse_err_code(chip);
252 return STATUS_SUCCESS;
255 static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
258 struct ms_info *ms_card = &chip->ms_card;
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
300 return ms_parse_err_code(chip);
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
307 return ms_parse_err_code(chip);
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
315 return ms_parse_err_code(chip);
318 ms_set_err_code(chip, MS_TO_ERROR);
320 return ms_parse_err_code(chip);
323 ptr = rtsx_get_cmd_data(chip) + 1;
325 for (i = 0; i < data_len; i++)
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
334 return STATUS_SUCCESS;
337 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
338 u8 read_cnt, u8 write_start, u8 write_cnt)
343 data[0] = read_start;
345 data[2] = write_start;
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
360 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
370 static int ms_set_init_para(struct rtsx_chip *chip)
372 struct ms_info *ms_card = &chip->ms_card;
375 if (CHK_HG8BIT(ms_card)) {
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
406 return STATUS_SUCCESS;
409 static int ms_switch_clock(struct rtsx_chip *chip)
411 struct ms_info *ms_card = &chip->ms_card;
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
426 return STATUS_SUCCESS;
429 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
441 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
442 MS_D3_PD | MS_D0_PD | MS_BS_PD |
448 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
449 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
455 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
456 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
462 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
463 MS_INS_PU | SD_WP_PD | SD_CD_PU |
469 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
470 MS_D5_PD | MS_D4_PD);
475 } else if (CHECK_PID(chip, 0x5288)) {
476 if (CHECK_BARO_PKG(chip, QFN)) {
477 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
483 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
489 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
495 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
504 return STATUS_SUCCESS;
507 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
513 if (CHECK_PID(chip, 0x5208)) {
514 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
515 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
516 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
517 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
518 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
519 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
520 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
521 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
522 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
523 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
524 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
525 MS_D5_PD | MS_D4_PD);
526 } else if (CHECK_PID(chip, 0x5288)) {
527 if (CHECK_BARO_PKG(chip, QFN)) {
528 rtsx_add_cmd(chip, WRITE_REG_CMD,
529 CARD_PULL_CTL1, 0xFF, 0x55);
530 rtsx_add_cmd(chip, WRITE_REG_CMD,
531 CARD_PULL_CTL2, 0xFF, 0x45);
532 rtsx_add_cmd(chip, WRITE_REG_CMD,
533 CARD_PULL_CTL3, 0xFF, 0x4B);
534 rtsx_add_cmd(chip, WRITE_REG_CMD,
535 CARD_PULL_CTL4, 0xFF, 0x29);
539 retval = rtsx_send_cmd(chip, MS_CARD, 100);
545 return STATUS_SUCCESS;
548 static int ms_prepare_reset(struct rtsx_chip *chip)
550 struct ms_info *ms_card = &chip->ms_card;
554 ms_card->ms_type = 0;
555 ms_card->check_ms_flow = 0;
556 ms_card->switch_8bit_fail = 0;
557 ms_card->delay_write.delay_write_flag = 0;
559 ms_card->pro_under_formatting = 0;
561 retval = ms_power_off_card3v3(chip);
562 if (retval != STATUS_SUCCESS) {
567 if (!chip->ft2_fast_mode)
570 retval = enable_card_clock(chip, MS_CARD);
571 if (retval != STATUS_SUCCESS) {
576 if (chip->asic_code) {
577 retval = ms_pull_ctl_enable(chip);
578 if (retval != STATUS_SUCCESS) {
583 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
584 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
591 if (!chip->ft2_fast_mode) {
592 retval = card_power_on(chip, MS_CARD);
593 if (retval != STATUS_SUCCESS) {
601 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
602 oc_mask = MS_OC_NOW | MS_OC_EVER;
604 oc_mask = SD_OC_NOW | SD_OC_EVER;
606 if (chip->ocp_stat & oc_mask) {
607 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
615 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
622 if (chip->asic_code) {
623 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
633 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
634 SAMPLE_TIME_FALLING |
643 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
644 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
649 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
650 MS_STOP | MS_CLR_ERR);
656 retval = ms_set_init_para(chip);
657 if (retval != STATUS_SUCCESS) {
662 return STATUS_SUCCESS;
665 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
667 struct ms_info *ms_card = &chip->ms_card;
671 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
672 if (retval != STATUS_SUCCESS) {
677 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
678 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
680 if (retval == STATUS_SUCCESS)
683 if (i == MS_MAX_RETRY_COUNT) {
688 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
693 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
696 ms_card->check_ms_flow = 1;
702 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
707 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
709 ms_card->check_ms_flow = 1;
714 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
719 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
721 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
727 chip->card_wp |= MS_CARD;
729 chip->card_wp &= ~MS_CARD;
731 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
732 chip->card_wp |= MS_CARD;
734 ms_card->check_ms_flow = 1;
739 ms_card->ms_type |= TYPE_MSPRO;
741 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
746 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
748 ms_card->ms_type &= 0x0F;
749 } else if (val == 7) {
751 ms_card->ms_type |= MS_HG;
753 ms_card->ms_type &= 0x0F;
760 return STATUS_SUCCESS;
763 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
768 /* Confirm CPU StartUp */
771 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
772 ms_set_err_code(chip, MS_NO_CARD);
777 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
778 retval = ms_read_bytes(chip, GET_INT, 1,
779 NO_WAIT_INT, &val, 1);
780 if (retval == STATUS_SUCCESS)
783 if (i == MS_MAX_RETRY_COUNT) {
795 } while (!(val & INT_REG_CED));
797 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
798 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
799 if (retval == STATUS_SUCCESS)
802 if (i == MS_MAX_RETRY_COUNT) {
807 if (val & INT_REG_ERR) {
808 if (val & INT_REG_CMDNK) {
809 chip->card_wp |= (MS_CARD);
815 /* -- end confirm CPU startup */
817 return STATUS_SUCCESS;
820 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
825 data[0] = PARALLEL_4BIT_IF;
827 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
828 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
830 if (retval == STATUS_SUCCESS)
833 if (retval != STATUS_SUCCESS) {
838 return STATUS_SUCCESS;
841 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
843 struct ms_info *ms_card = &chip->ms_card;
847 data[0] = PARALLEL_8BIT_IF;
849 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
850 retval = ms_write_bytes(chip, WRITE_REG, 1,
851 NO_WAIT_INT, data, 2);
852 if (retval == STATUS_SUCCESS)
855 if (retval != STATUS_SUCCESS) {
860 retval = rtsx_write_register(chip, MS_CFG, 0x98,
861 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
866 ms_card->ms_type |= MS_8BIT;
867 retval = ms_set_init_para(chip);
868 if (retval != STATUS_SUCCESS) {
873 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
874 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
876 if (retval != STATUS_SUCCESS) {
882 return STATUS_SUCCESS;
885 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
887 struct ms_info *ms_card = &chip->ms_card;
890 for (i = 0; i < 3; i++) {
891 retval = ms_prepare_reset(chip);
892 if (retval != STATUS_SUCCESS) {
897 retval = ms_identify_media_type(chip, switch_8bit_bus);
898 if (retval != STATUS_SUCCESS) {
903 retval = ms_confirm_cpu_startup(chip);
904 if (retval != STATUS_SUCCESS) {
909 retval = ms_switch_parallel_bus(chip);
910 if (retval != STATUS_SUCCESS) {
911 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
912 ms_set_err_code(chip, MS_NO_CARD);
922 if (retval != STATUS_SUCCESS) {
927 /* Switch MS-PRO into Parallel mode */
928 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
933 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
940 retval = ms_set_init_para(chip);
941 if (retval != STATUS_SUCCESS) {
946 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
947 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
948 retval = ms_switch_8bit_bus(chip);
949 if (retval != STATUS_SUCCESS) {
950 ms_card->switch_8bit_fail = 1;
956 return STATUS_SUCCESS;
960 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
965 ms_cleanup_work(chip);
967 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
968 if (retval != STATUS_SUCCESS) {
980 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
981 if (retval != STATUS_SUCCESS) {
986 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
987 if (retval != STATUS_SUCCESS) {
992 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
997 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
1002 return STATUS_SUCCESS;
1006 static int ms_read_attribute_info(struct rtsx_chip *chip)
1008 struct ms_info *ms_card = &chip->ms_card;
1010 u8 val, *buf, class_code, device_type, sub_class, data[16];
1011 u16 total_blk = 0, blk_size = 0;
1013 u32 xc_total_blk = 0, xc_blk_size = 0;
1015 u32 sys_info_addr = 0, sys_info_size;
1016 #ifdef SUPPORT_PCGL_1P18
1017 u32 model_name_addr = 0, model_name_size;
1018 int found_sys_info = 0, found_model_name = 0;
1021 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1022 if (retval != STATUS_SUCCESS) {
1027 if (CHK_MS8BIT(ms_card))
1028 data[0] = PARALLEL_8BIT_IF;
1030 data[0] = PARALLEL_4BIT_IF;
1041 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1042 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1044 if (retval == STATUS_SUCCESS)
1047 if (retval != STATUS_SUCCESS) {
1052 buf = kmalloc(64 * 512, GFP_KERNEL);
1055 return STATUS_ERROR;
1058 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1059 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1060 if (retval != STATUS_SUCCESS)
1063 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1064 if (retval != STATUS_SUCCESS) {
1069 if (!(val & MS_INT_BREQ)) {
1074 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1075 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1076 0, 0, buf, 64 * 512);
1077 if (retval == STATUS_SUCCESS)
1080 rtsx_clear_ms_error(chip);
1082 if (retval != STATUS_SUCCESS) {
1090 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1091 if (retval != STATUS_SUCCESS) {
1097 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1100 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1101 PRO_READ_LONG_DATA, 0, WAIT_INT);
1102 if (retval != STATUS_SUCCESS) {
1111 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1112 /* Signature code is wrong */
1118 if ((buf[4] < 1) || (buf[4] > 12)) {
1124 for (i = 0; i < buf[4]; i++) {
1125 int cur_addr_off = 16 + i * 12;
1128 if ((buf[cur_addr_off + 8] == 0x10) ||
1129 (buf[cur_addr_off + 8] == 0x13)) {
1131 if (buf[cur_addr_off + 8] == 0x10) {
1133 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1134 ((u32)buf[cur_addr_off + 1] << 16) |
1135 ((u32)buf[cur_addr_off + 2] << 8) |
1136 buf[cur_addr_off + 3];
1137 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1138 ((u32)buf[cur_addr_off + 5] << 16) |
1139 ((u32)buf[cur_addr_off + 6] << 8) |
1140 buf[cur_addr_off + 7];
1141 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1142 sys_info_addr, sys_info_size);
1143 if (sys_info_size != 96) {
1148 if (sys_info_addr < 0x1A0) {
1153 if ((sys_info_size + sys_info_addr) > 0x8000) {
1160 if (buf[cur_addr_off + 8] == 0x13)
1161 ms_card->ms_type |= MS_XC;
1163 #ifdef SUPPORT_PCGL_1P18
1169 #ifdef SUPPORT_PCGL_1P18
1170 if (buf[cur_addr_off + 8] == 0x15) {
1171 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1172 ((u32)buf[cur_addr_off + 1] << 16) |
1173 ((u32)buf[cur_addr_off + 2] << 8) |
1174 buf[cur_addr_off + 3];
1175 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1176 ((u32)buf[cur_addr_off + 5] << 16) |
1177 ((u32)buf[cur_addr_off + 6] << 8) |
1178 buf[cur_addr_off + 7];
1179 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1180 model_name_addr, model_name_size);
1181 if (model_name_size != 48) {
1186 if (model_name_addr < 0x1A0) {
1191 if ((model_name_size + model_name_addr) > 0x8000) {
1197 found_model_name = 1;
1200 if (found_sys_info && found_model_name)
1211 class_code = buf[sys_info_addr + 0];
1212 device_type = buf[sys_info_addr + 56];
1213 sub_class = buf[sys_info_addr + 46];
1215 if (CHK_MSXC(ms_card)) {
1216 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1217 ((u32)buf[sys_info_addr + 7] << 16) |
1218 ((u32)buf[sys_info_addr + 8] << 8) |
1219 buf[sys_info_addr + 9];
1220 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1221 ((u32)buf[sys_info_addr + 33] << 16) |
1222 ((u32)buf[sys_info_addr + 34] << 8) |
1223 buf[sys_info_addr + 35];
1224 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1225 xc_total_blk, xc_blk_size);
1227 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1228 buf[sys_info_addr + 7];
1229 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1230 buf[sys_info_addr + 3];
1231 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1232 total_blk, blk_size);
1235 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1236 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1237 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1238 total_blk, blk_size);
1241 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1242 class_code, device_type, sub_class);
1244 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1245 #ifdef SUPPORT_PCGL_1P18
1246 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1252 if (CHK_MSXC(ms_card)) {
1253 if (class_code != 0x03) {
1258 if (class_code != 0x02) {
1264 if (class_code != 0x02) {
1270 if (device_type != 0x00) {
1271 if ((device_type == 0x01) || (device_type == 0x02) ||
1272 (device_type == 0x03)) {
1273 chip->card_wp |= MS_CARD;
1280 if (sub_class & 0xC0) {
1285 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1286 class_code, device_type, sub_class);
1289 if (CHK_MSXC(ms_card)) {
1290 chip->capacity[chip->card2lun[MS_CARD]] =
1291 ms_card->capacity = xc_total_blk * xc_blk_size;
1293 chip->capacity[chip->card2lun[MS_CARD]] =
1294 ms_card->capacity = total_blk * blk_size;
1297 ms_card->capacity = total_blk * blk_size;
1298 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1301 return STATUS_SUCCESS;
1304 #ifdef SUPPORT_MAGIC_GATE
1305 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1306 int type, u8 mg_entry_num);
1309 static int reset_ms_pro(struct rtsx_chip *chip)
1311 struct ms_info *ms_card = &chip->ms_card;
1313 #ifdef XC_POWERCLASS
1314 u8 change_power_class;
1316 if (chip->ms_power_class_en & 0x02)
1317 change_power_class = 2;
1318 else if (chip->ms_power_class_en & 0x01)
1319 change_power_class = 1;
1321 change_power_class = 0;
1324 #ifdef XC_POWERCLASS
1327 retval = ms_pro_reset_flow(chip, 1);
1328 if (retval != STATUS_SUCCESS) {
1329 if (ms_card->switch_8bit_fail) {
1330 retval = ms_pro_reset_flow(chip, 0);
1331 if (retval != STATUS_SUCCESS) {
1341 retval = ms_read_attribute_info(chip);
1342 if (retval != STATUS_SUCCESS) {
1347 #ifdef XC_POWERCLASS
1348 if (CHK_HG8BIT(ms_card))
1349 change_power_class = 0;
1351 if (change_power_class && CHK_MSXC(ms_card)) {
1352 u8 power_class_en = chip->ms_power_class_en;
1354 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1356 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1357 change_power_class);
1359 if (change_power_class)
1360 power_class_en &= (1 << (change_power_class - 1));
1364 if (power_class_en) {
1365 u8 power_class_mode =
1366 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1367 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1369 if (change_power_class > power_class_mode)
1370 change_power_class = power_class_mode;
1371 if (change_power_class) {
1372 retval = msxc_change_power(chip,
1373 change_power_class);
1374 if (retval != STATUS_SUCCESS) {
1375 change_power_class--;
1383 #ifdef SUPPORT_MAGIC_GATE
1384 retval = mg_set_tpc_para_sub(chip, 0, 0);
1385 if (retval != STATUS_SUCCESS) {
1391 if (CHK_HG8BIT(ms_card))
1392 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1394 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1396 return STATUS_SUCCESS;
1399 static int ms_read_status_reg(struct rtsx_chip *chip)
1404 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1405 if (retval != STATUS_SUCCESS) {
1410 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1411 if (retval != STATUS_SUCCESS) {
1416 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1417 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1422 return STATUS_SUCCESS;
1425 static int ms_read_extra_data(struct rtsx_chip *chip,
1426 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1428 struct ms_info *ms_card = &chip->ms_card;
1432 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1434 if (retval != STATUS_SUCCESS) {
1439 if (CHK_MS4BIT(ms_card)) {
1440 /* Parallel interface */
1443 /* Serial interface */
1447 data[2] = (u8)(block_addr >> 8);
1448 data[3] = (u8)block_addr;
1452 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1453 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1455 if (retval == STATUS_SUCCESS)
1458 if (i == MS_MAX_RETRY_COUNT) {
1463 ms_set_err_code(chip, MS_NO_ERROR);
1465 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1466 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1467 if (retval == STATUS_SUCCESS)
1470 if (i == MS_MAX_RETRY_COUNT) {
1475 ms_set_err_code(chip, MS_NO_ERROR);
1476 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1477 if (retval != STATUS_SUCCESS) {
1482 if (val & INT_REG_CMDNK) {
1483 ms_set_err_code(chip, MS_CMD_NK);
1487 if (val & INT_REG_CED) {
1488 if (val & INT_REG_ERR) {
1489 retval = ms_read_status_reg(chip);
1490 if (retval != STATUS_SUCCESS) {
1495 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1496 MS_EXTRA_SIZE, SystemParm,
1498 if (retval != STATUS_SUCCESS) {
1505 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1506 data, MS_EXTRA_SIZE);
1507 if (retval != STATUS_SUCCESS) {
1512 if (buf && buf_len) {
1513 if (buf_len > MS_EXTRA_SIZE)
1514 buf_len = MS_EXTRA_SIZE;
1515 memcpy(buf, data, buf_len);
1518 return STATUS_SUCCESS;
1521 static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1522 u8 page_num, u8 *buf, int buf_len)
1524 struct ms_info *ms_card = &chip->ms_card;
1528 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1533 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1534 SystemParm, 6 + MS_EXTRA_SIZE);
1535 if (retval != STATUS_SUCCESS) {
1540 if (CHK_MS4BIT(ms_card))
1546 data[2] = (u8)(block_addr >> 8);
1547 data[3] = (u8)block_addr;
1551 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1552 data[i] = buf[i - 6];
1554 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1555 NO_WAIT_INT, data, 16);
1556 if (retval != STATUS_SUCCESS) {
1561 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1562 if (retval != STATUS_SUCCESS) {
1567 ms_set_err_code(chip, MS_NO_ERROR);
1568 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1569 if (retval != STATUS_SUCCESS) {
1574 if (val & INT_REG_CMDNK) {
1575 ms_set_err_code(chip, MS_CMD_NK);
1579 if (val & INT_REG_CED) {
1580 if (val & INT_REG_ERR) {
1581 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1587 return STATUS_SUCCESS;
1590 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1592 struct ms_info *ms_card = &chip->ms_card;
1596 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1598 if (retval != STATUS_SUCCESS) {
1603 if (CHK_MS4BIT(ms_card))
1609 data[2] = (u8)(block_addr >> 8);
1610 data[3] = (u8)block_addr;
1614 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1615 if (retval != STATUS_SUCCESS) {
1620 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1621 if (retval != STATUS_SUCCESS) {
1626 ms_set_err_code(chip, MS_NO_ERROR);
1627 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1628 if (retval != STATUS_SUCCESS) {
1633 if (val & INT_REG_CMDNK) {
1634 ms_set_err_code(chip, MS_CMD_NK);
1639 if (val & INT_REG_CED) {
1640 if (val & INT_REG_ERR) {
1641 if (!(val & INT_REG_BREQ)) {
1642 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1646 retval = ms_read_status_reg(chip);
1647 if (retval != STATUS_SUCCESS)
1648 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1651 if (!(val & INT_REG_BREQ)) {
1652 ms_set_err_code(chip, MS_BREQ_ERROR);
1659 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1661 if (retval != STATUS_SUCCESS) {
1666 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1671 return STATUS_SUCCESS;
1674 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1676 struct ms_info *ms_card = &chip->ms_card;
1678 u8 val, data[8], extra[MS_EXTRA_SIZE];
1680 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1681 if (retval != STATUS_SUCCESS) {
1686 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1688 if (retval != STATUS_SUCCESS) {
1693 ms_set_err_code(chip, MS_NO_ERROR);
1695 if (CHK_MS4BIT(ms_card))
1701 data[2] = (u8)(phy_blk >> 8);
1702 data[3] = (u8)phy_blk;
1705 data[6] = extra[0] & 0x7F;
1708 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1709 if (retval != STATUS_SUCCESS) {
1714 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1715 if (retval != STATUS_SUCCESS) {
1720 ms_set_err_code(chip, MS_NO_ERROR);
1721 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1722 if (retval != STATUS_SUCCESS) {
1727 if (val & INT_REG_CMDNK) {
1728 ms_set_err_code(chip, MS_CMD_NK);
1733 if (val & INT_REG_CED) {
1734 if (val & INT_REG_ERR) {
1735 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1741 return STATUS_SUCCESS;
1744 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1746 struct ms_info *ms_card = &chip->ms_card;
1750 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1752 if (retval != STATUS_SUCCESS) {
1757 ms_set_err_code(chip, MS_NO_ERROR);
1759 if (CHK_MS4BIT(ms_card))
1765 data[2] = (u8)(phy_blk >> 8);
1766 data[3] = (u8)phy_blk;
1770 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1771 if (retval != STATUS_SUCCESS) {
1777 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1778 if (retval != STATUS_SUCCESS) {
1783 ms_set_err_code(chip, MS_NO_ERROR);
1784 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1785 if (retval != STATUS_SUCCESS) {
1790 if (val & INT_REG_CMDNK) {
1796 ms_set_err_code(chip, MS_CMD_NK);
1797 ms_set_bad_block(chip, phy_blk);
1802 if (val & INT_REG_CED) {
1803 if (val & INT_REG_ERR) {
1804 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1810 return STATUS_SUCCESS;
1813 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1815 if (!extra || (extra_len < MS_EXTRA_SIZE))
1818 memset(extra, 0xFF, MS_EXTRA_SIZE);
1820 if (type == setPS_NG) {
1821 /* set page status as 1:NG,and block status keep 1:OK */
1824 /* set page status as 0:Data Error,and block status keep 1:OK */
1828 extra[2] = (u8)(log_blk >> 8);
1829 extra[3] = (u8)log_blk;
1832 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1833 u8 start_page, u8 end_page)
1836 u8 extra[MS_EXTRA_SIZE], i;
1838 memset(extra, 0xff, MS_EXTRA_SIZE);
1840 extra[0] = 0xf8; /* Block, page OK, data erased */
1842 extra[2] = (u8)(log_blk >> 8);
1843 extra[3] = (u8)log_blk;
1845 for (i = start_page; i < end_page; i++) {
1846 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1847 ms_set_err_code(chip, MS_NO_CARD);
1852 retval = ms_write_extra_data(chip, phy_blk, i,
1853 extra, MS_EXTRA_SIZE);
1854 if (retval != STATUS_SUCCESS) {
1860 return STATUS_SUCCESS;
1863 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1864 u16 log_blk, u8 start_page, u8 end_page)
1866 struct ms_info *ms_card = &chip->ms_card;
1867 bool uncorrect_flag = false;
1868 int retval, rty_cnt;
1869 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1871 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1872 old_blk, new_blk, log_blk);
1873 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1874 start_page, end_page);
1876 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1877 if (retval != STATUS_SUCCESS) {
1882 retval = ms_read_status_reg(chip);
1883 if (retval != STATUS_SUCCESS) {
1888 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1894 if (val & BUF_FULL) {
1895 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1896 if (retval != STATUS_SUCCESS) {
1901 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1902 if (retval != STATUS_SUCCESS) {
1907 if (!(val & INT_REG_CED)) {
1908 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1914 for (i = start_page; i < end_page; i++) {
1915 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1916 ms_set_err_code(chip, MS_NO_CARD);
1921 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1923 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1924 MS_EXTRA_SIZE, SystemParm, 6);
1925 if (retval != STATUS_SUCCESS) {
1930 ms_set_err_code(chip, MS_NO_ERROR);
1932 if (CHK_MS4BIT(ms_card))
1938 data[2] = (u8)(old_blk >> 8);
1939 data[3] = (u8)old_blk;
1943 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1945 if (retval != STATUS_SUCCESS) {
1950 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1951 if (retval != STATUS_SUCCESS) {
1956 ms_set_err_code(chip, MS_NO_ERROR);
1957 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1958 if (retval != STATUS_SUCCESS) {
1963 if (val & INT_REG_CMDNK) {
1964 ms_set_err_code(chip, MS_CMD_NK);
1969 if (val & INT_REG_CED) {
1970 if (val & INT_REG_ERR) {
1971 retval = ms_read_status_reg(chip);
1972 if (retval != STATUS_SUCCESS) {
1973 uncorrect_flag = true;
1974 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1976 uncorrect_flag = false;
1979 retval = ms_transfer_tpc(chip,
1983 if (retval != STATUS_SUCCESS) {
1988 if (uncorrect_flag) {
1989 ms_set_page_status(log_blk, setPS_NG,
1995 ms_write_extra_data(chip, old_blk, i,
1998 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
2000 MS_SET_BAD_BLOCK_FLG(ms_card);
2002 ms_set_page_status(log_blk, setPS_Error,
2005 ms_write_extra_data(chip, new_blk, i,
2011 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2013 retval = ms_transfer_tpc(
2018 if (retval == STATUS_SUCCESS)
2021 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2027 if (!(val & INT_REG_BREQ)) {
2028 ms_set_err_code(chip, MS_BREQ_ERROR);
2034 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
2035 SystemParm, (6 + MS_EXTRA_SIZE));
2037 ms_set_err_code(chip, MS_NO_ERROR);
2039 if (CHK_MS4BIT(ms_card))
2045 data[2] = (u8)(new_blk >> 8);
2046 data[3] = (u8)new_blk;
2050 if ((extra[0] & 0x60) != 0x60)
2056 data[6 + 2] = (u8)(log_blk >> 8);
2057 data[6 + 3] = (u8)log_blk;
2059 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2062 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2063 NO_WAIT_INT, data, 16);
2064 if (retval != STATUS_SUCCESS) {
2069 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2070 if (retval != STATUS_SUCCESS) {
2075 ms_set_err_code(chip, MS_NO_ERROR);
2076 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2077 if (retval != STATUS_SUCCESS) {
2082 if (val & INT_REG_CMDNK) {
2083 ms_set_err_code(chip, MS_CMD_NK);
2088 if (val & INT_REG_CED) {
2089 if (val & INT_REG_ERR) {
2090 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2097 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2098 MS_EXTRA_SIZE, SystemParm,
2100 if (retval != STATUS_SUCCESS) {
2105 ms_set_err_code(chip, MS_NO_ERROR);
2107 if (CHK_MS4BIT(ms_card))
2113 data[2] = (u8)(old_blk >> 8);
2114 data[3] = (u8)old_blk;
2120 retval = ms_write_bytes(chip, WRITE_REG, 7,
2121 NO_WAIT_INT, data, 8);
2122 if (retval != STATUS_SUCCESS) {
2127 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2128 if (retval != STATUS_SUCCESS) {
2133 ms_set_err_code(chip, MS_NO_ERROR);
2134 retval = ms_read_bytes(chip, GET_INT, 1,
2135 NO_WAIT_INT, &val, 1);
2136 if (retval != STATUS_SUCCESS) {
2141 if (val & INT_REG_CMDNK) {
2142 ms_set_err_code(chip, MS_CMD_NK);
2147 if (val & INT_REG_CED) {
2148 if (val & INT_REG_ERR) {
2149 ms_set_err_code(chip,
2150 MS_FLASH_WRITE_ERROR);
2158 return STATUS_SUCCESS;
2161 static int reset_ms(struct rtsx_chip *chip)
2163 struct ms_info *ms_card = &chip->ms_card;
2165 u16 i, reg_addr, block_size;
2166 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2167 #ifndef SUPPORT_MAGIC_GATE
2171 retval = ms_prepare_reset(chip);
2172 if (retval != STATUS_SUCCESS) {
2177 ms_card->ms_type |= TYPE_MS;
2179 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2180 if (retval != STATUS_SUCCESS) {
2185 retval = ms_read_status_reg(chip);
2186 if (retval != STATUS_SUCCESS) {
2191 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2196 if (val & WRT_PRTCT)
2197 chip->card_wp |= MS_CARD;
2199 chip->card_wp &= ~MS_CARD;
2204 /* Search Boot Block */
2205 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2206 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2207 ms_set_err_code(chip, MS_NO_CARD);
2212 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2213 if (retval != STATUS_SUCCESS) {
2218 if (extra[0] & BLOCK_OK) {
2219 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2220 ms_card->boot_block = i;
2227 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2228 dev_dbg(rtsx_dev(chip), "No boot block found!");
2233 for (j = 0; j < 3; j++) {
2234 retval = ms_read_page(chip, ms_card->boot_block, j);
2235 if (retval != STATUS_SUCCESS) {
2236 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2237 i = ms_card->boot_block + 1;
2238 ms_set_err_code(chip, MS_NO_ERROR);
2244 retval = ms_read_page(chip, ms_card->boot_block, 0);
2245 if (retval != STATUS_SUCCESS) {
2250 /* Read MS system information as sys_info */
2251 rtsx_init_cmd(chip);
2253 for (i = 0; i < 96; i++)
2254 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2256 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2262 ptr = rtsx_get_cmd_data(chip);
2263 memcpy(ms_card->raw_sys_info, ptr, 96);
2265 /* Read useful block contents */
2266 rtsx_init_cmd(chip);
2268 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2269 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2271 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2273 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2275 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2276 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2278 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2279 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2281 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2287 ptr = rtsx_get_cmd_data(chip);
2289 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2290 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2293 * HEADER_ID0, HEADER_ID1
2295 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2296 i = ms_card->boot_block + 1;
2301 * PAGE_SIZE_0, PAGE_SIZE_1
2303 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2304 i = ms_card->boot_block + 1;
2308 if ((ptr[14] == 1) || (ptr[14] == 3))
2309 chip->card_wp |= MS_CARD;
2311 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2312 block_size = ((u16)ptr[6] << 8) | ptr[7];
2313 if (block_size == 0x0010) {
2314 /* Block size 16KB */
2315 ms_card->block_shift = 5;
2316 ms_card->page_off = 0x1F;
2317 } else if (block_size == 0x0008) {
2318 /* Block size 8KB */
2319 ms_card->block_shift = 4;
2320 ms_card->page_off = 0x0F;
2323 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2324 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2326 #ifdef SUPPORT_MAGIC_GATE
2329 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
2330 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
2331 ms_card->capacity = 0x1EE0;
2332 } else { /* Effective block for 8MB: 0x3E0 */
2333 ms_card->capacity = 0x3DE0;
2335 } else { /* 16MB, 32MB, 64MB or 128MB */
2336 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
2337 ms_card->capacity = 0x7BC0;
2338 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2339 ms_card->capacity = 0xF7C0;
2340 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2341 ms_card->capacity = 0x1EF80;
2342 } else { /* Effective block for 128MB: 0x1F00 */
2343 ms_card->capacity = 0x3DF00;
2347 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2348 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2350 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2353 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2355 /* Switch I/F Mode */
2357 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2358 if (retval != STATUS_SUCCESS) {
2363 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2368 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2374 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2376 if (retval != STATUS_SUCCESS) {
2381 retval = rtsx_write_register(chip, MS_CFG,
2382 0x58 | MS_NO_CHECK_INT,
2391 ms_card->ms_type |= MS_4BIT;
2394 if (CHK_MS4BIT(ms_card))
2395 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2397 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2399 return STATUS_SUCCESS;
2402 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2404 struct ms_info *ms_card = &chip->ms_card;
2405 int size, i, seg_no, retval;
2406 u16 defect_block, reg_addr;
2409 ms_card->segment_cnt = ms_card->total_block >> 9;
2410 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2411 ms_card->segment_cnt);
2413 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2414 ms_card->segment = vzalloc(size);
2415 if (!ms_card->segment) {
2420 retval = ms_read_page(chip, ms_card->boot_block, 1);
2421 if (retval != STATUS_SUCCESS) {
2426 reg_addr = PPBUF_BASE2;
2427 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2430 retval = rtsx_read_register(chip, reg_addr++, &val1);
2431 if (retval != STATUS_SUCCESS) {
2436 retval = rtsx_read_register(chip, reg_addr++, &val2);
2437 if (retval != STATUS_SUCCESS) {
2442 defect_block = ((u16)val1 << 8) | val2;
2443 if (defect_block == 0xFFFF)
2446 seg_no = defect_block / 512;
2448 block_no = ms_card->segment[seg_no].disable_count++;
2449 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2452 for (i = 0; i < ms_card->segment_cnt; i++) {
2453 ms_card->segment[i].build_flag = 0;
2454 ms_card->segment[i].l2p_table = NULL;
2455 ms_card->segment[i].free_table = NULL;
2456 ms_card->segment[i].get_index = 0;
2457 ms_card->segment[i].set_index = 0;
2458 ms_card->segment[i].unused_blk_cnt = 0;
2460 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2461 i, ms_card->segment[i].disable_count);
2464 return STATUS_SUCCESS;
2467 vfree(ms_card->segment);
2468 ms_card->segment = NULL;
2473 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2475 struct ms_info *ms_card = &chip->ms_card;
2476 struct zone_entry *segment;
2478 if (!ms_card->segment)
2481 segment = &ms_card->segment[seg_no];
2483 if (segment->l2p_table)
2484 return segment->l2p_table[log_off];
2489 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2490 int seg_no, u16 log_off, u16 phy_blk)
2492 struct ms_info *ms_card = &chip->ms_card;
2493 struct zone_entry *segment;
2495 if (!ms_card->segment)
2498 segment = &ms_card->segment[seg_no];
2499 if (segment->l2p_table)
2500 segment->l2p_table[log_off] = phy_blk;
2503 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2505 struct ms_info *ms_card = &chip->ms_card;
2506 struct zone_entry *segment;
2509 seg_no = (int)phy_blk >> 9;
2510 segment = &ms_card->segment[seg_no];
2512 segment->free_table[segment->set_index++] = phy_blk;
2513 if (segment->set_index >= MS_FREE_TABLE_CNT)
2514 segment->set_index = 0;
2516 segment->unused_blk_cnt++;
2519 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2521 struct ms_info *ms_card = &chip->ms_card;
2522 struct zone_entry *segment;
2525 segment = &ms_card->segment[seg_no];
2527 if (segment->unused_blk_cnt <= 0)
2530 phy_blk = segment->free_table[segment->get_index];
2531 segment->free_table[segment->get_index++] = 0xFFFF;
2532 if (segment->get_index >= MS_FREE_TABLE_CNT)
2533 segment->get_index = 0;
2535 segment->unused_blk_cnt--;
2540 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2541 2974, 3470, 3966, 4462, 4958,
2542 5454, 5950, 6446, 6942, 7438,
2545 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2546 u16 log_off, u8 us1, u8 us2)
2548 struct ms_info *ms_card = &chip->ms_card;
2549 struct zone_entry *segment;
2553 seg_no = (int)phy_blk >> 9;
2554 segment = &ms_card->segment[seg_no];
2555 tmp_blk = segment->l2p_table[log_off];
2559 if (!(chip->card_wp & MS_CARD))
2560 ms_erase_block(chip, tmp_blk);
2562 ms_set_unused_block(chip, tmp_blk);
2563 segment->l2p_table[log_off] = phy_blk;
2565 if (!(chip->card_wp & MS_CARD))
2566 ms_erase_block(chip, phy_blk);
2568 ms_set_unused_block(chip, phy_blk);
2571 if (phy_blk < tmp_blk) {
2572 if (!(chip->card_wp & MS_CARD))
2573 ms_erase_block(chip, phy_blk);
2575 ms_set_unused_block(chip, phy_blk);
2577 if (!(chip->card_wp & MS_CARD))
2578 ms_erase_block(chip, tmp_blk);
2580 ms_set_unused_block(chip, tmp_blk);
2581 segment->l2p_table[log_off] = phy_blk;
2585 return STATUS_SUCCESS;
2588 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2590 struct ms_info *ms_card = &chip->ms_card;
2591 struct zone_entry *segment;
2593 int retval, table_size, disable_cnt, i;
2594 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2595 u8 extra[MS_EXTRA_SIZE], us1, us2;
2597 dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
2599 if (!ms_card->segment) {
2600 retval = ms_init_l2p_tbl(chip);
2601 if (retval != STATUS_SUCCESS) {
2607 if (ms_card->segment[seg_no].build_flag) {
2608 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2610 return STATUS_SUCCESS;
2618 segment = &ms_card->segment[seg_no];
2620 if (!segment->l2p_table) {
2621 segment->l2p_table = vmalloc(array_size(table_size, 2));
2622 if (!segment->l2p_table) {
2627 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2629 if (!segment->free_table) {
2630 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2631 if (!segment->free_table) {
2636 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2638 start = (u16)seg_no << 9;
2639 end = (u16)(seg_no + 1) << 9;
2641 disable_cnt = segment->disable_count;
2643 segment->get_index = 0;
2644 segment->set_index = 0;
2645 segment->unused_blk_cnt = 0;
2647 for (phy_blk = start; phy_blk < end; phy_blk++) {
2649 defect_flag = false;
2650 for (i = 0; i < segment->disable_count; i++) {
2651 if (phy_blk == segment->defect_list[i]) {
2662 retval = ms_read_extra_data(chip, phy_blk, 0,
2663 extra, MS_EXTRA_SIZE);
2664 if (retval != STATUS_SUCCESS) {
2665 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2666 ms_set_bad_block(chip, phy_blk);
2670 if (seg_no == ms_card->segment_cnt - 1) {
2671 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2672 if (!(chip->card_wp & MS_CARD)) {
2673 retval = ms_erase_block(chip, phy_blk);
2674 if (retval != STATUS_SUCCESS)
2682 if (!(extra[0] & BLOCK_OK))
2684 if (!(extra[1] & NOT_BOOT_BLOCK))
2686 if ((extra[0] & PAGE_OK) != PAGE_OK)
2689 log_blk = ((u16)extra[2] << 8) | extra[3];
2691 if (log_blk == 0xFFFF) {
2692 if (!(chip->card_wp & MS_CARD)) {
2693 retval = ms_erase_block(chip, phy_blk);
2694 if (retval != STATUS_SUCCESS)
2697 ms_set_unused_block(chip, phy_blk);
2701 if ((log_blk < ms_start_idx[seg_no]) ||
2702 (log_blk >= ms_start_idx[seg_no + 1])) {
2703 if (!(chip->card_wp & MS_CARD)) {
2704 retval = ms_erase_block(chip, phy_blk);
2705 if (retval != STATUS_SUCCESS)
2708 ms_set_unused_block(chip, phy_blk);
2712 idx = log_blk - ms_start_idx[seg_no];
2714 if (segment->l2p_table[idx] == 0xFFFF) {
2715 segment->l2p_table[idx] = phy_blk;
2719 us1 = extra[0] & 0x10;
2720 tmp_blk = segment->l2p_table[idx];
2721 retval = ms_read_extra_data(chip, tmp_blk, 0,
2722 extra, MS_EXTRA_SIZE);
2723 if (retval != STATUS_SUCCESS)
2725 us2 = extra[0] & 0x10;
2727 (void)ms_arbitrate_l2p(chip, phy_blk,
2728 log_blk - ms_start_idx[seg_no], us1, us2);
2732 segment->build_flag = 1;
2734 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2735 segment->unused_blk_cnt);
2737 /* Logical Address Confirmation Process */
2738 if (seg_no == ms_card->segment_cnt - 1) {
2739 if (segment->unused_blk_cnt < 2)
2740 chip->card_wp |= MS_CARD;
2742 if (segment->unused_blk_cnt < 1)
2743 chip->card_wp |= MS_CARD;
2746 if (chip->card_wp & MS_CARD)
2747 return STATUS_SUCCESS;
2749 for (log_blk = ms_start_idx[seg_no];
2750 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2751 idx = log_blk - ms_start_idx[seg_no];
2752 if (segment->l2p_table[idx] == 0xFFFF) {
2753 phy_blk = ms_get_unused_block(chip, seg_no);
2754 if (phy_blk == 0xFFFF) {
2755 chip->card_wp |= MS_CARD;
2756 return STATUS_SUCCESS;
2758 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2759 if (retval != STATUS_SUCCESS) {
2764 segment->l2p_table[idx] = phy_blk;
2765 if (seg_no == ms_card->segment_cnt - 1) {
2766 if (segment->unused_blk_cnt < 2) {
2767 chip->card_wp |= MS_CARD;
2768 return STATUS_SUCCESS;
2771 if (segment->unused_blk_cnt < 1) {
2772 chip->card_wp |= MS_CARD;
2773 return STATUS_SUCCESS;
2779 /* Make boot block be the first normal block */
2781 for (log_blk = 0; log_blk < 494; log_blk++) {
2782 tmp_blk = segment->l2p_table[log_blk];
2783 if (tmp_blk < ms_card->boot_block) {
2784 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2786 if (chip->card_wp & MS_CARD)
2789 phy_blk = ms_get_unused_block(chip, 0);
2790 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2792 ms_card->page_off + 1);
2793 if (retval != STATUS_SUCCESS) {
2798 segment->l2p_table[log_blk] = phy_blk;
2800 retval = ms_set_bad_block(chip, tmp_blk);
2801 if (retval != STATUS_SUCCESS) {
2809 return STATUS_SUCCESS;
2812 segment->build_flag = 0;
2813 vfree(segment->l2p_table);
2814 segment->l2p_table = NULL;
2815 vfree(segment->free_table);
2816 segment->free_table = NULL;
2821 int reset_ms_card(struct rtsx_chip *chip)
2823 struct ms_info *ms_card = &chip->ms_card;
2824 int seg_no = ms_card->total_block / 512 - 1;
2827 memset(ms_card, 0, sizeof(struct ms_info));
2829 retval = enable_card_clock(chip, MS_CARD);
2830 if (retval != STATUS_SUCCESS) {
2835 retval = select_card(chip, MS_CARD);
2836 if (retval != STATUS_SUCCESS) {
2841 ms_card->ms_type = 0;
2843 retval = reset_ms_pro(chip);
2844 if (retval != STATUS_SUCCESS) {
2845 if (ms_card->check_ms_flow) {
2846 retval = reset_ms(chip);
2847 if (retval != STATUS_SUCCESS) {
2857 retval = ms_set_init_para(chip);
2858 if (retval != STATUS_SUCCESS) {
2863 if (!CHK_MSPRO(ms_card)) {
2864 /* Build table for the last segment,
2865 * to check if L2P table block exists, erasing it
2867 retval = ms_build_l2p_tbl(chip, seg_no);
2868 if (retval != STATUS_SUCCESS) {
2874 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2876 return STATUS_SUCCESS;
2879 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2880 u32 start_sec, u16 sec_cnt, u8 cmd)
2886 data[1] = (u8)(sec_cnt >> 8);
2887 data[2] = (u8)sec_cnt;
2888 data[3] = (u8)(start_sec >> 24);
2889 data[4] = (u8)(start_sec >> 16);
2890 data[5] = (u8)(start_sec >> 8);
2891 data[6] = (u8)start_sec;
2894 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2895 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2897 if (retval == STATUS_SUCCESS)
2900 if (i == MS_MAX_RETRY_COUNT) {
2905 return STATUS_SUCCESS;
2908 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2910 struct ms_info *ms_card = &chip->ms_card;
2913 if (ms_card->seq_mode) {
2914 retval = ms_switch_clock(chip);
2915 if (retval != STATUS_SUCCESS)
2918 ms_card->seq_mode = 0;
2919 ms_card->total_sec_cnt = 0;
2920 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2922 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2926 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2928 struct ms_info *ms_card = &chip->ms_card;
2931 if (chip->asic_code) {
2932 if (ms_card->ms_clock > 30)
2933 ms_card->ms_clock -= 20;
2935 if (ms_card->ms_clock == CLK_80)
2936 ms_card->ms_clock = CLK_60;
2937 else if (ms_card->ms_clock == CLK_60)
2938 ms_card->ms_clock = CLK_40;
2941 retval = ms_switch_clock(chip);
2942 if (retval != STATUS_SUCCESS) {
2947 return STATUS_SUCCESS;
2950 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2951 struct rtsx_chip *chip, u32 start_sector,
2954 struct ms_info *ms_card = &chip->ms_card;
2955 bool mode_2k = false;
2958 u8 val, trans_mode, rw_tpc, rw_cmd;
2960 ms_set_err_code(chip, MS_NO_ERROR);
2962 ms_card->cleanup_counter = 0;
2964 if (CHK_MSHG(ms_card)) {
2965 if ((start_sector % 4) || (sector_cnt % 4)) {
2966 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2967 rw_tpc = PRO_READ_LONG_DATA;
2968 rw_cmd = PRO_READ_DATA;
2970 rw_tpc = PRO_WRITE_LONG_DATA;
2971 rw_cmd = PRO_WRITE_DATA;
2974 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2975 rw_tpc = PRO_READ_QUAD_DATA;
2976 rw_cmd = PRO_READ_2K_DATA;
2978 rw_tpc = PRO_WRITE_QUAD_DATA;
2979 rw_cmd = PRO_WRITE_2K_DATA;
2984 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2985 rw_tpc = PRO_READ_LONG_DATA;
2986 rw_cmd = PRO_READ_DATA;
2988 rw_tpc = PRO_WRITE_LONG_DATA;
2989 rw_cmd = PRO_WRITE_DATA;
2993 retval = ms_switch_clock(chip);
2994 if (retval != STATUS_SUCCESS) {
2999 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3000 trans_mode = MS_TM_AUTO_READ;
3002 trans_mode = MS_TM_AUTO_WRITE;
3004 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3010 if (ms_card->seq_mode) {
3011 if ((ms_card->pre_dir != srb->sc_data_direction) ||
3012 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
3014 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
3015 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
3016 !(val & MS_INT_BREQ) ||
3017 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3018 ms_card->seq_mode = 0;
3019 ms_card->total_sec_cnt = 0;
3020 if (val & MS_INT_BREQ) {
3021 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3022 if (retval != STATUS_SUCCESS) {
3027 rtsx_write_register(chip, RBCTL, RB_FLUSH,
3033 if (!ms_card->seq_mode) {
3034 ms_card->total_sec_cnt = 0;
3035 if (sector_cnt >= SEQ_START_CRITERIA) {
3036 if ((ms_card->capacity - start_sector) > 0xFE00)
3039 count = (u16)(ms_card->capacity - start_sector);
3041 if (count > sector_cnt) {
3043 ms_card->seq_mode = MODE_2K_SEQ;
3045 ms_card->seq_mode = MODE_512_SEQ;
3050 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3051 if (retval != STATUS_SUCCESS) {
3052 ms_card->seq_mode = 0;
3058 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3059 WAIT_INT, mode_2k, scsi_sg_count(srb),
3060 scsi_sglist(srb), scsi_bufflen(srb));
3061 if (retval != STATUS_SUCCESS) {
3062 ms_card->seq_mode = 0;
3063 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3064 rtsx_clear_ms_error(chip);
3066 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3067 chip->rw_need_retry = 0;
3068 dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
3074 if (val & MS_INT_BREQ)
3075 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3077 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3078 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3079 chip->rw_need_retry = 1;
3080 ms_auto_tune_clock(chip);
3087 if (ms_card->seq_mode) {
3088 ms_card->pre_sec_addr = start_sector;
3089 ms_card->pre_sec_cnt = sector_cnt;
3090 ms_card->pre_dir = srb->sc_data_direction;
3091 ms_card->total_sec_cnt += sector_cnt;
3094 return STATUS_SUCCESS;
3097 static int mspro_read_format_progress(struct rtsx_chip *chip,
3098 const int short_data_len)
3100 struct ms_info *ms_card = &chip->ms_card;
3102 u32 total_progress, cur_progress;
3106 dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
3109 retval = ms_switch_clock(chip);
3110 if (retval != STATUS_SUCCESS) {
3111 ms_card->format_status = FORMAT_FAIL;
3116 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3117 if (retval != STATUS_SUCCESS) {
3118 ms_card->format_status = FORMAT_FAIL;
3123 if (!(tmp & MS_INT_BREQ)) {
3124 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
3125 MS_INT_ERR)) == MS_INT_CED) {
3126 ms_card->format_status = FORMAT_SUCCESS;
3127 return STATUS_SUCCESS;
3129 ms_card->format_status = FORMAT_FAIL;
3134 if (short_data_len >= 256)
3137 cnt = (u8)short_data_len;
3139 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3141 if (retval != STATUS_SUCCESS) {
3142 ms_card->format_status = FORMAT_FAIL;
3147 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3149 if (retval != STATUS_SUCCESS) {
3150 ms_card->format_status = FORMAT_FAIL;
3155 total_progress = (data[0] << 24) | (data[1] << 16) |
3156 (data[2] << 8) | data[3];
3157 cur_progress = (data[4] << 24) | (data[5] << 16) |
3158 (data[6] << 8) | data[7];
3160 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3161 total_progress, cur_progress);
3163 if (total_progress == 0) {
3164 ms_card->progress = 0;
3166 u64 ulltmp = (u64)cur_progress * (u64)65535;
3168 do_div(ulltmp, total_progress);
3169 ms_card->progress = (u16)ulltmp;
3171 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3173 for (i = 0; i < 5000; i++) {
3174 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3175 if (retval != STATUS_SUCCESS) {
3176 ms_card->format_status = FORMAT_FAIL;
3180 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3181 MS_INT_BREQ | MS_INT_ERR))
3187 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3188 if (retval != STATUS_SUCCESS) {
3189 ms_card->format_status = FORMAT_FAIL;
3195 ms_card->format_status = FORMAT_FAIL;
3200 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3201 ms_card->format_status = FORMAT_FAIL;
3206 if (tmp & MS_INT_CED) {
3207 ms_card->format_status = FORMAT_SUCCESS;
3208 ms_card->pro_under_formatting = 0;
3209 } else if (tmp & MS_INT_BREQ) {
3210 ms_card->format_status = FORMAT_IN_PROGRESS;
3212 ms_card->format_status = FORMAT_FAIL;
3213 ms_card->pro_under_formatting = 0;
3218 return STATUS_SUCCESS;
3221 void mspro_polling_format_status(struct rtsx_chip *chip)
3223 struct ms_info *ms_card = &chip->ms_card;
3226 if (ms_card->pro_under_formatting &&
3227 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3228 rtsx_set_stat(chip, RTSX_STAT_RUN);
3230 for (i = 0; i < 65535; i++) {
3231 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3232 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3238 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3239 int short_data_len, bool quick_format)
3241 struct ms_info *ms_card = &chip->ms_card;
3246 retval = ms_switch_clock(chip);
3247 if (retval != STATUS_SUCCESS) {
3252 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3253 if (retval != STATUS_SUCCESS) {
3259 switch (short_data_len) {
3275 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3276 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3277 NO_WAIT_INT, buf, 2);
3278 if (retval == STATUS_SUCCESS)
3281 if (i == MS_MAX_RETRY_COUNT) {
3291 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3292 if (retval != STATUS_SUCCESS) {
3297 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3303 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3308 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3309 ms_card->pro_under_formatting = 1;
3310 ms_card->progress = 0;
3311 ms_card->format_status = FORMAT_IN_PROGRESS;
3312 return STATUS_SUCCESS;
3315 if (tmp & MS_INT_CED) {
3316 ms_card->pro_under_formatting = 0;
3317 ms_card->progress = 0;
3318 ms_card->format_status = FORMAT_SUCCESS;
3319 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3320 return STATUS_SUCCESS;
3327 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3328 u16 log_blk, u8 start_page, u8 end_page,
3329 u8 *buf, unsigned int *index,
3330 unsigned int *offset)
3332 struct ms_info *ms_card = &chip->ms_card;
3334 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3337 retval = ms_read_extra_data(chip, phy_blk, start_page,
3338 extra, MS_EXTRA_SIZE);
3339 if (retval == STATUS_SUCCESS) {
3340 if ((extra[1] & 0x30) != 0x30) {
3341 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3347 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3349 if (retval != STATUS_SUCCESS) {
3354 if (CHK_MS4BIT(ms_card))
3360 data[2] = (u8)(phy_blk >> 8);
3361 data[3] = (u8)phy_blk;
3363 data[5] = start_page;
3365 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3366 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3368 if (retval == STATUS_SUCCESS)
3371 if (i == MS_MAX_RETRY_COUNT) {
3376 ms_set_err_code(chip, MS_NO_ERROR);
3378 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3379 if (retval != STATUS_SUCCESS) {
3386 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3387 ms_set_err_code(chip, MS_NO_ERROR);
3389 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3390 ms_set_err_code(chip, MS_NO_CARD);
3395 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3396 if (retval != STATUS_SUCCESS) {
3401 if (val & INT_REG_CMDNK) {
3402 ms_set_err_code(chip, MS_CMD_NK);
3406 if (val & INT_REG_ERR) {
3407 if (val & INT_REG_BREQ) {
3408 retval = ms_read_status_reg(chip);
3409 if (retval != STATUS_SUCCESS) {
3410 if (!(chip->card_wp & MS_CARD)) {
3421 ms_set_err_code(chip,
3422 MS_FLASH_READ_ERROR);
3427 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3432 if (!(val & INT_REG_BREQ)) {
3433 ms_set_err_code(chip, MS_BREQ_ERROR);
3439 if (page_addr == (end_page - 1)) {
3440 if (!(val & INT_REG_CED)) {
3441 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3442 if (retval != STATUS_SUCCESS) {
3448 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3450 if (retval != STATUS_SUCCESS) {
3455 if (!(val & INT_REG_CED)) {
3456 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3461 trans_cfg = NO_WAIT_INT;
3463 trans_cfg = WAIT_INT;
3466 rtsx_init_cmd(chip);
3468 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3469 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3471 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3474 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3476 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3477 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3478 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3479 MS_TRANSFER_END, MS_TRANSFER_END);
3481 rtsx_send_cmd_no_wait(chip);
3483 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3484 scsi_sg_count(chip->srb),
3489 if (retval == -ETIMEDOUT) {
3490 ms_set_err_code(chip, MS_TO_ERROR);
3491 rtsx_clear_ms_error(chip);
3493 return STATUS_TIMEDOUT;
3496 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3497 if (retval != STATUS_SUCCESS) {
3498 ms_set_err_code(chip, MS_TO_ERROR);
3499 rtsx_clear_ms_error(chip);
3501 return STATUS_TIMEDOUT;
3503 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3504 ms_set_err_code(chip, MS_CRC16_ERROR);
3505 rtsx_clear_ms_error(chip);
3511 if (scsi_sg_count(chip->srb) == 0)
3515 return STATUS_SUCCESS;
3518 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3519 u16 new_blk, u16 log_blk, u8 start_page,
3520 u8 end_page, u8 *buf, unsigned int *index,
3521 unsigned int *offset)
3523 struct ms_info *ms_card = &chip->ms_card;
3525 u8 page_addr, val, data[16];
3529 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3531 if (retval != STATUS_SUCCESS) {
3536 if (CHK_MS4BIT(ms_card))
3542 data[2] = (u8)(old_blk >> 8);
3543 data[3] = (u8)old_blk;
3549 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3551 if (retval != STATUS_SUCCESS) {
3556 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3557 if (retval != STATUS_SUCCESS) {
3562 ms_set_err_code(chip, MS_NO_ERROR);
3563 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3565 if (retval != STATUS_SUCCESS) {
3571 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3572 SystemParm, (6 + MS_EXTRA_SIZE));
3573 if (retval != STATUS_SUCCESS) {
3578 ms_set_err_code(chip, MS_NO_ERROR);
3580 if (CHK_MS4BIT(ms_card))
3586 data[2] = (u8)(new_blk >> 8);
3587 data[3] = (u8)new_blk;
3588 if ((end_page - start_page) == 1)
3593 data[5] = start_page;
3596 data[8] = (u8)(log_blk >> 8);
3597 data[9] = (u8)log_blk;
3599 for (i = 0x0A; i < 0x10; i++)
3602 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3603 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3604 NO_WAIT_INT, data, 16);
3605 if (retval == STATUS_SUCCESS)
3608 if (i == MS_MAX_RETRY_COUNT) {
3613 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3614 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3615 if (retval == STATUS_SUCCESS)
3618 if (i == MS_MAX_RETRY_COUNT) {
3623 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3624 if (retval != STATUS_SUCCESS) {
3630 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3631 ms_set_err_code(chip, MS_NO_ERROR);
3633 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3634 ms_set_err_code(chip, MS_NO_CARD);
3639 if (val & INT_REG_CMDNK) {
3640 ms_set_err_code(chip, MS_CMD_NK);
3644 if (val & INT_REG_ERR) {
3645 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3649 if (!(val & INT_REG_BREQ)) {
3650 ms_set_err_code(chip, MS_BREQ_ERROR);
3657 rtsx_init_cmd(chip);
3659 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3660 0xFF, WRITE_PAGE_DATA);
3661 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3663 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3666 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3668 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3669 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3670 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3671 MS_TRANSFER_END, MS_TRANSFER_END);
3673 rtsx_send_cmd_no_wait(chip);
3675 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3676 scsi_sg_count(chip->srb),
3681 ms_set_err_code(chip, MS_TO_ERROR);
3682 rtsx_clear_ms_error(chip);
3684 if (retval == -ETIMEDOUT) {
3686 return STATUS_TIMEDOUT;
3692 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3693 if (retval != STATUS_SUCCESS) {
3698 if ((end_page - start_page) == 1) {
3699 if (!(val & INT_REG_CED)) {
3700 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3705 if (page_addr == (end_page - 1)) {
3706 if (!(val & INT_REG_CED)) {
3707 retval = ms_send_cmd(chip, BLOCK_END,
3709 if (retval != STATUS_SUCCESS) {
3715 retval = ms_read_bytes(chip, GET_INT, 1,
3716 NO_WAIT_INT, &val, 1);
3717 if (retval != STATUS_SUCCESS) {
3723 if ((page_addr == (end_page - 1)) ||
3724 (page_addr == ms_card->page_off)) {
3725 if (!(val & INT_REG_CED)) {
3726 ms_set_err_code(chip,
3727 MS_FLASH_WRITE_ERROR);
3734 if (scsi_sg_count(chip->srb) == 0)
3738 return STATUS_SUCCESS;
3741 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3742 u16 log_blk, u8 page_off)
3744 struct ms_info *ms_card = &chip->ms_card;
3747 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3748 page_off, ms_card->page_off + 1);
3749 if (retval != STATUS_SUCCESS) {
3754 seg_no = old_blk >> 9;
3756 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3757 MS_CLR_BAD_BLOCK_FLG(ms_card);
3758 ms_set_bad_block(chip, old_blk);
3760 retval = ms_erase_block(chip, old_blk);
3761 if (retval == STATUS_SUCCESS)
3762 ms_set_unused_block(chip, old_blk);
3765 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3767 return STATUS_SUCCESS;
3770 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3771 u16 log_blk, u8 start_page)
3776 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3778 if (retval != STATUS_SUCCESS) {
3784 return STATUS_SUCCESS;
3787 #ifdef MS_DELAY_WRITE
3788 int ms_delay_write(struct rtsx_chip *chip)
3790 struct ms_info *ms_card = &chip->ms_card;
3791 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3794 if (delay_write->delay_write_flag) {
3795 retval = ms_set_init_para(chip);
3796 if (retval != STATUS_SUCCESS) {
3801 delay_write->delay_write_flag = 0;
3802 retval = ms_finish_write(chip,
3803 delay_write->old_phyblock,
3804 delay_write->new_phyblock,
3805 delay_write->logblock,
3806 delay_write->pageoff);
3807 if (retval != STATUS_SUCCESS) {
3813 return STATUS_SUCCESS;
3817 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3819 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3820 set_sense_type(chip, SCSI_LUN(srb),
3821 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3823 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3826 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3827 u32 start_sector, u16 sector_cnt)
3829 struct ms_info *ms_card = &chip->ms_card;
3830 unsigned int lun = SCSI_LUN(srb);
3832 unsigned int index = 0, offset = 0;
3833 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3834 u8 start_page, end_page = 0, page_cnt;
3836 #ifdef MS_DELAY_WRITE
3837 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3840 ms_set_err_code(chip, MS_NO_ERROR);
3842 ms_card->cleanup_counter = 0;
3844 ptr = (u8 *)scsi_sglist(srb);
3846 retval = ms_switch_clock(chip);
3847 if (retval != STATUS_SUCCESS) {
3848 ms_rw_fail(srb, chip);
3853 log_blk = (u16)(start_sector >> ms_card->block_shift);
3854 start_page = (u8)(start_sector & ms_card->page_off);
3856 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3857 if (log_blk < ms_start_idx[seg_no + 1])
3861 if (ms_card->segment[seg_no].build_flag == 0) {
3862 retval = ms_build_l2p_tbl(chip, seg_no);
3863 if (retval != STATUS_SUCCESS) {
3864 chip->card_fail |= MS_CARD;
3865 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3871 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3872 #ifdef MS_DELAY_WRITE
3873 if (delay_write->delay_write_flag &&
3874 (delay_write->logblock == log_blk) &&
3875 (start_page > delay_write->pageoff)) {
3876 delay_write->delay_write_flag = 0;
3877 retval = ms_copy_page(chip,
3878 delay_write->old_phyblock,
3879 delay_write->new_phyblock,
3881 delay_write->pageoff, start_page);
3882 if (retval != STATUS_SUCCESS) {
3883 set_sense_type(chip, lun,
3884 SENSE_TYPE_MEDIA_WRITE_ERR);
3888 old_blk = delay_write->old_phyblock;
3889 new_blk = delay_write->new_phyblock;
3890 } else if (delay_write->delay_write_flag &&
3891 (delay_write->logblock == log_blk) &&
3892 (start_page == delay_write->pageoff)) {
3893 delay_write->delay_write_flag = 0;
3894 old_blk = delay_write->old_phyblock;
3895 new_blk = delay_write->new_phyblock;
3897 retval = ms_delay_write(chip);
3898 if (retval != STATUS_SUCCESS) {
3899 set_sense_type(chip, lun,
3900 SENSE_TYPE_MEDIA_WRITE_ERR);
3905 old_blk = ms_get_l2p_tbl
3907 log_blk - ms_start_idx[seg_no]);
3908 new_blk = ms_get_unused_block(chip, seg_no);
3909 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3910 set_sense_type(chip, lun,
3911 SENSE_TYPE_MEDIA_WRITE_ERR);
3916 retval = ms_prepare_write(chip, old_blk, new_blk,
3917 log_blk, start_page);
3918 if (retval != STATUS_SUCCESS) {
3919 if (detect_card_cd(chip, MS_CARD) !=
3923 SENSE_TYPE_MEDIA_NOT_PRESENT);
3927 set_sense_type(chip, lun,
3928 SENSE_TYPE_MEDIA_WRITE_ERR);
3932 #ifdef MS_DELAY_WRITE
3936 #ifdef MS_DELAY_WRITE
3937 retval = ms_delay_write(chip);
3938 if (retval != STATUS_SUCCESS) {
3939 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3940 set_sense_type(chip, lun,
3941 SENSE_TYPE_MEDIA_NOT_PRESENT);
3945 set_sense_type(chip, lun,
3946 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3951 old_blk = ms_get_l2p_tbl(chip, seg_no,
3952 log_blk - ms_start_idx[seg_no]);
3953 if (old_blk == 0xFFFF) {
3954 set_sense_type(chip, lun,
3955 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3961 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3962 seg_no, old_blk, new_blk);
3964 while (total_sec_cnt) {
3965 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3966 end_page = ms_card->page_off + 1;
3968 end_page = start_page + (u8)total_sec_cnt;
3970 page_cnt = end_page - start_page;
3972 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3973 start_page, end_page, page_cnt);
3975 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3976 retval = ms_read_multiple_pages(chip,
3978 start_page, end_page,
3979 ptr, &index, &offset);
3981 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3982 log_blk, start_page,
3983 end_page, ptr, &index,
3987 if (retval != STATUS_SUCCESS) {
3988 toggle_gpio(chip, 1);
3989 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3990 set_sense_type(chip, lun,
3991 SENSE_TYPE_MEDIA_NOT_PRESENT);
3995 ms_rw_fail(srb, chip);
4000 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4001 if (end_page == (ms_card->page_off + 1)) {
4002 retval = ms_erase_block(chip, old_blk);
4003 if (retval == STATUS_SUCCESS)
4004 ms_set_unused_block(chip, old_blk);
4006 ms_set_l2p_tbl(chip, seg_no,
4007 log_blk - ms_start_idx[seg_no],
4012 total_sec_cnt -= page_cnt;
4013 if (scsi_sg_count(srb) == 0)
4014 ptr += page_cnt * 512;
4016 if (total_sec_cnt == 0)
4021 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
4023 if (log_blk < ms_start_idx[seg_no + 1])
4027 if (ms_card->segment[seg_no].build_flag == 0) {
4028 retval = ms_build_l2p_tbl(chip, seg_no);
4029 if (retval != STATUS_SUCCESS) {
4030 chip->card_fail |= MS_CARD;
4031 set_sense_type(chip, lun,
4032 SENSE_TYPE_MEDIA_NOT_PRESENT);
4038 old_blk = ms_get_l2p_tbl(chip, seg_no,
4039 log_blk - ms_start_idx[seg_no]);
4040 if (old_blk == 0xFFFF) {
4041 ms_rw_fail(srb, chip);
4046 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4047 new_blk = ms_get_unused_block(chip, seg_no);
4048 if (new_blk == 0xFFFF) {
4049 ms_rw_fail(srb, chip);
4055 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4056 seg_no, old_blk, new_blk);
4061 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4062 if (end_page < (ms_card->page_off + 1)) {
4063 #ifdef MS_DELAY_WRITE
4064 delay_write->delay_write_flag = 1;
4065 delay_write->old_phyblock = old_blk;
4066 delay_write->new_phyblock = new_blk;
4067 delay_write->logblock = log_blk;
4068 delay_write->pageoff = end_page;
4070 retval = ms_finish_write(chip, old_blk, new_blk,
4072 if (retval != STATUS_SUCCESS) {
4073 if (detect_card_cd(chip, MS_CARD) !=
4077 SENSE_TYPE_MEDIA_NOT_PRESENT);
4082 ms_rw_fail(srb, chip);
4090 scsi_set_resid(srb, 0);
4092 return STATUS_SUCCESS;
4095 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4096 u32 start_sector, u16 sector_cnt)
4098 struct ms_info *ms_card = &chip->ms_card;
4101 if (CHK_MSPRO(ms_card))
4102 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4105 retval = ms_rw_multi_sector(srb, chip, start_sector,
4111 void ms_free_l2p_tbl(struct rtsx_chip *chip)
4113 struct ms_info *ms_card = &chip->ms_card;
4116 if (ms_card->segment) {
4117 for (i = 0; i < ms_card->segment_cnt; i++) {
4118 vfree(ms_card->segment[i].l2p_table);
4119 ms_card->segment[i].l2p_table = NULL;
4120 vfree(ms_card->segment[i].free_table);
4121 ms_card->segment[i].free_table = NULL;
4123 vfree(ms_card->segment);
4124 ms_card->segment = NULL;
4128 #ifdef SUPPORT_MAGIC_GATE
4130 #ifdef READ_BYTES_WAIT_INT
4131 static int ms_poll_int(struct rtsx_chip *chip)
4136 rtsx_init_cmd(chip);
4138 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4140 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4141 if (retval != STATUS_SUCCESS) {
4146 val = *rtsx_get_cmd_data(chip);
4147 if (val & MS_INT_ERR) {
4152 return STATUS_SUCCESS;
4156 #ifdef MS_SAMPLE_INT_ERR
4157 static int check_ms_err(struct rtsx_chip *chip)
4162 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4163 if (retval != STATUS_SUCCESS)
4165 if (val & MS_TRANSFER_ERR)
4168 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4169 if (retval != STATUS_SUCCESS)
4172 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4178 static int check_ms_err(struct rtsx_chip *chip)
4183 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4184 if (retval != STATUS_SUCCESS)
4186 if (val & MS_TRANSFER_ERR)
4193 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4204 data[6] = entry_num;
4207 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4208 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4210 if (retval == STATUS_SUCCESS)
4213 if (i == MS_MAX_RETRY_COUNT) {
4218 if (check_ms_err(chip)) {
4219 rtsx_clear_ms_error(chip);
4224 return STATUS_SUCCESS;
4227 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4234 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4236 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4238 if (retval != STATUS_SUCCESS) {
4249 buf[5] = mg_entry_num;
4251 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4252 NO_WAIT_INT, buf, 6);
4253 if (retval != STATUS_SUCCESS) {
4258 return STATUS_SUCCESS;
4261 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4265 unsigned int lun = SCSI_LUN(srb);
4266 u8 buf1[32], buf2[12];
4268 if (scsi_bufflen(srb) < 12) {
4269 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4274 ms_cleanup_work(chip);
4276 retval = ms_switch_clock(chip);
4277 if (retval != STATUS_SUCCESS) {
4282 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4283 if (retval != STATUS_SUCCESS) {
4284 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4289 memset(buf1, 0, 32);
4290 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4291 for (i = 0; i < 8; i++)
4292 buf1[8 + i] = buf2[4 + i];
4294 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4296 if (retval != STATUS_SUCCESS) {
4297 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4301 if (check_ms_err(chip)) {
4302 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4303 rtsx_clear_ms_error(chip);
4308 return STATUS_SUCCESS;
4311 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4313 int retval = STATUS_FAIL;
4315 unsigned int lun = SCSI_LUN(srb);
4318 ms_cleanup_work(chip);
4320 retval = ms_switch_clock(chip);
4321 if (retval != STATUS_SUCCESS) {
4326 buf = kmalloc(1540, GFP_KERNEL);
4329 return STATUS_ERROR;
4337 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4338 if (retval != STATUS_SUCCESS) {
4339 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4344 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4345 3, WAIT_INT, 0, 0, buf + 4, 1536);
4346 if (retval != STATUS_SUCCESS) {
4347 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4348 rtsx_clear_ms_error(chip);
4352 if (check_ms_err(chip)) {
4353 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4354 rtsx_clear_ms_error(chip);
4356 retval = STATUS_FAIL;
4360 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4361 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4368 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4370 struct ms_info *ms_card = &chip->ms_card;
4374 unsigned int lun = SCSI_LUN(srb);
4377 ms_cleanup_work(chip);
4379 retval = ms_switch_clock(chip);
4380 if (retval != STATUS_SUCCESS) {
4385 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4386 if (retval != STATUS_SUCCESS) {
4387 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4392 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4394 if (retval != STATUS_SUCCESS) {
4395 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4399 if (check_ms_err(chip)) {
4400 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4401 rtsx_clear_ms_error(chip);
4406 memcpy(ms_card->magic_gate_id, buf, 16);
4408 #ifdef READ_BYTES_WAIT_INT
4409 retval = ms_poll_int(chip);
4410 if (retval != STATUS_SUCCESS) {
4411 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4417 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4418 if (retval != STATUS_SUCCESS) {
4419 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4424 bufflen = min_t(int, 12, scsi_bufflen(srb));
4425 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4427 for (i = 0; i < 8; i++)
4428 buf[i] = buf[4 + i];
4430 for (i = 0; i < 24; i++)
4433 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4434 32, WAIT_INT, buf, 32);
4435 if (retval != STATUS_SUCCESS) {
4436 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4440 if (check_ms_err(chip)) {
4441 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4442 rtsx_clear_ms_error(chip);
4447 ms_card->mg_auth = 0;
4449 return STATUS_SUCCESS;
4452 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4454 struct ms_info *ms_card = &chip->ms_card;
4457 unsigned int lun = SCSI_LUN(srb);
4458 u8 buf1[32], buf2[36];
4460 ms_cleanup_work(chip);
4462 retval = ms_switch_clock(chip);
4463 if (retval != STATUS_SUCCESS) {
4468 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4469 if (retval != STATUS_SUCCESS) {
4470 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4475 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4477 if (retval != STATUS_SUCCESS) {
4478 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4482 if (check_ms_err(chip)) {
4483 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4484 rtsx_clear_ms_error(chip);
4494 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4495 memcpy(buf2 + 20, buf1, 16);
4497 bufflen = min_t(int, 36, scsi_bufflen(srb));
4498 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4500 #ifdef READ_BYTES_WAIT_INT
4501 retval = ms_poll_int(chip);
4502 if (retval != STATUS_SUCCESS) {
4503 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4509 return STATUS_SUCCESS;
4512 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4514 struct ms_info *ms_card = &chip->ms_card;
4518 unsigned int lun = SCSI_LUN(srb);
4521 ms_cleanup_work(chip);
4523 retval = ms_switch_clock(chip);
4524 if (retval != STATUS_SUCCESS) {
4529 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4530 if (retval != STATUS_SUCCESS) {
4531 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4536 bufflen = min_t(int, 12, scsi_bufflen(srb));
4537 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4539 for (i = 0; i < 8; i++)
4540 buf[i] = buf[4 + i];
4542 for (i = 0; i < 24; i++)
4545 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4547 if (retval != STATUS_SUCCESS) {
4548 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4552 if (check_ms_err(chip)) {
4553 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4554 rtsx_clear_ms_error(chip);
4559 ms_card->mg_auth = 1;
4561 return STATUS_SUCCESS;
4564 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4566 struct ms_info *ms_card = &chip->ms_card;
4569 unsigned int lun = SCSI_LUN(srb);
4572 ms_cleanup_work(chip);
4574 retval = ms_switch_clock(chip);
4575 if (retval != STATUS_SUCCESS) {
4580 buf = kmalloc(1028, GFP_KERNEL);
4583 return STATUS_ERROR;
4591 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4592 if (retval != STATUS_SUCCESS) {
4593 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4598 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4599 2, WAIT_INT, 0, 0, buf + 4, 1024);
4600 if (retval != STATUS_SUCCESS) {
4601 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4602 rtsx_clear_ms_error(chip);
4606 if (check_ms_err(chip)) {
4607 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4608 rtsx_clear_ms_error(chip);
4610 retval = STATUS_FAIL;
4614 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4615 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4622 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4624 struct ms_info *ms_card = &chip->ms_card;
4627 #ifdef MG_SET_ICV_SLOW
4630 unsigned int lun = SCSI_LUN(srb);
4633 ms_cleanup_work(chip);
4635 retval = ms_switch_clock(chip);
4636 if (retval != STATUS_SUCCESS) {
4641 buf = kmalloc(1028, GFP_KERNEL);
4644 return STATUS_ERROR;
4647 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4648 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4650 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4651 if (retval != STATUS_SUCCESS) {
4652 if (ms_card->mg_auth == 0) {
4653 if ((buf[5] & 0xC0) != 0)
4656 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4658 set_sense_type(chip, lun,
4659 SENSE_TYPE_MG_WRITE_ERR);
4661 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4667 #ifdef MG_SET_ICV_SLOW
4668 for (i = 0; i < 2; i++) {
4671 rtsx_init_cmd(chip);
4673 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4674 0xFF, PRO_WRITE_LONG_DATA);
4675 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4676 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4679 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4681 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4682 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4683 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4684 MS_TRANSFER_END, MS_TRANSFER_END);
4686 rtsx_send_cmd_no_wait(chip);
4688 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4689 512, 0, DMA_TO_DEVICE, 3000);
4690 if ((retval < 0) || check_ms_err(chip)) {
4691 rtsx_clear_ms_error(chip);
4692 if (ms_card->mg_auth == 0) {
4693 if ((buf[5] & 0xC0) != 0)
4696 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4698 set_sense_type(chip, lun,
4699 SENSE_TYPE_MG_WRITE_ERR);
4701 set_sense_type(chip, lun,
4702 SENSE_TYPE_MG_WRITE_ERR);
4704 retval = STATUS_FAIL;
4710 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4711 2, WAIT_INT, 0, 0, buf + 4, 1024);
4712 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4713 rtsx_clear_ms_error(chip);
4714 if (ms_card->mg_auth == 0) {
4715 if ((buf[5] & 0xC0) != 0)
4718 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4720 set_sense_type(chip, lun,
4721 SENSE_TYPE_MG_WRITE_ERR);
4723 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4735 #endif /* SUPPORT_MAGIC_GATE */
4737 void ms_cleanup_work(struct rtsx_chip *chip)
4739 struct ms_info *ms_card = &chip->ms_card;
4741 if (CHK_MSPRO(ms_card)) {
4742 if (ms_card->seq_mode) {
4743 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4744 mspro_stop_seq_mode(chip);
4745 ms_card->cleanup_counter = 0;
4747 if (CHK_MSHG(ms_card)) {
4748 rtsx_write_register(chip, MS_CFG,
4749 MS_2K_SECTOR_MODE, 0x00);
4752 #ifdef MS_DELAY_WRITE
4753 else if ((!CHK_MSPRO(ms_card)) &&
4754 ms_card->delay_write.delay_write_flag) {
4755 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4756 ms_delay_write(chip);
4757 ms_card->cleanup_counter = 0;
4762 int ms_power_off_card3v3(struct rtsx_chip *chip)
4766 retval = disable_card_clock(chip, MS_CARD);
4767 if (retval != STATUS_SUCCESS) {
4772 if (chip->asic_code) {
4773 retval = ms_pull_ctl_disable(chip);
4774 if (retval != STATUS_SUCCESS) {
4779 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4780 FPGA_MS_PULL_CTL_BIT | 0x20,
4781 FPGA_MS_PULL_CTL_BIT);
4787 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4792 if (!chip->ft2_fast_mode) {
4793 retval = card_power_off(chip, MS_CARD);
4794 if (retval != STATUS_SUCCESS) {
4800 return STATUS_SUCCESS;
4803 int release_ms_card(struct rtsx_chip *chip)
4805 struct ms_info *ms_card = &chip->ms_card;
4808 #ifdef MS_DELAY_WRITE
4809 ms_card->delay_write.delay_write_flag = 0;
4811 ms_card->pro_under_formatting = 0;
4813 chip->card_ready &= ~MS_CARD;
4814 chip->card_fail &= ~MS_CARD;
4815 chip->card_wp &= ~MS_CARD;
4817 ms_free_l2p_tbl(chip);
4819 memset(ms_card->raw_sys_info, 0, 96);
4820 #ifdef SUPPORT_PCGL_1P18
4821 memset(ms_card->raw_model_name, 0, 48);
4824 retval = ms_power_off_card3v3(chip);
4825 if (retval != STATUS_SUCCESS) {
4830 return STATUS_SUCCESS;